TWI456676B - 微細間距凸塊製造方法及其結構 - Google Patents
微細間距凸塊製造方法及其結構 Download PDFInfo
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- TWI456676B TWI456676B TW101105172A TW101105172A TWI456676B TW I456676 B TWI456676 B TW I456676B TW 101105172 A TW101105172 A TW 101105172A TW 101105172 A TW101105172 A TW 101105172A TW I456676 B TWI456676 B TW I456676B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/11—Manufacturing methods
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Wire Bonding (AREA)
Claims (11)
- 一種微細間距凸塊製造方法,其至少包含下列步驟: 提供一矽基板,該矽基板係具有一表面、複數個設置於該表面之銲墊及一設置於該表面之保護層,該保護層係具有複數個開口,且該些開口係顯露該些銲墊; 形成一含鈦金屬層於該矽基板,該含鈦金屬層係覆蓋該保護層及該些銲墊,且該含鈦金屬層係具有複數個第一區段及複數個位於該些第一區段外側之第二區段; 形成一光阻層於該含鈦金屬層; 圖案化該光阻層以形成複數個開槽,該些開槽係對應該含鈦金屬層之該些第一區段; 形成複數個銅凸塊於該些開槽,各該銅凸塊係具有一第一頂面及一環壁; 進行一加熱步驟,以擴大該光阻層之各該開槽,且該光阻層係受熱形成為複數個本體部及複數個可移除部; 對該光阻層進行一蝕刻步驟,以移除該些可移除部並顯露出該含鈦金屬層; 形成複數個凸塊保護層於該含鈦金屬層、各該銅凸塊之該第一頂面及該環壁,各該凸塊保護層係具有一凸塊覆蓋部及一金屬層覆蓋部,該凸塊覆蓋部係包覆各該銅凸塊之該第一頂面及該環壁且該凸塊覆蓋部係具有一第二頂面; 形成複數個可潤濕層於該些第二頂面; 移除該光阻層之該些本體部;以及 移除該含鈦金屬層之該些第二區段,以使該含鈦金屬層之各該第一區段形成為一位於各該銅凸塊下之凸塊下金屬層,且各該凸塊下金屬層係具有一位於各該銅凸塊下之凸塊承載部及一凸出於各該銅凸塊之該環壁之延伸部,各該凸塊保護層之該金屬層覆蓋部係覆蓋各該凸塊下金屬層之該延伸部。
- 如申請專利範圍第1項所述之微細間距凸塊製造方法,其中對該光阻層進行一蝕刻步驟中所使用之蝕刻方法係為電漿乾式蝕刻法。
- 如申請專利範圍第1項所述之微細間距凸塊製造方法,其中各該凸塊覆蓋部係具有一第一外側壁,各該金屬層覆蓋部係具有一第二外側壁且該金屬層覆蓋部係凸出於該凸塊覆蓋部之該第一外側壁。
- 如申請專利範圍第3項所述之微細間距凸塊製造方法,其中各該凸塊下金屬層之該延伸部係具有一第三外側壁,該第三外側壁係與該第二外側壁平齊。
- 如申請專利範圍第1項所述之微細間距凸塊製造方法,其中該加熱步驟之玻璃轉換溫度係介於70~140℃之間。
- 如申請專利範圍第1項所述之微細間距凸塊製造方法,其中該些凸塊保護層之材質係選自於鎳、鈀或金其中之一。
- 如申請專利範圍第1項所述之微細間距凸塊製造方法,其中該些凸塊下金屬層之材質係選自於鈦/鎢/金、鈦/銅或鈦/鎢/銅其中之一。
- 一種微細間距凸塊結構,其至少包含: 一矽基板,其係具有一表面、複數個設置於該表面之銲墊及一設置於該表面之保護層,該保護層係具有複數個開口,且該些開口係顯露該些銲墊; 複數個凸塊下金屬層,其係形成於該些銲墊,各該凸塊下金屬層係具有一凸塊承載部及一延伸部;複數個銅凸塊,其係形成於該些凸塊下金屬層,且各該銅凸塊係具有一第一頂面及一環壁,各該凸塊下金屬層之該凸塊承載部係位於各該銅凸塊下,各該凸塊下金屬層之該延伸部係凸出於各該銅凸塊之該環壁;複數個凸塊保護層,其係形成於該些凸塊下金屬層之該些延伸部、各該銅凸塊之該第一頂面及該環壁,各該凸塊保護層係具有一凸塊覆蓋部及一金屬層覆蓋部,各該凸塊覆蓋部係包覆各該銅凸塊之該第一頂面及該環壁且該凸塊覆蓋部係具有一第二頂面,各該金屬層覆蓋部係覆蓋各該延伸部,各該凸塊覆蓋部係具有一第一外側壁及一第一寬度,各該金屬層覆蓋部係具有一第二外側壁及一第二寬度,該金屬層覆蓋部係凸出於該凸塊覆蓋部之該第一外側壁且該第二寬度大於該第一寬度;以及複數個可潤濕層,其係形成於該些凸塊覆蓋部之該些第二頂面。
- 如申請專利範圍第8項所述之微細間距凸塊結構,其中各該凸塊下金屬層之該延伸部係具有一第三外側壁,該第三外側壁係與該第二外側壁平齊。
- 如申請專利範圍第8項所述之微細間距凸塊結構,其中該些凸塊保護層之材質係選自於鎳、鈀或金其中之一。
- 如申請專利範圍第8項所述之微細間距凸塊結構,其中該些凸塊下金屬層之材質係選自於鈦/鎢/金、鈦/銅或鈦/鎢/銅其中之一。
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TW101105172A TWI456676B (zh) | 2012-02-17 | 2012-02-17 | 微細間距凸塊製造方法及其結構 |
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Citations (2)
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TW201128753A (en) * | 2010-02-04 | 2011-08-16 | Taiwan Semiconductor Mfg | Semiconductor devices, packaging assemblies, and method for manufacturing semiconductor devices |
TW201207967A (en) * | 2010-08-12 | 2012-02-16 | Taiwan Semiconductor Mfg | Method of forming an integrated circuit device |
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TW201128753A (en) * | 2010-02-04 | 2011-08-16 | Taiwan Semiconductor Mfg | Semiconductor devices, packaging assemblies, and method for manufacturing semiconductor devices |
TW201207967A (en) * | 2010-08-12 | 2012-02-16 | Taiwan Semiconductor Mfg | Method of forming an integrated circuit device |
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