CN103367243B - 通过氧化形成浅通孔 - Google Patents

通过氧化形成浅通孔 Download PDF

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Publication number
CN103367243B
CN103367243B CN201210431850.8A CN201210431850A CN103367243B CN 103367243 B CN103367243 B CN 103367243B CN 201210431850 A CN201210431850 A CN 201210431850A CN 103367243 B CN103367243 B CN 103367243B
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layer
sensor contacts
contact pads
external contact
conductive covering
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CN103367243A (zh
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黄铃雅
阮琪盛
曾建霖
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Abstract

用于在位于半导体表面上的暴露导电通孔的顶部上构建浅凹进阱的方法以及由此形成的装置。随后用诸如氮化钽(TaN)层的导电覆盖层填充浅凹进阱，从而防止或者减少氧化，否则当暴露于空气时可能自然发生氧化或者在凸块下金属化工艺期间可能发生氧化。本发明提供通过氧化形成浅通孔。

Description

通过氧化形成浅通孔
技术领域
本发明涉及一种形成半导体器件的方法及由此形成的半导体器件，具体而言，本发明涉及通过氧化形成浅通孔。
背景技术
通常，集成电路(IC)包括形成在衬底上的电子元件，诸如晶体管、电容器等。然后在电子元件上方形成一层或多层金属层以在电子元件之间提供电连接以及提供与外部器件的电连接。
为了提供更小的IC并改进性能(诸如增加速度和降低能耗)，半导体产业的发展趋向于集成电路的微型化或按比例缩小。虽然铝和铝合金是过去在集成电路中最常用的导线材料，当前趋向于IC微型化使采用铜作为导电材料成为必需，因为铜具有比铝更低的活化能，容许比铝更高的电流密度，比铝更好的电特性，并具有比铝更高的导热性、以及降低的电阻和更高的熔点。
从铝到铜导线的变化在制造工艺方面引入了新的挑战。例如，当暴露于氧时，铜表面更易发生氧化。这对于暴露于空气的铜表面可能出现接合问题。
发明内容
为了解决现有技术中存在的问题，根据本发明的一个方面，提供了一种形成半导体器件的方法，所述方法包括：提供衬底，在所述衬底上形成有一个或多个外部接触焊盘和一个或多个传感器接触件；使所述一个或多个传感器接触件凹进，从而形成凹槽；在所述凹槽内形成导电覆盖层；以及在所述一个或多个外部接触焊盘上方形成外部接触件。
在上述方法中，其中，所述导电覆盖层包含氮化钽层。
在上述方法中，其中，至少部分地通过氧化所述一个或多个传感器接触件的一部分来实施所述凹进。
在上述方法中，其中，至少部分地通过氧化所述一个或多个传感器接触件的一部分来实施所述凹进，其中，至少部分地通过采用氧等离子体工艺来实施所述氧化。
在上述方法中，其中，至少部分地通过氧化所述一个或多个传感器接触件的一部分来实施所述凹进，还包括采用化学机械抛光工艺去除所述一个或多个传感器接触件的氧化部分。
在上述方法中，其中，所述衬底包括介电层，穿过所述介电层形成所述一个或多个传感器接触件，所述导电覆盖层的上表面与所述介电层的上表面共面。
在上述方法中，其中，所述导电覆盖层的厚度为约至约
在上述方法中，还包括在所述一个或多个外部接触焊盘以及所述一个或多个传感器接触件上方形成掩模层，图案化所述掩模层以暴露出所述一个或多个传感器接触件，经图案化的掩模层在氧化工艺期间保护所述一个或多个外部接触焊盘。
在上述方法中，还包括形成电连接至所述传感器接触件的自组装单层(SAM)。
根据本发明的另一方面，还提供了一种形成半导体器件的方法，所述方法包括：提供衬底，在所述衬底上形成有一个或多个外部接触焊盘和一个或多个传感器接触件；在所述一个或多个外部接触焊盘和所述一个或多个传感器接触件上方形成掩模层；图案化所述掩模层以暴露出所述一个或多个传感器接触件，留下被保护的所述一个或多个外部接触焊盘；氧化所述一个或多个传感器接触件的上表面；以及用导电覆盖层替换所述一个或多个传感器接触件的氧化部分。
在上述方法中，其中，至少部分地通过采用氧等离子体工艺来实施所述氧化。
在上述方法中，其中，至少部分地通过采用化学机械抛光工艺实施所述替换。
在上述方法中，其中，所述导电覆盖层的厚度为约至约
在上述方法中，还包括形成电连接至所述传感器接触件的自组装单层(SAM)。
在上述方法中，其中，所述导电覆盖层包含氮化钽。
根据本发明的又一方面，还提供了一种装置，包括：衬底，具有上覆介电层；一个或多个外部接触焊盘和延伸穿过所述介电层的一个或多个传感器接触件，所述一个或多个传感器接触件被凹进成低于所述介电层的上表面；导电覆盖层，位于所述一个或多个传感器接触件中的每一个的上方，所述导电覆盖层的上表面与所述介电层的上表面共面；以及外部接触件，直接位于所述一个或多个外部接触焊盘中相应的外部接触焊盘的上面。
在上述装置中，其中，所述导电覆盖层包含氮化钽层。
在上述装置中，其中，所述一个或多个外部接触焊盘和所述一个或多个传感器接触件包含铜。
在上述装置中，还包括电连接至所述传感器接触件的自组装单层(SAM)。
在上述装置中，其中，所述导电覆盖层的厚度为约至约
附图说明
为了更充分地理解本发明及其优点，现在将结合附图所做的以下描述作为参考，其中：
图1至图12示出制造根据实施例的半导体器件的多个中间阶段。
具体实施方式
在下面详细讨论本发明实施例的制造和使用。然而，应该理解，实施例提供了许多可以在各种具体环境中实现的可应用的发明构思。所讨论的具体实施例仅仅是制造和使用本发明的示例性具体方式，而不用于限制本发明的范围。
关于具体环境(即，采用Cu氧化工艺在暴露的铜互连表面中形成浅通孔阱形成)下的实施例描述本发明。然而，本发明也可以适用于期望限制暴露的Cu表面上的污染或者增加半导体Cu表面层和外部器件之间的接合质量的其他设计。
图1至图12示出具有暴露的铜(Cu)互连件的器件(诸如生物传感器半导体器件)暴露于氧化工艺的实施例的多个截面图。如下文更详细说明的，氧化工艺导致在暴露的铜表面上形成铜氧化物。然后去除铜氧化物，从而在暴露的铜表面上形成浅通孔阱。然后可以用导电覆盖层(诸如氮化钽(TaN))填充位于铜表面上的浅通孔阱，从而在接合外部引线或器件之前密封并防止发生表面氧化。
首先参照图1，提供具有衬底110的器件100，诸如生物传感器半导体器件。衬底110可以包含互连起来用于执行一个或多个功能的电器件，诸如各种N型金属氧化物半导体(NMOS)和/或P型金属氧化物半导体(PMOS)器件，诸如晶体管、电容器、电阻器、二极管、光电二极管、熔丝等。功能可以包括存储器结构、处理结构、传感器、放大器、功率分配器、输入/输出电路等。本领域普通技术人员将理解提供上面实例仅用于说明的目的以便进一步说明一些示例性实施例的应用，并不意味着以任何方式限制本发明。对于给定的应用，适当时也可以使用其他电路。衬底110还可以包括一个或多个介电层和/或金属化层，在各种电器件之间提供电连接并形成电路。
如图1所示，器件100可以包括一个或多个金属化层。通常，金属化层包含被一个或多个介电层分开的导电材料层，并用于在电器件或层之间按照路线发送电信号以及用于提供外部电气连接。例如，图1示出了其中形成有互连件111的最上层金属间介电(IMD)层112。介电层(诸如IMD层112)可以由通过等离子体增强CVD(PECVD)技术或高密度等离子体CVD(HDPCVD)等形成的电介质或低K电介质材料(诸如氟硅酸盐玻璃(FSG))形成，并可以包括中间蚀刻停止层。其他材料可以包括例如SiC、TEOS、硬黑金刚石(HBD)等。可以通过采用光刻技术在IMD层112上沉积并图案化光刻胶材料以暴露出待成为互连件111的部分IMD层112，从而在最上层IMD层112中形成互连件111。可以采用诸如各向异性干蚀刻工艺的蚀刻工艺在IMD层112中形成开口。然后用诸如铜的导电材料填充开口。可以采用诸如化学机械抛光(CMP)工艺的平坦化工艺来平坦化和/或去除多余的材料。
图1中还示出了位于最上层IMD层112上面的钝化层102。钝化层102可以是单层或多层结构。例如，图1示出多层结构包括第一钝化层113、第二钝化层114和第三钝化层115的实施例。第一钝化层113可以包含介电材料，诸如SiN、等离子体增强氧化物(PEOX)、等离子体增强SiN(PE-SiN)、未掺杂硅酸盐玻璃(USG)、等离子体增强USG(PE-USG)等，并在最上层IMD层112上方进行图案化。在实施例中，第一钝化层113的厚度可以在约至约的范围内，诸如约的厚度。当形成互连件和/或接触件时，在实施蚀刻工艺的同时，第一钝化层113可以充当蚀刻停止层。蚀刻停止层由与邻近层(例如，下面的IMD层112和上层，例如第二钝化层114和第三钝化层115)具有不同蚀刻选择性的介电材料形成。
如图1所示，在第一钝化层113上方形成并图案化第二钝化层114和第三钝化层115。第二钝化层114和第三钝化层115可以通过诸如CVD、物理汽相沉积(PVD)等任何合适的方法由诸如SiN、USG、PE-USG、PE-SiN、这些的组合和/或类似物等介电材料形成。在实施例中，第二钝化层114可以包含USG，并具有范围在约至约的厚度，诸如厚约第三钝化层115可以包含SiN，并可以具有范围在约至约的厚度，诸如厚约
提供上面所述的钝化层连同材料和厚度仅是用于举例的目的。本领域普通技术人员将理解所示的钝化层的数量仅是用于举例的目的。同样地，其他实施例可以包括任何数量的钝化层。
图1所示的外部接触焊盘121和传感器接触焊盘123在外部器件和在IMD层112中形成的互连件111之间提供电连接。如下面更详细描述的，凸块下金属化(UBM)结构可以形成在外部接触焊盘121上。采用光刻(或类似的)技术在钝化层102中图案化外部接触焊盘121和传感器接触焊盘123，并且外部接触焊盘121和传感器接触焊盘123可以由诸如铜、钨、铝或银等任何合适的导电材料形成。可以注意到，示出了一个外部接触焊盘121和4个传感器接触焊盘123仅用于说明的目的。在其他实施例中，可以使用更多或更少的焊盘。
图2示出了可以采用例如氧化工艺(在图2中箭头202所示)(诸如O2等离子体工艺或者暴露于含氧环境)氧化一个或多个传感器接触焊盘123的表面的实施例。在实施例中，掩模层201可以包含光刻胶掩模、硬掩模、这些的组合等，具有在约至范围内(诸如约的厚度，并可以采用光刻和蚀刻技术进行图案化。
然后可以应用诸如O2等离子体工艺的氧化工艺将传感器接触焊盘123的表面暴露于氧气，从而导致形成氧化层(参见图3)。在可以使用O2等离子体工艺进行氧化工艺的实施例中，例如，可以在压力为约760mTorr(毫托)至约800mTorr、功率为约750瓦以及温度小于约300℃的条件下使用约7000sccm的O2流速，持续周期为约60秒。外部接触焊盘121受到防止氧化的掩模层201的保护。在氧化工艺之后，可以采用合适的光刻胶剥离工艺去除掩模层201。
图3示出了根据实施例在去除掩模层201之后的器件100。可以通过任何合适的方法去除掩模层201。在掩模层201包含光刻胶掩模的实施例中，可以采用合适的光刻胶剥离或灰化工艺来去除掩模层201。在该实施例中，去除光刻胶掩模，可以无残留或者仅有少量残留。在去除光刻胶之后，因为通过O2等离子体工艺诱导的氧化，氧化物层(例如，铜氧化物层)保留在传感器接触焊盘123的顶面上。同样地，由于暴露于空气中的氧气和/或光刻胶剥离工艺，在外部接触焊盘121的顶面上可以形成薄氧化物层。根据实施例，Cu氧化物累积在传感器接触焊盘123的顶面上的厚度可以在约至约的范围内，诸如厚约以及在外部接触焊盘121的顶面上的厚度为约或更小。
图4示出了在氧化物去除工艺之后从而形成浅通孔阱402的器件100的截面图。在实施例中，可以采用CMP工艺使用诸如CX-100(柠檬酸)的合适化学清洁剂从外部接触焊盘121和传感器接触焊盘123去除Cu氧化物。例如，在实施例中，清洁工艺可以持续约50秒，从而从外部接触焊盘121和传感器接触焊盘123适当地去除多余的Cu氧化物沉积物。
使每个浅通孔阱402凹进低于周围的钝化层102。在实施例中，浅通孔阱402的厚度可以在约至约的范围内，诸如约但是也可以使用其他厚度。
图5示出器件100的截面图，在器件100中，已在钝化层102、外部接触焊盘121和传感器接触焊盘123的表面上方沉积导电层501，诸如氮化钽(TaN)层。可以通过均厚沉积(或类似的)工艺形成导电层501，从而填充浅通孔阱402。在实施例中，TaN层的厚度可以在约至约的范围内，诸如厚约
图6示出了在利用CMP工艺去除多余的导电层501(参见图5)的材料之后从而在浅通孔阱402内形成导电覆盖层601的器件100的截面图。在实施例中，导电覆盖层601在传感器接触焊盘123的每个浅通孔阱的顶部上的厚度可以为约至约例如约在该实施例中，从外部接触焊盘121上方去除导电覆盖层601。
图7示出具有通过均厚膜沉积(或类似工艺)成层的第一UBM导电层701的器件100的横截面图。如下面更详细说明的，图7至图12示出形成外部接触件(即，具有柱和焊料凸块的UBM结构)的工艺。然而，其他实施例可以使用不同的接触件。本文中所提供的结构仅用于举例说明的目的。
根据实施例，第一UBM导电层701是晶种层。晶种层是帮助在后续加工步骤中形成较厚的层的导电材料薄层。在实施例中，通过采用CVD或PVD技术沉积薄导电层(诸如Cu、Ti、Ta、TiN、TaN、这些的组合等的薄层)形成第一UBM导电层701。
图7还示出了根据实施例的后续用于构建导电层的第二UBM导电层702的形成。第二UBM导电层702可以由任何合适的导电材料(包括Cu、Ni、Pt、Al、这些的组合等)形成，并且可以通过若干合适的技术(包括PVD、CVD、电化学沉积(ECD)、分子束外延(MBE)、原子层沉积(ALD)、电镀等)形成。
图8示出用于限定如下面更详细讨论的后续形成的第三UBM导电层的侧边界的经图案化的掩模801(诸如干膜光刻胶)的应用。经图案化的掩模801可以是经图案化的光刻胶掩模、硬掩模、这些的组合等。可以采用光刻和蚀刻技术来图案化经图案化的掩模801，光刻和蚀刻技术涉及沉积光刻胶材料、掩蔽、曝光以及显影，从而在光刻胶材料中形成开口，该开口暴露出下面的第二UBM导电层702的一部分。
图9示出根据实施例在第二UBM导电层702上方形成的第三UBM导电层901的形成。如下面更详细描述的，在第二UBM导电层702上方形成焊接材料。在焊接工艺期间，可以在焊接材料和下表面之间的接合处自然形成金属间化合物(IMC)层(未示出)。已发现一些材料可以比其他材料形成更强、更耐用的IMC层。同样地，为提供具有更合乎需要的特征的IMC层，可能期望形成覆盖层(诸如第三UBM导电层901)。例如，在第二UBM导电层702是由铜形成的实施例中，由镍形成的第三UBM导电层901可能是所需的。也可以使用其他材料，诸如Pt、Au、Ag、这些的组合等。可以通过任何数量的合适工艺(包括PVD、CVD、ECD、MBE、ALD、电镀等)形成第三UBM导电层901。
此外，图9还示出连接层902(诸如焊接材料)的形成。在实施例中，连接层902包含SnPb、高Pb材料、基于Sn的焊料、无铅焊料、或其他合适的导电材料。
然后，如图10中所示，去除经图案化的掩模801。在其中经图案化的掩模801由光刻胶材料形成的实施例中，可以通过例如化学溶液(诸如乳酸乙酯、苯甲醚、甲基醋酸丁酯、醋酸戊酯、甲酚酚醛树脂以及重氮光敏剂(被称为SPR9)的混合物或者另一种剥离工艺来剥离光刻胶。
图11示出半导体器件100，其中采用各向同性(或类似的)UBM蚀刻工艺图案化第一UBM导电层701和第二UBM导电层702，接着进行清洁工艺，诸如在具有2％氢氟酸(HF)的磷酸(H3PO4)和过氧化氢(H2O2)的化学溶液(被称为DPP)中湿浸，或另一清洁工艺。
已发现用于图案化第一UBM导电层701和第二UBM导电层702的工艺可以在传感器接触焊盘123上方形成氧化层，特别是当使用诸如铜的材料来形成传感器接触焊盘123。如上所述，浅通孔阱402形成在传感器接触焊盘123中并且在其上形成导电覆盖层601以保护传感器接触焊盘123的材料，从而阻止或减少传感器接触焊盘123的氧化。因为在诸如图11所示的一些实施例中，外部接触焊盘121在图案化第一UBM导电层701和第二UBM导电层702期间受到保护，所以对于外部接触焊盘121来说氧化可能不是问题。
图12示出其中外部传感器1201(诸如生物传感器)电连接到传感器接触焊盘123的器件100的截面图。在实施例中，外部传感器1201可以包括图案化至导电覆盖层601上的自组装单层(SAM)。可以采用诸如局部吸引、局部去除或修改尾基的策略的任何合适的图案化方法在传感器接触焊盘123的表面层的顶部上图案化SAM单层。在实施例中，经图案化的SAM可以为半导体器件100提供功能性外部传感器，诸如生物传感器。
此后，可以实施焊料回流工艺和适用于特定应用的其他后段工艺(BEOL)加工技术。例如，可以形成封装剂，可以实施分割(singulation)工艺来单独挑出单个管芯，可以实施晶圆级或管芯级堆叠等等。另外，外部接触焊盘121可以电连接至另一衬底，诸如印刷电路板(PCB)、中介层、封装基板、另一管芯/晶圆等。可以设置外部传感器1201，例如用于在采样生物条件时检测电信号，诸如检测酶、蛋白质、DNA等，从而进行各种测试。
尽管已经详细地描述了实施例及其优势，但应该理解，可以在不背离所附权利要求限定的实施例的精神和范围的情况下，进行各种改变、替换和更改。而且，本申请的范围并不仅限于本说明书中描述的工艺、机器、制造、材料组分、装置、方法和步骤的特定实施例。作为本领域普通技术人员根据本发明的发明内容将很容易地理解，根据本发明可以利用现有的或今后开发的用于执行与本文所述相应实施例基本上相同的功能或者获得基本上相同的结果的工艺、机器、制造、材料组分、装置、方法或步骤。因此，所附权利要求预期在其范围内包括这样的工艺、机器、制造、材料组分、装置、方法或步骤。此外，每条权利要求构成单独的实施例，并且多个权利要求和实施例的组合在本发明的范围内。

Claims (18)

1.一种形成半导体器件的方法，所述方法包括：
提供衬底，在所述衬底上形成有位于最上层金属间介电层上方的一个或多个介电层、一个或多个外部接触焊盘和延伸穿过所述一个或多个介电层的一个或多个传感器接触件；
使所述一个或多个传感器接触件凹进，从而形成凹槽，所述一个或多个外部接触焊盘没有被凹进；
在所述凹槽内形成导电覆盖层；以及
在所述一个或多个外部接触焊盘上方形成外部接触件，
其中，使所述一个或多个传感器接触件凹进从而形成凹槽，所述一个或多个外部接触焊盘没有被凹进的步骤包括：
在所述一个或多个外部接触焊盘以及所述一个或多个传感器接触件上方形成掩模层，图案化所述掩模层以暴露出所述一个或多个传感器接触件，经图案化的掩模层在氧化工艺期间保护所述一个或多个外部接触焊盘；
至少部分地通过氧化所述一个或多个传感器接触件的一部分来实施所述凹进。
2.根据权利要求1所述的方法，其中，所述导电覆盖层包含氮化钽层。
3.根据权利要求1所述的方法，其中，至少部分地通过采用氧等离子体工艺来实施所述氧化。
4.根据权利要求1所述的方法，还包括采用化学机械抛光工艺去除所述一个或多个传感器接触件的氧化部分。
5.根据权利要求1所述的方法，其中，所述导电覆盖层的上表面与所述一个或多个介电层的上表面共面。
6.根据权利要求1所述的方法，其中，所述导电覆盖层的厚度为至
7.根据权利要求1所述的方法，还包括形成电连接至所述传感器接触件的自组装单层(SAM)。
8.一种形成半导体器件的方法，所述方法包括：
提供衬底，在所述衬底上形成有位于最上层金属间介电层上方的一个或多个介电层、一个或多个外部接触焊盘和延伸穿过所述一个或多个介电层的一个或多个传感器接触件；
在所述一个或多个外部接触焊盘和所述一个或多个传感器接触件上方形成掩模层；
图案化所述掩模层以暴露出所述一个或多个传感器接触件，留下被保护的所述一个或多个外部接触焊盘；
氧化所述一个或多个传感器接触件的上表面；以及
用导电覆盖层替换所述一个或多个传感器接触件的氧化部分。
9.根据权利要求8所述的方法，其中，至少部分地通过采用氧等离子体工艺来实施所述氧化。
10.根据权利要求8所述的方法，其中，至少部分地通过采用化学机械抛光工艺实施所述替换。
11.根据权利要求8所述的方法，其中，所述导电覆盖层的厚度为至
12.根据权利要求8所述的方法，还包括形成电连接至所述传感器接触件的自组装单层(SAM)。
13.根据权利要求8所述的方法，其中，所述导电覆盖层包含氮化钽。
14.一种半导体装置，包括：
衬底，具有位于最上层金属间介电层上方的一个或多个介电层；
一个或多个外部接触焊盘和延伸穿过所述一个或多个介电层的一个或多个传感器接触件，所述一个或多个传感器接触件被凹进成低于所述一个或多个介电层的上表面，所述一个或多个外部接触焊盘没有被凹进；
导电覆盖层，位于所述一个或多个传感器接触件中的每一个的上方，所述导电覆盖层的上表面与所述一个或多个介电层的上表面共面；以及
外部接触件，直接位于所述一个或多个外部接触焊盘中相应的外部接触焊盘的上面。
15.根据权利要求14所述的半导体装置，其中，所述导电覆盖层包含氮化钽层。
16.根据权利要求14所述的半导体装置，其中，所述一个或多个外部接触焊盘和所述一个或多个传感器接触件包含铜。
17.根据权利要求14所述的半导体装置，还包括电连接至所述传感器接触件的自组装单层(SAM)。
18.根据权利要求14所述的半导体装置，其中，所述导电覆盖层的厚度为至
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