CN101903955A - 抗单元源极ir降的源电势调整 - Google Patents

抗单元源极ir降的源电势调整 Download PDF

Info

Publication number
CN101903955A
CN101903955A CN2008801221659A CN200880122165A CN101903955A CN 101903955 A CN101903955 A CN 101903955A CN 2008801221659 A CN2008801221659 A CN 2008801221659A CN 200880122165 A CN200880122165 A CN 200880122165A CN 101903955 A CN101903955 A CN 101903955A
Authority
CN
China
Prior art keywords
source electrode
page
memory cell
voltage
line
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN2008801221659A
Other languages
English (en)
Chinese (zh)
Inventor
达纳·李
尼马·莫克莱西
迪帕克·C·塞卡
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SanDisk Corp
Original Assignee
SanDisk Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SanDisk Corp filed Critical SanDisk Corp
Publication of CN101903955A publication Critical patent/CN101903955A/zh
Pending legal-status Critical Current

Links

Images

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/30—Power supply circuits

Landscapes

  • Read Only Memory (AREA)
CN2008801221659A 2007-12-20 2008-12-12 抗单元源极ir降的源电势调整 Pending CN101903955A (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US11/961,871 US7764547B2 (en) 2007-12-20 2007-12-20 Regulation of source potential to combat cell source IR drop
US11/961,871 2007-12-20
PCT/US2008/086694 WO2009082637A1 (en) 2007-12-20 2008-12-12 Regulation of source potential to combat cell source ir drop

Publications (1)

Publication Number Publication Date
CN101903955A true CN101903955A (zh) 2010-12-01

Family

ID=40380429

Family Applications (1)

Application Number Title Priority Date Filing Date
CN2008801221659A Pending CN101903955A (zh) 2007-12-20 2008-12-12 抗单元源极ir降的源电势调整

Country Status (7)

Country Link
US (1) US7764547B2 (enExample)
EP (1) EP2223304A1 (enExample)
JP (1) JP2011508354A (enExample)
KR (1) KR20100111666A (enExample)
CN (1) CN101903955A (enExample)
TW (1) TW200945349A (enExample)
WO (1) WO2009082637A1 (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105895153A (zh) * 2016-03-25 2016-08-24 上海华虹宏力半导体制造有限公司 存储器及其干扰检测和消除的方法、装置

Families Citing this family (37)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7606076B2 (en) * 2007-04-05 2009-10-20 Sandisk Corporation Sensing in non-volatile storage using pulldown to regulated source voltage to remove system noise
US7764547B2 (en) 2007-12-20 2010-07-27 Sandisk Corporation Regulation of source potential to combat cell source IR drop
US7701761B2 (en) * 2007-12-20 2010-04-20 Sandisk Corporation Read, verify word line reference voltage to track source level
JP5127439B2 (ja) * 2007-12-28 2013-01-23 株式会社東芝 半導体記憶装置
JP4635066B2 (ja) * 2008-03-19 2011-02-16 株式会社東芝 半導体記憶装置
KR101053700B1 (ko) * 2009-05-11 2011-08-02 주식회사 하이닉스반도체 전압 생성 회로 및 이를 구비한 불휘발성 메모리 소자
KR101669550B1 (ko) * 2009-09-10 2016-10-26 삼성전자주식회사 공통 소스 라인의 노이즈를 줄이는 플래시 메모리 장치, 그것의 동작 방법, 그리고 그것을 포함하는 메모리 시스템
US8169830B2 (en) * 2009-09-17 2012-05-01 Micron Technology, Inc. Sensing for all bit line architecture in a memory device
US8427886B2 (en) * 2011-07-11 2013-04-23 Lsi Corporation Memory device with trimmable power gating capabilities
KR101861084B1 (ko) 2011-07-11 2018-05-28 삼성전자주식회사 비휘발성 메모리 장치, 이의 동작 방법, 및 비휘발성 메모리 장치를 포함하는 전자 장치
US9236102B2 (en) 2012-10-12 2016-01-12 Micron Technology, Inc. Apparatuses, circuits, and methods for biasing signal lines
US8897054B2 (en) * 2013-02-18 2014-11-25 Intel Mobile Communications GmbH ROM device with keepers
US9042190B2 (en) * 2013-02-25 2015-05-26 Micron Technology, Inc. Apparatuses, sense circuits, and methods for compensating for a wordline voltage increase
US9202579B2 (en) * 2013-03-14 2015-12-01 Sandisk Technologies Inc. Compensation for temperature dependence of bit line resistance
US9093161B2 (en) * 2013-03-14 2015-07-28 Sillicon Storage Technology, Inc. Dynamic programming of advanced nanometer flash memory
KR20140145367A (ko) * 2013-06-13 2014-12-23 에스케이하이닉스 주식회사 반도체 메모리 장치, 그것을 포함하는 메모리 시스템 및 그것의 동작 방법
US9177663B2 (en) 2013-07-18 2015-11-03 Sandisk Technologies Inc. Dynamic regulation of memory array source line
JP5667260B1 (ja) 2013-08-20 2015-02-12 ウィンボンド エレクトロニクス コーポレーション 半導体記憶装置
JP5898657B2 (ja) * 2013-09-02 2016-04-06 株式会社東芝 不揮発性半導体記憶装置
US9672875B2 (en) 2014-01-27 2017-06-06 Micron Technology, Inc. Methods and apparatuses for providing a program voltage responsive to a voltage determination
US9368224B2 (en) 2014-02-07 2016-06-14 SanDisk Technologies, Inc. Self-adjusting regulation current for memory array source line
KR102167609B1 (ko) * 2014-05-13 2020-10-20 삼성전자주식회사 비휘발성 메모리 장치 및 그것의 프로그램 방법
KR20160008875A (ko) * 2014-07-15 2016-01-25 에스케이하이닉스 주식회사 반도체 메모리 장치 및 그것의 동작 방법
US9208895B1 (en) 2014-08-14 2015-12-08 Sandisk Technologies Inc. Cell current control through power supply
US9349468B2 (en) 2014-08-25 2016-05-24 SanDisk Technologies, Inc. Operational amplifier methods for charging of sense amplifier internal nodes
JP6313252B2 (ja) 2015-03-16 2018-04-18 東芝メモリ株式会社 半導体メモリ装置
US9892791B2 (en) * 2015-06-16 2018-02-13 Sandisk Technologies Llc Fast scan to detect bit line discharge time
KR102620805B1 (ko) * 2016-09-22 2024-01-04 에스케이하이닉스 주식회사 반도체 메모리 장치
US10763304B2 (en) * 2017-06-27 2020-09-01 Taiwan Semiconductor Manufacturing Company Ltd. Semiconductor structure and method of forming the same
JP7091130B2 (ja) * 2018-05-08 2022-06-27 キオクシア株式会社 半導体記憶装置
JP2019200828A (ja) * 2018-05-16 2019-11-21 東芝メモリ株式会社 半導体記憶装置
KR102555006B1 (ko) 2019-02-22 2023-07-14 삼성전자주식회사 반도체 메모리 장치 및 이를 포함하는 메모리 시스템
US10984872B1 (en) * 2019-12-05 2021-04-20 Integrated Silicon Solution, (Cayman) Inc. Non-volatile memory with source line resistance compensation
US11049572B1 (en) * 2020-03-06 2021-06-29 Macronix International Co., Ltd. Memory device, source line voltage adjuster and source line voltage adjusting method thereof
TWI764104B (zh) * 2020-03-06 2022-05-11 旺宏電子股份有限公司 記憶體裝置、源極線電壓調整器及其源極線電壓調整方法
US11942179B2 (en) * 2022-04-11 2024-03-26 Macronix International Co., Ltd. Threshold voltage variation compensation in integrated circuits
JP2024136330A (ja) * 2023-03-23 2024-10-04 キオクシア株式会社 半導体記憶装置

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5977700A (ja) * 1982-10-25 1984-05-04 Toshiba Corp 不揮発性半導体メモリ装置
JPS61137299A (ja) * 1984-12-07 1986-06-24 Hitachi Ltd イレ−ザル・プログラマブルｒｏｍ
US5608671A (en) * 1994-11-29 1997-03-04 Nec Corporation Non-volatile semiconductor memory
US6084799A (en) * 1996-11-25 2000-07-04 Kabushiki Kaisha Toshiba Nonvolatile semiconductor memory having improved source line drive circuit
CN1993767A (zh) * 2004-08-02 2007-07-04 斯班逊有限公司 快闪存储单元以及编程快闪存储装置的方法

Family Cites Families (43)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT1224062B (it) * 1979-09-28 1990-09-26 Ates Componenti Elettron Metodo di programmazione per una memoria a semiconduttore non volatile elettricamente alterabile
US5095344A (en) * 1988-06-08 1992-03-10 Eliyahou Harari Highly compact eprom and flash eeprom devices
US5070032A (en) * 1989-03-15 1991-12-03 Sundisk Corporation Method of making dense flash eeprom semiconductor memory structures
DE69033438T2 (de) * 1989-04-13 2000-07-06 Sandisk Corp., Santa Clara Austausch von fehlerhaften Speicherzellen einer EEprommatritze
US5172338B1 (en) * 1989-04-13 1997-07-08 Sandisk Corp Multi-state eeprom read and write circuits and techniques
US5343063A (en) * 1990-12-18 1994-08-30 Sundisk Corporation Dense vertical programmable read only memory cell structure and processes for making them
JP3210355B2 (ja) * 1991-03-04 2001-09-17 株式会社東芝 不揮発性半導体記憶装置
US5313421A (en) * 1992-01-14 1994-05-17 Sundisk Corporation EEPROM with split gate source side injection
US6222762B1 (en) * 1992-01-14 2001-04-24 Sandisk Corporation Multi-state memory
US5315541A (en) * 1992-07-24 1994-05-24 Sundisk Corporation Segmented column memory array
US5555204A (en) * 1993-06-29 1996-09-10 Kabushiki Kaisha Toshiba Non-volatile semiconductor memory device
KR0169267B1 (ko) * 1993-09-21 1999-02-01 사토 후미오 불휘발성 반도체 기억장치
US5661053A (en) * 1994-05-25 1997-08-26 Sandisk Corporation Method of making dense flash EEPROM cell array and peripheral supporting circuits formed in deposited field oxide with the use of spacers
JP3359209B2 (ja) * 1995-11-29 2002-12-24 シャープ株式会社 半導体記憶装置及びメモリアクセス方法
US5903495A (en) * 1996-03-18 1999-05-11 Kabushiki Kaisha Toshiba Semiconductor device and memory system
US5768192A (en) * 1996-07-23 1998-06-16 Saifun Semiconductors, Ltd. Non-volatile semiconductor memory cell utilizing asymmetrical charge trapping
US5986931A (en) * 1997-01-02 1999-11-16 Caywood; John M. Low voltage single CMOS electrically erasable read-only memory
US6768165B1 (en) * 1997-08-01 2004-07-27 Saifun Semiconductors Ltd. Two bit non-volatile electrically erasable and programmable semiconductor memory cell utilizing asymmetrical charge trapping
JP3486079B2 (ja) * 1997-09-18 2004-01-13 株式会社東芝 半導体記憶装置
US6087894A (en) * 1998-03-02 2000-07-11 Motorola, Inc. Low power precision current reference
US6373753B1 (en) * 1999-02-13 2002-04-16 Robert J. Proebsting Memory array having selected word lines driven to an internally-generated boosted voltage that is substantially independent of VDD
US6055190A (en) * 1999-03-15 2000-04-25 Macronix International Co., Ltd. Device and method for suppressing bit line column leakage during erase verification of a memory cell
US6118702A (en) * 1999-10-19 2000-09-12 Advanced Micro Devices, Inc. Source bias compensation for page mode read operation in a flash memory device
US6400638B1 (en) 2000-02-25 2002-06-04 Advanced Micro Devices, Inc. Wordline driver for flash memory read mode
US6950336B2 (en) * 2000-05-03 2005-09-27 Emosyn America, Inc. Method and apparatus for emulating an electrically erasable programmable read only memory (EEPROM) using non-volatile floating gate memory cells
EP1331644B1 (en) 2001-12-28 2007-03-14 STMicroelectronics S.r.l. Regulation method for the source voltage in a nonvolatile memory cell during programming and corresponding program circuit
US7046568B2 (en) 2002-09-24 2006-05-16 Sandisk Corporation Memory sensing circuit and method for low voltage operation
US7196931B2 (en) * 2002-09-24 2007-03-27 Sandisk Corporation Non-volatile memory and method with reduced source line bias errors
US6987693B2 (en) * 2002-09-24 2006-01-17 Sandisk Corporation Non-volatile memory and method with reduced neighboring field errors
US7443757B2 (en) 2002-09-24 2008-10-28 Sandisk Corporation Non-volatile memory and method with reduced bit line crosstalk errors
KR100884235B1 (ko) * 2003-12-31 2009-02-17 삼성전자주식회사 불휘발성 메모리 카드
JP2005285197A (ja) 2004-03-29 2005-10-13 Renesas Technology Corp 半導体記憶装置
US7170784B2 (en) 2005-04-01 2007-01-30 Sandisk Corporation Non-volatile memory and method with control gate compensation for source line bias errors
US7173854B2 (en) * 2005-04-01 2007-02-06 Sandisk Corporation Non-volatile memory and method with compensation for source line bias errors
JP2007080306A (ja) * 2005-09-09 2007-03-29 Toshiba Corp 不揮発性半導体記憶装置
US7606076B2 (en) * 2007-04-05 2009-10-20 Sandisk Corporation Sensing in non-volatile storage using pulldown to regulated source voltage to remove system noise
US7606071B2 (en) * 2007-04-24 2009-10-20 Sandisk Corporation Compensating source voltage drop in non-volatile storage
US7492640B2 (en) * 2007-06-07 2009-02-17 Sandisk Corporation Sensing with bit-line lockout control in non-volatile memory
US7489553B2 (en) * 2007-06-07 2009-02-10 Sandisk Corporation Non-volatile memory with improved sensing having bit-line lockout control
JP2009087432A (ja) * 2007-09-28 2009-04-23 Toshiba Corp 不揮発性半導体記憶装置
US7701761B2 (en) * 2007-12-20 2010-04-20 Sandisk Corporation Read, verify word line reference voltage to track source level
US7764547B2 (en) 2007-12-20 2010-07-27 Sandisk Corporation Regulation of source potential to combat cell source IR drop
US7593265B2 (en) * 2007-12-28 2009-09-22 Sandisk Corporation Low noise sense amplifier array and method for nonvolatile memory

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5977700A (ja) * 1982-10-25 1984-05-04 Toshiba Corp 不揮発性半導体メモリ装置
JPS61137299A (ja) * 1984-12-07 1986-06-24 Hitachi Ltd イレ−ザル・プログラマブルｒｏｍ
US5608671A (en) * 1994-11-29 1997-03-04 Nec Corporation Non-volatile semiconductor memory
US6084799A (en) * 1996-11-25 2000-07-04 Kabushiki Kaisha Toshiba Nonvolatile semiconductor memory having improved source line drive circuit
CN1993767A (zh) * 2004-08-02 2007-07-04 斯班逊有限公司 快闪存储单元以及编程快闪存储装置的方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105895153A (zh) * 2016-03-25 2016-08-24 上海华虹宏力半导体制造有限公司 存储器及其干扰检测和消除的方法、装置
CN105895153B (zh) * 2016-03-25 2019-07-02 上海华虹宏力半导体制造有限公司 存储器及其干扰检测和消除的方法、装置

Also Published As

Publication number Publication date
US20090161433A1 (en) 2009-06-25
US7764547B2 (en) 2010-07-27
EP2223304A1 (en) 2010-09-01
WO2009082637A1 (en) 2009-07-02
TW200945349A (en) 2009-11-01
KR20100111666A (ko) 2010-10-15
JP2011508354A (ja) 2011-03-10

Similar Documents

Publication Publication Date Title
CN101903955A (zh) 抗单元源极ir降的源电势调整
EP1866932B1 (en) Non-volatile memory and method with compensation for source line bias errors
US7170784B2 (en) Non-volatile memory and method with control gate compensation for source line bias errors
KR101109458B1 (ko) 인접한 동작 모드들에 의존한 비트 라인 보상을 갖는 방법및 비휘발성 메모리
JP5086443B2 (ja) ソースレベルを追跡するためのワード線基準レベルの読み出し、ベリファイ
US11488657B1 (en) Fast interval read setup for 3D memory
US7508713B2 (en) Method of compensating variations along a word line in a non-volatile memory
US20140198570A1 (en) Programming multibit memory cells
US7577031B2 (en) Non-volatile memory with compensation for variations along a word line
US20130176790A1 (en) Charge Cycling By Equalizing the Source and Bit Line Levels Between Pulses During No-Verify Write Operations for NAND Flash Memory

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
ASS Succession or assignment of patent right

Owner name: SANDISK CORPORATION

Free format text: FORMER OWNER: SANDISK CORP.

Effective date: 20120706

C41 Transfer of patent application or patent right or utility model
TA01 Transfer of patent application right

Effective date of registration: 20120706

Address after: texas

Applicant after: Sandisk Corp.

Address before: American California

Applicant before: Sandisk Corp.

C02 Deemed withdrawal of patent application after publication (patent law 2001)
WD01 Invention patent application deemed withdrawn after publication

Application publication date: 20101201