CN101510539A - 元件搭载用基板、半导体组件及其制造方法及便携式设备 - Google Patents

元件搭载用基板、半导体组件及其制造方法及便携式设备 Download PDF

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Publication number
CN101510539A
CN101510539A CNA2009101307726A CN200910130772A CN101510539A CN 101510539 A CN101510539 A CN 101510539A CN A2009101307726 A CNA2009101307726 A CN A2009101307726A CN 200910130772 A CN200910130772 A CN 200910130772A CN 101510539 A CN101510539 A CN 101510539A
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CN
China
Prior art keywords
electrode
insulating resin
resin layer
protruding
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CNA2009101307726A
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English (en)
Chinese (zh)
Inventor
中里真弓
伊藤克实
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Publication of CN101510539A publication Critical patent/CN101510539A/zh
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H10W70/093—Connecting or disconnecting other interconnections thereto or therefrom, e.g. connecting bond wires or bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H10W70/095—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers of vias therein
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/63—Vias, e.g. via plugs
    • H10W70/635—Through-vias
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/65—Shapes or dispositions of interconnections
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
    • H10W72/01231—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps using blanket deposition
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
    • H10W72/01251—Changing the shapes of bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/241—Dispositions, e.g. layouts
    • H10W72/244—Dispositions, e.g. layouts relative to underlying supporting features, e.g. bond pads, RDLs or vias
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/29—Bond pads specially adapted therefor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/921—Structures or relative sizes of bond pads
    • H10W72/922—Bond pads being integral with underlying chip-level interconnections

Landscapes

  • Wire Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)
CNA2009101307726A 2008-01-31 2009-02-01 元件搭载用基板、半导体组件及其制造方法及便携式设备 Pending CN101510539A (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2008022011A JP2009182272A (ja) 2008-01-31 2008-01-31 素子搭載用基板およびその製造方法、半導体モジュールおよびその製造方法、ならびに携帯機器
JP022011/08 2008-01-31

Publications (1)

Publication Number Publication Date
CN101510539A true CN101510539A (zh) 2009-08-19

Family

ID=40931490

Family Applications (1)

Application Number Title Priority Date Filing Date
CNA2009101307726A Pending CN101510539A (zh) 2008-01-31 2009-02-01 元件搭载用基板、半导体组件及其制造方法及便携式设备

Country Status (3)

Country Link
US (1) US8283568B2 (https=)
JP (1) JP2009182272A (https=)
CN (1) CN101510539A (https=)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104637895A (zh) * 2013-11-13 2015-05-20 南茂科技股份有限公司 封装结构及其制造方法

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWM362572U (en) * 2009-04-13 2009-08-01 Phytrex Technology Corp Signal convertor
JPWO2011052744A1 (ja) * 2009-10-30 2013-03-21 三洋電機株式会社 素子搭載用基板およびその製造方法、半導体モジュール、ならびに携帯機器
KR101088792B1 (ko) * 2009-11-30 2011-12-01 엘지이노텍 주식회사 인쇄회로기판 및 그 제조방법
JP5306443B2 (ja) * 2011-12-27 2013-10-02 三洋電機株式会社 素子搭載用基板、素子搭載用基板の製造方法、半導体モジュールおよび半導体モジュールの製造方法
JP5624699B1 (ja) * 2012-12-21 2014-11-12 パナソニック株式会社 電子部品パッケージおよびその製造方法
TWM470379U (zh) * 2013-09-05 2014-01-11 思鷺科技股份有限公司 陶瓷電路板及具有該陶瓷電路板的ｌｅｄ封裝模組
JP2016207893A (ja) * 2015-04-24 2016-12-08 イビデン株式会社 プリント配線板およびその製造方法
US12322719B2 (en) 2022-03-22 2025-06-03 Nxp Usa, Inc. Semiconductor device structure and method therefor
US20240014152A1 (en) * 2022-07-07 2024-01-11 Nxp B.V. Semiconductor device with under-bump metallization and method therefor

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3050807B2 (ja) * 1996-06-19 2000-06-12 イビデン株式会社 多層プリント配線板
AU6418998A (en) 1997-03-21 1998-10-20 Seiko Epson Corporation Semiconductor device, film carrier tape, and method for manufacturing them
KR100906931B1 (ko) * 1998-02-26 2009-07-10 이비덴 가부시키가이샤 필드 바이어 구조를 갖는 다층프린트 배선판
JP3769587B2 (ja) * 2000-11-01 2006-04-26 株式会社ノース 配線回路用部材とその製造方法と多層配線回路基板と半導体集積回路装置
JP2004193297A (ja) 2002-12-11 2004-07-08 Dainippon Printing Co Ltd ウェハレベルパッケージおよびその製造方法
JP2006310530A (ja) * 2005-04-28 2006-11-09 Sanyo Electric Co Ltd 回路装置およびその製造方法
JP4568215B2 (ja) * 2005-11-30 2010-10-27 三洋電機株式会社 回路装置および回路装置の製造方法
JP2007258207A (ja) 2006-03-20 2007-10-04 Three M Innovative Properties Co バンプ付きチップもしくはパッケージの実装方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104637895A (zh) * 2013-11-13 2015-05-20 南茂科技股份有限公司 封装结构及其制造方法
CN104637895B (zh) * 2013-11-13 2017-06-30 南茂科技股份有限公司 封装结构及其制造方法

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Publication number Publication date
US20090196010A1 (en) 2009-08-06
US8283568B2 (en) 2012-10-09
JP2009182272A (ja) 2009-08-13

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Application publication date: 20090819