CN101432892B - 双极型互补金属氧化物半导体技术中形成集电极的方法 - Google Patents
双极型互补金属氧化物半导体技术中形成集电极的方法 Download PDFInfo
- Publication number
- CN101432892B CN101432892B CN2005800316215A CN200580031621A CN101432892B CN 101432892 B CN101432892 B CN 101432892B CN 2005800316215 A CN2005800316215 A CN 2005800316215A CN 200580031621 A CN200580031621 A CN 200580031621A CN 101432892 B CN101432892 B CN 101432892B
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- CN
- China
- Prior art keywords
- refractory metal
- hetero
- bipolar transistor
- npn
- suicide layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Classifications
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D10/00—Bipolar junction transistors [BJT]
- H10D10/80—Heterojunction BJTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
- H10D62/137—Collector regions of BJTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D10/00—Bipolar junction transistors [BJT]
- H10D10/01—Manufacture or treatment
- H10D10/021—Manufacture or treatment of heterojunction BJTs [HBT]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
- H10D62/85—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group III-V materials, e.g. GaAs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0107—Integrating at least one component covered by H10D12/00 or H10D30/00 with at least one component covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating IGFETs with BJTs
- H10D84/0109—Integrating at least one component covered by H10D12/00 or H10D30/00 with at least one component covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating IGFETs with BJTs the at least one component covered by H10D12/00 or H10D30/00 being a MOS device
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/02—Manufacture or treatment characterised by using material-based technologies
- H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
- H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/40—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00 with at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of IGFETs with BJTs
- H10D84/401—Combinations of FETs or IGBTs with BJTs
Landscapes
- Bipolar Transistors (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Electrodes Of Semiconductors (AREA)
- Element Separation (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10/711,479 | 2004-09-21 | ||
| US10/711,479 US7002190B1 (en) | 2004-09-21 | 2004-09-21 | Method of collector formation in BiCMOS technology |
| PCT/US2005/033851 WO2006034355A2 (en) | 2004-09-21 | 2005-09-20 | METHOD OF COLLECTOR FORMATION IN BiCMOS TECHNOLOGY |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101432892A CN101432892A (zh) | 2009-05-13 |
| CN101432892B true CN101432892B (zh) | 2010-08-25 |
Family
ID=35810621
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2005800316215A Expired - Fee Related CN101432892B (zh) | 2004-09-21 | 2005-09-20 | 双极型互补金属氧化物半导体技术中形成集电极的方法 |
Country Status (7)
| Country | Link |
|---|---|
| US (2) | US7002190B1 (enExample) |
| EP (1) | EP1794806B1 (enExample) |
| JP (1) | JP5090168B2 (enExample) |
| KR (1) | KR100961738B1 (enExample) |
| CN (1) | CN101432892B (enExample) |
| TW (1) | TWI364795B (enExample) |
| WO (1) | WO2006034355A2 (enExample) |
Families Citing this family (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW200727367A (en) * | 2005-04-22 | 2007-07-16 | Icemos Technology Corp | Superjunction device having oxide lined trenches and method for manufacturing a superjunction device having oxide lined trenches |
| DE102005021932A1 (de) * | 2005-05-12 | 2006-11-16 | Atmel Germany Gmbh | Verfahren zur Herstellung integrierter Schaltkreise |
| US8435873B2 (en) | 2006-06-08 | 2013-05-07 | Texas Instruments Incorporated | Unguarded Schottky barrier diodes with dielectric underetch at silicide interface |
| JP5029607B2 (ja) | 2006-07-28 | 2012-09-19 | 株式会社島津製作所 | X線診断装置 |
| US7709338B2 (en) * | 2006-12-21 | 2010-05-04 | International Business Machines Corporation | BiCMOS devices with a self-aligned emitter and methods of fabricating such BiCMOS devices |
| US20090072355A1 (en) * | 2007-09-17 | 2009-03-19 | International Business Machines Corporation | Dual shallow trench isolation structure |
| JP2009099815A (ja) * | 2007-10-18 | 2009-05-07 | Toshiba Corp | 半導体装置の製造方法 |
| US9059196B2 (en) | 2013-11-04 | 2015-06-16 | International Business Machines Corporation | Bipolar junction transistors with self-aligned terminals |
| US9570564B2 (en) | 2014-08-05 | 2017-02-14 | Globalfoundries Inc. | Self-aligned emitter-base bipolar junction transistor with reduced base resistance and base-collector capacitance |
| CN108110051B (zh) * | 2017-12-19 | 2019-11-12 | 上海华力微电子有限公司 | 一种带沟槽结构的双极型晶体管及其制作方法 |
| US11640975B2 (en) | 2021-06-17 | 2023-05-02 | Nxp Usa, Inc. | Silicided collector structure |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4589193A (en) * | 1984-06-29 | 1986-05-20 | International Business Machines Corporation | Metal silicide channel stoppers for integrated circuits and method for making the same |
| US5319239A (en) * | 1991-08-30 | 1994-06-07 | International Business Machines Corporation | Polysilicon-collector-on-insulator polysilicon-emitter bipolar |
| CN1223469A (zh) * | 1997-12-30 | 1999-07-21 | 西门子公司 | 凹进的浅沟槽隔离结构氮化物衬垫及其制造方法 |
Family Cites Families (29)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4446476A (en) * | 1981-06-30 | 1984-05-01 | International Business Machines Corporation | Integrated circuit having a sublayer electrical contact and fabrication thereof |
| JPS6021558A (ja) * | 1983-07-15 | 1985-02-02 | Mitsubishi Electric Corp | バイポ−ラ型半導体集積回路装置 |
| JPS60117664A (ja) * | 1983-11-30 | 1985-06-25 | Fujitsu Ltd | バイポ−ラ半導体装置 |
| US4549927A (en) * | 1984-06-29 | 1985-10-29 | International Business Machines Corporation | Method of selectively exposing the sidewalls of a trench and its use to the forming of a metal silicide substrate contact for dielectric filled deep trench isolated devices |
| US4949151A (en) | 1986-09-24 | 1990-08-14 | Hitachi, Ltd. | Bipolar transistor having side wall base and collector contacts |
| JPS63278347A (ja) * | 1987-05-11 | 1988-11-16 | Toshiba Corp | 半導体装置およびその製造方法 |
| EP0306213A3 (en) * | 1987-09-02 | 1990-05-30 | AT&T Corp. | Submicron bipolar transistor with edge contacts |
| JPH01146361A (ja) * | 1987-12-02 | 1989-06-08 | Fujitsu Ltd | 半導体装置 |
| US4987471A (en) * | 1988-03-30 | 1991-01-22 | At&T Bell Laboratories | High-speed dielectrically isolated devices utilizing buried silicide regions |
| US4926233A (en) * | 1988-06-29 | 1990-05-15 | Texas Instruments Incorporated | Merged trench bipolar-CMOS transistor fabrication process |
| JPH0389524A (ja) * | 1989-08-31 | 1991-04-15 | Fujitsu Ltd | 半導体装置及びその製造方法 |
| US5061646A (en) | 1990-06-29 | 1991-10-29 | Motorola, Inc. | Method for forming a self-aligned bipolar transistor |
| JPH04106932A (ja) * | 1990-08-27 | 1992-04-08 | Fujitsu Ltd | バイポーラトランジスタの製造方法 |
| KR100257517B1 (ko) * | 1997-07-01 | 2000-06-01 | 윤종용 | 고속 바이폴라 트랜지스터 및 그 제조방법 |
| JPH11312687A (ja) * | 1998-04-30 | 1999-11-09 | Toshiba Corp | 半導体装置およびその製造方法 |
| DE19842106A1 (de) | 1998-09-08 | 2000-03-09 | Inst Halbleiterphysik Gmbh | Vertikaler Bipolartransistor und Verfahren zu seiner Herstellung |
| US6251738B1 (en) * | 2000-01-10 | 2001-06-26 | International Business Machines Corporation | Process for forming a silicon-germanium base of heterojunction bipolar transistor |
| US6333235B1 (en) | 2000-04-12 | 2001-12-25 | Industrial Technologyresearch Institute | Method for forming SiGe bipolar transistor |
| US6271068B1 (en) | 2001-01-08 | 2001-08-07 | Taiwan Semiconductor Manufacturing Company | Method for making improved polysilicon emitters for bipolar transistors on BiCMOS integrated circuits |
| US6686252B2 (en) * | 2001-03-10 | 2004-02-03 | International Business Machines Corporation | Method and structure to reduce CMOS inter-well leakage |
| US20050250289A1 (en) * | 2002-10-30 | 2005-11-10 | Babcock Jeffrey A | Control of dopant diffusion from buried layers in bipolar integrated circuits |
| US6878976B2 (en) * | 2002-03-13 | 2005-04-12 | International Business Machines Corporation | Carbon-modulated breakdown voltage SiGe transistor for low voltage trigger ESD applications |
| JP2003303830A (ja) | 2002-04-12 | 2003-10-24 | Nec Electronics Corp | 半導体装置及びその製造方法 |
| US6630377B1 (en) | 2002-09-18 | 2003-10-07 | Chartered Semiconductor Manufacturing Ltd. | Method for making high-gain vertical bipolar junction transistor structures compatible with CMOS process |
| US7233498B2 (en) | 2002-09-27 | 2007-06-19 | Eastman Kodak Company | Medium having data storage and communication capabilities and method for forming same |
| FR2845522A1 (fr) * | 2002-10-03 | 2004-04-09 | St Microelectronics Sa | Circuit integre a couche enterree fortement conductrice |
| JP3643100B2 (ja) * | 2002-10-04 | 2005-04-27 | 松下電器産業株式会社 | 半導体装置 |
| JP3507830B1 (ja) * | 2002-10-04 | 2004-03-15 | 松下電器産業株式会社 | 半導体装置 |
| KR100486304B1 (ko) | 2003-02-07 | 2005-04-29 | 삼성전자주식회사 | 자기정렬을 이용한 바이씨모스 제조방법 |
-
2004
- 2004-09-21 US US10/711,479 patent/US7002190B1/en not_active Expired - Lifetime
-
2005
- 2005-09-13 TW TW094131487A patent/TWI364795B/zh not_active IP Right Cessation
- 2005-09-20 EP EP05798479.1A patent/EP1794806B1/en not_active Expired - Lifetime
- 2005-09-20 JP JP2007532649A patent/JP5090168B2/ja not_active Expired - Fee Related
- 2005-09-20 CN CN2005800316215A patent/CN101432892B/zh not_active Expired - Fee Related
- 2005-09-20 KR KR1020077006268A patent/KR100961738B1/ko not_active Expired - Fee Related
- 2005-09-20 WO PCT/US2005/033851 patent/WO2006034355A2/en not_active Ceased
- 2005-11-29 US US11/288,843 patent/US7491985B2/en not_active Expired - Lifetime
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4589193A (en) * | 1984-06-29 | 1986-05-20 | International Business Machines Corporation | Metal silicide channel stoppers for integrated circuits and method for making the same |
| US5319239A (en) * | 1991-08-30 | 1994-06-07 | International Business Machines Corporation | Polysilicon-collector-on-insulator polysilicon-emitter bipolar |
| CN1223469A (zh) * | 1997-12-30 | 1999-07-21 | 西门子公司 | 凹进的浅沟槽隔离结构氮化物衬垫及其制造方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| TW200614383A (en) | 2006-05-01 |
| CN101432892A (zh) | 2009-05-13 |
| WO2006034355A2 (en) | 2006-03-30 |
| WO2006034355A3 (en) | 2009-04-16 |
| EP1794806B1 (en) | 2014-07-02 |
| JP5090168B2 (ja) | 2012-12-05 |
| US20060124964A1 (en) | 2006-06-15 |
| EP1794806A4 (en) | 2011-06-29 |
| TWI364795B (en) | 2012-05-21 |
| EP1794806A2 (en) | 2007-06-13 |
| JP2008514018A (ja) | 2008-05-01 |
| US7491985B2 (en) | 2009-02-17 |
| KR100961738B1 (ko) | 2010-06-10 |
| KR20070053280A (ko) | 2007-05-23 |
| US7002190B1 (en) | 2006-02-21 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| TR01 | Transfer of patent right | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20210616 Address after: ottawa Patentee after: Elpis technologies Address before: New York, USA Patentee before: International Business Machines Corp. |
|
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20100825 Termination date: 20210920 |