KR100961738B1 - ＢｉＣＭＯＳ 기술에서 콜렉터 형성 방법 - Google Patents

ＢｉＣＭＯＳ 기술에서 콜렉터 형성 방법 Download PDF

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Publication number
KR100961738B1
KR100961738B1 KR1020077006268A KR20077006268A KR100961738B1 KR 100961738 B1 KR100961738 B1 KR 100961738B1 KR 1020077006268 A KR1020077006268 A KR 1020077006268A KR 20077006268 A KR20077006268 A KR 20077006268A KR 100961738 B1 KR100961738 B1 KR 100961738B1
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South Korea
Prior art keywords
refractory metal
metal silicide
subcollector
substrate
silicide layer
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Expired - Fee Related
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KR1020077006268A
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English (en)
Korean (ko)
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KR20070053280A (ko
Inventor
피터 제이 게이스
피터 비 그레이
알빈 제이 조셉
퀴지 류
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인터내셔널 비지네스 머신즈 코포레이션
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Publication of KR20070053280A publication Critical patent/KR20070053280A/ko
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D10/00—Bipolar junction transistors [BJT]
    • H10D10/80—Heterojunction BJTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
    • H10D62/137—Collector regions of BJTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D10/00—Bipolar junction transistors [BJT]
    • H10D10/01—Manufacture or treatment
    • H10D10/021—Manufacture or treatment of heterojunction BJTs [HBT]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/85—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group III-V materials, e.g. GaAs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0107—Integrating at least one component covered by H10D12/00 or H10D30/00 with at least one component covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating IGFETs with BJTs
    • H10D84/0109—Integrating at least one component covered by H10D12/00 or H10D30/00 with at least one component covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating IGFETs with BJTs the at least one component covered by H10D12/00 or H10D30/00 being a MOS device
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/40—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00 with at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of IGFETs with BJTs
    • H10D84/401—Combinations of FETs or IGBTs with BJTs

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  • Bipolar Transistors (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Element Separation (AREA)
KR1020077006268A 2004-09-21 2005-09-20 ＢｉＣＭＯＳ 기술에서 콜렉터 형성 방법 Expired - Fee Related KR100961738B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/711,479 2004-09-21
US10/711,479 US7002190B1 (en) 2004-09-21 2004-09-21 Method of collector formation in BiCMOS technology

Publications (2)

Publication Number Publication Date
KR20070053280A KR20070053280A (ko) 2007-05-23
KR100961738B1 true KR100961738B1 (ko) 2010-06-10

Family

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Family Applications (1)

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KR1020077006268A Expired - Fee Related KR100961738B1 (ko) 2004-09-21 2005-09-20 ＢｉＣＭＯＳ 기술에서 콜렉터 형성 방법

Country Status (7)

Country Link
US (2) US7002190B1 (enExample)
EP (1) EP1794806B1 (enExample)
JP (1) JP5090168B2 (enExample)
KR (1) KR100961738B1 (enExample)
CN (1) CN101432892B (enExample)
TW (1) TWI364795B (enExample)
WO (1) WO2006034355A2 (enExample)

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TW200727367A (en) * 2005-04-22 2007-07-16 Icemos Technology Corp Superjunction device having oxide lined trenches and method for manufacturing a superjunction device having oxide lined trenches
DE102005021932A1 (de) * 2005-05-12 2006-11-16 Atmel Germany Gmbh Verfahren zur Herstellung integrierter Schaltkreise
US8435873B2 (en) 2006-06-08 2013-05-07 Texas Instruments Incorporated Unguarded Schottky barrier diodes with dielectric underetch at silicide interface
JP5029607B2 (ja) 2006-07-28 2012-09-19 株式会社島津製作所 Ｘ線診断装置
US7709338B2 (en) * 2006-12-21 2010-05-04 International Business Machines Corporation BiCMOS devices with a self-aligned emitter and methods of fabricating such BiCMOS devices
US20090072355A1 (en) * 2007-09-17 2009-03-19 International Business Machines Corporation Dual shallow trench isolation structure
JP2009099815A (ja) * 2007-10-18 2009-05-07 Toshiba Corp 半導体装置の製造方法
US9059196B2 (en) 2013-11-04 2015-06-16 International Business Machines Corporation Bipolar junction transistors with self-aligned terminals
US9570564B2 (en) 2014-08-05 2017-02-14 Globalfoundries Inc. Self-aligned emitter-base bipolar junction transistor with reduced base resistance and base-collector capacitance
CN108110051B (zh) * 2017-12-19 2019-11-12 上海华力微电子有限公司 一种带沟槽结构的双极型晶体管及其制作方法
US11640975B2 (en) 2021-06-17 2023-05-02 Nxp Usa, Inc. Silicided collector structure

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050250289A1 (en) 2002-10-30 2005-11-10 Babcock Jeffrey A Control of dopant diffusion from buried layers in bipolar integrated circuits

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US4949151A (en) 1986-09-24 1990-08-14 Hitachi, Ltd. Bipolar transistor having side wall base and collector contacts
JPS63278347A (ja) * 1987-05-11 1988-11-16 Toshiba Corp 半導体装置およびその製造方法
EP0306213A3 (en) * 1987-09-02 1990-05-30 AT&T Corp. Submicron bipolar transistor with edge contacts
JPH01146361A (ja) * 1987-12-02 1989-06-08 Fujitsu Ltd 半導体装置
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US4926233A (en) * 1988-06-29 1990-05-15 Texas Instruments Incorporated Merged trench bipolar-CMOS transistor fabrication process
JPH0389524A (ja) * 1989-08-31 1991-04-15 Fujitsu Ltd 半導体装置及びその製造方法
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US5256896A (en) * 1991-08-30 1993-10-26 International Business Machines Corporation Polysilicon-collector-on-insulator polysilicon-emitter bipolar transistor
KR100257517B1 (ko) * 1997-07-01 2000-06-01 윤종용 고속 바이폴라 트랜지스터 및 그 제조방법
US6960818B1 (en) * 1997-12-30 2005-11-01 Siemens Aktiengesellschaft Recessed shallow trench isolation structure nitride liner and method for making same
JPH11312687A (ja) * 1998-04-30 1999-11-09 Toshiba Corp 半導体装置およびその製造方法
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JP3507830B1 (ja) * 2002-10-04 2004-03-15 松下電器産業株式会社 半導体装置
KR100486304B1 (ko) 2003-02-07 2005-04-29 삼성전자주식회사 자기정렬을 이용한 바이씨모스 제조방법

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050250289A1 (en) 2002-10-30 2005-11-10 Babcock Jeffrey A Control of dopant diffusion from buried layers in bipolar integrated circuits

Also Published As

Publication number Publication date
TW200614383A (en) 2006-05-01
CN101432892A (zh) 2009-05-13
WO2006034355A2 (en) 2006-03-30
WO2006034355A3 (en) 2009-04-16
EP1794806B1 (en) 2014-07-02
JP5090168B2 (ja) 2012-12-05
CN101432892B (zh) 2010-08-25
US20060124964A1 (en) 2006-06-15
EP1794806A4 (en) 2011-06-29
TWI364795B (en) 2012-05-21
EP1794806A2 (en) 2007-06-13
JP2008514018A (ja) 2008-05-01
US7491985B2 (en) 2009-02-17
KR20070053280A (ko) 2007-05-23
US7002190B1 (en) 2006-02-21

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