CN101399254B - 半导体装置 - Google Patents
半导体装置 Download PDFInfo
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- CN101399254B CN101399254B CN2008101663001A CN200810166300A CN101399254B CN 101399254 B CN101399254 B CN 101399254B CN 2008101663001 A CN2008101663001 A CN 2008101663001A CN 200810166300 A CN200810166300 A CN 200810166300A CN 101399254 B CN101399254 B CN 101399254B
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
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- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Semiconductor Integrated Circuits (AREA)
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Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2007-246576 | 2007-09-25 | ||
| JP2007246576A JP5027605B2 (ja) | 2007-09-25 | 2007-09-25 | 半導体装置 |
| JP2007246576 | 2007-09-25 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101399254A CN101399254A (zh) | 2009-04-01 |
| CN101399254B true CN101399254B (zh) | 2013-03-20 |
Family
ID=40470671
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2008101663001A Active CN101399254B (zh) | 2007-09-25 | 2008-09-25 | 半导体装置 |
Country Status (3)
| Country | Link |
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| JP2011003578A (ja) * | 2009-06-16 | 2011-01-06 | Renesas Electronics Corp | 半導体装置 |
| WO2020098623A1 (en) * | 2018-11-12 | 2020-05-22 | Changxin Memory Technologies, Inc. | Semiconductor device, pad structure and fabrication method thereof |
| US11837623B2 (en) * | 2020-10-12 | 2023-12-05 | Raytheon Company | Integrated circuit having vertical routing to bond pads |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN1345086A (zh) * | 2000-10-03 | 2002-04-17 | 株式会社日立制作所 | 半导体集成电路器件的制造方法及其测试设备 |
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| JP3504421B2 (ja) * | 1996-03-12 | 2004-03-08 | 株式会社ルネサステクノロジ | 半導体装置 |
| JP2781787B2 (ja) | 1996-08-29 | 1998-07-30 | 日本電気アイシーマイコンシステム株式会社 | 半導体チップのボンディングパッド配置構成及びその最適化方法 |
| KR100295637B1 (ko) * | 1997-12-29 | 2001-10-24 | 김영환 | 반도체웨이퍼의구조및반도체칩의제조방법 |
| JP2002016069A (ja) * | 2000-06-29 | 2002-01-18 | Matsushita Electric Ind Co Ltd | 半導体装置およびその製造方法 |
| US6844631B2 (en) * | 2002-03-13 | 2005-01-18 | Freescale Semiconductor, Inc. | Semiconductor device having a bond pad and method therefor |
| US7629689B2 (en) * | 2004-01-22 | 2009-12-08 | Kawasaki Microelectronics, Inc. | Semiconductor integrated circuit having connection pads over active elements |
| JP4242336B2 (ja) | 2004-02-05 | 2009-03-25 | パナソニック株式会社 | 半導体装置 |
| JP2005243907A (ja) * | 2004-02-26 | 2005-09-08 | Renesas Technology Corp | 半導体装置 |
| JP4803966B2 (ja) | 2004-03-31 | 2011-10-26 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
| US7115985B2 (en) * | 2004-09-30 | 2006-10-03 | Agere Systems, Inc. | Reinforced bond pad for a semiconductor device |
| US7241636B2 (en) * | 2005-01-11 | 2007-07-10 | Freescale Semiconductor, Inc. | Method and apparatus for providing structural support for interconnect pad while allowing signal conductance |
| JP2006202866A (ja) | 2005-01-19 | 2006-08-03 | Nec Electronics Corp | 半導体装置 |
| JP2006210631A (ja) | 2005-01-28 | 2006-08-10 | Nec Electronics Corp | 半導体装置 |
| JP4585327B2 (ja) * | 2005-02-08 | 2010-11-24 | ルネサスエレクトロニクス株式会社 | 半導体装置およびその製造方法 |
| JP5148825B2 (ja) * | 2005-10-14 | 2013-02-20 | ルネサスエレクトロニクス株式会社 | 半導体装置および半導体装置の製造方法 |
| JP4951276B2 (ja) * | 2006-05-29 | 2012-06-13 | ルネサスエレクトロニクス株式会社 | 半導体チップおよび半導体装置 |
| US7622364B2 (en) * | 2006-08-18 | 2009-11-24 | International Business Machines Corporation | Bond pad for wafer and package for CMOS imager |
| US7397127B2 (en) * | 2006-10-06 | 2008-07-08 | Taiwan Semiconductor Manufacturing Co., Ltd. | Bonding and probing pad structures |
| US20080303177A1 (en) * | 2007-06-06 | 2008-12-11 | United Microelectronics Corp. | Bonding pad structure |
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Also Published As
| Publication number | Publication date |
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| US7999256B2 (en) | 2011-08-16 |
| CN101399254A (zh) | 2009-04-01 |
| JP2009076808A (ja) | 2009-04-09 |
| US20110266540A1 (en) | 2011-11-03 |
| US20130075727A1 (en) | 2013-03-28 |
| US20090078935A1 (en) | 2009-03-26 |
| JP5027605B2 (ja) | 2012-09-19 |
| US8669555B2 (en) | 2014-03-11 |
| US8338829B2 (en) | 2012-12-25 |
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