CN101393897B - 制造液晶显示装置的方法 - Google Patents
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- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
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Abstract
制造液晶显示装置的方法。该方法包括:利用第一掩模在基板上形成栅极、选通焊盘和选通线;在包括栅极、选通线和选通焊盘的基板的上方顺次形成栅绝缘膜、有源层、欧姆接触层和导电层;通过第二掩模形成有源图案、欧姆接触图案、源极/漏极、数据线和数据焊盘;通过第三掩模在栅绝缘膜上形成像素电极,该像素电极与漏极接触;利用源极/漏极作为蚀刻掩模蚀刻该欧姆接触图案来露出该有源图案;在包括源极/漏极、数据线和数据焊盘的基板上形成钝化膜;通过第四掩模蚀刻钝化膜和/或栅绝缘膜,以形成用于露出该选通焊盘的第一接触孔和用于露出该数据焊盘的第二接触孔;以及利用第五掩模来在该基板上形成具有多个孔的公共电极。
Description
技术领域
本发明涉及制造液晶显示装置的方法,更具体地说,涉及制造边缘场开关模式(fringe field switching mode)液晶显示装置的方法。
背景技术
为了改进普通IPS(共平面开关)模式液晶显示装置的低孔径比和低透射率,设计了具有高孔径比和高透射率的边缘场开关模式的液晶显示装置。
图1例示了常规边缘场开关模式的液晶显示装置的下基板的示意性剖视图。
如图1所示,常规边缘场开关模式的液晶显示装置的下基板包括:形成在绝缘基板1上具有栅极、半导体层、源极和漏极的薄膜晶体管(TFT,未示出)、连接至该TFT的漏极(未示出)的透明像素电极3、形成在该TFT和像素电极3上的钝化膜5,以及以与像素电极3交叠的方式形成在钝化膜5上的透明公共电极7。
上基板(未示出)与下基板1相对并相对于下基板以预定间隙进行装配。将液晶层(未示出)插入到上基板(未示出)和下基板1之间。因为在下基板1和上基板(未示出)之间的所谓“单元间隙”被形成为大于公共电极7和像素电极3之间的间隙,所以在公共电极7和像素电极3之间形成抛物线形状的边缘场。
然而,在制造上述常规边缘场开关模式的液晶显示装置时,要执行用于形成TFT的六次掩模工序(包括形成栅极的掩模工序、形成半导体层的掩模工序、形成源极/漏极的掩模工序、对钝化膜进行构图的掩模工序、形成公共电极的掩模工序以及形成像素电极的掩模工序)。为此,需要开发一种可以减少掩模工序的用于制造边缘场开关模式的液晶显示装置的新方法。
发明内容
因此,本发明涉及制造液晶显示装置的方法,其基本上避免了由于现有技术的局限性和缺点引起的一个或更多个问题。
本发明的目的是提供一种可以减少掩模工序的制造液晶显示装置的方法。
本发明的其它优点、目的以及特征将部分地在下面的说明中加以阐述,并且对于本领域的技术人员而言在考查以下内容后将部分地显见,或者可以从对本发明的实践来获知。通过在文字说明及其权利要求以及附图中具体指出的结构,可以实现并获得本发明的这些目的和其它优点。
为实现这些目的和其他优点并且根据本发明的用途,如在此所具体实现和广泛描述的,一种制造液晶显示装置的方法包括:利用第一掩模在基板上形成栅极、选通焊盘和选通线;在包括栅极、选通线和选通焊盘的基板的上方顺次形成栅绝缘膜、有源层、欧姆接触层和导电层;利用第二掩模形成有源图案、欧姆接触图案、源极/漏极、数据线和数据焊盘;利用第三掩模在该栅绝缘膜上形成像素电极,该像素电极与该漏极接触;使用源极/漏极作为蚀刻掩模,通过蚀刻该欧姆接触图案来露出该有源图案;在包括该源极/漏极、数据线和数据焊盘的基板上形成钝化膜;利用第四掩模蚀刻钝化膜和/或栅绝缘膜,以形成用于露出该选通焊盘的第一接触孔和用于露出该数据焊盘的第二接触孔;以及利用第五掩模来在该基板上形成具有多个孔的公共电极。
利用第二掩模形成有源图案、欧姆接触图案、源极/漏极、数据线和数据焊盘的步骤包括:在该导电层上形成光刻胶,并且使用被构造为衍射曝光掩模的第二掩模执行光刻处理以形成第一光刻胶图案,该第一光刻胶图案具有位于与该栅极相对应的区域的第一部分和位于与要形成该源极/漏极的区域相对应的区域的第二部分,并且该第一光刻胶图案的第一部分具有第一厚度,而该第一光刻胶图案的第二部分具有大于该第一厚度的第二厚度;利用该第一光刻胶图案作为蚀刻掩模执行蚀刻处理,来形成该有源图案、该欧姆接触图案、导电图案、该数据线和该数据焊盘;通过灰化具有第一厚度的第一光刻胶图案的第一部分来形成第二光刻胶图案,以使得露出该导电图案;以及利用第二光刻胶图案作为蚀刻掩模对该导电图案进行构图来形成该源极/漏极。
该公共电极可以被形成为覆盖由该数据线和该选通线限定的多个像素区域,并且该公共电极的多个孔可以仅形成在形成有该像素电极的区域中。
应当明白,本发明的以上一般性描述和以下详细描述都是示例性和说明性的,旨在提供对要求保护的本发明的进一步说明。
附图说明
附图被包括进来以提供对本发明的进一步的理解并被并入且构成本申请的一部分,示出了本发明的实施方式,并且与说明书一起用于解释本发明的原理。在附图中:
图1为例示了常规边缘场开关模式液晶显示装置的下基板的示意性剖视图;
图2A为根据本发明的一个示例性实施方式的边缘场开关模式液晶显示装置的平面图;
图2B为沿图2A的线I-I’的剖视图;
图3A-图3H为说明根据本发明的一个示例性实施方式的用于制造边缘场开关模式液晶显示装置的方法的剖视图。
具体实施方式
现在将详细描述与本发明用于制造边缘场开关模式液晶显示装置的方法相关的优选实施方式,在附图中示出了其示例。尽可能地,在所有附图中使用相同的标号来表示相同或相似的部分。
图2A为例示了根据本发明一个示例性实施方式的边缘场开关模式液晶显示装置的平面图,以及图2B为在图2A中沿线I-I’的剖视图。
如图2A和图2B所示,以选通线12b和数据线11a彼此交叉的方式构成基板。作为开关元件的薄膜晶体管T被布置在选通线12b和数据线11a的交叉点处。栅绝缘膜14形成在选通线12b和数据线11a之间。
薄膜晶体管T包括从选通线12b分出的栅极12a、有源图案16和欧姆接触图案18(薄膜晶体管的与栅极12a重叠的沟道层)、形成在有源图案16和欧姆接触图案18上并且从数据线11a分出的源极11b、以及与源极11b相对的漏极11c。
在由选通线12b和数据线11a彼此交叉限定的像素区域上形成板型的像素电极19。像素电极19不通过穿过钝化膜的接触孔而与漏极11c重叠,并且直接与漏极11c相接触。
在薄膜晶体管T和像素电极19上形成钝化膜21。
公共电极23形成在钝化膜21上。公共电极23被形成为覆盖下基板10上限定的多个像素区域,在这些像素区域上以阵列形式形成有薄膜晶体管T。此外,公共电极23在与像素电极19重叠的区域中形成有多个孔24。
像素电极19和公共电极23由铟锡氧化物(ITO)制成,该铟锡氧化物为透明材料。因为钝化膜21介于像素电极19和公共电极23之间,所以像素电极19和公共电极23之间的间隙小于单元空隙(即,上基板和下基板之间的间隙)。因此,在像素电极19和公共电极23上形成抛物线形的边缘场。
以下,将参考图3A-图3H对制造上述边缘场开关模式液晶显示装置的方法进行说明。
图3A-图3H为根据本发明的工艺流程公开的沿图2A中的线I-I’的剖视图。此外,图3A-图3H包括根据本发明的工艺流程公开的选通焊盘和数据焊盘(尽管没有在图2A的平面图中示出)的剖视图。
如图3A所示,在绝缘基板10上形成选通线(未示出)、栅极12a和选通焊盘12c。通过以下方式形成该选通线(未示出)、栅极12a和选通焊盘12c,即,通过沉积(例如,溅射)在绝缘基板10上形成第一导电层,并通过利用第一掩模的光刻处理来对该第一导电层进行构图。
随后,如图3B所示,在包括选通线、栅极12a和选通焊盘12c的绝缘基板10上顺序形成栅绝缘膜14、有源层、欧姆接触层和第二导电层。在第二导电层上形成第一光刻胶图案110,并且接着利用第一光刻胶图案110作为掩模选择性蚀刻该有源层、欧姆接触层和第二导电层,以形成有源图案16以及层叠在有源图案16上的第一欧姆接触图案18a、第二导电图案11d和数据焊盘11e。通过在第二导电层上形成光刻胶和使用第二掩模(未示出)的光刻处理来形成第一光刻胶图案110。将该第二掩模(未示出)构造为衍射曝光掩模,其包括完全透过光的透光区、具有多个狭缝以允许部分光透过同时阻挡另一部分光的衍射曝光区、以及完全阻挡光的遮光区。该衍射曝光区位于与薄膜晶体管的沟道区域相对应的位置,并且该遮光区位于要形成源极/漏极的区域上。优选的是,形成在衍射曝光区上的第一光刻胶图案的厚度M2被设定为小于形成在该遮光区上的第一光刻胶图案的厚度M1。利用第一光刻胶图案110作为蚀刻掩模对形成在光刻胶图案110下方的薄膜进行构图,从而形成有源图案16以及层叠在有源图案16上的第一欧姆接触图案18a、第二导电图案11d和数据焊盘11e(欧姆接触图案(未示出))。
其后,如图3C所示,在绝缘基板10的上方形成第二光刻胶图案111。通过对第一光刻胶图案110执行灰化处理来形成第二光刻胶图案111,从而露出与沟道区域相对应的第二导电图案11d。
接着,如图3D所示,在绝缘基板10的上方形成源极11b/漏极11c以及数据线(未示出)。利用第二光刻胶图案111作为蚀刻掩模对第二导电图案11d进行构图来形成源极11b/漏极11c以及数据线(未示出)。其后,去除第二光刻胶图案111。
接下来,如图3E所示,在绝缘基板10的上方形成像素电极19。以这样的方式形式像素电极19,即,通过沉积(例如,溅射)在绝缘基板10的前表面上形成透明材料,并通过利用第三掩模的光刻处理来对该透明材料进行构图。此时,像素电极19与漏极11c重叠,并且直接与漏极11c接触。
随后,如图3F所示,在绝缘基板10的上方形成第二欧姆接触图案18,从而在有源图案16上形成沟道。
利用源极11b/漏极11c作为蚀刻掩模对第一欧姆接触图案18a进行干法刻蚀来形成第二欧姆接触图案18,并且因此在通过形成第二欧姆接触图案18而露出的有源图案16上形成沟道。此时,通过先于钝化膜21的形成处理(参考图3G)而执行第二欧姆接触图案18的形成处理,保护有源图案16不受源极11b/漏极11c的形成处理之后的处理的影响。如果在形成源极11b/漏极11c之后立即执行第二欧姆接触图案18的形成处理,则在露出有源图案16的同时执行第二光刻胶图案去除处理与像素电极沉积和构图处理,这会导致有源图案16的薄膜污染,并且因此导致薄膜晶体管的特性劣化。因此,如果在形成源极11b/漏极11c之后不立即蚀刻第一欧姆接触图案18a,并且在执行第二光刻胶图案去除处理与像素电极沉积和构图处理后形成第二欧姆接触图案18,则可以保护有源图案16不受源极11b/漏极11c的形成处理之后的处理的影响,因此避免了有源图案16的薄膜污染和薄膜晶体管的特性劣化。
接下来,如图3G所示,在绝缘基板10的上方形成钝化膜21,该钝化膜作为第二绝缘薄膜形成有第一接触孔113a和第二接触孔113b。
通过在绝缘基板10上方沉积钝化膜并且通过利用第四掩模的光刻处理对该钝化膜进行构图来形成具有第一接触孔113a和第二接触孔113b的钝化膜21。此时,通过对栅绝缘薄膜14和钝化膜21进行构图形成第一接触孔113a,以露出选通焊盘12c,并且通过对钝化膜21进行构图而形成第二接触孔113b,以露出数据焊盘11e。
其后,如图3H所示,在绝缘基板10的上方形成具有多个孔24、第一透明导电层/和第二透明导电层23c的公共电极23。
通过以下方式形成具有多个孔24、第一透明导电层23b和第二透明导电层23c的公共电极23,即,在形成有钝化膜21的绝缘基板10的上方沉积透明材料构成的导电层,并且通过利用第五掩模的光刻处理来对该导电层进行构图。
第一透明导电层23b与通过第一接触孔113a露出的选通焊盘12c接触,而第二透明导电层23c与通过第二接触孔113b露出的数据焊盘11e接触。
公共电极23被形成为覆盖在下基板10上限定的多个像素区域,并且公共电极23的多个孔24仅形成在其中形成有像素电极19的区域上。
由于形成为覆盖多个像素区域的公共电极23,流过数据线11a的信号对水平电场(例如,形成在像素电极和公共电极之间的电场)没有影响。因此,可以制造不发生图象拖影(image smear)的高图象质量的液晶显示装置。
不同于本发明的公共电极,如果针对各像素区域对公共电极进行构图并且该公共电极的末端位于像素区域之间的边界部,则流过数据线的信号会对水平电场产生影响。位于水平电场失真的部分中的液晶具有不同于位于像素区域中央部分的液晶的排列特征。因此,穿过水平电场失真的部分的光的透射率变得不同,这导致了图象拖影。相应地,由于该图象拖影导致发生液晶显示装置的图像质量劣化的问题。然而,本发明的形成为覆盖多个像素区域的公共电极23防止了流过数据线11a的信号对水平电场产生影响。结果,根据本发明,可以制造能防止图像拖影的高图像质量的液晶显示装置。
如以上描述可见,根据本发明的制造液晶显示装置的方法可以通过执行五次掩模工序(即,通过从包括六次掩模工序的常规制造方法中消除一次掩模工序)来简化制造工艺。
另外,由于在形成源/漏极之后并在执行第二光刻胶图案去除处理以及像素电极沉积和构图处理之后,形成该第二欧姆接触图案,因此保护了该有源图案不受源极/漏极的形成处理以后的处理的影响。因此避免了有源图案的薄膜污染,并因此防止了薄膜晶体管的特性劣化。
更进一步,由于公共电极被形成为覆盖多个像素区域,所以流过数据线的信号对水平电场没有影响。因此,可以制造能够避免图像拖影的高图像质量的液晶显示装置。
显然,对本领域技术人员来说在不脱离本发明的精神和范围的情况下可以对本发明进行各种修改和变型。因此,本发明意欲覆盖权利要求及其等同范围内所包括的修改例和变型例。
本申请要求2007年9月20日提交的韩国专利申请No.10-2007-95939的权益,以参引的方式将其全部内容结合于此。
Claims (4)
1.一种制造液晶显示装置的方法,该方法包括:
利用第一掩模在基板上形成栅极、选通焊盘和选通线;
在包括所述栅极和选通焊盘的基板的上方顺次形成栅绝缘膜、有源层、欧姆接触层和导电层;
在所述导电层上形成光刻胶,并且使用被构造为衍射曝光掩模的第二掩模执行光刻处理以形成第一光刻胶图案,该第一光刻胶图案具有位于与所述栅极相对应的区域的第一部分和位于与要形成所述源极/漏极的区域相对应的区域的第二部分,并且该第一光刻胶图案的第一部分具有第一厚度,而该第一光刻胶图案的第二部分具有大于该第一厚度的第二厚度;
利用该第一光刻胶图案作为蚀刻掩模执行蚀刻处理,来形成有源图案、欧姆接触图案、导电图案、数据线和数据焊盘;
通过灰化具有第一厚度的第一光刻胶图案的所述第一部分来形成第二光刻胶图案,使得露出所述导电图案;
利用所述第二光刻胶图案作为蚀刻掩模对所述导电图案进行构图来形成所述源极/漏极;
利用第三掩模在像素区域中的所述栅绝缘膜上形成像素电极,该像素电极与所述漏极接触;
在形成所述像素电极之后,使用所述源极/漏极作为蚀刻掩模,通过蚀刻所述欧姆接触图案来露出所述有源图案;
在包括所述源极/漏极、数据线和数据焊盘的基板上形成钝化膜;
利用第四掩模蚀刻所述钝化膜和/或栅绝缘膜,以形成用于露出所述选通焊盘的第一接触孔和用于露出所述数据焊盘的第二接触孔;以及
利用第五掩模来在所述基板上形成具有多个孔的公共电极。
2.如权利要求1所述的方法,其特征在于,所述公共电极被形成为覆盖由所述数据线和所述选通线限定的多个像素区域。
3.如权利要求1所述的方法,其特征在于,所述公共电极的多个孔仅形成在形成有所述像素电极的区域中。
4.如权利要求1所述的方法,该方法还包括,
当形成所述公共电极时,形成通过所述第一接触孔与所述选通焊盘接触的第一透明导电层,以及通过所述第二接触孔与所述数据焊盘接触的第二透明导电层。
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CN101021658A (zh) * | 2007-03-23 | 2007-08-22 | 友达光电股份有限公司 | 液晶显示面板的半导体结构及其制作方法 |
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CN108873509A (zh) * | 2017-05-08 | 2018-11-23 | 中华映管股份有限公司 | 形成像素结构的方法 |
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US8030104B2 (en) | 2011-10-04 |
US8669600B2 (en) | 2014-03-11 |
CN101393897A (zh) | 2009-03-25 |
US20090081820A1 (en) | 2009-03-26 |
KR101264722B1 (ko) | 2013-05-15 |
US20120018731A1 (en) | 2012-01-26 |
KR20090030557A (ko) | 2009-03-25 |
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