CN108873509A - 形成像素结构的方法 - Google Patents
形成像素结构的方法 Download PDFInfo
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- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
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Abstract
本发明提供了一种形成像素结构的方法,包含以下步骤。首先,在基板上形成栅极电极层。然后,在栅极电极层与基板上形成第一绝缘层。接着,在第一绝缘层上形成半导体层。再来,在第一绝缘层与半导体层上形成像素电极层。然后,在像素电极层、半导体层以及第一绝缘层上形成源极/漏极电极层。接着,在半导体层、像素电极层、源极/漏极电极层以及第一绝缘层上形成第二绝缘层。最后,在第二绝缘层上形成共通电极层,其中半导体层在基板上的正投影与共通电极层在基板上的正投影为互补。通过前述形成像素结构的方法,将能有效降低设计制造的成本,同时使设计变得较为简易。
Description
技术领域
本发明涉及一种形成像素结构的方法。
背景技术
液晶显示面板(Liquid Crystal Display,LCD)为平面薄型的显示设备,由一定数量的彩色或黑白像素组成,放置于光源或者反射面前方。液晶显示器功耗低,因此倍受公众青睐,为目前主流的显示设备。
为了进一步改善液晶显示面板的各项特性,相关领域莫不费尽心思开发。具体而言,一般液晶显示面板的工艺设计中需要使用六道光罩,而如何减少工艺设计中所需要使用的光罩数量,以缩短新产品开发所需的时间,实属当前重要研发课题,也成为当前相关领域亟需改进的目标。
发明内容
本发明的一目的在于提供一种形成像素结构的方法,以有效降低设计制造的成本,同时使设计变得较为简易。
根据本发明一实施方式提供的一种形成像素结构的方法,包含以下步骤。首先,在基板上形成栅极电极层。然后,在基板与栅极电极层上形成第一绝缘层。接着,在第一绝缘层上形成半导体层。再来,在第一绝缘层与半导体层上形成像素电极层。然后,在像素电极层、半导体层以及第一绝缘层上形成源极/漏极电极层。接着,在半导体层、像素电极层、源极/漏极电极层以及第一绝缘层上形成第二绝缘层。最后,在第二绝缘层上形成共通电极层,其中半导体层在基板上的正投影与共通电极层在基板上的正投影为互补。
在本发明的一个或多个实施方式中,在形成半导体层的步骤中,还包含以下步骤。首先,在第一绝缘层上形成半导体层。然后,在半导体层上涂布第一光阻层。接着,曝光并显影第一光阻层,以形成第一光阻图案。再来,以所述第一光阻图案为罩幕,蚀刻并图案化半导体层。最后,移除第一光阻层。
在本发明的一个或多个实施方式中,在形成共通电极层的步骤中,还包含以下细部步骤。首先,在第二绝缘层上形成共通电极层。然后,在共通电极层上涂布第二光阻层。接着,曝光并显影第二光阻层。再来,蚀刻并图案化共通电极层。最后,移除第二光阻层。
在本发明的一个或多个实施方式中,在曝光并显影第一光阻层的步骤中与在曝光并显影第二光阻层的步骤中为使用相同图案的光罩。
在本发明的一个或多个实施方式中,所述的光罩具有开口图案,开口图案的形状对应于半导体层图案化后的形状。
在本发明的一个或多个实施方式中,所述的光罩具有开口图案,开口图案的形状对应于共通电极层图案化后的形状。
在本发明的一个或多个实施方式中,第一光阻层为正光阻,且第二光阻层为负光阻。
在本发明的一个或多个实施方式中,第一光阻层为负光阻,且第二光阻层为正光阻。
在本发明的一个或多个实施方式中,在形成像素电极层的步骤中,形成像素电极层的至少一部分直接接触半导体层。
在本发明的一个或多个实施方式中,形成共通电极层的步骤中,在共通电极层中形成开口,其中开口在基板上的正投影与源极/漏极电极层在基板上的正投影至少部分重叠。
本发明不同实施方式通过在图案化半导体层的工艺与图案化共通电极层的工艺使用相同图案的光罩,使设计变得较为简易,缩短新产品开发所需时间。
附图说明
图1至图5绘示依照本发明一实施方式的像素结构在不同工艺步骤时的俯视示意图。
图6绘示依照本发明一实施方式图案化半导体层时所使用的光罩的俯视示意图。
图7至图11绘示依照本发明一实施方式形成半导体层的细部工艺步骤的剖面示意图,其中剖面位置为沿图2的剖面线A。
图12至图16绘示依照本发明一实施方式形成共通电极层的细部工艺步骤的剖面示意图,其中剖面位置为沿图5的剖面线B。
具体实施方式
图1至图5绘示依照本发明一实施方式的像素结构100在不同工艺步骤时的俯视示意图。本发明不同实施方式提供一种形成像素结构100的方法,通过使用此形成方法,将能使整体工艺所需的光罩数量减少,因而有效降低设计制造的成本,同时使设计变得较为简易。
如图1所绘示,在基板110(见图7;本图未绘示)上形成栅极电极层120。具体而言,制造者可先在基板110上形成导电层,并随后图案化此导电层,以形成栅极电极层120。
在本实施方式中,上述的基板110的材质可为玻璃或其他透明材质。上述的栅极电极层120的材质可为钛、钼、铬、铱、铝、铜、银、金或上述的任意组合或合金。导电层的形成方式可为物理气相沉积法,例如溅镀法。图案化导电层的方式可为例如微影及蚀刻法。
然后,在栅极电极层120与基板110上形成第一绝缘层130(见图7;本图未绘示)。
具体而言,上述的第一绝缘层130的材质可为任何介电材料,例如:氮化硅、氧化硅、氮氧化硅或上述的任意组合。第一绝缘层130的形成方式可为例如化学气相沉积法。
如图2所绘示,在第一绝缘层130(见图7;本图未绘示)上形成半导体层140。具体而言,制造者可先在第一绝缘层130上沉积半导体层,并随后图案化此半导体层,以形成图案化的半导体层140。
上述的半导体层140的材质可为任何半导体材料,例如:非晶硅、复晶硅、单晶硅、氧化物半导体(oxide semiconductor)或上述的任意组合。半半导体层的形成方式可为例如化学气相沉积法。图案化半导体层140的方式可为例如微影及蚀刻法。
图6绘示依照本发明一实施方式图案化半导体层时所使用的光罩200的俯视示意图。如图6所绘示,具体而言,在图案化此半导体层的工艺中为使用光罩200,而在后续图案化共通电极层的工艺中,也会使用光罩200或另一与光罩200完全相同的光罩。由于两个不同工艺所使用的光罩皆为同一个,因此设计此光罩所需的时间将能减少,因而能缩短新产品开发时程,同时使设计变得较为简易。
进一步来说,请参阅图2与图6,光罩200具有开口图案210,开口图案210的形状对应于半导体层140图案化后的形状。此处需要注意的是,光罩200的形状仅为示意,光罩200的实际形状并不一定与图6所绘示的相同。
图7至图11绘示依照本发明一实施方式形成半导体层140的步骤的剖面示意图,如图7所绘示,在第一绝缘层130上形成半导体层141。然后,如图8所绘示,在半导体层141上涂布第一光阻层901。接着,如图9所绘示,曝光并显影第一光阻层901以形成第一光阻图案9011,其中在此工艺中为使用光罩200进行曝光与显影。再来,如图10所绘示,以第一光阻图案9011为罩幕,蚀刻并图案化半导体层141而形成半导体层140。最后,如图11所绘示,移除第一光阻层901。
在本实施方式中,第一光阻层为901正光阻,但并不限于此。在其他实施方式中,第一光阻层901亦可为负光阻。
如图3所绘示,在第一绝缘层130(见图7)与半导体层140上形成像素电极层150。于是,像素电极层150的至少一部分为直接接触半导体层140。具体而言,制造者可先在第一绝缘层130与半导体层140上沉积一导电层(本图未绘示),并随后图案化此导电层,以形成图案化的像素电极层150。
在本实施方式中,上述的像素电极层150的材质可为任何透明导电材料,例如:氧化铟锡、氧化铟锌、氧化锌铝或其他导电氧化物或上述任意的组合。导电层的形成方式可为例如物理气相沉积法或化学气相沉积法。图案化导电层的方式可为例如微影及蚀刻法。
如图4所绘示,在像素电极层150、半导体层140以及第一绝缘层130(见图7)上形成源极/漏极电极层160。具体而言,制造者可先在像素电极层150、半导体层140以及第一绝缘层130(见图7)上形成导电层(本图未绘示),并随后图案化此导电层,以形成源极/漏极电极层160。
在本实施方式中,上述的源极/漏极电极层160的材质可为钛、钼、铬、铱、铝、铜、银、金或上述的任意组合或合金。导电层的形成方式可为物理气相沉积法,例如溅镀法。图案化导电层的方式可为例如微影及蚀刻法。
然后,在半导体层140、像素电极层150、源极/漏极电极层160以及第一绝缘层130(见图12)上形成第二绝缘层170(见图12;本图未绘示)。
具体而言,上述的第二绝缘层170的材质可为任何介电材料,例如:氮化硅、氧化硅、氮氧化硅或上述的任意组合。第二绝缘层170的形成方式可为例如化学气相沉积法。
如图5所绘示,在第二绝缘层170(见图16)上形成共通电极层180。具体而言,制造者可先在第二绝缘层170(见图12)上沉积一导电层181,并随后图案化导电层181,以形成图案化的共通电极层180。
在本实施方式中,上述的共通电极层180的材质可为任何透明导电材料,例如:氧化铟锡、氧化铟锌、氧化锌铝或其他导电氧化物或上述任意的组合。导电层的形成方式可为例如物理气相沉积法或化学气相沉积法。图案化导电层的方式可为例如微影及蚀刻法。
具体而言,如图6所绘示,在图案化此共通电极层的工艺中为使用光罩200或另一与光罩200完全相同的光罩,由于在前述图案化半导体层的工艺中也为使用光罩200,于是两个不同工艺所使用的光罩皆为同一个,因此设计此光罩所需的时间将能减少,因而能缩短新产品开发时程,同时使设计变得较为简易。
图12至图16绘示依照本发明一实施方式形成共通电极层180的细部工艺步骤的剖面示意图,其中剖面位置为沿图5的剖面线B。首先,如图12所绘示,在第二绝缘层170上形成导电层181(或称共通电极层)。然后,如图13所绘示,在导电层181(或称共通电极层)上涂布第二光阻层902。接着,如图14所绘示,曝光并显影第二光阻层902以形成第二光阻图案9021,其中在此工艺中为使用光罩200或图案相同的另一光罩进行曝光与显影(因此,在曝光并显影第一光阻层901的工艺中与在曝光并显影第二光阻层902的工艺中为使用同一光罩或图案相同的另一光罩以形成第二光阻图案9021)。再来,如图15所绘示,以第二光阻图案9021为罩幕,蚀刻并图案化导电层181(或称共通电极层)而形成共通电极层180。最后,如图16所绘示,移除第二光阻图案9021。
在本实施方式中,第二光阻层902为负光阻,但并不限于此。在其他实施方式中,第二光阻层902亦可为正光阻。
需要注意的是,由于在曝光并显影第一光阻层902的步骤中与在曝光并显影第二光阻层902的步骤中为使用同一光罩,且第一光阻层901为正光阻,第二光阻层902为负光阻,因此半导体层140在基板110上的正投影与共通电极层180在基板110上的正投影将为互补。
如图16所绘示,像素结构100中会有半导体层140的至少一部分直接接触像素电极层150,但此部分的半导体层140并不会对于像素结构100的开口率造成影响,也不会造成寄生电容等电性上的问题。
更进一步来说,形成共通电极层180的工艺中,会在共通电极层180中形成开口182,其中开口182在基板110上的正投影与源极/漏极电极层160在基板110上的正投影至少部分重叠。开口182亦不会对于像素结构100的开口率造成影响,也不会造成寄生电容等电性上的问题。
在本发明其他实施方式中,在曝光并显影第一光阻层901的工艺中与在曝光并显影第二光阻层902的工艺中所使用的光罩的开口图案的形状可以对应于共通电极层180图案化后的形状(即此光罩的形状基本上互补于光罩200)。在此同时,第一光阻层901为负光阻,第二光阻层902为正光阻。于是,像素结构100的所有结构基本上会与前述说明的实施方式中相同,且半导体层140在基板110上的正投影与共通电极层180在基板110上的正投影仍为互补。
进一步来说,因为共通电极层180的图案具有较小的线宽,而使用正光阻的分辨率通常为较高,因此在第二光阻层902为正光阻的实施方式中,共通电极层180的图案精度将可以更进一步提升。
本发明不同实施方式通过在图案化半导体层140的工艺与图案化共通电极层180的工艺使用相同图案的光罩,使设计变得较为简易,缩短新产品开发所需时间。
以上所述仅为本发明的优选实施例而已,并不用以限制本发明,凡在本发明的精神和原则内,所做的任何修改、等同替换、改进等,均应包含在本发明保护的范围内。
Claims (10)
1.一种形成像素结构的方法,其特征在于,包含:
在基板上形成栅极电极层;
在所述栅极电极层与所述基板上形成第一绝缘层;
在所述第一绝缘层上形成半导体层;
在所述第一绝缘层与所述半导体层上形成像素电极层;
在所述像素电极层、所述半导体层以及所述第一绝缘层上形成源极/漏极电极层;
在所述半导体层、所述像素电极层、所述源极/漏极电极层以及所述第一绝缘层上形成第二绝缘层;以及
在所述第二绝缘层上形成共通电极层,其中所述半导体层在所述基板上的正投影与所述共通电极层在所述基板上的正投影为互补。
2.根据权利要求1所述的形成像素结构的方法,其特征在于,在形成所述半导体层的步骤中,还包含:
在所述第一绝缘层上形成半导体层;
在所述半导体层上涂布第一光阻层;
曝光并显影所述第一光阻层,以形成第一光阻图案;
以所述第一光阻图案为罩幕,蚀刻并图案化所述半导体层;以及
移除所述第一光阻层。
3.根据权利要求2所述的形成像素结构的方法,其特征在于,在形成所述共通电极层的步骤中,还包含:
在所述第二绝缘层上形成共通电极层;
在所述共通电极层上涂布第二光阻层;
曝光并显影所述第二光阻层,以形成第二光阻图案;
以所述第二光阻图案为罩幕,蚀刻并图案化所述共通电极层;以及
移除所述第二光阻层。
4.根据权利要求3所述的形成像素结构的方法,其特征在于,在曝光并显影所述第一光阻层的步骤中与在曝光并显影所述第二光阻层的步骤中为使用相同图案的光罩。
5.根据权利要求4所述的形成像素结构的方法,其特征在于,所述光罩具有开口图案,所述开口图案的形状对应于所述半导体层图案化后的形状。
6.根据权利要求4所述的形成像素结构的方法,其特征在于,所述光罩具有开口图案,所述开口图案的形状对应于所述共通电极层图案化后的形状。
7.根据权利要求3所述的形成像素结构的方法,其特征在于,所述第一光阻层为正光阻,且所述第二光阻层为负光阻。
8.根据权利要求3所述的形成像素结构的方法,其特征在于,所述第一光阻层为负光阻,且所述第二光阻层为正光阻。
9.根据权利要求1所述的形成像素结构的方法,其特征在于,在形成所述像素电极层的步骤中,形成所述像素电极层的至少一部分直接接触所述半导体层。
10.根据权利要求1所述的形成像素结构的方法,其特征在于,在形成所述共通电极层的步骤中,在所述共通电极层中形成开口,其中所述开口在所述基板上的正投影与所述源极/漏极电极层在所述基板上的正投影至少部分重叠。
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