CN101385126B - 包括外延生长在单晶衬底上的石墨烯层的器件 - Google Patents

包括外延生长在单晶衬底上的石墨烯层的器件 Download PDF

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CN101385126B
CN101385126B CN2007800056306A CN200780005630A CN101385126B CN 101385126 B CN101385126 B CN 101385126B CN 2007800056306 A CN2007800056306 A CN 2007800056306A CN 200780005630 A CN200780005630 A CN 200780005630A CN 101385126 B CN101385126 B CN 101385126B
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L·N·普菲菲尔
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Abstract

一种电子器件包括本体，所述本体包括所述本体的主要表面上的单晶区域。所述单晶区域具有与石墨烯基本晶格匹配的六边形晶体点阵，并且在所述单晶区域上设置至少一个石墨烯外延层。在目前优选实施例中，所述单晶区域包括多层六边形BN。一种制造这种电子器件的方法包括以下步骤：(a)提供本体，所述本体包括在所述本体的主要表面上的单晶区域。所述单晶区域具有与石墨烯基本晶格匹配的六边形晶体点阵，以及(b)在所述区域上外延形成至少一个石墨烯层。在目前优选实施例中，步骤(a)进一步包括以下步骤：(a1)提供单晶石墨衬底，以及(a2)在所述衬底上外延形成多层单晶六边形BN。所述六边形BN层具有与石墨烯基本晶格匹配的表面区域，并且步骤(b)包括在所述六边形BN层的所述表面区域上外延形成至少一个石墨烯层。描述了对FET的应用。

Description

包括外延生长在单晶衬底上的石墨烯层的器件
技术领域
本发明涉及包括石墨烯(graphene)层的电子器件。
背景技术
在Physics Today中的最近的文章中，M.Wilson评论了被称为石墨烯的独特的二维凝聚态物质体系，一种以蜂巢状六边形晶格设置的碳原子的单一的、一个原子厚的层(即单层)。石墨烯是所有其它维数的石墨状碳材料的结构单元。[见″Electrons in Atomically Thin CarbonSheets Behave like Massless Particles，″Phys.Today，p.21(Jan2006)，在此引入其以作为参考。]
Wilson指出，石墨烯具有非凡的特性。首先，在环境条件下它稳定、在化学性质上不活泼、并且是结晶状的。第二，它是半金属，因为它的导带和价带正好在布里渊区中的离散点汇合。第三，石墨烯中的电子具有零有效质量并且行为比常规大粒子更象光子。第四，它可以携带巨大的电流密度-大约108A/cm2，大约比铜大两个数量级。
最近几年科学家努力制造游离状态的单2D石墨烯层。例如，一个组使用胶带从石墨晶体剥离弱束缚层，对着氧化的硅表面轻轻地摩擦那些新层，并且然后在肉眼可见的屑中识别相对较少的单层小片。[例如，见K.S.Novoselov等人，Science，Vol.306，p.666(2004)，在此引入其以作为参考。]另一个组通过SiC表面的热分解制造超薄碳膜，通常是三个石墨烯层。仅仅加热SiC到足以从表面蒸发Si，留下薄的碳膜。[见C.Berger等人，J.Phys.Chem.B，Vol.108，p.19912(2004)，在此引入其以作为参考。]
然而，根据Wilson，生长单层片石墨烯仍存在问题-当在典型的制造工艺期间被加热时，碳的单层最容易受到损害。
另外，尽管Berger等人认为它们的碳膜是“外延生长”在SiC上，但是它们的工艺实际上仅包括Si的蒸发；它并不包括“生长”，因为所述术语按照惯例被用来描述标准制造技术例如分子束外延(MBE)和化学汽相淀积(CVD)中的外延淀积。实际上，SiC和石墨烯具有大约20％的相对较大的晶格失配，对于在SiC衬底上淀积器件质量的外延石墨层而言所述20％的晶格失配通常太大。
在器件电势的初步示范中，Berger等人介绍，大面积选通石墨沟道FET结构在制冷温度(4K)下的电阻调制相当小(仅2％)，因为栅极仅覆盖源和漏电极之间的石墨膜的一部分，剩下大的未选通的泄漏路径。
Berger等人的器件也被W.A.DeHeer等人在2004年12月16日公布的美国专利申请No.2005/0253820中进行了描述。
因此，本领域中仍然存在对基于石墨烯的器件的需要，在所述基于石墨烯的器件中石墨烯被外延淀积在合适的、晶格匹配的衬底上。
发明内容
根据本发明的一个方面，一种电子器件包括：本体，所述本体包括在本体的主要表面上的单晶区域，所述区域具有与石墨烯基本晶格匹配的六边形晶体点阵；以及设置在所述区域上的至少一个石墨烯外延层。在目前优选实施例中，单晶表面区域包括多层六边形BN，所述多层六边形BN在每层内具有必要的六边形晶体点阵并且具有对石墨烯的小于大约2％的晶格失配。另外，也优选在所述区域上仅设置单层石墨烯。根据本发明的另一个方面，一种制造电子器件的方法包括以下步骤：(a)提供本体，所述本体包括在本体的主要表面上的单晶区域，所述区域具有与石墨烯基本晶格匹配的六边形晶体点阵，并且(b)在所述区域上外延形成至少一个石墨烯层。在目前优选实施例中，步骤(a)进一步包括以下步骤：(a1)提供单晶石墨衬底，以及(a2)在衬底上外延形成单晶六边形BN。六边形BN具有表面区域，其在每层内具有多层的六边形晶体点阵，并且与石墨烯基本晶格匹配，以及步骤(b)包括在六边形BN表面区域上外延形成石墨烯层。
附图说明
从下列结合附图的更详细的描述可以容易地理解本发明及其各个特征和优点，其中：
图1是根据本发明的一个实施例的电子器件10的截面示意图；
图2是根据本发明的另一个实施例的电子器件20的截面示意图；
图3是根据本发明的一个实施例的FET 30的截面示意图；
图4是根据本发明的又一个实施例的FET 40的示意性顶视图；
图5示出石墨的多层结晶结构。为了简单和清楚起见，仅示出三层石墨烯。石墨可以具有多于或少于三个石墨烯层；以及
图6示出多层单晶六边形氮化硼(BN)的多层结晶结构。为了简单和清楚起见，仅示出三层六边形BN。六边形BN可以具有多于或少于三个石墨烯层。
正如在此所用的，“在...中”的意思包括“在...中”和“在...上”，并且“在...上”的意思包括“在...上”和“在...中”。
具体实施方式
现在参考图1，电子器件10包括本体12，所述本体12具有在本体12的主要表面上的单晶区域12.1。区域12.1具有与石墨烯基本晶格匹配的六边形晶体点阵，以及外延地设置在区域12.1上的至少一个石墨烯层14。优选地，在区域12.1上仅形成单层石墨烯。单石墨烯层避免了与多层之间的缺陷相关的复杂性。然而，本发明打算在衬底上设置一层以上的石墨烯。多个石墨烯层是否实用很大程度上取决于预期的器件应用。例如，在其中多个石墨烯层可能必须被耗尽(例如当石墨烯层的一部分形成FET沟道时)的器件(例如以下讨论的FET)中，石墨烯的半金属性质使得它难以在多于例如两个或三个的石墨烯层中实现充分的耗尽。
本体12可以完全是单晶材料，或它可以是单晶和非单晶材料的合成物，只要表面区域12.1是单晶的并且具有必要的晶格匹配和六边形晶体点阵。更具体地说，图5示出石墨的结晶结构，其呈现两个主要的特征：首先，它由石墨烯的多重叠层(即平面或片)A1、B1、A2等构成；并且其次，每层具有碳原子的六边形晶体点阵(开环)，一个在六边形的每个顶点处。如所示，晶体尺寸a＝2.455
Figure G2007800056306D00031
是在每个六边形中不相邻的碳原子对之间(即奇数原子之间或偶数原子之间)的距离，键长b＝1.42
Figure G2007800056306D00032
是邻近原子之间的距离，并且d＝3.345
Figure G2007800056306D00033
是邻近石墨烯层之间的距离。
因此，单晶区域12.1的结晶结构应当基本等同于石墨的结晶结构。如上所述，首先，其优选是与石墨的层A1、B1、A2等相同或非常类似方式的多层；第二，它应当在每层内具有六边形晶体点阵；并且第三，它应当具有相同或非常类似的键长，特别是晶体尺寸a的大小。优选地，单晶区域12.1应当属于与石墨烯相同的结晶空间群(即，石墨的P63/mmc群)。
通过要求石墨烯层14和区域12.1基本上彼此晶格匹配，我们的意思是它们之间晶格失配不超过大约2％。由于石墨的晶格常数ag并且因此石墨烯的晶格常数ag是大约2.455±0.002
Figure G2007800056306D00041
[见″Crystal Data，Determinative Tables，″3rdEd.，I.D.H.Donnay等人，US Departmentof Commerce，National Bureau of Standards(1973)]，区域12.1的相应晶格常数ar应当大约是
0.98ag≤ar≤1.02ag；(1)
即，
2.4059≤ar≤2.5041  (2)
如图6中所示，多层六边形氮化硼(BN)具有几乎与石墨相同的六边形晶格，并且它属于与石墨相同的空间群(P63/mmc)。另外，它具有晶格常数ab＝2.50399±0.00005(根据Donnay等人的后两个特性，见上)，其满足不等式(2)。此外，该形状的六边形BN具有键长b＝1.45
Figure G2007800056306D00043
以及层间隔d＝3.33
Figure G2007800056306D00044
所述两个常数都非常接近石墨烯的常数。因此，该类型BN可以被用来形成区域12.1，只要它可以被制造为单晶。
六边形的多层单晶BN在题名为″Synthesis of Boron Nitride fromOxide Precursors，″的文章中被M.Hubacek描述，其可以在因特网上URLhttp://hubacek.ip/bn/bn.htm，pp.1-10(Feb 2006)处找到并且在此被引入以作为参考。
可替换地，并且根据本发明的另一方面，晶体学要求被提出如下。参考图2，通过首先提供单晶石墨衬底26来制造电子器件20。优选地，衬底26是高度有序的石墨(称作HOG)，其中到邻近石墨平面的法线基本平行；即，邻近法线之间的角不超过0.40，并且优选不超过0.20。利用标准的CVD技术，在石墨衬底26上外延淀积六边形BN层22。该步骤结果形成多层六边形BN，所述多层六边形BN具有与下面的石墨衬底26基本相同的六边形晶体点阵。然后，在对应于图1的表面区域12.1的单晶六边形BN层22的顶部主要表面22.1上外延淀积石墨烯层24。可以通过几个众所周知的技术中的任何一个淀积石墨烯层24；例如通过MBE，所述MBE利用me和K.W.West在2005年4月26日提交的共同未决的美国专利申请序列号No.11/114，828(在此引入其以作为参考)中所描述类型的玻璃状碳源提供对层厚的亚单层控制；或通过CVD。低压CVD(LPCVD)提供比其它形式的CVD更好的厚度控制，因此可以是优选的。
一旦已经生长多层单晶六边形BN层22，就可以部分或全部除去石墨衬底26。然而，可以延迟石墨衬底26的这种除去直到完成另外的处理步骤；例如，在石墨烯层24已经生长在六边形BN层22上之后，或在可选的绝缘层28已经淀积在石墨烯层24上之后。
在这一点上，注意，因为石墨烯层仅为一个单层厚，所以在仅仅几层石墨烯的生长期间会形成任何大量位错的风险(如果有的话)很小。即，Matthews-Blakeslee理论预测，无位错的层厚相反地与生长层和下面的衬底之间的晶格失配相关。因此，例如，如果晶格失配是1％，则层可以生长100厚而不形成位错，但是如果失配加倍到2％，则层可以生长仅40
Figure G2007800056306D00052
厚而没有位错。[见J.Y.Tsao，″Materials Fundamentalsof Molecular Beam Epitaxy，″p.167，Academic Press，Inc.(1993)。]但是，因为石墨烯层标称仅大约2
Figure G2007800056306D00053
厚，所以可以足够容许2％的晶格失配。
尽管可以在任何晶格匹配的材料上外延生长石墨烯层，但是对于许多电子应用而言，区域12.1、22.1的材料优选不是高度导电的；例如，它是绝缘体或具有相对大的带隙的半导体。六边形BN属于该范畴。在许多FET设计中，例如在图3-4中所示的那些，石墨烯层34、44分别生长在绝缘层32、42上并且与绝缘层32、42晶格匹配。
另外，在许多电子器件的设计中可选的绝缘层28是重要的；例如在制造图3中所示类型的FET的栅极结构(特别是栅绝缘体38.1)中。优选地，绝缘层28外延沉积在石墨烯层24上并且具有与层22相同的结晶特性。因此，对于制造层28而言多层单晶六边形BN是优选材料，并且它可以利用用于层22的相同技术被淀积。另外，然而，许多应用，包括图3的FET，需要图案化层28，或者在它正被淀积时(例如通过众所周知的遮光掩蔽(shadow masking))或在它已经被淀积后(例如通过众所周知的剥离或光刻刻蚀)。
使用多层单晶六边形BN用于绝缘层22和28减小了这些层和石墨烯层24之间的可能电活性的界面态的数目，一个在许多FET的工作中特别重要的特征。
更具体地说，在图3中，FET 30由包括单晶绝缘层32和外延形成在其上的石墨烯层34的叠层形成。层34的单独部分形成源区34.2和漏区34.3。示意性地示出的源和漏电极Vs和Vd分别与源和漏区34.2和34.3电接触。层34的第三部分形成沟道区34.1，所述沟道区34.1使源和漏区彼此耦合。众所周知，在半导体和石墨烯器件领域中，通过栅极区域38控制沟道区34.1的电阻/电导。后者包括设置在沟道区34.1上的图案化栅绝缘体38.1和形成在栅绝缘体38.1上的栅电极38.2。栅绝缘体可以从任何绝缘体被图案化，或它可以从外延生长在石墨烯层34上的大面积绝缘体被图案化，或它可以在它利用标准遮光板(shadowmask)被淀积时被图案化，如上参考图2的层28所讨论的。最后，公共(通常接地的)电极37形成在绝缘层32的底部上。注意，图3是示意性的截面，其并不反映这样的事实：除在栅极区域38下面和通过沟道区34.1的通路以外在源和漏区之间不存在导电通路。
在操作中，当适当的电压Vs和Vd分别被施加到源和漏电极时，电流从源区34.2流到漏区34.3或被禁止从源区34.2流到漏区34.3(或相反地)，这取决于施加在电极38.2和37之间的栅电压。当栅电压Vg通过耗尽沟道区34.1足以减少电子传输时，沟道电阻增加并且电流减小，以及相反地。
另一方面，在图4中FET 40通过外延形成在绝缘层42上的图案化的石墨烯层44以平面方式形成。在该实施例中，矩形源区44.2和矩形漏区44.3通过带状沟道区44.1彼此耦合，其全部都是石墨烯层44的图案化部分。在该情形下，T形栅电极49也是石墨烯层44的图案化部分。(除了矩形、带形和T形以外的形状也可以是合适的。)栅电极49具有延伸得与沟道区44.1很接近的段49.1。绝缘体区域48是绝缘层42的表面部分，所述绝缘体区域48充当隔离沟道区域44.1与栅电极段49.1的栅绝缘体。
在操作中，除了不需要公共电极(类似于图3的电极37)之外，图4的实施例遵循与图3的实施例相同的原则。更确切地说，栅电压Vg可以被施加在栅电极49与源或漏区44.2、44.3之间。
要理解的是，上述设置仅仅说明可以被设计来表示本发明的应用原理的许多可能的具体实施例。在不脱离本发明的精神和范围的情况下，本领域技术人员可以根据这些原理设计许多并且变化的其它设置。
特别地，如较早讨论的，图3-4的FET不限于使用单石墨烯层来形成沟道，尽管该设计是目前优选的。可以使用几个(例如两个或三个)石墨烯层，只要它们可以被充分地耗尽以控制源极和漏极之间的电流流动。
另外，可以通过电子束光刻在石墨烯层34、44上形成电极，随后是Au/Cf的蒸发，正如Y.Zhang等人在Nature，Vol.438，No.10，p.201(Nov 2005)中所描述的，在此引入其以作为参考。

Claims (8)

1.一种具有石墨烯层的器件，包括：
本体，所述本体包括在所述本体的主表面上的单晶电绝缘的第一区域，所述第一区域具有六边形晶体点阵，以及
设置在所述本体的所述第一区域上的至少一个石墨烯外延层；以及
设置在所述至少一个石墨烯层上的多层单晶电绝缘的第二区域，所述第二区域在其每层内具有六边形晶体点阵，所述第一区域和第二区域与石墨烯晶格匹配，使得所述第一区域和第二区域与所述至少一个石墨烯层晶格失配小于2％。
2.如权利要求1所述的器件，其中所述第一区域包括多层单晶绝缘体或宽带隙半导体。
3.如权利要求2所述的器件，其中所述绝缘体包括单晶六边形BN。
4.如权利要求2所述的器件，其中所述本体进一步包括单晶石墨衬底，所述第一区域设置在所述石墨衬底的主表面上。
5.如权利要求1所述的器件，其中所述第一区域和所述至少一个石墨烯层具有相同的结晶空间群。
6.一种场效应晶体管，包括：
源区、漏区、和使所述源区和漏区彼此耦合的沟道区，以及
栅极区，所述栅极区被配置为施加电压到所述沟道区，由此控制所述源区和漏区之间的电流的流动，以及
权利要求1所述的器件，其中所述沟道区包括所述至少一个石墨烯层的一部分。
7.一种制造具有石墨烯层的器件的方法，包括以下步骤：
(a)提供本体，所述本体包括在所述本体的表面上的单晶电绝缘的第一区域，所述第一区域具有六边形晶体点阵，以及
(b)在所述第一区域上外延淀积至少一个石墨烯层；以及
(c)在所述至少一个石墨烯层上形成多层单晶电绝缘的第二区域，所述第二区域在其每层内具有六边形晶体点阵，所述第一区域和第二区域与石墨烯晶格匹配，使得所述第一区域和第二区域与所述至少一个石墨烯层晶格失配小于2％。
8.如权利要求7所述的方法，其中步骤(a)进一步包括以下步骤：(a1)提供单晶石墨衬底，以及(a2)在所述衬底上将所述第一区域外延形成为多层单晶六边形BN，所述六边形BN具有所述第一区域，并且步骤(b)包括在所述六边形BN层的所述第一区域上外延淀积所述至少一个石墨烯层。
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