CN101335249B - 半导体器件 - Google Patents

半导体器件 Download PDF

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Publication number
CN101335249B
CN101335249B CN200810126820XA CN200810126820A CN101335249B CN 101335249 B CN101335249 B CN 101335249B CN 200810126820X A CN200810126820X A CN 200810126820XA CN 200810126820 A CN200810126820 A CN 200810126820A CN 101335249 B CN101335249 B CN 101335249B
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mentioned
insulating portion
insulating
peristome
conductive part
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CN200810126820XA
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Chinese (zh)
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CN101335249A (zh
Inventor
宗像浩次
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Fujikura Ltd
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Fujikura Ltd
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FR2939566B1 (fr) * 2008-12-05 2011-03-11 St Microelectronics Sa Procede de realisation de plots exterieurs d'un dispositif semi-conducteur et dispositif semi-conducteur.
CN101866905B (zh) * 2009-04-16 2012-05-30 日月光半导体制造股份有限公司 基板结构及其制造方法
JP2010278040A (ja) * 2009-05-26 2010-12-09 Renesas Electronics Corp 半導体装置の製造方法および半導体装置
EP2330618A1 (en) * 2009-12-04 2011-06-08 STMicroelectronics (Grenoble 2) SAS Rebuilt wafer assembly
US8304867B2 (en) * 2010-11-01 2012-11-06 Texas Instruments Incorporated Crack arrest vias for IC devices
US11029372B2 (en) * 2016-11-18 2021-06-08 Asahi Kasei Microdevices Corporation Hall element for mitigating current concentration and fabrication method thereof
CN112635429B (zh) * 2019-10-08 2025-06-06 珠海格力电器股份有限公司 一种功率器件及其基板
EP4020036A1 (en) 2020-12-23 2022-06-29 EFFECT Photonics B.V. An environmentally protected photonic integrated circuit

Family Cites Families (17)

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JPH05175191A (ja) 1991-10-22 1993-07-13 Mitsubishi Electric Corp 積層導電配線
US5260517A (en) * 1992-09-09 1993-11-09 Micron Technology, Inc. Interconnect lead with stress joint
US5464794A (en) * 1994-05-11 1995-11-07 United Microelectronics Corporation Method of forming contact openings having concavo-concave shape
JPH10135270A (ja) * 1996-10-31 1998-05-22 Casio Comput Co Ltd 半導体装置及びその製造方法
JP3520764B2 (ja) 1998-04-22 2004-04-19 松下電器産業株式会社 半導体装置およびその製造方法
US6181569B1 (en) * 1999-06-07 2001-01-30 Kishore K. Chakravorty Low cost chip size package and method of fabricating the same
JP2000353716A (ja) 1999-06-14 2000-12-19 Matsushita Electronics Industry Corp 半導体装置およびその製造方法ならびに半導体装置が実装されたモジュール
JP2001085560A (ja) * 1999-09-13 2001-03-30 Sharp Corp 半導体装置およびその製造方法
JP3386029B2 (ja) * 2000-02-09 2003-03-10 日本電気株式会社 フリップチップ型半導体装置及びその製造方法
JP3866073B2 (ja) * 2001-10-10 2007-01-10 株式会社フジクラ 半導体パッケージ
JP2004104103A (ja) * 2002-08-21 2004-04-02 Seiko Epson Corp 半導体装置及びその製造方法、回路基板並びに電子機器
US7285867B2 (en) * 2002-11-08 2007-10-23 Casio Computer Co., Ltd. Wiring structure on semiconductor substrate and method of fabricating the same
JP3905032B2 (ja) * 2002-12-20 2007-04-18 シャープ株式会社 半導体装置、および、その製造方法
JP2004207368A (ja) 2002-12-24 2004-07-22 Fujikura Ltd 半導体装置とその製造方法及び電子装置
JP2004288816A (ja) * 2003-03-20 2004-10-14 Seiko Epson Corp 半導体ウエハ、半導体装置及びその製造方法、回路基板並びに電子機器
JP4045261B2 (ja) * 2003-06-13 2008-02-13 沖電気工業株式会社 半導体装置
US7390688B2 (en) * 2005-02-21 2008-06-24 Casio Computer Co.,Ltd. Semiconductor device and manufacturing method thereof

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CN101335249A (zh) 2008-12-31
US7863719B2 (en) 2011-01-04
KR20090004557A (ko) 2009-01-12
EP2009691A1 (en) 2008-12-31
US20100295175A1 (en) 2010-11-25
US7791187B2 (en) 2010-09-07
JP2009010260A (ja) 2009-01-15

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