CN101075809A - 时钟生成电路和时钟生成方法 - Google Patents
时钟生成电路和时钟生成方法 Download PDFInfo
- Publication number
- CN101075809A CN101075809A CNA2005101323684A CN200510132368A CN101075809A CN 101075809 A CN101075809 A CN 101075809A CN A2005101323684 A CNA2005101323684 A CN A2005101323684A CN 200510132368 A CN200510132368 A CN 200510132368A CN 101075809 A CN101075809 A CN 101075809A
- Authority
- CN
- China
- Prior art keywords
- clock
- circuit
- frequency division
- output
- clock signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000000034 method Methods 0.000 title claims abstract description 11
- 238000001228 spectrum Methods 0.000 claims abstract description 30
- 230000004044 response Effects 0.000 claims abstract description 5
- 230000003111 delayed effect Effects 0.000 claims description 29
- 230000000052 comparative effect Effects 0.000 claims description 3
- 101150087322 DCPS gene Proteins 0.000 abstract description 13
- 101100386725 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) DCS1 gene Proteins 0.000 abstract description 13
- 101100116191 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) DCS2 gene Proteins 0.000 abstract description 13
- 102100033718 m7GpppX diphosphatase Human genes 0.000 abstract description 13
- 239000000872 buffer Substances 0.000 description 29
- 230000000630 rising effect Effects 0.000 description 11
- 238000010586 diagram Methods 0.000 description 7
- 238000006243 chemical reaction Methods 0.000 description 4
- 230000008859 change Effects 0.000 description 3
- 230000001934 delay Effects 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- 230000001174 ascending effect Effects 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012544 monitoring process Methods 0.000 description 1
- 238000012797 qualification Methods 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/07—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop using several loops, e.g. for redundant clock signal generation
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/0805—Details of the phase-locked loop the loop being adapted to provide an additional control signal for use outside the loop
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/081—Details of the phase-locked loop provided with an additional controlled phase shifter
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/081—Details of the phase-locked loop provided with an additional controlled phase shifter
- H03L7/0812—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used
- H03L7/0818—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used the controlled phase shifter comprising coarse and fine delay or phase-shifting means
Landscapes
- Pulse Circuits (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Abstract
Description
Claims (8)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005268332 | 2005-09-15 | ||
JP2005-268332 | 2005-09-15 | ||
JP2005268332A JP4298688B2 (ja) | 2005-09-15 | 2005-09-15 | クロック発生回路及びクロック発生方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN101075809A true CN101075809A (zh) | 2007-11-21 |
CN101075809B CN101075809B (zh) | 2010-12-22 |
Family
ID=35788067
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN2005101323684A Active CN101075809B (zh) | 2005-09-15 | 2005-12-21 | 时钟生成电路和时钟生成方法 |
Country Status (6)
Country | Link |
---|---|
US (1) | US7276944B2 (zh) |
EP (1) | EP1764922B1 (zh) |
JP (1) | JP4298688B2 (zh) |
CN (1) | CN101075809B (zh) |
DE (1) | DE602005010705D1 (zh) |
TW (1) | TWI304685B (zh) |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103701438A (zh) * | 2012-09-27 | 2014-04-02 | 美国亚德诺半导体公司 | 用于正交时钟信号产生的装置和方法 |
CN104426543A (zh) * | 2013-08-30 | 2015-03-18 | 瑞昱半导体股份有限公司 | 输出时脉产生方法及其装置 |
CN105099409A (zh) * | 2014-05-22 | 2015-11-25 | 创意电子股份有限公司 | 集成电路 |
CN109150163A (zh) * | 2013-12-20 | 2019-01-04 | 高通股份有限公司 | 使用延迟锁相环的本地振荡器信号生成 |
CN111788774A (zh) * | 2018-02-27 | 2020-10-16 | 德克萨斯仪器股份有限公司 | 延迟调制时钟分频 |
CN112615622A (zh) * | 2020-12-26 | 2021-04-06 | 上海艾为电子技术股份有限公司 | 一种展频时钟发生器及电子设备 |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2007193751A (ja) * | 2006-01-23 | 2007-08-02 | Nec Electronics Corp | 半導体装置およびデータ入出力システム |
CN101404570B (zh) * | 2007-11-23 | 2011-01-12 | 硅谷数模半导体(北京)有限公司 | 用于去除参考时钟信号的展频的系统和方法 |
CN101404569B (zh) * | 2007-11-23 | 2011-04-27 | 硅谷数模半导体(北京)有限公司 | 对参考时钟信号进行展频的装置和方法 |
JP5321179B2 (ja) * | 2008-04-11 | 2013-10-23 | 富士通株式会社 | 位相制御装置、位相制御プリント板、制御方法 |
US8180006B2 (en) * | 2009-08-13 | 2012-05-15 | Himax Technologies Limited | Spread-spectrum generator |
US8767801B1 (en) * | 2010-03-23 | 2014-07-01 | Altera Corporation | Testing performance of clock and data recovery circuitry on an integrated circuit device |
KR101152404B1 (ko) * | 2010-07-06 | 2012-06-05 | 에스케이하이닉스 주식회사 | 지연고정루프회로의 동작제어회로 및 이를 구비하는 반도체 장치 |
CN102722218A (zh) * | 2012-05-23 | 2012-10-10 | 常州芯奇微电子科技有限公司 | Usb时钟电路 |
US9357163B2 (en) * | 2012-09-20 | 2016-05-31 | Viavi Solutions Inc. | Characterizing ingress noise |
JP6453541B2 (ja) * | 2014-01-10 | 2019-01-16 | 株式会社メガチップス | クロック生成回路 |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5488627A (en) | 1993-11-29 | 1996-01-30 | Lexmark International, Inc. | Spread spectrum clock generator and associated method |
US5442664A (en) | 1993-12-20 | 1995-08-15 | Hewlett-Packard Company | Digitally phase modulated clock inhibiting reduced RF emissions |
US6043677A (en) * | 1997-10-15 | 2000-03-28 | Lucent Technologies Inc. | Programmable clock manager for a programmable logic device that can implement delay-locked loop functions |
JP3789628B2 (ja) * | 1998-01-16 | 2006-06-28 | 富士通株式会社 | 半導体装置 |
JP3973308B2 (ja) * | 1998-11-27 | 2007-09-12 | 富士通株式会社 | セルフタイミング制御回路を内蔵する集積回路装置 |
JP4110081B2 (ja) * | 2002-12-06 | 2008-07-02 | ザインエレクトロニクス株式会社 | 位相選択型周波数変調装置及び位相選択型周波数シンセサイザ |
JP2005004451A (ja) | 2003-06-11 | 2005-01-06 | Nec Electronics Corp | スペクトラム拡散クロック発生装置 |
JP4660076B2 (ja) | 2003-06-23 | 2011-03-30 | ルネサスエレクトロニクス株式会社 | クロック発生回路 |
US7078947B2 (en) * | 2003-12-21 | 2006-07-18 | Silicon Bridge Inc. | Phase-locked loop having a spread spectrum clock generator |
US7158443B2 (en) * | 2005-06-01 | 2007-01-02 | Micron Technology, Inc. | Delay-lock loop and method adapting itself to operate over a wide frequency range |
-
2005
- 2005-09-15 JP JP2005268332A patent/JP4298688B2/ja not_active Expired - Fee Related
- 2005-12-13 DE DE602005010705T patent/DE602005010705D1/de active Active
- 2005-12-13 EP EP05257644A patent/EP1764922B1/en active Active
- 2005-12-15 TW TW094144501A patent/TWI304685B/zh active
- 2005-12-21 CN CN2005101323684A patent/CN101075809B/zh active Active
- 2005-12-21 US US11/312,392 patent/US7276944B2/en active Active
Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103701438A (zh) * | 2012-09-27 | 2014-04-02 | 美国亚德诺半导体公司 | 用于正交时钟信号产生的装置和方法 |
CN103701438B (zh) * | 2012-09-27 | 2016-07-06 | 美国亚德诺半导体公司 | 用于正交时钟信号产生的装置和方法 |
CN104426543A (zh) * | 2013-08-30 | 2015-03-18 | 瑞昱半导体股份有限公司 | 输出时脉产生方法及其装置 |
CN104426543B (zh) * | 2013-08-30 | 2018-02-06 | 瑞昱半导体股份有限公司 | 输出时脉产生方法及其装置 |
CN109150163A (zh) * | 2013-12-20 | 2019-01-04 | 高通股份有限公司 | 使用延迟锁相环的本地振荡器信号生成 |
CN105099409A (zh) * | 2014-05-22 | 2015-11-25 | 创意电子股份有限公司 | 集成电路 |
CN105099409B (zh) * | 2014-05-22 | 2018-09-11 | 创意电子股份有限公司 | 集成电路 |
CN111788774A (zh) * | 2018-02-27 | 2020-10-16 | 德克萨斯仪器股份有限公司 | 延迟调制时钟分频 |
CN112615622A (zh) * | 2020-12-26 | 2021-04-06 | 上海艾为电子技术股份有限公司 | 一种展频时钟发生器及电子设备 |
Also Published As
Publication number | Publication date |
---|---|
CN101075809B (zh) | 2010-12-22 |
EP1764922A1 (en) | 2007-03-21 |
TWI304685B (en) | 2008-12-21 |
JP2007081935A (ja) | 2007-03-29 |
JP4298688B2 (ja) | 2009-07-22 |
US7276944B2 (en) | 2007-10-02 |
US20070057709A1 (en) | 2007-03-15 |
DE602005010705D1 (de) | 2008-12-11 |
EP1764922B1 (en) | 2008-10-29 |
TW200711316A (en) | 2007-03-16 |
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C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
ASS | Succession or assignment of patent right |
Owner name: FUJITSU MICROELECTRONICS CO., LTD. Free format text: FORMER OWNER: FUJITSU LIMITED Effective date: 20081024 |
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C41 | Transfer of patent application or patent right or utility model | ||
TA01 | Transfer of patent application right |
Effective date of registration: 20081024 Address after: Tokyo, Japan, Japan Applicant after: Fujitsu Microelectronics Ltd. Address before: Kanagawa Applicant before: Fujitsu Ltd. |
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C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
ASS | Succession or assignment of patent right |
Owner name: SPANSION LLC N. D. GES D. STAATES Free format text: FORMER OWNER: FUJITSU SEMICONDUCTOR CO., LTD. Effective date: 20140102 |
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C41 | Transfer of patent application or patent right or utility model | ||
TR01 | Transfer of patent right |
Effective date of registration: 20140102 Address after: American California Patentee after: Spansion LLC N. D. Ges D. Staates Address before: Kanagawa Patentee before: Fujitsu Semiconductor Co., Ltd. |
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C41 | Transfer of patent application or patent right or utility model | ||
TR01 | Transfer of patent right |
Effective date of registration: 20160407 Address after: American California Patentee after: Cypress Semiconductor Corp. Address before: American California Patentee before: Spansion LLC N. D. Ges D. Staates |