CN101047067B - 薄膜电容器及其制造方法 - Google Patents
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- 239000003990 capacitor Substances 0.000 title claims abstract description 84
- 238000004519 manufacturing process Methods 0.000 title claims description 19
- 239000010409 thin film Substances 0.000 title abstract description 6
- 239000000758 substrate Substances 0.000 claims abstract description 125
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims abstract description 64
- 239000012535 impurity Substances 0.000 claims abstract description 64
- 238000000137 annealing Methods 0.000 claims abstract description 38
- 229910052759 nickel Inorganic materials 0.000 claims abstract description 25
- 239000010936 titanium Substances 0.000 claims description 17
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 claims description 15
- 239000011572 manganese Substances 0.000 claims description 15
- 238000013459 approach Methods 0.000 claims description 13
- 239000010949 copper Substances 0.000 claims description 13
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- 239000011651 chromium Substances 0.000 claims description 10
- 239000010703 silicon Substances 0.000 claims description 10
- 229910052719 titanium Inorganic materials 0.000 claims description 10
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- VSZWPYCFIRKVQL-UHFFFAOYSA-N selanylidenegallium;selenium Chemical compound [Se].[Se]=[Ga].[Se]=[Ga] VSZWPYCFIRKVQL-UHFFFAOYSA-N 0.000 claims description 2
- CIOAGBVUUVVLOB-UHFFFAOYSA-N strontium atom Chemical compound [Sr] CIOAGBVUUVVLOB-UHFFFAOYSA-N 0.000 claims description 2
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- 229910052454 barium strontium titanate Inorganic materials 0.000 description 5
- JRPBQTZRNDNNOP-UHFFFAOYSA-N barium titanate Chemical compound [Ba+2].[Ba+2].[O-][Ti]([O-])([O-])[O-] JRPBQTZRNDNNOP-UHFFFAOYSA-N 0.000 description 5
- 229910002113 barium titanate Inorganic materials 0.000 description 5
- 230000000052 comparative effect Effects 0.000 description 5
- 229910052749 magnesium Inorganic materials 0.000 description 5
- FYYHWMGAXLPEAU-UHFFFAOYSA-N Magnesium Chemical compound [Mg] FYYHWMGAXLPEAU-UHFFFAOYSA-N 0.000 description 4
- 238000009826 distribution Methods 0.000 description 4
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- 229910052751 metal Inorganic materials 0.000 description 4
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- ZAMOUSCENKQFHK-UHFFFAOYSA-N Chlorine atom Chemical compound [Cl] ZAMOUSCENKQFHK-UHFFFAOYSA-N 0.000 description 1
- 208000032365 Electromagnetic interference Diseases 0.000 description 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 239000000654 additive Substances 0.000 description 1
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- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
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- 229910000765 intermetallic Inorganic materials 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- YDZQQRWRVYGNER-UHFFFAOYSA-N iron;titanium;trihydrate Chemical compound O.O.O.[Ti].[Fe] YDZQQRWRVYGNER-UHFFFAOYSA-N 0.000 description 1
- 229910052746 lanthanum Inorganic materials 0.000 description 1
- FZLIPJUXYLNCLC-UHFFFAOYSA-N lanthanum atom Chemical compound [La] FZLIPJUXYLNCLC-UHFFFAOYSA-N 0.000 description 1
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- 238000013508 migration Methods 0.000 description 1
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- 229910052758 niobium Inorganic materials 0.000 description 1
- GUCVJGMIXFAOAE-UHFFFAOYSA-N niobium atom Chemical compound [Nb] GUCVJGMIXFAOAE-UHFFFAOYSA-N 0.000 description 1
- WWZKQHOCKIZLMA-UHFFFAOYSA-M octanoate Chemical compound CCCCCCCC([O-])=O WWZKQHOCKIZLMA-UHFFFAOYSA-M 0.000 description 1
- 239000006259 organic additive Substances 0.000 description 1
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- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 229910052761 rare earth metal Inorganic materials 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
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- 238000001004 secondary ion mass spectrometry Methods 0.000 description 1
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- 239000006104 solid solution Substances 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 229910052715 tantalum Inorganic materials 0.000 description 1
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 1
- JBQYATWDVHIOAR-UHFFFAOYSA-N tellanylidenegermanium Chemical compound [Te]=[Ge] JBQYATWDVHIOAR-UHFFFAOYSA-N 0.000 description 1
- LEONUFNNVUYDNQ-UHFFFAOYSA-N vanadium atom Chemical compound [V] LEONUFNNVUYDNQ-UHFFFAOYSA-N 0.000 description 1
- 239000012808 vapor phase Substances 0.000 description 1
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- H01G4/33—Thin- or thick-film capacitors
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- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
- H01L27/0611—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
- H01L27/0641—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region without components of the field effect type
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- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind
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Abstract
本发明提供一种高容量且低泄漏电流的薄膜电容器的制造方法。在镍纯度大于等于99.99重量%的镍基板(10)上形成含有有机金属化合物的前驱电介质层(11D)后,进行退火,使前驱电介质层(11D)变为电介质层(11)。由此,将镍基板(10)中含有的一种或多种杂质(例如铁、钛、铜、铝、镁、锰、硅及铬中的至少之一)在退火中从镍基板(10)向前驱电介质层(11D)扩散的扩散量抑制在微量。
Description
技术领域
本发明涉及使用镍(Ni)基板作为至少一个电极的薄膜电容器及其制造方法,特别是涉及用于抑制随LSI电源电压浮动而产生的EMI的电容器,进一步涉及作为向印刷线路板的埋入、粘贴等搭载中使用的电容器而优选使用的薄膜电容器及其制造方法。
背景技术
目前,为防止从LSI(Large Scale Integration)等集成电路产生电磁干扰(EMI:Electro Magnetic Interference)提出了各种对策。例如,为抑制伴随LSI的电源电压浮动而产生的EMI,目前将某种分立电容器配置在连接电源与集成电路的电源端子的配线上。
这种用途的电容器随着近年来电子设备的小型化而要求其薄型化及配置技巧。因此,如专利文献1、2、3等中所述,通常将电容器在薄膜状的片内阵列状形成,将该片直接设于内插器或印刷线路板的表面,或埋入内插器或印刷线路板的内部。另外,其不限于抑制随LSI的电源电压浮动而产生的EMI的用途,与上述相同,有时也将其它用途的电容器直接设于内插器或印刷线路板的表面,或埋入内插器或印刷线路板的内部。
在这种用途的薄膜电容器中,由于电介质层的厚度变薄,故为提高电介质层的静电容量密度,而将比介电常数高的材料用于电介质层。作为比介电常数高的材料,例如有通式ABO3的钙铁矿型氧化物。作为该钙铁矿型氧化物,例如,可列举钛酸钡(BT)、锆钛酸铅(PZT)、锫钛酸镧铅(PLZT)、铌镁酸铅(PMN)、钛酸锶钡(BST)等。该钙铁矿型氧化物通过将前驱体退火使其结晶化而得到,可通过在高温下退火来提高其比介电常数。
日本专利文献1:特开2000-164460号公报
日本专利文献2:特表2003-526880号公报
日本专利文献3:特开2005-39282号公报
但是,为了提高比介电常数,当有时升高退火温度,有时延长退火时间等这样变更制造条件时,存在薄膜电容器的容量不能提高且泄漏电流增大的问题。
发明内容
本发明是鉴于上述问题而构成的,其目的在于,提供一种高容量且低泄漏电流的薄膜电容器、薄膜电容器元件及薄膜电容器的制造方法。
本发明的薄膜电容器为将电介质层及电极层按顺序配置到镍纯度大于等于99.99重量%的镍基板上的结构。在此,镍基板其厚度没有特别限制,但优选具有可使薄膜电容器自立的程度的厚度。
在本发明的薄膜电容器中,由于镍纯度大于等于99.99重量%的镍基板上具备电介质层,故例如在镍基板上形成退火前的电介质层(前驱电介质层),并通过将该前驱电介质层退火来制造该薄膜电容器时,镍基板中含有的一种或多种杂质(例如铁、钛、铜、铝、镁、锰、硅及铬中的至少之一)在退火中从镍基板向前驱电介质层扩散的扩散量被抑制在微量。
在此,在将例如硅基板中的一种或多种杂质的含量都设为小于等于65ppm,之后通过退火形成电介质层时,镍基板中含有的一种或多种杂质从镍基板向前驱电介质层扩散的扩散量被抑制在极微量。
本发明提供薄膜电容器的制造方法,其含有如下工序:在大于等于99.99重量%的镍基板上形成前驱电介质层之后,进行退火,使前驱电介质层结晶化,形成电介质层。
在本发明的薄膜电容器的制造方法中,通过将镍基板上形成的前驱电介质层退火,将前驱电介质层结晶化,得到高介电常数的电介质层。在此,由于镍基板的镍纯度大于等于99.99重量%,故镍基板中含有的一种或多种杂质(例如铁、钛、铜、铝、镁、锰、硅及铬中的至少之一)在退火中从镍基板向前驱电介质层扩散的扩散量被抑制为微量。
在此,在将例如硅基板中的一种或多种杂质的含量都设为小于等于65ppm时,镍基板中含有的一种或多种杂质从镍基板向前驱电介质层扩散的扩散量被抑制在极微量。
根据本发明的薄膜电容器,由于镍纯度大于等于99.99重量%的镍基板上具备电介质层,故例如可将镍基板中含有的一种或多种杂质在退火中从镍基板向前驱电介质层扩散的扩散量抑制在微量。由此,电介质层中含有的杂质几乎不会引起电容器物理特性变化,其结果是,能够维持高容量,进而能够将泄漏电流抑制地极低。
另外,在通过退火形成电介质层时,在将镍基板中的一种或多种杂质的含量都设为小于等于65ppm时,能够将镍基板中含有的一种或多种杂质从镍基板向前驱电介质层扩散的扩散量抑制在极微量。由此,电介质层中含有的杂质几乎不会引起电容器物理特性变化,其结果是,能够维持高容量,进而能够将泄漏电流抑制地极低。
此外,在镍基板为厚度大于等于300μm的镍板或厚度大于等于1μm小于300μm的镍板时,可通过该镍基板的钢性使薄膜电容器自立。由此,可将该薄膜电容器例如直接设于内插器或印刷线路板的表面,或埋入内插器或印刷线路板的内部。
再有,在由含有钡(Ba)、锶(Sr)钙(Ca)、铅(Pb)、钛(Ti)、锆(Zr)中至少之一的电介质构成电介质层的情况下,可极大地提高薄膜电容器的容量。另外,在将电介质层的厚度设为大于等于0.05μm小于等于5μm时,能够可靠地防止设于电介质层两侧的镍基板和电极层相互短路,通式可防止薄膜电容器的容量降低。另外,也可以将薄膜电容器例如直接设于内插器或印刷电路板的表面,或埋入内插器或印刷线路板内部时,可防止因内插器或印刷线路板的应力而微量进入电介质层内。
附图说明
图1是本发明一实施例的薄膜电容器的割面结构图。
图2是一变形例的薄膜电容器的剖面结构图。
图3是用于说明薄膜电容器的制造方法的流程图。
图4是用于说明薄膜电容器的制造方法的剖面结构图。
图5是本发明实施例及比较例的薄膜电容器的电介质层中含有的杂质的厚度方向的分布图。
具体实施方式
下面,参照附图详细说明本发明一实施例。
图1是表示本发明一实施例的薄膜电容器1的剖面结构的图。图2是表示薄膜电容器1的一变形例的图。该薄膜电容器1如图1所示,是在镍基板10上按顺序层叠电介质层11及电极层12而构成的。
镍基板10是厚度大于等于300μm的镍板或厚度大于等于1μm而小于30μm的镍箔,是与电极层12对向配置的电极。该镍基板10是可通过其钢性使薄膜电容器1自立的基板。由此,镍基板10可将薄膜电容器1例如直接设于内插器或印刷线路板的表面,或埋入内插器或印刷线路板的内部。但是,在使用后述的电解法形成镍基板10时,优选使用适于金属辊卷曲的镍箔而构成镍基板10,其厚度优选大于等于5μm小于等于100μm,更优选大于等于10μm小于等于60μm。
镍基板10的镍纯度大于等于99.99重量%。即,该镍基板10中所含的杂质的总含量小于100ppm。作为镍基板10中可含有的杂质,例如,可列举铁(Fe)、钛(Ti)、铜(Cu)、铝(Al)、镁(Mg)、锰(Mn)、硅(Si)或铬(Cr),但优选各杂质的含量都小于等于65ppm。除此之外,在固溶于前驱电介质层11D(后述)的元素例如钒(V)、锌(Zn)、铌(Nb)、钽(Ta)、铟(Y)、镧(La)、铈(Ce)等迁移金属元素或稀土类元素等、或对氯(Cl)、硫黄(S)、磷(P)等薄膜的退火造成影响的元素含于镍基板10中时,有时因向前驱电介质层11D扩散而使电介质组成产生偏差,或阻碍结晶化以及结晶粒成长使微细结构发生变化,绝缘电阻显著降低。电介质组成的偏差或微细结构的变化,有使薄膜电容器1的容量降低、泄漏电流增加的倾向。因此,对于上述记载的元素以外,最好镍基板10中含有的杂质很少。
在此,镍基板10是例如可通过轧制法、电解法或粉末冶金法等形成的基板。轧制法是指,通过将镍的锭原料溶融或软化,将其轧制成箔状并退火,由此形成镍基板10的方法,这时,要想得到纯度大于等于99.99重量%的高纯度镍基板10,则必须经过若干次的精制工序。电解法是指,通过将高纯度电镀浴中浸渍的金属辊上电析而得到的电析物卷曲而形成的镍基板10的方法。通常,使用该方法可稳定地得到纯度大于等于99.99重量%的高纯度镍基板10。另外,粉末冶金法是指,通过将高纯度镍粉末烧结而形成镍基板10的方法,这时,必须要有烧结这个工序并且实用性也不太高,但是使用该方法也可得到纯度大于等于99.99重量%的高纯度镍基板10。还有,无论哪一种方法,在形成镍箔之后,为了成为规定的厚度,也可包含轧制工序、热处理工序。这样,就能得到规定的厚度的高纯度镍基板10。
另外,本实施例中所示的镍基板10的纯度或镍基板10中含有的杂质的含量是通过ICP(Inductively Coupled Plasma)分析而定量计测得到的,因此,其不是考虑到通过ICP分析计测困难的元素(例如炭(C)或硫黄(S))的含量的值。另外,通过ICP分析得到的值是体积平均值,是与Ni或杂质是否均匀分散到镍基板10中无关的值。
电介质层11其构成为,含有比介电常数高的材料,具体而言,含有通式ABO3的钙钛矿型、钛铁矿型、烧绿石型、尖晶石型或层状化合物型的氧化物。在此,钙钛矿型的氧化物例如列举钛酸钡(BT)、锆钛酸铅(PZT)、锫钛酸镧铅(PLZT)、铌镁酸铅(PMN)、钛酸锶钡(BST)等。在此,钙钛矿型氧化物是通过将前驱体退火使其结晶化而得到的氧化物,可通过结晶化来提高其比介电常数。在此,电介质层11优选其构成为,钙钛矿型氧化物中至少含有Ba、Ti的任一种元素。其中,BT、BST不含作为有害物质的铅,能够极大地将薄膜电容器的容量增大,因此,特别优选。另外,退火温度优选大于等于600℃小于等于1000℃。若小于600℃时,不能使前驱电介质层11D充分结晶化,而会使薄膜电容器1的容量极低,若大于1000℃,则薄膜晶体管1的泄漏电流及介质损失变为极大。
该电介质层11是通过例如溶液法及气相法在镍基板10上形成前驱电介质层11D后进行退火,由此使前驱电介质层11D结晶化的电介质层。这样,电介质层11由于经由将前驱电介质层11D退火的工序形成,故其含有在该退火工序时从镍基板10扩散来的物质。另外,也有在前驱电介质层11D中因各种目的而有意添加与镍基板10中含有的杂质相同的物质的情况,但前驱电介质层11D不拘泥于是否含有这样的添加物,只需使电介质层11中含有的一种或多种杂质的各含量小于规定的值。在各含量大于等于规定值时,该杂质造成电介质层11的物理特性改变,其结果是,可能会使薄膜电容器1的电容量降低、或泄漏电流增大。
另外,电介质层11的厚度大于等于0.05μm小于等于5μm。这样,通过将厚度设为大于等于0.05μm,能够可靠地防止设于电介质层11两侧的镍基板10和电极层12相互短路。另外,通过将厚度设为小于等于5μm,可防止薄膜电容器1的容量降低,另外,在将薄膜电容器例如直接设于内插器或印刷线路板表面、或埋入内插器或印刷线路板内部时,也可以通过内插器或印刷线路板的应力防止微量进入到电介质层11上。
电极层12由金属例如铜(Cu)构成。该电极层12如后述,通过例如溅射法、蒸镀法、镀敷法等在退火后的电介质层11上形成。因此,电极层12中含有的物质不可能向电介质层11扩散。
其次,参照图3、4说明具备上述构成的薄膜电容器1的制造方法之一例。
首先,使用电解法在不含有机添加剂等的高纯度电镀浴中浸渍金属辊,使电析物在金属辊上电析出,之后将在金属辊上电析出的电析物顺序卷曲。由此,形成镍纯度大于等于99.99重量%的镍基板10(步骤S1)。
其次,使用溶液法将含有Ba、Sr及Ti的各辛酸盐作为金属化合物的前驱体的前驱体溶液(组成:Ba0.7Sr0.3TiO3)涂敷到镍基板10上。然后,将前驱体溶液载置于大气中的热板上,以150℃加热并干燥10分钟,之后以400℃加热10分钟进行预退火。由此形成薄的前驱电介质层(未图示)。然后,反复进行上述的涂敷·干燥·预退火,将薄的前驱电介质层一直层叠到成为规定的厚度。由此在镍基板10上形成前驱电介质层11D(步骤S2、图4(A))。
其次,在减压至0.005Pa的红外线加热炉内将其以大于等于600℃小于等于1000℃加热30分钟,进行退火。由此,前驱电介质层11D结晶化,变为电介质层11(步骤S3、图4(B))。
其次,利用溅射法在电介质层11上堆积Cu。由此,在电介质层11上形成金属层12(步骤S4、图1)。这样,形成本实施例的薄膜电容器1。
在本实施例的薄膜电容器1中,在制造薄膜电容器1时,在镍纯度大于等于99.99重量%的镍基板10上形成前驱电介质层11D,将前驱电介质层11D进行退火,因此,能够微量抑制镍基板10中含有的一种或多种杂质(例如铁、钛、铜、铝、镁、锰、硅及铬中的至少之一)在退火中从镍基板10向前驱电介质层11D的扩散量。即,在退火前和退火后,镍基板10中的杂质的含量几乎没有变化。由此,电介质层11中含有的杂质几乎不会使电介质层11的物理特性改变,其结果是,能够维持薄膜电容器1的容量很高,进而能够将泄漏电流抑制到很低。
另外,在将镍基板10中的一种或多种杂质的含量都控制为小于大于65ppm,之后通过退火形成电介质层11时,能够将镍基板10中含有的一种或多种杂质从镍基板10向前驱电介质层11D扩散的扩散量抑制在极微量。该扩散量理论上通过计测退火前镍基板10中的杂质的含量与退火后镍基板10中的杂质的含量的差异而得到,但该差异为ICP分析中检测限界以下,在现有的ICP分析中不能计测。因此,电介质层11中含有的杂质完全不会改变电介质层11的物理特性,其结果是,能够将薄膜电容器1的容量维持为很高,进而,能够将泄漏电流抑制的很低。
实施例
下面,将利用上述的制造方法制造的薄膜电容器1的实施例与比较例进行对比说明。另外,比较例中镍基板10中含有的杂质的含量比本实施例的含量多,在这一点上与本实施例的构成不同。
在本实施例中,准备三种镍基板a1、a2、a3作为镍基板10,另一方面,准备两种镍基板b1、b2作为镍基板10(参照表1)。这里,表1的数据为将成膜前的镍基板a1、a2、a3、b1、b2通过ICP分析分析得到的杂质的值(重量ppm)。如表1所示,镍基板a1、a2、a3中含有的各杂质的含量都小于等于65ppm,镍基板b1、b2中含有的杂质中的至少一种杂质的含量大于65ppm。
表2中表示,在使用镍基板a1、a2、a3、b1、b2分别制造电容器1时,以800℃退火时的薄膜电容器1的容量的平均值及最小值、泄漏电流的平均值及最大值、以及介质损失的平均值及最大值。
表3中表示,在使用镍基板a1制造薄膜电容器1时,以从600℃按100℃为单位上升到1100℃的合计六种温度分别进行退火时的薄膜电容器1的容量的平均值及最小值、泄漏电流的平均值及最大值、以及介质损失的平均值及最大值。另外,薄膜电容器的容量及泄漏电流的测定是关于对15mm□的测定范围进行的测定。
另外,表2及表3的数据是分别按镍基板a1、a2、a3、b1、b2及退火温度600℃、700℃、800℃、900℃、1000℃、1100℃制造100个薄膜电容器1时的平均值。
表1
镍基板 | Ni(%) | Fe | Ti | Cu | Al | Mg | Mn | Si | Cr | 其它 |
a1 | 99.998 | 9 | 0 | 6 | 0 | 0 | 2 | 2 | 0 | 3 |
a2 | 99.995 | 20 | 0 | 25 | 0 | 0 | 3 | 4 | 1 | 2 |
a3 | 99.991 | 65 | 0 | 6 | 0 | 0 | 10 | 6 | 1 | 4 |
b1 | 99.688 | 407 | 4 | 5 | 114 | 0 | 1856 | 596 | 113 | 22 |
b2 | 99.569 | 690 | 111 | 43 | 444 | 285 | 1332 | 1110 | 279 | 21 |
表2
表3
从表2可知,本实施例的薄膜电容器1在介质损失的平均值这一点上具有与比较例的薄膜电容器相同的特性,除此以外,与比较例的薄膜电容器相比,具有卓越的特性。即,在镍基板a1、a2、a3中含有的各杂质的含量都小于等于65ppm时,与不是这种含量的电容器的情况相比,具有极其优良的特性。另外,镍基板a1、a2、a3中含有的杂质的含量越少,容量越大,泄漏电流越小。
从表3可知,将退火温度设为700℃~1000℃制造的薄膜电容器1在容量、泄漏电流、及介质损失所有方面,具有平衡的特性。即,在退火温度为700℃~1000℃时,薄膜电容器1的特性几乎没有变化。另外,将退火温度设为600℃制造的薄膜电容器1与将退火温度设为700℃~1000℃制造的薄膜电容器1相比,在容量这一点上稍微劣化,但在泄漏电流及介质损失这一点上具有极其优良的特性,因此,可以说对于容量低的用途上是有用的。另外,将退火温度设为1100℃制造的薄膜电容器1与其它薄膜电容器1相比,具有在泄漏电流及介质损失这一方面劣化的特性,因此,不优选将退火温度设为大于等于1100℃。
图5是表示在镍基板a1、b2上分别形成Ba0.7Sr0.3TiO3电介质层时,SIMS(Secondary Ion-microprobe Mass Spectrometer:二次离子质量分析仪)将以800℃退火时的Ba0.7Sr0.3TiO3电介质层中含有的杂质(Fe,Ba)的厚度方向的分布进行计测的计测值。此次的S IMS是使用Physical Eletronics公司的6500,且测定条件为如下所示:
(测定条件)
一次离子种类:O2 +
一次加速电压:6.0kV
检测区域:60μm×77μm)。
表4、表5以及表6是表示在镍基板a1、a2、a 3、b1、b2上分别形成Ba0.7Sr0.3TiO3电介质层时,在将以800℃退火时的Ba0.7Sr0.3TiO3电介质层中、距离镍基板a1、a2、a3、b1、b2侧的界面规定距离的位置中含有的杂质(Fe,Cu,Al,Mg,Mn,Si,Cr)的分布以SIMS进行计测的计测值。表4、表5、表6分别表示距离镍基板侧的界面50nm位置中含有的杂质的分布、距离镍基板侧的界面100nm位置中含有的杂质的分布、距离镍基板侧的界面200nm位置中含有的杂质的分布。其中,为方便其间,将电介质层的镍基板侧的界面的位置设为图5中Ba元素的计数的数量呈线形变化的区域的中点C。
「表4」
Ni基板 | Fe | Cu | Al | Mg | Mn | Si | Cr |
a1 | 5.0 | 2.2 | 0.1 | 0.0 | 1.2 | 1.2 | 0.0 |
a2 | 6.2 | 3.2 | 0.0 | 0.0 | 2.1 | 2.9 | 0.0 |
a3 | 15.1 | 1.3 | 0.0 | 0.1 | 1.4 | 1.8 | 0.1 |
b1 | 160.2 | 3.4 | 12.1 | 0.1 | 556.2 | 402.2 | 40.2 |
b2 | 243.3 | 5.6 | 154.1 | 110.1 | 382.2 | 959.1 | 112.1 |
「表5」
Ni基板 | Fe | Cu | Al | Mg | Mn | Si | Cr |
a1 | 4.1 | 4.3 | 0.0 | 0.0 | 2.1 | 2.1 | 0.0 |
a2 | 3.3 | 3.6 | 0.1 | 0.0 | 1.4 | 2.2 | 0.0 |
a3 | 10.2 | 2.0 | 0.0 | 0.0 | 1.3 | 1.9 | 0.0 |
b1 | 64.3 | 5.0 | 3.2 | 0.0 | 368.2 | 101.0 | 16.1 |
b2 | 95.0 | 4.0 | 50.2 | 48.2 | 172.3 | 331.1 | 48.2 |
「表6」
Ni基板 | Fe | Cu | Al | Mg | Mn | Si | Cr |
a1 | 7.0 | 3.3 | 0.2 | 0.0 | 1.3 | 1.2 | 0.0 |
a2 | 4.2 | 2.3 | 0.1 | 0.0 | 1.5 | 1.8 | 0.0 |
a3 | 7.3 | 1.3 | 0.3 | 0.0 | 1.1 | 1.1 | 0.1 |
b1 | 38.2 | 4.3 | 2.3 | 0.0 | 98.2 | 58.2 | 8.2 |
b2 | 57.0 | 3.3 | 11.2 | 12.3 | 82.1 | 87.3 | 22.1 |
从图5可知,镍基板a1上形成的电介质层中Fe大约以小于10计数/秒进行扩散,另一方面,镍基板b2上形成的电介质层内Fe大约以大于等于10计数/秒进行扩散。这里,由表2可知,具备镍基板a1的薄膜电容器的泄漏电流的平均值比具备镍基板b1的薄膜电容器的泄漏电流的平均值小3位数,因此,若结合图5的结果来考虑,则可得出通过SIMS的对Fe的计数的数量变为大于等于10计数/秒,或小于10计数/秒,泄漏电流的大小有很大的差异。由此,在SIMS的对Fe的计数的数量大约变为小于等于10计数/秒的情况下,可使泄漏电流显著地变小。
从表4~表6可知,在几乎没有离开电介质层的镍基板侧的界面的区域(例如50nm)中,在SIMS的对各杂质的计数的数量大约变为小于等于10计数/秒的情况下,可使泄漏电流显著地变小。另外,在一定程度上离开电介质层的镍基板侧的界面的区域(例如100nm)中,在SIMS的对各杂质的计数的数量大约变为小于等于10计数/秒的情况下,可使泄漏电流显著地变小。
以上列举实施方式及实施例说明了本发明,但本发明不限于此,可进行各种变形。
例如,在上述实施例中,将镍基板10及电极层12设为了平板形状,但也可以根据用途设为各种形状。例如,在印刷线路板内部埋入多个去耦电容器的用途中,如图2所示,也可以通过使电极层12相互独立的多个电极部12A构成,或与图2的电极层12相同,通过使镍基板10相互独立的多个电极部(未图示)构成。
Claims (9)
1.一种薄膜电容器,包括:
镍(Ni)纯度大于等于99.99重量%的镍基板;
依次置于所述镍基板上的电介质层及电极层,
其中所述镍基板包含9~65ppm的铁(Fe)杂质、6~25ppm的铜(Cu)杂质、2~10ppm的锰(Mn)杂质以及2~6ppm的硅(Si)杂质;并且
所述镍基板包含选自包括下述杂质的组中的一种或多种杂质:小于等于65ppm的钛(Ti)杂质、小于等于65ppm的铝(Al)杂质以及小于等于65ppm的铬(Cr)杂质。
2.如权利要求1所述的薄膜电容器,其特征在于,
所述镍基板是厚度大于等于300μm的镍基板、或厚度大于等于1μm小于300μm的镍箔。
3.如权利要求1所述的薄膜电容器,其特征在于,
所述电介质层由含有钡(Ba)、锶(Sr)、钙(Ca)、铅(Pb)、钛(Ti)、锆(Zr)中至少一种的电介质构成。
4.如权利要求1所述的薄膜电容器,其特征在于,
所述电介质层的厚度为大于等于0.05μm小于等于5μm。
5.如权利要求1所述的薄膜电容器,其特征在于,
所述电极层及镍基板中的至少一个具有相互独立的多个电极部。
6.如权利要求1所述的薄膜电容器,其中所述镍基板包含至少2ppm的至少锰(Mn)和硅(Si)之一作为杂质。
7.一种薄膜电容器的制造方法,其特征在于,包括如下步骤:
在镍纯度大于等于99.99重量%的镍基板上形成前驱电介质层;
通过退火使所述前驱电介质层结晶化,而形成电介质层;以及
在所述电介质层上形成电极层,
其中所述镍基板包含9~65ppm的铁(Fe)杂质、6~25ppm的铜(Cu)杂质、2~10ppm的锰(Mn)杂质以及2~6ppm的硅(Si)杂质;并且
所述镍基板包含选自包括下述杂质的组中的一种或多种杂质:小于等于65ppm的钛(Ti)杂质、小于等于65ppm的铝(Al)杂质以及小于等于65ppm的铬(Cr)杂质。
8.如权利要求7所述的薄膜电容器的制造方法,其特征在于,
对所述前驱电介质层进行退火时的温度为大于等于600℃小于等于1000℃。
9.如权利要求7所述的薄膜电容器的制造方法,其中所述镍基板包含至少2ppm的至少锰(Mn)和硅(Si)之一作为杂质。
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