CN101034882B - 带有闩锁抑制的可调节晶体管衬底偏置发生电路 - Google Patents
带有闩锁抑制的可调节晶体管衬底偏置发生电路 Download PDFInfo
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- CN101034882B CN101034882B CN2007100847323A CN200710084732A CN101034882B CN 101034882 B CN101034882 B CN 101034882B CN 2007100847323 A CN2007100847323 A CN 2007100847323A CN 200710084732 A CN200710084732 A CN 200710084732A CN 101034882 B CN101034882 B CN 101034882B
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- transistor
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
- H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
- H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
- H10D84/85—Complementary IGFETs, e.g. CMOS
- H10D84/854—Complementary IGFETs, e.g. CMOS comprising arrangements for preventing bipolar actions between the different IGFET regions, e.g. arrangements for latchup prevention
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/003—Modifications for increasing the reliability for protection
- H03K19/00315—Modifications for increasing the reliability for protection in field-effect transistor circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K2217/00—Indexing scheme related to electronic switching or gating, i.e. not by contact-making or -breaking covered by H03K17/00
- H03K2217/0018—Special modifications or use of the back gate voltage of a FET
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- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Semiconductor Integrated Circuits (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
- Logic Circuits (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US11/369,548 | 2006-03-06 | ||
| US11/369,548 US7330049B2 (en) | 2006-03-06 | 2006-03-06 | Adjustable transistor body bias generation circuitry with latch-up prevention |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101034882A CN101034882A (zh) | 2007-09-12 |
| CN101034882B true CN101034882B (zh) | 2012-07-18 |
Family
ID=38069102
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2007100847323A Active CN101034882B (zh) | 2006-03-06 | 2007-02-28 | 带有闩锁抑制的可调节晶体管衬底偏置发生电路 |
Country Status (4)
| Country | Link |
|---|---|
| US (2) | US7330049B2 (enExample) |
| EP (1) | EP1840965B1 (enExample) |
| JP (1) | JP4638456B2 (enExample) |
| CN (1) | CN101034882B (enExample) |
Families Citing this family (43)
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| CN101238641B (zh) * | 2005-08-02 | 2010-09-08 | 松下电器产业株式会社 | 半导体集成电路 |
| US7495471B2 (en) * | 2006-03-06 | 2009-02-24 | Altera Corporation | Adjustable transistor body bias circuitry |
| US7355437B2 (en) | 2006-03-06 | 2008-04-08 | Altera Corporation | Latch-up prevention circuitry for integrated circuits with transistor body biasing |
| US7696811B2 (en) * | 2006-06-19 | 2010-04-13 | International Business Machines Corporation | Methods and circuits to reduce threshold voltage tolerance and skew in multi-threshold voltage applications |
| US7459958B2 (en) * | 2006-06-19 | 2008-12-02 | International Business Machines Corporation | Circuits to reduce threshold voltage tolerance and skew in multi-threshold voltage applications |
| JP2008004741A (ja) * | 2006-06-22 | 2008-01-10 | Matsushita Electric Ind Co Ltd | 半導体集積回路及びそれを備えた情報機器、通信機器、av機器及び移動体 |
| US20080180129A1 (en) * | 2006-08-31 | 2008-07-31 | Actel Corporation | Fpga architecture with threshold voltage compensation and reduced leakage |
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| FR2921788B1 (fr) * | 2007-10-01 | 2015-01-02 | Commissariat Energie Atomique | Dispositif microelectronique a matrice de pixels dote de moyens generateurs de compensation de chute ohmique sur des almentations |
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| FR2948828B1 (fr) * | 2009-07-28 | 2011-09-30 | St Microelectronics Rousset | Dispositif electronique de protection contre une inversion de polarite d'une tension d'alimentation continue, et application au domaine de l'automobile |
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| FR2988239A1 (fr) * | 2012-03-16 | 2013-09-20 | Converteam Technology Ltd | Procede de compensation des tolerances de fabrication d'au moins un parametre electrique d'un transistor de puissance et systeme associe |
| KR102038041B1 (ko) * | 2012-08-31 | 2019-11-26 | 에스케이하이닉스 주식회사 | 전원 선택 회로 |
| US8787096B1 (en) * | 2013-01-16 | 2014-07-22 | Qualcomm Incorporated | N-well switching circuit |
| US9112495B1 (en) * | 2013-03-15 | 2015-08-18 | Mie Fujitsu Semiconductor Limited | Integrated circuit device body bias circuits and methods |
| CN104464788B (zh) * | 2014-12-30 | 2017-06-06 | 上海华虹宏力半导体制造有限公司 | 分压电路、操作电压的控制电路及存储器 |
| US9591245B2 (en) | 2015-04-14 | 2017-03-07 | Semiconductor Components Industries, Llc | Image sensor pixels with adjustable body bias |
| US9584118B1 (en) * | 2015-08-26 | 2017-02-28 | Nxp Usa, Inc. | Substrate bias circuit and method for biasing a substrate |
| US9762833B1 (en) * | 2016-05-24 | 2017-09-12 | Omnivision Technologies, Inc. | Adaptive body biasing circuit for latch-up prevention |
| DK3343769T3 (da) * | 2016-12-27 | 2019-05-06 | Gn Hearing As | Integreret kredsløb, der omfatter justerbar spærreforspænding af én eller flere logiske kredsløbsregioner |
| CN107659303A (zh) * | 2017-08-31 | 2018-02-02 | 晨星半导体股份有限公司 | 输入输出电路 |
| US10552563B2 (en) * | 2018-01-10 | 2020-02-04 | Qualcomm Incorporated | Digital design with bundled data asynchronous logic and body-biasing tuning |
| TWI642274B (zh) * | 2018-03-20 | 2018-11-21 | 大陸商北京集創北方科技股份有限公司 | 栓鎖偵測電路 |
| CN108270422B (zh) * | 2018-03-20 | 2024-07-12 | 北京集创北方科技股份有限公司 | 防闩锁电路及集成电路 |
| US10469097B1 (en) | 2018-12-06 | 2019-11-05 | Nxp Usa, Inc. | Body bias circuit for current steering DAC switches |
| CN109814650B (zh) * | 2019-01-23 | 2020-05-22 | 西安交通大学 | 一种低压差线性稳压器用箝位晶体管结构 |
| US11099224B2 (en) * | 2019-05-24 | 2021-08-24 | Marvell Israel (M.I.S.L) Ltd. | Method and circuitry for semiconductor device performance characterization |
| KR102696754B1 (ko) * | 2019-12-30 | 2024-08-21 | 에스케이하이닉스 주식회사 | 데이터 입출력 회로를 포함하는 메모리 장치 |
| US11688739B2 (en) * | 2021-03-19 | 2023-06-27 | Pixart Imaging Inc. | Logic circuit capable of preventing latch-up |
| CN113849438B (zh) * | 2021-09-27 | 2024-03-08 | 浙江华创视讯科技有限公司 | 保护电路、保护电路的方法、存储介质及电子装置 |
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- 2007-02-23 JP JP2007044383A patent/JP4638456B2/ja not_active Expired - Fee Related
- 2007-02-28 CN CN2007100847323A patent/CN101034882B/zh active Active
- 2007-12-19 US US11/959,949 patent/US7514953B2/en active Active
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| US5610533A (en) * | 1993-11-29 | 1997-03-11 | Mitsubishi Denki Kabushiki Kaisha | Switched substrate bias for logic circuits |
| WO1997005696A1 (en) * | 1995-08-01 | 1997-02-13 | Information Storage Devices, Inc. | Fully differential output cmos power amplifier |
| US5852552A (en) * | 1996-06-27 | 1998-12-22 | Hyundai Electronics Industries Co.Ltd | High voltage generator with a latch-up prevention function |
| CN1519906A (zh) * | 1998-09-09 | 2004-08-11 | ������������ʽ���� | 半导体集成电路装置及其检查方法和制造方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2007243179A (ja) | 2007-09-20 |
| US20070205802A1 (en) | 2007-09-06 |
| US7514953B2 (en) | 2009-04-07 |
| EP1840965A3 (en) | 2009-11-11 |
| CN101034882A (zh) | 2007-09-12 |
| US20080094100A1 (en) | 2008-04-24 |
| JP4638456B2 (ja) | 2011-02-23 |
| US7330049B2 (en) | 2008-02-12 |
| EP1840965B1 (en) | 2013-09-18 |
| EP1840965A2 (en) | 2007-10-03 |
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