CN101000905B - 半导体装置以及半导体装置的制造方法 - Google Patents

半导体装置以及半导体装置的制造方法 Download PDF

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Publication number
CN101000905B
CN101000905B CN2007100022053A CN200710002205A CN101000905B CN 101000905 B CN101000905 B CN 101000905B CN 2007100022053 A CN2007100022053 A CN 2007100022053A CN 200710002205 A CN200710002205 A CN 200710002205A CN 101000905 B CN101000905 B CN 101000905B
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China
Prior art keywords
barrier metal
copper alloy
wiring
insulating film
interlayer insulating
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Chinese (zh)
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CN101000905A (zh
Inventor
古泽健志
儿玉大介
松本雅弘
宫崎博史
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Renesas Electronics Corp
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Renesas Technology Corp
Renesas Electronics Corp
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/031Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/033Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics
    • AHUMAN NECESSITIES
    • A47FURNITURE; DOMESTIC ARTICLES OR APPLIANCES; COFFEE MILLS; SPICE MILLS; SUCTION CLEANERS IN GENERAL
    • A47LDOMESTIC WASHING OR CLEANING; SUCTION CLEANERS IN GENERAL
    • A47L15/00Washing or rinsing machines for crockery or tableware
    • A47L15/42Details
    • A47L15/4285Water-heater arrangements
    • AHUMAN NECESSITIES
    • A47FURNITURE; DOMESTIC ARTICLES OR APPLIANCES; COFFEE MILLS; SPICE MILLS; SUCTION CLEANERS IN GENERAL
    • A47LDOMESTIC WASHING OR CLEANING; SUCTION CLEANERS IN GENERAL
    • A47L15/00Washing or rinsing machines for crockery or tableware
    • A47L15/0076Washing or rinsing machines for crockery or tableware of non-domestic use type, e.g. commercial dishwashers for bars, hotels, restaurants, canteens or hospitals
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/031Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/033Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics
    • H10W20/034Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics bottomless barrier, adhesion or liner layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/031Manufacture or treatment of conductive parts of the interconnections
    • H10W20/056Manufacture or treatment of conductive parts of the interconnections by filling conductive material into holes, grooves or trenches
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/031Manufacture or treatment of conductive parts of the interconnections
    • H10W20/064Manufacture or treatment of conductive parts of the interconnections by modifying the conductivity of conductive parts, e.g. by alloying
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/071Manufacture or treatment of dielectric parts thereof
    • H10W20/081Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • H10W20/083Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts the openings being via holes penetrating underlying conductors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/40Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/42Vias, e.g. via plugs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/40Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/425Barrier, adhesion or liner layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/40Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/45Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their insulating parts
    • H10W20/47Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their insulating parts comprising two or more dielectric layers having different properties, e.g. different dielectric constants
    • AHUMAN NECESSITIES
    • A47FURNITURE; DOMESTIC ARTICLES OR APPLIANCES; COFFEE MILLS; SPICE MILLS; SUCTION CLEANERS IN GENERAL
    • A47LDOMESTIC WASHING OR CLEANING; SUCTION CLEANERS IN GENERAL
    • A47L2501/00Output in controlling method of washing or rinsing machines for crockery or tableware, i.e. quantities or components controlled, or actions performed by the controlling device executing the controlling method
    • A47L2501/06Water heaters

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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
CN2007100022053A 2006-01-13 2007-01-12 半导体装置以及半导体装置的制造方法 Active CN101000905B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2006005956A JP5014632B2 (ja) 2006-01-13 2006-01-13 半導体装置および半導体装置の製造方法
JP2006005956 2006-01-13
JP2006-005956 2006-01-13

Related Child Applications (2)

Application Number Title Priority Date Filing Date
CN2010101941593A Division CN101872756B (zh) 2006-01-13 2007-01-12 半导体装置以及半导体装置的制造方法
CN2011100673949A Division CN102157489B (zh) 2006-01-13 2007-01-12 半导体装置以及半导体装置的制造方法

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CN101000905A CN101000905A (zh) 2007-07-18
CN101000905B true CN101000905B (zh) 2011-05-18

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CN2007100022053A Active CN101000905B (zh) 2006-01-13 2007-01-12 半导体装置以及半导体装置的制造方法
CN2010101941593A Active CN101872756B (zh) 2006-01-13 2007-01-12 半导体装置以及半导体装置的制造方法
CN2011100673949A Active CN102157489B (zh) 2006-01-13 2007-01-12 半导体装置以及半导体装置的制造方法

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CN2011100673949A Active CN102157489B (zh) 2006-01-13 2007-01-12 半导体装置以及半导体装置的制造方法

Country Status (5)

Country Link
US (3) US7700487B2 (https=)
JP (1) JP5014632B2 (https=)
KR (1) KR20070076465A (https=)
CN (3) CN101000905B (https=)
TW (1) TWI440135B (https=)

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JP5014632B2 (ja) * 2006-01-13 2012-08-29 ルネサスエレクトロニクス株式会社 半導体装置および半導体装置の製造方法
DE102007004867B4 (de) * 2007-01-31 2009-07-30 Advanced Micro Devices, Inc., Sunnyvale Verfahren zum Erhöhen der Zuverlässigkeit von kupferbasierten Metallisierungsstrukturen in einem Mikrostrukturbauelement durch Anwenden von Aluminiumnitrid
US20090001584A1 (en) * 2007-06-26 2009-01-01 Sang-Chul Kim Semiconductor device and method for fabricating the same
JP2010087094A (ja) * 2008-09-30 2010-04-15 Nec Electronics Corp 半導体装置及び半導体装置の製造方法
JP5622433B2 (ja) * 2010-04-28 2014-11-12 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
JP6300533B2 (ja) * 2014-01-15 2018-03-28 ルネサスエレクトロニクス株式会社 半導体装置の製造方法および半導体装置
US11164970B2 (en) 2014-11-25 2021-11-02 Taiwan Semiconductor Manufacturing Company, Ltd. Contact field plate
US9590053B2 (en) 2014-11-25 2017-03-07 Taiwan Semiconductor Manufacturing Co., Ltd. Methodology and structure for field plate design
US10756208B2 (en) 2014-11-25 2020-08-25 Taiwan Semiconductor Manufacturing Co., Ltd. Integrated chip and method of forming the same
US10411068B2 (en) 2015-11-23 2019-09-10 Intel Corporation Electrical contacts for magnetoresistive random access memory devices
US9799605B2 (en) 2015-11-25 2017-10-24 International Business Machines Corporation Advanced copper interconnects with hybrid microstructure
US9704804B1 (en) * 2015-12-18 2017-07-11 Texas Instruments Incorporated Oxidation resistant barrier metal process for semiconductor devices
US10923393B2 (en) * 2018-09-24 2021-02-16 Taiwan Semiconductor Manufacturing Co., Ltd. Contacts and interconnect structures in field-effect transistors
US11227794B2 (en) * 2019-12-19 2022-01-18 Taiwan Semiconductor Manufacturing Co., Ltd. Method for making self-aligned barrier for metal vias In-Situ during a metal halide pre-clean and associated interconnect structure
US12230552B2 (en) 2021-11-18 2025-02-18 Qualcomm Incorporated Recess structure for padless stack via
KR20250029976A (ko) 2022-07-13 2025-03-05 어플라이드 머티어리얼스, 인코포레이티드 Cvd 침지 프로세스들을 이용한 산화 장벽들
CN115274594B (zh) * 2022-09-19 2022-12-16 合肥晶合集成电路股份有限公司 一种半导体结构及其制作方法

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US6008114A (en) * 1998-06-08 1999-12-28 United Microelectronics Corp. Method of forming dual damascene structure
US6136104A (en) * 1998-07-08 2000-10-24 Kobe Steel, Ltd. Copper alloy for terminals and connectors and method for making same
CN1412845A (zh) * 2001-10-19 2003-04-23 日本电气株式会社 半导体器件及其制造方法

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US6008114A (en) * 1998-06-08 1999-12-28 United Microelectronics Corp. Method of forming dual damascene structure
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Also Published As

Publication number Publication date
CN101872756B (zh) 2013-01-02
US8097948B2 (en) 2012-01-17
TWI440135B (zh) 2014-06-01
US20070167010A1 (en) 2007-07-19
US20100327449A1 (en) 2010-12-30
CN102157489A (zh) 2011-08-17
TW200735275A (en) 2007-09-16
JP2007189061A (ja) 2007-07-26
KR20070076465A (ko) 2007-07-24
CN101000905A (zh) 2007-07-18
US20100151673A1 (en) 2010-06-17
CN102157489B (zh) 2013-02-06
US7700487B2 (en) 2010-04-20
CN101872756A (zh) 2010-10-27
JP5014632B2 (ja) 2012-08-29
US7816268B2 (en) 2010-10-19

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