CN100505305C - Soi-ldmos器件 - Google Patents

Soi-ldmos器件 Download PDF

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CN100505305C
CN100505305C CNB038115719A CN03811571A CN100505305C CN 100505305 C CN100505305 C CN 100505305C CN B038115719 A CNB038115719 A CN B038115719A CN 03811571 A CN03811571 A CN 03811571A CN 100505305 C CN100505305 C CN 100505305C
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electrode
semiconductor device
field plate
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J·佩特鲁泽尔洛
B·杜福特
T·J·勒塔韦
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Koninklijke Philips NV
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    • H—ELECTRICITY
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    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
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    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
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    • H01L27/1203—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI
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    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
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    • H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7816—Lateral DMOS transistors, i.e. LDMOS transistors
    • H01L29/7824—Lateral DMOS transistors, i.e. LDMOS transistors with a substrate comprising an insulating layer, e.g. SOI-LDMOS transistors
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    • H01L29/772—Field effect transistors
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    • H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7816—Lateral DMOS transistors, i.e. LDMOS transistors
    • H01L29/7826—Lateral DMOS transistors, i.e. LDMOS transistors with voltage or current sensing structure, e.g. emulator section, overcurrent sensing cell
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    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42364—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity
    • H01L29/42368—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity the thickness being non-uniform

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Abstract

本发明提供了一种SOI-LDMOS型半导体器件，其中将场板划分为多个电隔离的子场板。其中至少两个划分的子场板连接到外部电路以读出其各自的输出电压。通过连接具有特定元件的第一外部电路和第二外部电路，将一个电路构造为用来确定瞬时输出电压，而将另一个电路构造为用来确定输出电压作为时间函数的变化。如果瞬时输出电压或者电压对时间的导数超过所设定的值，则将半导体器件与电源断开。

Description

SOI-LDMOS器件
本发明涉及具有横向漂移区和导电场板这种类型的半导体器件的领域，更具体地，涉及提供这样一种半导体器件，其整体地适合于感测和分析瞬时的且随时间可变的源到漏的输出电压。
所有的电器件都可以在限定的最大电压下工作。超过该额定的最大电压会导致电击穿，或者可能导致该器件完全毁坏。同样地，半导体器件也是对电压敏感的。在半导体器件，例如晶体管，承受高电压的已知的电路中，在电路中增加一个外部元件来感测电压。将所述外部元件连接到控制器，则可以在晶体管被损坏之前断开电压。当然，增加外部元件需要更多的劳力及费用。
本发明认识到，可以将半导体器件本身构造成包含一个单独的场板电路来判断过度的电压，消除了为此目的增加外部元件的需要。这里公开的发明提供了一种改进的SOI-LDMOS半导体器件，使得能够检测该器件的源和漏之间的输出电压。该器件的场板被隔离并被分为两个或更多个子场板，其中每个子场板具有外部接触电极。用于检测和测量瞬时电压的第一附加电路可以连接到所述电极中的第一电极，用于检测随时间变化电压的第二电路可以连接到所述电极中的第二电极。
因此，下面公开的发明可以提供一种包括被隔离的场板和外部分析电路的半导体器件，其中将所述被隔离的场板分为多个子场板，每个子场板具有一个端子连接区域用于从中感测和分析电压值。
现在参考附图以举例的方式描述本发明的实施例，其中：
图1是根据本发明的具有被隔离场板的半导体器件的第一剖视图。
图2是垂直于第一剖视图的第二剖视图，示意性地示出了本发明的半导体器件，其中场板被划分为两个子场板，每个子场板具有用于感测电压的接触端。
图3示出连接到本发明的半导体器件的一对示例性电路，其中电路(a)确定源到漏的瞬时电压降，电路(b)确定源到漏的电压降作为时间函数的变化。
在图1的剖视图中，横向薄膜SOI MOS半导体器件10包括衬底20，隐埋绝缘层22，和在其中制造了该器件的半导体表面层26。MOS晶体管包括第一导电类型的源区24，相反的第二导电类型的体区30，第一导电类型的横向漂移区46，和同样为第一导电类型的漏区50。由栅电极32完成基本器件结构，通过氧化物绝缘区56与半导体表面层26绝缘。
栅电极32优选地由多晶硅晶体材料制成。在本发明的范围内，本发明采用的MOS晶体管结构可选地具有各种性能增强特征，如场氧化物区56内的阶梯式氧化物区，形成为场部分34的延伸栅电极结构，覆盖栅电极32的绝缘氧化物层42，顶部场板40a，朝着器件的漏极侧横向伸出的延伸顶部场板部分40b，和薄化的横向漂移区部分46，以及可能需要的大量其他各种性能增强特征，而不偏离本发明的精神和范围。相对接近源极28的子场板40a优选地由多晶硅结晶材料制成，而相对接近漏极48的子场板40b优选地由金属或其他高导电率材料制成。另外，MOS晶体管10还可以包括与源区24接触的表面接触区44，其位于体区30中并与体区具有相同的导电类型，但为更高的掺杂。应注意，为了用于高电压应用中，其中漏到源的电压为数百伏的量级，导电顶部场板是必须的，以便用可允许的最大漂移区电荷来保持电压。
可以理解，这里示出的经简化的代表性器件描述了具体的器件结构，但可以在本发明的范围内对器件的几何尺寸和构造作出各种变化。本领域公知的常规半导体器件具有连接回到源极的场板。在本发明中，则将场板保持为具有外部连接电极的被隔离端。
现在参见图2，其中示出了本发明的SOI-LDMOS器件的剖视图，该图的方向与图1的剖视图垂直，所示SOI-LDMOS器件具有被隔离的场板F(图1中标为部件40)。半导体器件的组成部分在图2中用字母标出，以表明其属性。场板F被分为大小基本相等的两个子场板F1和F2，通过间隙G彼此分隔开。间隙G形成为等于或小于场氧化物区56的厚度t(见图1)，以防止器件中的过度击穿损伤。如上面提到的，无论是子场板F1还是子场板F2都没有连接到源区28。在本发明中，子场板F1和F2是独立的端。子场板F1连接到外部接触电极T1，子场板F2连接到外部接触电极T2。对外部接触电极T1和T2中的每一个进行定位以便与外部电路相连接，例如在印刷电路板中显现的，如下面将要描述的。根据这里所描述的构造，在选中的时刻在电极T1处测量的电压电位与相同时刻在电极T2的电压电位基本上相同。图2中表示为漏区D、栅区G和源区S的附加组成部分，基本上如上面结合图1所述。将源区S和栅区G明显划分为子区域，仅仅是为了表明分别从子场板F1和F2向外延伸的连接端T1和T2与其隔离的。另外可以理解，将场板F划分为两个相等的子场板F1和F2是示例性的，划分为其他数目，例如3、4、5个等等的子场板，也认为是在本发明的精神和范围之内。另外还可以认识到，多个相等子场板中的每一个将呈现出基本相等的外部电压结果。
现在参见图3，其中示出一对感测和分析电路(a)和(b)连接到半导体器件10。如本领域技术人员可以理解的，半导体器件由于本身的特性使得其不可避免地产生电容。图中示出半导体器件10具有第一和第二寄生电容CP1和CP2，表示场板区F与漏区D之间的电容(见图2)。根据图3的电路(a)60，外部接触电极T2图示地连接在电容CP2与运算放大器(op-amp)62的负极端之间。op-amp62的正极端接地。另一个电容C64与运算放大器62为并联关系，跨接op-amp62的负极端与输出抽头66。如图中所示，输出抽头66处的输出电压可以用下面的公式表示：
V0＝-Vdsx CP2/C
可以看出，通过上面的计算可以得出源漏之间的电压降(Vds)的读数。该电压通常在0-20V之间的范围内。
现在参见图3的电路(b)70，外部接触电极T1图示地连接在电容CP1之间且外部连接到运算放大器(op-amp)72的负极端。op-amp72的正极端接地。将每个op-amp 62及72的正极端接地能保证端子T1和T2接近地电位。电阻R 74与op-amp 72为并联关系，跨接op-amp72的负极端与输出抽头76。如图中所示，输出抽头66处的输出电压可以用下面的公式表示：
V0＝-dVds/dt x R x CPl
可以看出，通过该计算可以得出源漏之间的电压读数由于受到检测电路的限制而随时间变化。可以理解，这些电路和相关的公式是作为可能根据本发明的感测和分析方法的例子而提供的。本领域的技术人员可以采用其他的电路和公式。另外还可以理解，虽然从单位场板可以确定Vds和dVds/dt这两者，通过对场板进行划分，则可以通过调整所采用的电阻和电容值来优化分析电路，例如图3的电路(a)和(b)。
在由半导体器件10确定了瞬时电压的幅度和电压变化率后，上述公式通过其进行计算的控制器对所述电压值和已设定的参数进行比较。如果判断出绝对电压值超过设定的最大值，或者电压导数过大时，则断开电源，从而防止半导体器件过载。
虽然已结合特定实施例描述了本发明，但应该理解，在不偏离本发明的范围和精神的情况下可以作出各种变动和修改，本发明的范围和精神由后附的权利要求书更加清楚、准确地限定。

Claims (16)

1、一种半导体器件(10)，具有第一导电类型的源极区(24)、漏极区(50)、第二导电类型的衬底(20)和栅极(32)，该半导体器件(10)包括：
与半导体器件的其他端相隔离的多个子场板(F1，F2)，每个子场板(F1，F2)具有电极(T1，T2)用于感测和从中分析电压值；以及
与所述多个电极中的第一电极(T2)相连接的第一分析电路(60)，和与所述多个电极中的第二电极(T1)相连接的第二分析电路(70)。
2、如权利要求1所述的半导体器件(10)，其中所述第一分析电路(60)被构造用来感测从源极到漏极的电压差。
3、如权利要求1所述的半导体器件(10)，其中所述第二分析电路(70)被构造用来感测从源极到漏极的电压差作为时间函数的变化。
4、如权利要求2所述的半导体器件(10)，其中所述第一分析电路(60)包括第一运算放大器(62)，该第一运算放大器(62)与电容(64)并联在第一电极(T2)与第一输出抽头(66)之间。
5、如权利要求3所述的半导体器件(10)，其中所述第二分析电路(70)包括第二运算放大器(72)，该第二运算放大器(72)与电阻(74)并联在第二电极(T1)与第二输出抽头(76)之间。
6、如前面任一项权利要求所述的半导体器件(10)，其中所述子场板(F1，F2)的大小基本上彼此相等。
7、一种用于确定半导体器件(10)中源极(24)与漏极(50)之间的电压差的方法，包括：
- 将半导体器件(10)的场板(40)划分为多个子场板(F1，F2)；
- 提供连接到所述多个子场板(F1，F2)中的每一个子场板的外部接触电极(T1，T2)；
- 将第一分析电路(60)连接到第一外部接触电极(T2)；
- 将第二分析电路(70)连接到第二外部接触电极(T1)；和
- 确定每个外部接触电极(T1，T2)处的输出电压。
8、如权利要求7所述的方法，其中所述场板(40)与半导体器件(10)中的其他端相隔离，并且所述方法还包括将子场板(F1，F2)保持为相互隔离。
9、如权利要求7或8所述的方法，其中连接第一分析电路(60)的步骤包括将第一op-amp(62)与电容(64)并联连接，其第一侧连接到第一外部接触电极(T2)，其第二侧连接到输出抽头(66)。
10、如权利要求7或8所述的方法，其中连接第二分析电路的步骤包括将第二op-amp(72)与电阻(74)并联连接，其第一侧连接到第二外部接触电极(T1)，其第二侧连接到输出抽头(66)。
11、如权利要求7所述的方法，还包括按照下面的公式计算瞬时源极到漏极的电压差的步骤：
V0＝-Vds×Cp2/C。
12、如权利要求7所述的方法，还包括按照下面的公式计算随时间变化的源极到漏极的电压差的步骤：
V0＝-dVds/dt×R×Cp1。
13、一种保护半导体器件(10)防止由于电压过载而损坏的方法，包括步骤：
- 在半导体器件(10)中提供多个子场板(F1，F2)；
- 提供连接到每个子场板的外部接触电极(T1，T2)；
- 将第一分析电路(60)连接到外部接触电极(T1，T2)中的第一电极；
- 将第二分析电路(70)连接到外部接触电极(T1，T2)中的第二电极；
- 通过第一分析电路(60)确定瞬时输出电压差；
- 通过第二分析电路(70)确定输出电压差作为时间函数的变化；和
- 如果瞬时输出电压或者输出电压作为时间函数的变化超过为其设定的值，则将半导体器件与电源断开。
14、如权利要求13所述的方法，其中子场板(F1，F2)彼此电隔离。
15、如权利要求13或14所述的方法，其中确定瞬时输出电压差的步骤包括利用公式：
V0＝-Vds×Cp2/C。
16、如权利要求13或14所述的方法，其中确定输出电压差变化的步骤包括利用公式：
V0＝-dVds/dt×R×Cp1。
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2012088774A1 (zh) * 2010-12-29 2012-07-05 电子科技大学 一种soi型p-ldmos

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4337983B2 (ja) * 2005-02-17 2009-09-30 国立大学法人 東京大学 混在型半導体集積回路及びその製造方法
DE102005039804B4 (de) * 2005-08-22 2009-07-09 Infineon Technologies Ag Laterales Halbleiterbauelement mit Driftstrecke und Potentialverteilungsstruktur, Verwendung des Halbleiterbauelements sowie Verfahren zur Herstellung desselben
DE102006001922B3 (de) * 2006-01-14 2007-05-03 Infineon Technologies Austria Ag Lateraler Leistungstransistor und Verfahren zu dessen Herstellung
JP5307973B2 (ja) * 2006-02-24 2013-10-02 セミコンダクター・コンポーネンツ・インダストリーズ・リミテッド・ライアビリティ・カンパニー 半導体装置
JP4989085B2 (ja) * 2006-02-24 2012-08-01 オンセミコンダクター・トレーディング・リミテッド 半導体装置及びその製造方法
EP2134279B1 (en) 2007-04-19 2017-01-04 Stryker European Holdings I, LLC Hip fracture device with static locking mechanism allowing compression
CA2676807C (en) * 2007-04-19 2012-07-03 Stryker Trauma Gmbh Hip fracture device with barrel and end cap for load control
US8174071B2 (en) * 2008-05-02 2012-05-08 Taiwan Semiconductor Manufacturing Co., Ltd. High voltage LDMOS transistor
CN101593774B (zh) * 2009-06-10 2012-05-23 苏州博创集成电路设计有限公司 P型绝缘体上硅的横向双扩散金属氧化物半导体晶体管
CN101714552B (zh) * 2009-11-09 2011-05-25 苏州博创集成电路设计有限公司 等离子显示驱动芯片用高低压器件及制备方法
US8901676B2 (en) 2011-01-03 2014-12-02 International Business Machines Corporation Lateral extended drain metal oxide semiconductor field effect transistor (LEDMOSFET) having a high drain-to-body breakdown voltage (Vb), a method of forming an LEDMOSFET, and a silicon-controlled rectifier (SCR) incorporating a complementary pair of LEDMOSFETs
US8299547B2 (en) * 2011-01-03 2012-10-30 International Business Machines Corporation Lateral extended drain metal oxide semiconductor field effect transistor (LEDMOSFET) with tapered dielectric plates
US8680615B2 (en) 2011-12-13 2014-03-25 Freescale Semiconductor, Inc. Customized shield plate for a field effect transistor
US8829570B2 (en) 2012-03-09 2014-09-09 Analog Devices, Inc. Switching device for heterojunction integrated circuits and methods of forming the same
US9142625B2 (en) * 2012-10-12 2015-09-22 Nxp B.V. Field plate assisted resistance reduction in a semiconductor device
US9245960B2 (en) 2013-02-08 2016-01-26 Globalfoundries Inc. Lateral extended drain metal oxide semiconductor field effect transistor (LEDMOSFET) with tapered airgap field plates
US9275991B2 (en) 2013-02-13 2016-03-01 Analog Devices, Inc. Apparatus for transceiver signal isolation and voltage clamp
CN103762156A (zh) * 2013-12-31 2014-04-30 上海新傲科技股份有限公司 半导体衬底的制作方法、半导体衬底以及高压晶体管
US9673187B2 (en) 2015-04-07 2017-06-06 Analog Devices, Inc. High speed interface protection apparatus
US9831233B2 (en) 2016-04-29 2017-11-28 Analog Devices Global Apparatuses for communication systems transceiver interfaces
US10734806B2 (en) 2016-07-21 2020-08-04 Analog Devices, Inc. High voltage clamps with transient activation and activation release control
US10249609B2 (en) 2017-08-10 2019-04-02 Analog Devices, Inc. Apparatuses for communication systems transceiver interfaces
US10700056B2 (en) 2018-09-07 2020-06-30 Analog Devices, Inc. Apparatus for automotive and communication systems transceiver interfaces
US11387648B2 (en) 2019-01-10 2022-07-12 Analog Devices International Unlimited Company Electrical overstress protection with low leakage current for high voltage tolerant high speed interfaces

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3063085D1 (en) * 1979-05-30 1983-06-16 Xerox Corp Monolithic hvmosfet array
KR100416589B1 (ko) * 2001-01-06 2004-02-05 삼성전자주식회사 스위칭 특성을 개선하고 누설전류를 감소시키는 전하펌프회로 및 이를 구비하는 위상동기 루프
JP4796238B2 (ja) * 2001-04-27 2011-10-19 Ｏｋｉセミコンダクタ株式会社 ワード線駆動回路
US6627958B2 (en) * 2001-12-10 2003-09-30 Koninklijke Philips Electronics N.V. Lateral high voltage semiconductor device having a sense terminal and method for sensing a drain voltage of the same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2012088774A1 (zh) * 2010-12-29 2012-07-05 电子科技大学 一种soi型p-ldmos

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