CN100501937C - 在半导体制造工艺中形成低k电介质的方法 - Google Patents
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Abstract
一种低K电介质复合层(26,28),由低K阻挡层(26)和阻挡层(26)上的低K电介质层(28)形成。采用氧等离子体处理阻挡层(26)以使表面从疏水性转变为亲水性,所述阻挡层(26)沉积的结果是具有疏水性的顶部表面。随后的水基清洗对于去除由于阻挡层(26)的表面转变而产生的阻挡层(26)上使成品率减少的缺陷是非常有效的。在水基清洗之后,在阻挡层(26)的表面上形成低K电介质层(28),从而实现具有低K的复合层(26,28)。
Description
技术领域
本发明涉及集成电路制造,更具体地,涉及在集成电路制造中低K电介质薄膜的形成。
背景技术
在半导体的制造中,发展之一就是使用低K电介质作为层间电介质(ILD),该层位于半导体衬底上方的导电层之间。这种低K电介质是为了减小在被用作互连的导体之间的电容耦合。在速度高度优先的情况下,常常是这种情况,减小电容耦合是特别重要的。低K材料代表性地既不是最好的绝缘体也不是最容易以高成品率制造的。为了实现为成功操作所必需的全部特征,常常需要阻挡层和帽层。这些附加的层增加步骤,使工艺复杂并潜在地引入成品率问题。
因此,在半导体制造中存在对低K电介质的需要,所述低K电介质可以在对成品率具有更小的负面影响的情况下进行制作。
发明内容
根据本发明的一方面,提供一种在半导体衬底上方形成层的方法,包括;提供半导体衬底;在所述衬底的上方形成第一电介质层,所述电介质层包括疏水性的表面;转变所述疏水性表面为亲水性表面;擦洗所述亲水性表面;和在所述第一电介质层上方形成第二电介质层。
根据本发明的另一方面,提供一种形成半导体结构的方法:提供半导体衬底;在所述衬底上方形成包括硅,碳和氮的第一电介质层:采用氧等离子体处理所述第一电介质层:擦洗所述第一电介质层;和在所述第一电介质层上方形成第二电介质层。
附图说明
通过附图以举例而非限制的方式对本发明进行说明,其中类似的标号指示相似的元件,其中:
图1是根据本发明的一种实施方式而制作的半导体器件结构的横截面;和
图2是在制作图1的器件中使用的根据本发明实施方式的工艺流程图。
技术人员理解图中的元件是为简化和清楚而说明的,没有必要按比例绘制。例如,图中的一些元件的尺寸可能相对于其它元件被夸张,从而帮助改善对本发明的实施方式的理解。
具体实施方式
在一种形式中,采用氧等离子体处理低K阻挡层以使其表面转变为亲水性的,所述低K阻挡层沉积时具有疏水性的表面。然后采用擦洗的方式对亲水性表面进行清洁。由于表面是亲水性的,擦洗具有显著增加的效力。在表面上形成处理低K电介质层之后,通过参考附图和下面的说明,对此更好地理解。
图1中所示的是半导体器件10,所述器件10包括半导体衬底12、形成在衬底12内的漏区14、形成在衬底12内的源区16、位于衬底12上方并基本上位于漏极14和源极16之间的栅极电介质18、位于栅极电介质18的上方的栅极20、围绕栅极22的侧壁隔层22、位于栅极20的上方且围绕栅极20的电介质层24、栅极20上的接触25、在电介质层24上的低K阻挡电介质层26,在低K阻挡电介质层26上的低K电介质层28,在低K电介质层28上的帽层32,在通道25上并被层26,28和30包围的导电层30,在帽层32上的低K阻挡层34,在低K阻挡层34上的低K电介质层36、和在导电层30上并被层34和36包围的通道38,半导体衬底12最好是SOI衬底在所述衬底中半导体是硅或者可以是另一种丰导体材料的另一类丰导体衬底。栅极20最好是硅但可以是如金属或不同层的复合物的其它材料。接触25最好是钨但可以是其它类型的导电材料。通道38最好是铜但可以是另一类导电材料。导电层30最好是铜但可以是另一类导电材料。帽层32最好是用四乙基原硅酸盐(TEOS)形成的氧化物,但也可以是其它的电介质材料。电介质24是多层复合物,其中顶层最好是SiCOH或用氟和TEOS(FTEOS)形成的氧化物。CMP处理被应用到电介质层24,使得在CMP处理之后层24的表面上的材料可以变化。在进行CMP处理之前在层24上方的材料的优选组合是富硅的氧化物、富硅的氧氮化物、TEOS氧化物,所述氧化物导致横过晶片的层24的顶部表面不相同,在所述晶片上器件10被操作。半导体器件10是通常的结构,可以通过除了在形成低K阻挡层26和低K电介质28的复合层和低K阻挡层34和低K电介质层36中的复合层方法之外的常规方法而形成。
形成这些复合层的方法被显示在图2的流程图50中。流程图50包括步骤52,54,56和58。在步骤52中,层被沉积为具有疏水性的表面,低K阻挡层26和34是这样的。阻挡层26和34最好是SiCN。低K电介质层28和36最好是SiCOH。已经发现在保护SiCOH不受层24影响时SiCN是有效的阻挡。SiCN具有有疏水性表面的特性。还发现SiCN在其表面上具有微粒。已经发现擦洗没有去除所有的颗粒。清洁不完全有效的一个可能原因是所沉积的SiCN层的表面是疏水性的。此外,已发现擦洗清洁破坏SiCN的结构,产生新的缺陷类型。步骤54是使SiCN层的表面从疏水性转变为亲水性。所述转变使用氧等离子体实现。SiCN的沉积和随后的SiCN层的等离子体处理最好在原位进行。由于SiCN是等离子体沉积的,随后的氧等离子体步骤可以容易地进行而不必要从沉积室移出晶片。因此,层26在同一室内被沉积然后处理。以相同的方式,只是在导体30的沉积和CMP处理之后,层34也在同一室内沉积和处理。
步骤56是对已经等离子体处理的层的表面进行擦洗,因此,在层26已经被采用氧等离子体处理之后采用擦洗清洁的方式对层26进行处理,对于层34也是这样的,擦洗清洁是水基清洁,所速水最好是去离子水,且进一步包括氢氧化铵,对于诸如擦清洁的水基清洁这是常规的成分。
步骤58是执行下一层的沉积,所述下一层是位于低K阻挡层26之上的低K电介质层28和位于阻挡层34之上的低K电介质层36。步骤52,58的所述组合联合完成用作低K电介质的复合层。
所述方法的好处的一个理论是阻挡层的等离子体沉积导致阻挡表面上的微粒,所述微粒可能引起使成品率降低的缺陷;由于阻挡层的表面使疏水性的,这些微粒不能通过擦洗而被有效地去除;阻挡层表面沉积后等离子体处理转变阻挡层的表面为亲水性的,使得擦洗有效去除微粒而没有随后产生新的缺陷类型。另一个理论是等离子体处理导致微粒与阻挡层之间更少的粘附,因此随后的擦洗更有效。在任何情况中,所述处理导致成品率显著提高。
在前面的说明中,已参考特殊的实施方式对本发明进行了说明。然而,本技术的一个普通的技术人员理解在不背离在权利要求中提出的本发明的范围的情况下可以进行各种修改和改变。例如,得益于在等离子体处理后水基清洁,可以使用其它的电介质和阻挡材料。另一材料也可以在沉积时是疏水性的并通过等离子体处理被转变为亲水性的。等离子体处理可以是采用氧之外的其它物质。低K材料可以是SiCN和SiCOH之外的其它材料,并可以被旋涂而不是通过等离子体处理。水基清洁不必是擦洗处理,而是简单地使用水基溶液而不需要刷子。因此,说明书和附图应被认为是说明性的而不是限制性的,而且所有这些修改意欲包括在本发明的范围之内。
已参照特殊的实施方式对好处、其它优点和对问题的解决进行了说明。然而,所述好处、优点、对问题的解决、以及可以导致任何好处、优点或者对产生问题的解决或变得更明确的要素并不被解释为任何或全部权利要求的关键的、必须的,或基本的特点或要素。这里所用的,“包括(comprises)”,“包含(comprising)”或者它们的其它任何变化,是意欲覆盖非排他性的内容,因此包含要素列表的工艺、方法制品或设备并不仅仅包括那些要素而是可以包括没有明确列入或所述工艺,方法,制品或设备固有的其它要素。
Claims (10)
1、一种在半导体衬底上方形成层的方法,包括:
提供半导体衬底;
在所述衬底的上方形成包括硅、碳、氮的第一电介质层,所述第一电介质层包括疏水性的表面;
将所述疏水性表面转变为亲水性表面;
擦洗所述亲水性表面;和
在所述第一电介质层上方形成第二电介质层,
其中通过氧等离子体将所述疏水性表面转变为所述亲水性表面。
2、根据权利要求1的方法,其中所述第二电介质层包括硅、碳、氧和氢。
3、根据权利要求1的方法,其中擦洗所述亲水性表面的步骤是采用水基清洁进行的。
4、根据权利要求3的方法,其中所述水基清洁包括氢氧化铵。
5、根据权利要求1的方法,其中形成所述第一电介质层的步骤和将所述疏水性表面转变为亲水性表面的步骤是在原位进行的。
6、一种形成半导体结构的方法:
提供半导体衬底;
在所述衬底上方形成包括硅、碳和氮的第一电介质层;
采用氧等离子体处理所述第一电介质层;
擦洗所述第一电介质层;和
在所述第一电介质层上方形成第二电介质层,
其中所述第一电介质层具有疏水性的表面,并且
其中处理所述第一电介质层的步骤将所述疏水性表面全部转变为亲水性表面。
7、根据权利要求6的方法,其中擦洗步骤包括采用水基清洁溶液擦洗。
8、根据权利要求7的方法,其中所述水基清洁溶液包括氢氧化铵。
9、根据权利要求8的方法,其中擦洗步骤包括机械清洁和化学清洁。
10、根据权利要求6的方法,其中形成第一电介质层的步骤包括:
形成硅、碳和氮的硅第一电介质层;
其中形成第一电介质和处理第一电介质层是在原位进行的。
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JP (1) | JP4659751B2 (zh) |
KR (1) | KR101054676B1 (zh) |
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KR20060101758A (ko) | 2006-09-26 |
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