TW200515532A - Method of forming a low k dielectric in a semiconductor manufacturing process - Google Patents

Method of forming a low k dielectric in a semiconductor manufacturing process

Info

Publication number
TW200515532A
TW200515532A TW093125368A TW93125368A TW200515532A TW 200515532 A TW200515532 A TW 200515532A TW 093125368 A TW093125368 A TW 093125368A TW 93125368 A TW93125368 A TW 93125368A TW 200515532 A TW200515532 A TW 200515532A
Authority
TW
Taiwan
Prior art keywords
low
dielectric
barrier layer
layer
forming
Prior art date
Application number
TW093125368A
Other languages
English (en)
Inventor
James N Dougan
Lesley A Smith
Original Assignee
Freescale Semiconductor Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Freescale Semiconductor Inc filed Critical Freescale Semiconductor Inc
Publication of TW200515532A publication Critical patent/TW200515532A/zh

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041—Cleaning
    • H01L21/02057—Cleaning during device manufacture
    • H01L21/0206—Cleaning during device manufacture during, before or after processing of insulating layers
    • H01L21/02063—Cleaning during device manufacture during, before or after processing of insulating layers the processing being the formation of vias or contact holes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76822—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
    • H01L21/76826—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. by contacting the layer with gases, liquids or plasmas
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H01L21/76832—Multiple layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H01L21/76834—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers formation of thin insulating films on the sidewalls or on top of conductors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041—Cleaning
    • H01L21/02043—Cleaning before device manufacture, i.e. Begin-Of-Line process
    • H01L21/02054—Cleaning before device manufacture, i.e. Begin-Of-Line process combining dry and wet cleaning steps

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Plasma & Fusion (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Formation Of Insulating Films (AREA)
TW093125368A 2003-10-21 2004-08-23 Method of forming a low k dielectric in a semiconductor manufacturing process TW200515532A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US10/690,060 US6902440B2 (en) 2003-10-21 2003-10-21 Method of forming a low K dielectric in a semiconductor manufacturing process

Publications (1)

Publication Number Publication Date
TW200515532A true TW200515532A (en) 2005-05-01

Family

ID=34521542

Family Applications (1)

Application Number Title Priority Date Filing Date
TW093125368A TW200515532A (en) 2003-10-21 2004-08-23 Method of forming a low k dielectric in a semiconductor manufacturing process

Country Status (6)

Country Link
US (1) US6902440B2 (zh)
JP (1) JP4659751B2 (zh)
KR (1) KR101054676B1 (zh)
CN (1) CN100501937C (zh)
TW (1) TW200515532A (zh)
WO (1) WO2005045914A1 (zh)

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US6913992B2 (en) 2003-03-07 2005-07-05 Applied Materials, Inc. Method of modifying interlayer adhesion
US7253125B1 (en) 2004-04-16 2007-08-07 Novellus Systems, Inc. Method to improve mechanical strength of low-k dielectric film using modulated UV exposure
US7112541B2 (en) * 2004-05-06 2006-09-26 Applied Materials, Inc. In-situ oxide capping after CVD low k deposition
US9659769B1 (en) 2004-10-22 2017-05-23 Novellus Systems, Inc. Tensile dielectric films using UV curing
US8980769B1 (en) 2005-04-26 2015-03-17 Novellus Systems, Inc. Multi-station sequential curing of dielectric films
US8454750B1 (en) 2005-04-26 2013-06-04 Novellus Systems, Inc. Multi-station sequential curing of dielectric films
US8889233B1 (en) 2005-04-26 2014-11-18 Novellus Systems, Inc. Method for reducing stress in porous dielectric films
US7189658B2 (en) * 2005-05-04 2007-03-13 Applied Materials, Inc. Strengthening the interface between dielectric layers and barrier layers with an oxide layer of varying composition profile
US7273823B2 (en) * 2005-06-03 2007-09-25 Applied Materials, Inc. Situ oxide cap layer development
US7498270B2 (en) * 2005-09-30 2009-03-03 Tokyo Electron Limited Method of forming a silicon oxynitride film with tensile stress
JP4422671B2 (ja) * 2005-12-06 2010-02-24 トヨタ自動車株式会社 半導体装置とその製造方法
US8987085B2 (en) * 2006-08-01 2015-03-24 Taiwan Semiconductor Manufacturing Company, Ltd. Methods for improving uniformity of cap layers
US20100267231A1 (en) * 2006-10-30 2010-10-21 Van Schravendijk Bart Apparatus for uv damage repair of low k films prior to copper barrier deposition
US8465991B2 (en) 2006-10-30 2013-06-18 Novellus Systems, Inc. Carbon containing low-k dielectric constant recovery using UV treatment
US7851232B2 (en) * 2006-10-30 2010-12-14 Novellus Systems, Inc. UV treatment for carbon-containing low-k dielectric repair in semiconductor processing
US10037905B2 (en) * 2009-11-12 2018-07-31 Novellus Systems, Inc. UV and reducing treatment for K recovery and surface clean in semiconductor processing
US8211510B1 (en) 2007-08-31 2012-07-03 Novellus Systems, Inc. Cascaded cure approach to fabricate highly tensile silicon nitride films
KR100928502B1 (ko) * 2007-11-05 2009-11-26 주식회사 동부하이텍 반도체 소자 및 그의 제조 방법
US9050623B1 (en) 2008-09-12 2015-06-09 Novellus Systems, Inc. Progressive UV cure
JP5507909B2 (ja) 2009-07-14 2014-05-28 東京エレクトロン株式会社 成膜方法
JP5398853B2 (ja) * 2012-01-26 2014-01-29 東京エレクトロン株式会社 プラズマ処理方法及びプラズマ処理装置
CN103854962B (zh) * 2012-11-28 2017-05-17 中芯国际集成电路制造(上海)有限公司 晶圆刻蚀后的清洗方法
CN104681404A (zh) * 2013-11-27 2015-06-03 中芯国际集成电路制造(上海)有限公司 接触孔的制作方法和半导体器件的湿法清洗方法
US9437484B2 (en) * 2014-10-17 2016-09-06 Taiwan Semiconductor Manufacturing Company, Ltd. Etch stop layer in integrated circuits
KR101611133B1 (ko) * 2015-05-18 2016-04-08 성균관대학교산학협력단 3차원 구조의 가스 센서 및 이의 제조방법
US10008382B2 (en) 2015-07-30 2018-06-26 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device having a porous low-k structure
US9847221B1 (en) 2016-09-29 2017-12-19 Lam Research Corporation Low temperature formation of high quality silicon oxide films in semiconductor device manufacturing
JP6989207B2 (ja) * 2018-05-15 2022-01-05 住友電工デバイス・イノベーション株式会社 キャパシタの製造方法
CN109994371B (zh) * 2019-03-26 2021-10-15 上海华力集成电路制造有限公司 一种改善氮掺杂碳化物堆叠后的清洁产生水痕的方法
CN110444468A (zh) * 2019-08-29 2019-11-12 上海华力微电子有限公司 一种消除生成硬掩模ndc层后产生的凸块缺陷的方法
KR102665267B1 (ko) * 2022-10-06 2024-05-13 한국생명공학연구원 감도가 개선된 국소 표면 플라즈몬 공명 센서 및 이의 제조방법

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CN1179613C (zh) * 2001-09-20 2004-12-08 联华电子股份有限公司 一种改善有机低介电常数层附着力的表面处理方法
JP2003188254A (ja) 2001-12-18 2003-07-04 Hitachi Ltd 半導体装置の製造方法および半導体装置
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Also Published As

Publication number Publication date
JP2007509499A (ja) 2007-04-12
US6902440B2 (en) 2005-06-07
CN1864251A (zh) 2006-11-15
WO2005045914A1 (en) 2005-05-19
US20050085082A1 (en) 2005-04-21
KR20060101758A (ko) 2006-09-26
CN100501937C (zh) 2009-06-17
JP4659751B2 (ja) 2011-03-30
KR101054676B1 (ko) 2011-08-08

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