CN100407413C - 电路基板、焊球网格阵列的安装结构和电光装置 - Google Patents
电路基板、焊球网格阵列的安装结构和电光装置 Download PDFInfo
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- CN100407413C CN100407413C CN200310100242XA CN200310100242A CN100407413C CN 100407413 C CN100407413 C CN 100407413C CN 200310100242X A CN200310100242X A CN 200310100242XA CN 200310100242 A CN200310100242 A CN 200310100242A CN 100407413 C CN100407413 C CN 100407413C
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1517—Multilayer substrate
- H01L2924/15172—Fan-out arrangement of the internal vias
- H01L2924/15173—Fan-out arrangement of the internal vias in a single layer of the multilayer substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19041—Component type being a capacitor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3025—Electromagnetic shielding
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09372—Pads and lands
- H05K2201/09381—Shape of non-curved single flat metallic pad, land or exposed part thereof; Shape of electrode of leadless component
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
- H05K2201/09772—Conductors directly under a component but not electrically connected to the component
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
- H05K2201/0989—Coating free areas, e.g. areas other than pads or lands free of solder resist
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10621—Components characterised by their electrical contacts
- H05K2201/10734—Ball grid array [BGA]; Bump grid array
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10954—Other details of electrical connections
- H05K2201/10977—Encapsulated connections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
- H05K3/284—Applying non-metallic protective coatings for encapsulating mounted components
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Wire Bonding (AREA)
Abstract
Description
Claims (8)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2002298980A JP2004134648A (ja) | 2002-10-11 | 2002-10-11 | 回路基板、ボール・グリッド・アレイの実装構造、及び電気光学装置、並びに電子機器 |
JP298980/2002 | 2002-10-11 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1497709A CN1497709A (zh) | 2004-05-19 |
CN100407413C true CN100407413C (zh) | 2008-07-30 |
Family
ID=32288248
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN200310100242XA Expired - Lifetime CN100407413C (zh) | 2002-10-11 | 2003-10-10 | 电路基板、焊球网格阵列的安装结构和电光装置 |
Country Status (5)
Country | Link |
---|---|
US (1) | US7268303B2 (zh) |
JP (1) | JP2004134648A (zh) |
KR (1) | KR100598276B1 (zh) |
CN (1) | CN100407413C (zh) |
TW (1) | TWI253033B (zh) |
Families Citing this family (38)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4239310B2 (ja) * | 1998-09-01 | 2009-03-18 | ソニー株式会社 | 半導体装置の製造方法 |
CN1278402C (zh) * | 2000-06-16 | 2006-10-04 | 松下电器产业株式会社 | 电子器件的封装方法及电子器件封装体 |
US20070105277A1 (en) | 2004-11-10 | 2007-05-10 | Stats Chippac Ltd. | Solder joint flip chip interconnection |
US8026128B2 (en) | 2004-11-10 | 2011-09-27 | Stats Chippac, Ltd. | Semiconductor device and method of self-confinement of conductive bump material during reflow without solder mask |
USRE47600E1 (en) | 2003-11-10 | 2019-09-10 | STATS ChipPAC Pte. Ltd. | Semiconductor device and method of forming electrical interconnect with stress relief void |
US8216930B2 (en) * | 2006-12-14 | 2012-07-10 | Stats Chippac, Ltd. | Solder joint flip chip interconnection having relief structure |
US8350384B2 (en) * | 2009-11-24 | 2013-01-08 | Stats Chippac, Ltd. | Semiconductor device and method of forming electrical interconnect with stress relief void |
WO2005048311A2 (en) | 2003-11-10 | 2005-05-26 | Chippac, Inc. | Bump-on-lead flip chip interconnection |
US7659633B2 (en) | 2004-11-10 | 2010-02-09 | Stats Chippac, Ltd. | Solder joint flip chip interconnection having relief structure |
US8574959B2 (en) | 2003-11-10 | 2013-11-05 | Stats Chippac, Ltd. | Semiconductor device and method of forming bump-on-lead interconnection |
US8129841B2 (en) | 2006-12-14 | 2012-03-06 | Stats Chippac, Ltd. | Solder joint flip chip interconnection |
US9029196B2 (en) | 2003-11-10 | 2015-05-12 | Stats Chippac, Ltd. | Semiconductor device and method of self-confinement of conductive bump material during reflow without solder mask |
US20060216860A1 (en) * | 2005-03-25 | 2006-09-28 | Stats Chippac, Ltd. | Flip chip interconnection having narrow interconnection sites on the substrate |
TWI293708B (en) * | 2004-11-26 | 2008-02-21 | Innolux Display Corp | Liquid crystal display and flexible printed circuit using thereof |
US8841779B2 (en) * | 2005-03-25 | 2014-09-23 | Stats Chippac, Ltd. | Semiconductor device and method of forming high routing density BOL BONL and BONP interconnect sites on substrate |
US20070018308A1 (en) * | 2005-04-27 | 2007-01-25 | Albert Schott | Electronic component and electronic configuration |
JP4797482B2 (ja) * | 2005-07-20 | 2011-10-19 | ブラザー工業株式会社 | 配線基板及び配線基板の製造方法 |
DE102005042083B4 (de) * | 2005-09-05 | 2011-12-01 | Infineon Technologies Ag | Chipkartenmodul und Verfahren zur Herstellung eines Chipkartenmoduls |
DE102006059127A1 (de) * | 2006-09-25 | 2008-03-27 | Osram Opto Semiconductors Gmbh | Verfahren zur Herstellung einer Anordnung optoelektronischer Bauelemente und Anordnung optoelektronischer Bauelemente |
JP2009141237A (ja) * | 2007-12-10 | 2009-06-25 | Panasonic Corp | 半導体装置及びその製造方法 |
US7791209B2 (en) * | 2008-03-12 | 2010-09-07 | International Business Machines Corporation | Method of underfill air vent for flipchip BGA |
US8022538B2 (en) * | 2008-11-17 | 2011-09-20 | Stats Chippac Ltd. | Base package system for integrated circuit package stacking and method of manufacture thereof |
US8659172B2 (en) * | 2008-12-31 | 2014-02-25 | Stats Chippac, Ltd. | Semiconductor device and method of confining conductive bump material with solder mask patch |
KR101054440B1 (ko) * | 2009-04-27 | 2011-08-05 | 삼성전기주식회사 | 전자 소자 패키지 및 그 제조 방법 |
US20110001230A1 (en) * | 2009-07-02 | 2011-01-06 | Conexant Systems, Inc. | Systems and Methods of Improved Heat Dissipation with Variable Pitch Grid Array Packaging |
CN101996974B (zh) * | 2009-08-28 | 2012-11-28 | 广达电脑股份有限公司 | 球栅阵列印刷电路板、其封装结构及其工艺 |
US20110278054A1 (en) * | 2010-05-14 | 2011-11-17 | I-Tseng Lee | Circuit board with notched conductor pads |
CN102184905A (zh) * | 2011-04-26 | 2011-09-14 | 哈尔滨工业大学 | 单金属间化合物微互连焊点结构 |
US8514386B2 (en) * | 2011-05-25 | 2013-08-20 | International Business Machines Corporation | Technique for verifying the microstructure of lead-free interconnects in semiconductor assemblies |
JP2013004798A (ja) * | 2011-06-17 | 2013-01-07 | Murata Mfg Co Ltd | 回路基板 |
CN105448862B (zh) * | 2014-09-29 | 2018-08-10 | 中芯国际集成电路制造(上海)有限公司 | 半导体结构及其制作方法 |
KR102373722B1 (ko) | 2015-12-30 | 2022-03-14 | 에이에스엠엘 네델란즈 비.브이. | 직접 기입 마스크리스 리소그래피를 위한 방법 및 장치 |
US20170245368A1 (en) * | 2016-02-18 | 2017-08-24 | Battelle Energy Alliance, Llc. | Electronic circuits comprising energetic substrates and related methods |
US10042397B2 (en) | 2016-02-18 | 2018-08-07 | Battelle Energy Alliance, Llc. | Energetic potting materials, electronic devices potted with the energetic potting materials, and related methods |
US10177107B2 (en) * | 2016-08-01 | 2019-01-08 | Xilinx, Inc. | Heterogeneous ball pattern package |
KR102704716B1 (ko) | 2020-02-26 | 2024-09-10 | 삼성전자주식회사 | 반도체 패키지 및 그의 제조 방법 |
CN111867245A (zh) * | 2020-06-05 | 2020-10-30 | 深圳市隆利科技股份有限公司 | 一种MiniLed基板、模组以及模组制作方法 |
CN112752398A (zh) * | 2020-11-24 | 2021-05-04 | 广州朗国电子科技有限公司 | 一种pcb板的芯片焊盘结构 |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07297526A (ja) * | 1994-04-20 | 1995-11-10 | Nec Niigata Ltd | プリント基板 |
JPH10290058A (ja) * | 1997-04-16 | 1998-10-27 | Seiko Epson Corp | プリント基板 |
JPH10294549A (ja) * | 1997-04-21 | 1998-11-04 | Nec Eng Ltd | プリント配線基板の製造方法及びプリント配線基板 |
US6431432B1 (en) * | 2000-06-15 | 2002-08-13 | Lsi Logic Corporation | Method for attaching solderballs by selectively oxidizing traces |
Family Cites Families (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2842704B2 (ja) | 1991-04-17 | 1999-01-06 | イビデン株式会社 | プリント配線板およびその製造方法 |
US5872051A (en) * | 1995-08-02 | 1999-02-16 | International Business Machines Corporation | Process for transferring material to semiconductor chip conductive pads using a transfer substrate |
JPH10163386A (ja) * | 1996-12-03 | 1998-06-19 | Toshiba Corp | 半導体装置、半導体パッケージおよび実装回路装置 |
US6059172A (en) * | 1997-06-25 | 2000-05-09 | International Business Machines Corporation | Method for establishing electrical communication between a first object having a solder ball and a second object |
US6050481A (en) * | 1997-06-25 | 2000-04-18 | International Business Machines Corporation | Method of making a high melting point solder ball coated with a low melting point solder |
JPH11163022A (ja) | 1997-11-28 | 1999-06-18 | Sony Corp | 半導体装置、その製造方法及び電子機器 |
JP2000031630A (ja) | 1998-07-15 | 2000-01-28 | Kokusai Electric Co Ltd | 半導体集積回路素子と配線基板との接続構造 |
TW434767B (en) * | 1998-09-05 | 2001-05-16 | Via Tech Inc | Package architecture of ball grid array integrated circuit device |
US6291899B1 (en) * | 1999-02-16 | 2001-09-18 | Micron Technology, Inc. | Method and apparatus for reducing BGA warpage caused by encapsulation |
JP2000298352A (ja) | 1999-04-14 | 2000-10-24 | Jsr Corp | 電子部品用材料およびその使用方法 |
US6204559B1 (en) * | 1999-11-22 | 2001-03-20 | Advanced Semiconductor Engineering, Inc. | Ball grid assembly type semiconductor package having improved chip edge support to prevent chip cracking |
US6388335B1 (en) | 1999-12-14 | 2002-05-14 | Atmel Corporation | Integrated circuit package formed at a wafer level |
JP3653460B2 (ja) | 2000-10-26 | 2005-05-25 | 三洋電機株式会社 | 半導体モジュールおよびその製造方法 |
US6570259B2 (en) * | 2001-03-22 | 2003-05-27 | International Business Machines Corporation | Apparatus to reduce thermal fatigue stress on flip chip solder connections |
US6622380B1 (en) * | 2002-02-12 | 2003-09-23 | Micron Technology, Inc. | Methods for manufacturing microelectronic devices and methods for mounting microelectronic packages to circuit boards |
US6906425B2 (en) * | 2002-03-05 | 2005-06-14 | Resolution Performance Products Llc | Attachment of surface mount devices to printed circuit boards using a thermoplastic adhesive |
-
2002
- 2002-10-11 JP JP2002298980A patent/JP2004134648A/ja active Pending
-
2003
- 2003-10-06 TW TW092127700A patent/TWI253033B/zh not_active IP Right Cessation
- 2003-10-09 US US10/682,780 patent/US7268303B2/en not_active Expired - Lifetime
- 2003-10-10 KR KR1020030070561A patent/KR100598276B1/ko active IP Right Grant
- 2003-10-10 CN CN200310100242XA patent/CN100407413C/zh not_active Expired - Lifetime
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07297526A (ja) * | 1994-04-20 | 1995-11-10 | Nec Niigata Ltd | プリント基板 |
JPH10290058A (ja) * | 1997-04-16 | 1998-10-27 | Seiko Epson Corp | プリント基板 |
JPH10294549A (ja) * | 1997-04-21 | 1998-11-04 | Nec Eng Ltd | プリント配線基板の製造方法及びプリント配線基板 |
US6431432B1 (en) * | 2000-06-15 | 2002-08-13 | Lsi Logic Corporation | Method for attaching solderballs by selectively oxidizing traces |
Also Published As
Publication number | Publication date |
---|---|
KR100598276B1 (ko) | 2006-07-07 |
US7268303B2 (en) | 2007-09-11 |
KR20040033264A (ko) | 2004-04-21 |
JP2004134648A (ja) | 2004-04-30 |
TW200424985A (en) | 2004-11-16 |
TWI253033B (en) | 2006-04-11 |
US20040108135A1 (en) | 2004-06-10 |
CN1497709A (zh) | 2004-05-19 |
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Effective date of registration: 20160531 Address after: 100015 Jiuxianqiao Road, Beijing, No. 10, No. Patentee after: BOE TECHNOLOGY GROUP Co.,Ltd. Address before: Hongkong, China Patentee before: BOE Technology (Hongkong) Co.,Ltd. Effective date of registration: 20160531 Address after: Hongkong, China Patentee after: BOE Technology (Hongkong) Co.,Ltd. Address before: Tokyo, Japan Patentee before: Seiko Epson Corp. |
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