CA2676639A1 - Decoding control with address transition detection in page erase function - Google Patents

Decoding control with address transition detection in page erase function Download PDF

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Publication number
CA2676639A1
CA2676639A1 CA002676639A CA2676639A CA2676639A1 CA 2676639 A1 CA2676639 A1 CA 2676639A1 CA 002676639 A CA002676639 A CA 002676639A CA 2676639 A CA2676639 A CA 2676639A CA 2676639 A1 CA2676639 A1 CA 2676639A1
Authority
CA
Canada
Prior art keywords
address
page
block
circuit
addresses
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
CA002676639A
Other languages
English (en)
French (fr)
Inventor
Hong Beom Pyeon
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mosaid Technologies Inc
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Publication of CA2676639A1 publication Critical patent/CA2676639A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/08—Address circuits; Decoders; Word-line control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/14—Circuits for erasing electrically, e.g. erase voltage switching circuits
    • G11C16/16—Circuits for erasing electrically, e.g. erase voltage switching circuits for erasing blocks, e.g. arrays, words, groups
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/10—Decoders
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/12—Group selection circuits, e.g. for memory block selection, chip selection, array selection
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/20—Address safety or protection circuits, i.e. arrangements for preventing unauthorized or accidental access

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Security & Cryptography (AREA)
  • Read Only Memory (AREA)
CA002676639A 2007-02-27 2008-02-08 Decoding control with address transition detection in page erase function Abandoned CA2676639A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US11/711,043 US7577059B2 (en) 2007-02-27 2007-02-27 Decoding control with address transition detection in page erase function
US11/711,043 2007-02-27
PCT/CA2008/000252 WO2008104049A1 (en) 2007-02-27 2008-02-08 Decoding control with address transition detection in page erase function

Publications (1)

Publication Number Publication Date
CA2676639A1 true CA2676639A1 (en) 2008-09-04

Family

ID=39715719

Family Applications (1)

Application Number Title Priority Date Filing Date
CA002676639A Abandoned CA2676639A1 (en) 2007-02-27 2008-02-08 Decoding control with address transition detection in page erase function

Country Status (9)

Country Link
US (2) US7577059B2 (enExample)
EP (1) EP2132748B1 (enExample)
JP (2) JP5291001B2 (enExample)
KR (2) KR20140019881A (enExample)
CN (1) CN101636790B (enExample)
CA (1) CA2676639A1 (enExample)
ES (1) ES2423283T3 (enExample)
TW (1) TWI456576B (enExample)
WO (1) WO2008104049A1 (enExample)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7577059B2 (en) * 2007-02-27 2009-08-18 Mosaid Technologies Incorporated Decoding control with address transition detection in page erase function
US8189390B2 (en) * 2009-03-05 2012-05-29 Mosaid Technologies Incorporated NAND flash architecture with multi-level row decoding
KR101636015B1 (ko) * 2010-02-11 2016-07-05 삼성전자주식회사 불휘발성 데이터 저장 장치, 그것의 프로그램 방법, 그리고 그것을 포함하는 메모리 시스템
KR101605911B1 (ko) 2010-07-09 2016-03-23 에스케이하이닉스 주식회사 불휘발성 메모리 소자 및 그 소거방법
TWI473114B (zh) * 2012-03-19 2015-02-11 Macronix Int Co Ltd 偵測位址轉變之電路與方法
US9047936B2 (en) * 2012-05-29 2015-06-02 Lsi Corporation Memory device having control circuitry for write tracking using feedback-based controller
KR20140007990A (ko) 2012-07-09 2014-01-21 삼성전자주식회사 불휘발성 램을 포함하는 사용자 장치 및 그것의 데이터 관리 방법
KR102025088B1 (ko) 2012-09-03 2019-09-25 삼성전자 주식회사 메모리 컨트롤러 및 상기 메모리 컨트롤러를 포함하는 전자장치
US20140071783A1 (en) * 2012-09-13 2014-03-13 Lsi Corporation Memory device with clock generation based on segmented address change detection
CN104217751A (zh) * 2013-06-03 2014-12-17 辉达公司 一种存储器
FR3006804A1 (fr) * 2013-06-05 2014-12-12 St Microelectronics Rousset Procede d’effacement par bloc d’une memoire de type eeprom effacable par page
EP3023990A1 (en) * 2014-11-20 2016-05-25 Nxp B.V. Multi independent page erase
CN108962319B (zh) * 2018-06-20 2021-03-26 芯天下技术股份有限公司 一种译码器控制电路及Nor Flash存储器的版图布局方法
CN110910923A (zh) * 2018-09-14 2020-03-24 北京兆易创新科技股份有限公司 一种字线译码方法及非易失存储器系统
US11250895B1 (en) * 2020-11-04 2022-02-15 Qualcomm Incorporated Systems and methods for driving wordlines using set-reset latches

Family Cites Families (48)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5440518A (en) * 1991-06-12 1995-08-08 Hazani; Emanuel Non-volatile memory circuits, architecture and methods
US5099297A (en) 1988-02-05 1992-03-24 Emanuel Hazani EEPROM cell structure and architecture with programming and erase terminals shared between several cells
GB8828817D0 (en) * 1988-12-09 1989-01-18 Int Computers Ltd Data processing apparatus
KR930000869B1 (ko) 1989-11-30 1993-02-08 삼성전자 주식회사 페이지 소거 가능한 플래쉬형 이이피롬 장치
JPH043394A (ja) * 1990-04-20 1992-01-08 Citizen Watch Co Ltd 半導体不揮発性記憶装置
US5256254A (en) * 1991-07-12 1993-10-26 Betz Paperchem, Inc. Methods of controlling deposition in a paper machine dryer section
US6230233B1 (en) 1991-09-13 2001-05-08 Sandisk Corporation Wear leveling techniques for flash EEPROM systems
US5270980A (en) 1991-10-28 1993-12-14 Eastman Kodak Company Sector erasable flash EEPROM
KR950000273B1 (ko) 1992-02-21 1995-01-12 삼성전자 주식회사 불휘발성 반도체 메모리장치 및 그 최적화 기입방법
KR960000616B1 (ko) 1993-01-13 1996-01-10 삼성전자주식회사 불휘발성 반도체 메모리 장치
US5365484A (en) 1993-08-23 1994-11-15 Advanced Micro Devices, Inc. Independent array grounds for flash EEPROM array with paged erase architechture
US5448529A (en) * 1994-11-17 1995-09-05 Alliance Semiconductor Corporation High speed and hierarchical address transition detection circuit
KR0142367B1 (ko) 1995-02-04 1998-07-15 김광호 열 리던던씨를 가지는 불휘발성 반도체 메모리의 소거 검증회로
US5835935A (en) 1995-09-13 1998-11-10 Lexar Media, Inc. Method of and architecture for controlling system data with automatic wear leveling in a semiconductor non-volatile mass storage memory
KR0169418B1 (ko) 1995-10-30 1999-02-01 김광호 페이지 소거시 데이터의 자기 보존회로를 가지는 불휘발성 반도체 메모리
US5805510A (en) 1996-10-18 1998-09-08 Kabushiki Kaisha Toshiba Data erase mechanism for nonvolatile memory of boot block type
US6308328B1 (en) * 1997-01-17 2001-10-23 Scientific-Atlanta, Inc. Usage statistics collection for a cable data delivery system
KR100272037B1 (ko) 1997-02-27 2000-12-01 니시무로 타이죠 불휘발성 반도체 기억 장치
US5847994A (en) 1997-09-08 1998-12-08 Mitsubishi Denki Kabushiki Kaisha Non-volatile semiconductor memory device having a back ground operation mode
US5937425A (en) 1997-10-16 1999-08-10 M-Systems Flash Disk Pioneers Ltd. Flash file system optimized for page-mode flash technologies
US5886923A (en) 1997-10-27 1999-03-23 Integrated Silicon Solution Inc. Local row decoder for sector-erase fowler-nordheim tunneling based flash memory
US6118705A (en) 1998-03-13 2000-09-12 Atmel Corporation Page mode erase in a flash memory array
US6359810B1 (en) 1998-03-13 2002-03-19 Atmel Corporation Page mode erase in a flash memory array
US6026021A (en) 1998-09-10 2000-02-15 Winbond Electronics Corp. America Semiconductor memory array partitioned into memory blocks and sub-blocks and method of addressing
US5995417A (en) 1998-10-20 1999-11-30 Advanced Micro Devices, Inc. Scheme for page erase and erase verify in a non-volatile memory array
KR100295598B1 (ko) 1999-05-03 2001-07-12 윤종용 반도체 메모리 장치 및 그 장치의 디코더
JP2000330967A (ja) * 1999-05-25 2000-11-30 Nec Corp 半導体記憶装置とその製造方法
US6111787A (en) 1999-10-19 2000-08-29 Advanced Micro Devices, Inc. Address transistion detect timing architecture for a simultaneous operation flash memory device
FR2816751A1 (fr) 2000-11-15 2002-05-17 St Microelectronics Sa Memoire flash effacable par page
KR100381957B1 (ko) * 2001-01-04 2003-04-26 삼성전자주식회사 비휘발성 반도체 메모리 장치 및 그것의 데이터 입/출력제어 방법
US6763424B2 (en) 2001-01-19 2004-07-13 Sandisk Corporation Partial block data programming and reading operations in a non-volatile memory
US6549467B2 (en) 2001-03-09 2003-04-15 Micron Technology, Inc. Non-volatile memory device with erase address register
US6732221B2 (en) 2001-06-01 2004-05-04 M-Systems Flash Disk Pioneers Ltd Wear leveling of static areas in flash memory
US6732116B2 (en) 2001-06-21 2004-05-04 International Business Machines Corporation Method and system for dynamically managing data structures to optimize computer network performance
JP2003151285A (ja) * 2001-11-08 2003-05-23 Fujitsu Ltd 半導体メモリ
KR100463197B1 (ko) 2001-12-24 2004-12-23 삼성전자주식회사 멀티-페이지 프로그램 동작, 멀티-페이지 읽기 동작,그리고 멀티-블록 소거 동작을 갖는 낸드 플래시 메모리장치
US6958940B2 (en) * 2002-02-28 2005-10-25 Renesas Technology Corp. Nonvolatile semiconductor memory device capable of realizing optimized erasing operation in a memory array
KR100482766B1 (ko) * 2002-07-16 2005-04-14 주식회사 하이닉스반도체 메모리 소자의 컬럼 선택 제어 신호 발생 회로
JP4270832B2 (ja) 2002-09-26 2009-06-03 株式会社東芝 不揮発性半導体メモリ
ITMI20022240A1 (it) 2002-10-22 2004-04-23 Atmel Corp Architettura di memoria flash con cancellazione di modo
JP4256175B2 (ja) * 2003-02-04 2009-04-22 株式会社東芝 不揮発性半導体メモリ
US6940759B2 (en) * 2003-10-14 2005-09-06 Atmel Corporation Group erasing system for flash array with multiple sectors
KR100705221B1 (ko) 2004-09-03 2007-04-06 에스티마이크로일렉트로닉스 엔.브이. 플래쉬 메모리 소자 및 이를 이용한 플래쉬 메모리 셀의소거 방법
JP2006107326A (ja) * 2004-10-08 2006-04-20 Oki Electric Ind Co Ltd 半導体集積回路
JP2006164408A (ja) 2004-12-08 2006-06-22 Toshiba Corp 不揮発性半導体記憶装置及びそのデータ消去方法。
KR100672125B1 (ko) 2005-03-15 2007-01-19 주식회사 하이닉스반도체 사전 소거 검증을 위한 페이지 버퍼를 갖는 불휘발성 메모리 장치
US20060256623A1 (en) 2005-05-12 2006-11-16 Micron Technology, Inc. Partial string erase scheme in a flash memory device
US7577059B2 (en) 2007-02-27 2009-08-18 Mosaid Technologies Incorporated Decoding control with address transition detection in page erase function

Also Published As

Publication number Publication date
EP2132748A4 (en) 2010-04-07
US7577059B2 (en) 2009-08-18
TWI456576B (zh) 2014-10-11
US7778107B2 (en) 2010-08-17
EP2132748A1 (en) 2009-12-16
EP2132748B1 (en) 2013-05-22
JP5291001B2 (ja) 2013-09-18
US20080205164A1 (en) 2008-08-28
WO2008104049A1 (en) 2008-09-04
JP5544442B2 (ja) 2014-07-09
ES2423283T3 (es) 2013-09-19
KR101469295B1 (ko) 2014-12-04
JP2010519674A (ja) 2010-06-03
US20090185424A1 (en) 2009-07-23
KR20140019881A (ko) 2014-02-17
KR20090125142A (ko) 2009-12-03
TW200905686A (en) 2009-02-01
CN101636790B (zh) 2013-04-03
CN101636790A (zh) 2010-01-27
JP2013168211A (ja) 2013-08-29

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Legal Events

Date Code Title Description
EEER Examination request

Effective date: 20130207

FZDE Discontinued

Effective date: 20170208