CA2448338A1 - High performance flipchip package that incorporates heat removal with minimal thermal mismatch - Google Patents

High performance flipchip package that incorporates heat removal with minimal thermal mismatch Download PDF

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Publication number
CA2448338A1
CA2448338A1 CA002448338A CA2448338A CA2448338A1 CA 2448338 A1 CA2448338 A1 CA 2448338A1 CA 002448338 A CA002448338 A CA 002448338A CA 2448338 A CA2448338 A CA 2448338A CA 2448338 A1 CA2448338 A1 CA 2448338A1
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CA
Canada
Prior art keywords
integrated circuit
circuit device
substrate
contacts
package
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
CA002448338A
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English (en)
French (fr)
Inventor
Abu K. Eghan
Lan H. Hoang
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Xilinx Inc
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Publication of CA2448338A1 publication Critical patent/CA2448338A1/en
Abandoned legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/42—Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
    • H01L23/433—Auxiliary members in containers characterised by their shape, e.g. pistons
    • H01L23/4334—Auxiliary members in encapsulations
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • H01L23/053—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
    • H01L23/055—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body the leads having a passage through the base
    • H—ELECTRICITY
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    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H01L23/13—Mountings, e.g. non-detachable insulating substrates characterised by the shape
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    • H01L23/00—Details of semiconductor or other solid state devices
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    • H01L23/18—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device
    • H01L23/24—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device solid or gel at the normal operating temperature of the device
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    • H01L23/00—Details of semiconductor or other solid state devices
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    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49822—Multilayer substrates
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
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    • H01L2224/161—Disposition
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    • H01L2224/16227—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
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    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
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    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
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    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73253—Bump and layer connectors
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    • H01L23/10—Containers; Seals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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    • H01L2924/01—Chemical elements
    • H01L2924/01057—Lanthanum [La]
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    • H01L2924/01079—Gold [Au]
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    • H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
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    • H01L2924/09701—Low temperature co-fired ceramic [LTCC]
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    • H01L2924/102—Material of the semiconductor or solid state bodies
    • H01L2924/1025—Semiconducting materials
    • H01L2924/10251—Elemental semiconductors, i.e. Group IV
    • H01L2924/10253—Silicon [Si]
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    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
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    • H01L2924/156—Material
    • H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides
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    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H01L2924/1815—Shape
    • H01L2924/1816—Exposing the passive side of the semiconductor or solid-state body
    • H01L2924/18161—Exposing the passive side of the semiconductor or solid-state body of a flip chip
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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/35—Mechanical effects
    • H01L2924/351—Thermal stress
    • H01L2924/3511—Warping

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Dispersion Chemistry (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
CA002448338A 2001-06-11 2002-05-30 High performance flipchip package that incorporates heat removal with minimal thermal mismatch Abandoned CA2448338A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/879,875 2001-06-11
US09/879,875 US7061102B2 (en) 2001-06-11 2001-06-11 High performance flipchip package that incorporates heat removal with minimal thermal mismatch
PCT/US2002/017531 WO2002101827A2 (en) 2001-06-11 2002-05-30 High performance flipchip package that incorporates heat removal with minimal thermal mismatch

Publications (1)

Publication Number Publication Date
CA2448338A1 true CA2448338A1 (en) 2002-12-19

Family

ID=25375061

Family Applications (1)

Application Number Title Priority Date Filing Date
CA002448338A Abandoned CA2448338A1 (en) 2001-06-11 2002-05-30 High performance flipchip package that incorporates heat removal with minimal thermal mismatch

Country Status (5)

Country Link
US (1) US7061102B2 (enExample)
EP (1) EP1396020A2 (enExample)
JP (1) JP2004523128A (enExample)
CA (1) CA2448338A1 (enExample)
WO (1) WO2002101827A2 (enExample)

Families Citing this family (67)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1346411A2 (en) 2000-12-01 2003-09-24 Broadcom Corporation Thermally and electrically enhanced ball grid array packaging
US7161239B2 (en) 2000-12-22 2007-01-09 Broadcom Corporation Ball grid array package enhanced with a thermal and electrical connector
US7132744B2 (en) 2000-12-22 2006-11-07 Broadcom Corporation Enhanced die-up ball grid array packages and method for making the same
US6906414B2 (en) 2000-12-22 2005-06-14 Broadcom Corporation Ball grid array package with patterned stiffener layer
US20020079572A1 (en) 2000-12-22 2002-06-27 Khan Reza-Ur Rahman Enhanced die-up ball grid array and method for making the same
US6853070B2 (en) 2001-02-15 2005-02-08 Broadcom Corporation Die-down ball grid array package with die-attached heat spreader and method for making the same
US7259448B2 (en) * 2001-05-07 2007-08-21 Broadcom Corporation Die-up ball grid array package with a heat spreader and method for making the same
US6879039B2 (en) * 2001-12-18 2005-04-12 Broadcom Corporation Ball grid array package substrates and method of making the same
US6853202B1 (en) * 2002-01-23 2005-02-08 Cypress Semiconductor Corporation Non-stick detection method and mechanism for array molded laminate packages
US6825108B2 (en) 2002-02-01 2004-11-30 Broadcom Corporation Ball grid array package fabrication with IC die support structures
US6861750B2 (en) 2002-02-01 2005-03-01 Broadcom Corporation Ball grid array package with multiple interposers
US7550845B2 (en) * 2002-02-01 2009-06-23 Broadcom Corporation Ball grid array package with separated stiffener layer
US6876553B2 (en) 2002-03-21 2005-04-05 Broadcom Corporation Enhanced die-up ball grid array package with two substrates
US7196415B2 (en) 2002-03-22 2007-03-27 Broadcom Corporation Low voltage drop and high thermal performance ball grid array package
WO2004070790A2 (en) * 2003-02-03 2004-08-19 United Test And Assembly Center Ltd. Molded high density electronic packaging structure for high performance applications
US7262077B2 (en) * 2003-09-30 2007-08-28 Intel Corporation Capillary underfill and mold encapsulation method and apparatus
US7303941B1 (en) * 2004-03-12 2007-12-04 Cisco Technology, Inc. Methods and apparatus for providing a power signal to an area array package
US7208342B2 (en) * 2004-05-27 2007-04-24 Intel Corporation Package warpage control
US7411281B2 (en) 2004-06-21 2008-08-12 Broadcom Corporation Integrated circuit device package having both wire bond and flip-chip interconnections and method of making the same
US7432586B2 (en) * 2004-06-21 2008-10-07 Broadcom Corporation Apparatus and method for thermal and electromagnetic interference (EMI) shielding enhancement in die-up array packages
US7482686B2 (en) 2004-06-21 2009-01-27 Braodcom Corporation Multipiece apparatus for thermal and electromagnetic interference (EMI) shielding enhancement in die-up array packages and method of making the same
US7501702B2 (en) * 2004-06-24 2009-03-10 Fairchild Semiconductor Corporation Integrated transistor module and method of fabricating same
US7786591B2 (en) 2004-09-29 2010-08-31 Broadcom Corporation Die down ball grid array package
US7939934B2 (en) * 2005-03-16 2011-05-10 Tessera, Inc. Microelectronic packages and methods therefor
US7102377B1 (en) * 2005-06-23 2006-09-05 International Business Machines Corporation Packaging reliability superchips
CN100444357C (zh) * 2005-07-18 2008-12-17 台达电子工业股份有限公司 芯片封装结构
US7582951B2 (en) * 2005-10-20 2009-09-01 Broadcom Corporation Methods and apparatus for improved thermal performance and electromagnetic interference (EMI) shielding in leadframe integrated circuit (IC) packages
US20070108595A1 (en) * 2005-11-16 2007-05-17 Ati Technologies Inc. Semiconductor device with integrated heat spreader
US7714453B2 (en) * 2006-05-12 2010-05-11 Broadcom Corporation Interconnect structure and formation for package stacking of molded plastic area array package
US8183680B2 (en) 2006-05-16 2012-05-22 Broadcom Corporation No-lead IC packages having integrated heat spreader for electromagnetic interference (EMI) shielding and thermal enhancement
US7808087B2 (en) 2006-06-01 2010-10-05 Broadcom Corporation Leadframe IC packages having top and bottom integrated heat spreaders
US8581381B2 (en) 2006-06-20 2013-11-12 Broadcom Corporation Integrated circuit (IC) package stacking and IC packages formed by same
JP5107539B2 (ja) * 2006-08-03 2012-12-26 新光電気工業株式会社 半導体装置および半導体装置の製造方法
US8143720B2 (en) * 2007-02-06 2012-03-27 Rambus Inc. Semiconductor module with micro-buffers
US8183687B2 (en) * 2007-02-16 2012-05-22 Broadcom Corporation Interposer for die stacking in semiconductor packages and the method of making the same
US7872335B2 (en) * 2007-06-08 2011-01-18 Broadcom Corporation Lead frame-BGA package with enhanced thermal performance and I/O counts
US7795724B2 (en) * 2007-08-30 2010-09-14 International Business Machines Corporation Sandwiched organic LGA structure
US20090218703A1 (en) * 2008-02-29 2009-09-03 Soo Gil Park Lamination Tape for Reducing Chip Warpage and Semiconductor Device Containing Such Tape
US20100014251A1 (en) * 2008-07-15 2010-01-21 Advanced Micro Devices, Inc. Multidimensional Thermal Management Device for an Integrated Circuit Chip
US9847268B2 (en) * 2008-11-21 2017-12-19 Advanpack Solutions Pte. Ltd. Semiconductor package and manufacturing method thereof
JP2011049311A (ja) * 2009-08-26 2011-03-10 Shinko Electric Ind Co Ltd 半導体パッケージ及び製造方法
US8338943B2 (en) * 2010-08-31 2012-12-25 Stmicroelectronics Asia Pacific Pte Ltd. Semiconductor package with thermal heat spreader
WO2012040063A1 (en) * 2010-09-23 2012-03-29 Qualcomm Mems Technologies, Inc. Integrated passives and power amplifier
US20120188721A1 (en) * 2011-01-21 2012-07-26 Nxp B.V. Non-metal stiffener ring for fcbga
US20130308274A1 (en) * 2012-05-21 2013-11-21 Triquint Semiconductor, Inc. Thermal spreader having graduated thermal expansion parameters
US10115671B2 (en) 2012-08-03 2018-10-30 Snaptrack, Inc. Incorporation of passives and fine pitch through via for package on package
US9293426B2 (en) 2012-09-28 2016-03-22 Intel Corporation Land side and die side cavities to reduce package Z-height
US9355997B2 (en) 2014-03-12 2016-05-31 Invensas Corporation Integrated circuit assemblies with reinforcement frames, and methods of manufacture
US20150262902A1 (en) 2014-03-12 2015-09-17 Invensas Corporation Integrated circuits protected by substrates with cavities, and methods of manufacture
US9165793B1 (en) 2014-05-02 2015-10-20 Invensas Corporation Making electrical components in handle wafers of integrated circuit packages
US9741649B2 (en) 2014-06-04 2017-08-22 Invensas Corporation Integrated interposer solutions for 2D and 3D IC packaging
US9412806B2 (en) 2014-06-13 2016-08-09 Invensas Corporation Making multilayer 3D capacitors using arrays of upstanding rods or ridges
US9252127B1 (en) 2014-07-10 2016-02-02 Invensas Corporation Microelectronic assemblies with integrated circuits and interposers with cavities, and methods of manufacture
WO2016089831A1 (en) 2014-12-02 2016-06-09 Invensas Corporation Interposers with circuit modules encapsulated by moldable material in a cavity, and methods of fabrication
US9460980B2 (en) * 2015-02-18 2016-10-04 Qualcomm Incorporated Systems, apparatus, and methods for heat dissipation
US9478504B1 (en) 2015-06-19 2016-10-25 Invensas Corporation Microelectronic assemblies with cavities, and methods of fabrication
US10224269B2 (en) * 2015-12-17 2019-03-05 International Business Machines Corporation Element place on laminates
JP2017113077A (ja) * 2015-12-21 2017-06-29 ソニー・オリンパスメディカルソリューションズ株式会社 内視鏡装置
US20170287838A1 (en) 2016-04-02 2017-10-05 Intel Corporation Electrical interconnect bridge
WO2018004686A1 (en) * 2016-07-01 2018-01-04 Intel Corporation Device, method and system for providing recessed interconnect structures of a substrate
US11289412B2 (en) 2019-03-13 2022-03-29 Texas Instruments Incorporated Package substrate with partially recessed capacitor
CN110211884A (zh) * 2019-05-25 2019-09-06 西南电子技术研究所（中国电子科技集团公司第十研究所） 高密度三维叠层自对准集成封装方法
US11152315B2 (en) * 2019-10-15 2021-10-19 Advanced Semiconductor Engineering, Inc. Electronic device package and method for manufacturing the same
CN111341753A (zh) * 2020-02-26 2020-06-26 通富微电子股份有限公司 一种埋入式封装器件
KR102875868B1 (ko) 2020-09-03 2025-10-23 삼성전자주식회사 반도체 패키지
US20220278017A1 (en) * 2021-02-26 2022-09-01 Infineon Technologies Austria Ag Power Electronics Carrier
CN115425938A (zh) * 2022-09-28 2022-12-02 天通瑞宏科技有限公司 高可靠性csp封装方法和声表面波滤波器

Family Cites Families (43)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5954249A (ja) * 1982-09-22 1984-03-29 Fujitsu Ltd 半導体装置
JPH01251645A (ja) * 1988-03-31 1989-10-06 Nec Corp 半導体装置のパッケージ
EP0359513A3 (en) 1988-09-14 1990-12-19 Hitachi, Ltd. Semiconductor chip carrier and method of making it
US5399898A (en) 1992-07-17 1995-03-21 Lsi Logic Corporation Multi-chip semiconductor arrangements using flip chip dies
US5299730A (en) 1989-08-28 1994-04-05 Lsi Logic Corporation Method and apparatus for isolation of flux materials in flip-chip manufacturing
JPH07109867B2 (ja) * 1991-04-15 1995-11-22 インターナショナル・ビジネス・マシーンズ・コーポレイション 半導体チツプの冷却構造
EP0563873B1 (en) * 1992-04-03 1998-06-03 Matsushita Electric Industrial Co., Ltd. High frequency ceramic multi-layer substrate
JPH05315480A (ja) * 1992-05-11 1993-11-26 Oki Electric Ind Co Ltd 放熱器
US5353193A (en) 1993-02-26 1994-10-04 Lsi Logic Corporation High power dissipating packages with matched heatspreader heatsink assemblies
JPH06275739A (ja) * 1993-03-23 1994-09-30 Sony Corp セラミック製アダプター及びセラミックパッケージ
US5541449A (en) * 1994-03-11 1996-07-30 The Panda Project Semiconductor chip carrier affording a high-density external interface
JPH0831966A (ja) * 1994-07-15 1996-02-02 Hitachi Ltd 半導体集積回路装置
US5608261A (en) * 1994-12-28 1997-03-04 Intel Corporation High performance and high capacitance package with improved thermal dissipation
JP3210835B2 (ja) 1995-06-07 2001-09-25 京セラ株式会社 半導体素子収納用パッケージ
FR2735648B1 (fr) * 1995-06-13 1997-07-11 Bull Sa Procede de refroidissement d'un circuit integre monte dans un boitier
US5637920A (en) 1995-10-04 1997-06-10 Lsi Logic Corporation High contact density ball grid array package for flip-chips
US5674785A (en) * 1995-11-27 1997-10-07 Micron Technology, Inc. Method of producing a single piece package for semiconductor die
US5723369A (en) * 1996-03-14 1998-03-03 Lsi Logic Corporation Method of flip chip assembly
US5700723A (en) 1996-05-15 1997-12-23 Lsi Logic Corporation Method of packaging an integrated circuit
JP2755252B2 (ja) 1996-05-30 1998-05-20 日本電気株式会社 半導体装置用パッケージ及び半導体装置
US5726079A (en) 1996-06-19 1998-03-10 International Business Machines Corporation Thermally enhanced flip chip package and method of forming
JP3305574B2 (ja) * 1996-06-24 2002-07-22 京セラ株式会社 配線基板
JP2828053B2 (ja) 1996-08-15 1998-11-25 日本電気株式会社 半導体装置
JP2828055B2 (ja) 1996-08-19 1998-11-25 日本電気株式会社 フリップチップの製造方法
JP3420450B2 (ja) * 1996-11-29 2003-06-23 京セラ株式会社 半導体素子収納用パッケージ
US6020221A (en) * 1996-12-12 2000-02-01 Lsi Logic Corporation Process for manufacturing a semiconductor device having a stiffener member
US5900675A (en) 1997-04-21 1999-05-04 International Business Machines Corporation Organic controlled collapse chip connector (C4) ball grid array (BGA) chip carrier with dual thermal expansion rates
US6020637A (en) 1997-05-07 2000-02-01 Signetics Kp Co., Ltd. Ball grid array semiconductor package
JP3816636B2 (ja) 1997-07-07 2006-08-30 ローム株式会社 Ｂｇａ型半導体装置
US6272020B1 (en) * 1997-10-16 2001-08-07 Hitachi, Ltd. Structure for mounting a semiconductor device and a capacitor device on a substrate
JPH11121667A (ja) * 1997-10-20 1999-04-30 Fujitsu Ltd ヒートパイプ式冷却装置
US6201301B1 (en) * 1998-01-21 2001-03-13 Lsi Logic Corporation Low cost thermally enhanced flip chip BGA
US5939782A (en) * 1998-03-03 1999-08-17 Sun Microsystems, Inc. Package construction for integrated circuit chip with bypass capacitor
US6154370A (en) 1998-07-21 2000-11-28 Lucent Technologies Inc. Recessed flip-chip package
US6133634A (en) 1998-08-05 2000-10-17 Fairchild Semiconductor Corporation High performance flip chip package
US6084297A (en) 1998-09-03 2000-07-04 Micron Technology, Inc. Cavity ball grid array apparatus
JP3830296B2 (ja) * 1999-02-01 2006-10-04 京セラ株式会社 高熱膨張ガラスセラミック焼結体の製造方法
JP2001156197A (ja) * 1999-11-30 2001-06-08 Nec Kansai Ltd 絶縁パッケージおよび電子素子封止構体
JP3407694B2 (ja) 1999-06-17 2003-05-19 株式会社村田製作所 高周波多層回路部品
JP2001044243A (ja) 1999-07-29 2001-02-16 Tdk Corp フリップチップ実装構造
US6171988B1 (en) * 1999-07-30 2001-01-09 International Business Machines Corporation Low loss glass ceramic composition with modifiable dielectric constant
US6368514B1 (en) * 1999-09-01 2002-04-09 Luminous Intent, Inc. Method and apparatus for batch processed capacitors using masking techniques
JP2001144215A (ja) * 1999-11-17 2001-05-25 Nippon Avionics Co Ltd フリップチップ実装体

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JP2004523128A (ja) 2004-07-29
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WO2002101827A2 (en) 2002-12-19
US20020185717A1 (en) 2002-12-12

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