ATE64229T1 - Integrierte schaltung eines in komplementaerer schaltungstechnik aufgebauten dynamischen halbleiterspeichers. - Google Patents

Integrierte schaltung eines in komplementaerer schaltungstechnik aufgebauten dynamischen halbleiterspeichers.

Info

Publication number
ATE64229T1
ATE64229T1 AT85108682T AT85108682T ATE64229T1 AT E64229 T1 ATE64229 T1 AT E64229T1 AT 85108682 T AT85108682 T AT 85108682T AT 85108682 T AT85108682 T AT 85108682T AT E64229 T1 ATE64229 T1 AT E64229T1
Authority
AT
Austria
Prior art keywords
switching transistor
integrated circuit
dynamic semiconductor
semiconductor memory
controlled
Prior art date
Application number
AT85108682T
Other languages
German (de)
English (en)
Inventor
Alfred Dr-Ing Schuetz
Wolfgang Dr-Ing Mueller
Ewald Dr-Ing Soutschek
Original Assignee
Siemens Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Ag filed Critical Siemens Ag
Application granted granted Critical
Publication of ATE64229T1 publication Critical patent/ATE64229T1/de

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/408—Address circuits
    • G11C11/4087—Address decoders, e.g. bit - or word line decoders; Multiple line decoders
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/408—Address circuits
    • G11C11/4085—Word line control circuits, e.g. word line drivers, - boosters, - pull-up, - pull-down, - precharge

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
  • Semiconductor Memories (AREA)
AT85108682T 1984-07-25 1985-07-11 Integrierte schaltung eines in komplementaerer schaltungstechnik aufgebauten dynamischen halbleiterspeichers. ATE64229T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE19843427454 DE3427454A1 (de) 1984-07-25 1984-07-25 Integrierte schaltung fuer einen in komplementaerer schaltungstechnik aufgebauten dynamischen halbleiterspeicher
EP85108682A EP0169452B1 (de) 1984-07-25 1985-07-11 Integrierte Schaltung eines in komplementärer Schaltungstechnik aufgebauten dynamischen Halbleiterspeichers

Publications (1)

Publication Number Publication Date
ATE64229T1 true ATE64229T1 (de) 1991-06-15

Family

ID=6241554

Family Applications (1)

Application Number Title Priority Date Filing Date
AT85108682T ATE64229T1 (de) 1984-07-25 1985-07-11 Integrierte schaltung eines in komplementaerer schaltungstechnik aufgebauten dynamischen halbleiterspeichers.

Country Status (6)

Country Link
US (1) US4763301A (cs)
EP (1) EP0169452B1 (cs)
JP (1) JPS6139993A (cs)
AT (1) ATE64229T1 (cs)
DE (2) DE3427454A1 (cs)
HK (1) HK28393A (cs)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5051959A (en) * 1985-08-14 1991-09-24 Fujitsu Limited Complementary semiconductor memory device including cell access transistor and word line driving transistor having channels of different conductivity type
JPS6238592A (ja) * 1985-08-14 1987-02-19 Fujitsu Ltd 相補型メモリの行選択線駆動回路
US5185721A (en) * 1988-10-31 1993-02-09 Texas Instruments Incorporated Charge-retaining signal boosting circuit and method

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2443490A1 (de) * 1974-09-11 1976-03-25 Siemens Ag Schalter aus mos-transistoren
JPS51130154A (en) * 1975-05-07 1976-11-12 Nec Corp Flip-flop circuit
DE2641693C2 (de) * 1976-09-16 1978-11-16 Siemens Ag, 1000 Berlin Und 8000 Muenchen Decodierschaltung mit MOS-Transistoren
JPS5493335A (en) * 1977-12-30 1979-07-24 Fujitsu Ltd Decoder circuit
JPS5647988A (en) * 1979-09-20 1981-04-30 Nec Corp Semiconductor memory device
JPS57196627A (en) * 1981-05-29 1982-12-02 Hitachi Ltd Electronic circuit device
JPS5954096A (ja) * 1982-09-22 1984-03-28 Hitachi Ltd ダイナミツク型ｍｏｓｒａｍ
US4618784A (en) * 1985-01-28 1986-10-21 International Business Machines Corporation High-performance, high-density CMOS decoder/driver circuit

Also Published As

Publication number Publication date
JPH0585992B2 (cs) 1993-12-09
EP0169452B1 (de) 1991-06-05
EP0169452A3 (en) 1988-01-13
JPS6139993A (ja) 1986-02-26
DE3427454A1 (de) 1986-01-30
US4763301A (en) 1988-08-09
EP0169452A2 (de) 1986-01-29
HK28393A (en) 1993-04-02
DE3583075D1 (de) 1991-07-11

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Legal Events

Date Code Title Description
REN Ceased due to non-payment of the annual fee