KR930006728A - 반도체 기억장치 - Google Patents

반도체 기억장치 Download PDF

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Publication number
KR930006728A
KR930006728A KR1019910015687A KR910015687A KR930006728A KR 930006728 A KR930006728 A KR 930006728A KR 1019910015687 A KR1019910015687 A KR 1019910015687A KR 910015687 A KR910015687 A KR 910015687A KR 930006728 A KR930006728 A KR 930006728A
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KR
South Korea
Prior art keywords
word line
memory cell
potential
cell group
type mos
Prior art date
Application number
KR1019910015687A
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English (en)
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KR950010621B1 (ko
Inventor
마사키 오기하라
Original Assignee
아오이 죠이치
가부시키가이샤 도시바
다케다이 마사다카
도시바 마이크로 일렉트로닉스 가부시키가이샤
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Application filed by 아오이 죠이치, 가부시키가이샤 도시바, 다케다이 마사다카, 도시바 마이크로 일렉트로닉스 가부시키가이샤 filed Critical 아오이 죠이치
Publication of KR930006728A publication Critical patent/KR930006728A/ko
Application granted granted Critical
Publication of KR950010621B1 publication Critical patent/KR950010621B1/ko

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Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/08—Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4074—Power supply or voltage generation circuits, e.g. bias voltage generators, substrate voltage generators, back-up power, power control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/408—Address circuits
    • G11C11/4085—Word line control circuits, e.g. word line drivers, - boosters, - pull-up, - pull-down, - precharge
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/408—Address circuits
    • G11C11/4087—Address decoders, e.g. bit - or word line decoders; Multiple line decoders

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
  • Semiconductor Memories (AREA)

Abstract

본 발명은 반도체 기억장치에 관한 것으로 특히 DRAM에 관한 것인바, 워드선의 선택이 고속이고 또 게이트산화막의 장기적 신뢰성을 손상시키지 않는 워드선구동회로방식의 반도체기억장치를 제공함에 그 목적이 있다.
이러한 본 발명에 따른 반도체 기억장치에서는, 워드선에 전위를 전달하는 워드선구동회로의 MOS트랜지스터의 소스ㆍ드레인간 또는 소스ㆍ게이트간의 전위차를, 메모리셀군이 선택되어 있지 않을 때에는 메모리 셀군이 선택되어 있을 때 보다도 작게 함으로써 게이트 산화막의 열화를 방지할 수가 있게 되므로, 워드선의 선택이 고속이고 또 게이트 산화막의 장기적 신뢰성을 손상시키지 않는 워드선 구동회로방식을 갖는 반도체 장치를 제공할 수가 있게 된다.

Description

반도체 기억장치
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명의 제1실시예에 따른 방식을 나타낸 회로도,
제2도 및 제3도는 제1도에 도시한 방식의 동작파형을 나타낸 도면,
제4도는 본 발명의 제2실시예에 따른 방식을 나타낸 회로도.

Claims (2)

  1. N형 MOS트랜지스터(17, 47)와 N형 MOS캐패시터(16, 46)로 이루어진 메모리셀 (10, 40)을 적어도 1개 포함하고 있는 메모리셀군과, 이 메모리셀군에 접속되는 워드선 (13, 43), 이 워드선(13, 43)으로 전위를 전달하는 P형 MOS트랜지스터 (19, 20; 49,50)를 포함하는 워드선 구동회로(11, 41)및, 상기 메모리셀군이 선택되어 있지 않을 때에는 정진원전위 이하인 제1전위를 상기 워드선구동회로(11, 41)에 공급하는 한편 상기 메모리셀군이 선택되어 있을 때에는 정전원전위보다도 높은 제2전위를 상기 워드선 구동회로(11, 41)에 공급하는 워드선전위 제어수단(15, 45)을 구비하여 구성된 것을 특징으로 하는 반도체 기억장치.
  2. P형 MOS 트랜지스터와 P형 MOS 캐패시터로 이루어진 메모리셀을 적어도 1개 포함하고 있는 메모리셀군과, 이 메모리셀군에 접속되는 워드선, 이 워드선으로 전위를 전달하는 N형 MOS트랜지스터를 포함하는 워드선구동회로 및, 상기 메모리셀군이 선택되어 있지 않을 때에는 접지전위 이상인 제1전위를 상기 워드선 구동회로에 공급하는 한편 상기 메로리셀군이 선택되어 있을 때에는 접지전위보다 낮은 제2전위를 상기 워드선 구동회로에 공급하는 워드선전위 제어수단을 구비하여 구성된 것을 특징으로 하는 반도체 기억장치.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019910015687A 1990-09-12 1991-09-09 반도체 기억장치 KR950010621B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP02-239893 1990-09-12
JP2239893A JPH07111826B2 (ja) 1990-09-12 1990-09-12 半導体記憶装置

Publications (2)

Publication Number Publication Date
KR930006728A true KR930006728A (ko) 1993-04-21
KR950010621B1 KR950010621B1 (ko) 1995-09-20

Family

ID=17051430

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019910015687A KR950010621B1 (ko) 1990-09-12 1991-09-09 반도체 기억장치

Country Status (5)

Country Link
US (3) US5335205A (ko)
EP (1) EP0475407B1 (ko)
JP (1) JPH07111826B2 (ko)
KR (1) KR950010621B1 (ko)
DE (1) DE69129138T2 (ko)

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US5668485A (en) * 1992-05-21 1997-09-16 Texas Instruments Incorporated Row decoder with level translator
US5452251A (en) 1992-12-03 1995-09-19 Fujitsu Limited Semiconductor memory device for selecting and deselecting blocks of word lines
JP2967021B2 (ja) * 1993-01-25 1999-10-25 株式会社東芝 半導体メモリ装置
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JP3562725B2 (ja) * 1993-12-24 2004-09-08 川崎マイクロエレクトロニクス株式会社 出力バッファ回路、および入出力バッファ回路
JP3090833B2 (ja) * 1993-12-28 2000-09-25 株式会社東芝 半導体記憶装置
JP3337564B2 (ja) * 1994-09-16 2002-10-21 松下電器産業株式会社 半導体記憶装置
JPH08235877A (ja) * 1995-02-24 1996-09-13 Toshiba Corp 不揮発性半導体メモリ装置
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JPH08274612A (ja) * 1995-03-31 1996-10-18 Nec Corp 半導体装置
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JP6125850B2 (ja) * 2012-02-09 2017-05-10 株式会社半導体エネルギー研究所 半導体装置及び半導体装置の作製方法
JP6333028B2 (ja) * 2013-04-19 2018-05-30 株式会社半導体エネルギー研究所 記憶装置及び半導体装置
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Also Published As

Publication number Publication date
EP0475407A3 (en) 1993-03-17
DE69129138T2 (de) 1998-08-20
JPH07111826B2 (ja) 1995-11-29
US5550504A (en) 1996-08-27
US5619162A (en) 1997-04-08
EP0475407B1 (en) 1998-03-25
EP0475407A2 (en) 1992-03-18
US5335205A (en) 1994-08-02
KR950010621B1 (ko) 1995-09-20
JPH04121894A (ja) 1992-04-22
DE69129138D1 (de) 1998-04-30

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