ATE422093T1 - Test von rambusspeicherbausteinen - Google Patents

Test von rambusspeicherbausteinen

Info

Publication number
ATE422093T1
ATE422093T1 AT00943352T AT00943352T ATE422093T1 AT E422093 T1 ATE422093 T1 AT E422093T1 AT 00943352 T AT00943352 T AT 00943352T AT 00943352 T AT00943352 T AT 00943352T AT E422093 T1 ATE422093 T1 AT E422093T1
Authority
AT
Austria
Prior art keywords
row
control signal
address
test
sense
Prior art date
Application number
AT00943352T
Other languages
English (en)
Inventor
Christopher Cooper
Brian Brown
Thanh Mai
Original Assignee
Micron Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Micron Technology Inc filed Critical Micron Technology Inc
Application granted granted Critical
Publication of ATE422093T1 publication Critical patent/ATE422093T1/de

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1072—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers for memories with random access ports synchronised on clock signal pulse trains, e.g. synchronous memories, self timed memories

Landscapes

  • Dram (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Chemical And Physical Treatments For Wood And The Like (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Testing Electric Properties And Detecting Electric Faults (AREA)
  • Fire-Detection Mechanisms (AREA)
  • Fire Alarms (AREA)
AT00943352T 1999-07-06 2000-06-29 Test von rambusspeicherbausteinen ATE422093T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US09/351,105 US6144598A (en) 1999-07-06 1999-07-06 Method and apparatus for efficiently testing rambus memory devices

Publications (1)

Publication Number Publication Date
ATE422093T1 true ATE422093T1 (de) 2009-02-15

Family

ID=23379597

Family Applications (1)

Application Number Title Priority Date Filing Date
AT00943352T ATE422093T1 (de) 1999-07-06 2000-06-29 Test von rambusspeicherbausteinen

Country Status (8)

Country Link
US (2) US6144598A (de)
EP (1) EP1200963B1 (de)
JP (1) JP4524733B2 (de)
KR (1) KR100487180B1 (de)
AT (1) ATE422093T1 (de)
AU (1) AU5783400A (de)
DE (1) DE60041493D1 (de)
WO (1) WO2001003139A1 (de)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6144598A (en) * 1999-07-06 2000-11-07 Micron Technology, Inc. Method and apparatus for efficiently testing rambus memory devices
US6530045B1 (en) * 1999-12-03 2003-03-04 Micron Technology, Inc. Apparatus and method for testing rambus DRAMs
KR100319897B1 (ko) * 2000-01-31 2002-01-10 윤종용 파이프라인 구조에서의 데이터 테스트 시간을 줄일 수있는 반도체 메모리장치
US6445625B1 (en) 2000-08-25 2002-09-03 Micron Technology, Inc. Memory device redundancy selection having test inputs
US6603705B2 (en) * 2000-10-06 2003-08-05 Pmc-Sierra Ltd. Method of allowing random access to rambus DRAM for short burst of data
US6889335B2 (en) * 2001-04-07 2005-05-03 Hewlett-Packard Development Company, L.P. Memory controller receiver circuitry with tri-state noise immunity
US6633965B2 (en) * 2001-04-07 2003-10-14 Eric M. Rentschler Memory controller with 1×/M× read capability
US6678811B2 (en) * 2001-04-07 2004-01-13 Hewlett-Packard Development Company, L.P. Memory controller with 1X/MX write capability
US6678205B2 (en) 2001-12-26 2004-01-13 Micron Technology, Inc. Multi-mode synchronous memory device and method of operating and testing same
KR100451466B1 (ko) * 2002-10-31 2004-10-08 주식회사 하이닉스반도체 테스트 성능이 개선된 반도체 메모리 장치
KR100639614B1 (ko) * 2004-10-15 2006-10-30 주식회사 하이닉스반도체 뱅크 내 셀을 테스트하기 위한 데이터 출력 컴프레스 회로및 방법
JP2006179124A (ja) * 2004-12-22 2006-07-06 Renesas Technology Corp 半導体記憶装置
KR100718042B1 (ko) * 2006-04-06 2007-05-14 주식회사 하이닉스반도체 반도체 메모리 장치 및 그 테스트 방법
US7292487B1 (en) * 2006-05-10 2007-11-06 Micron Technology, Inc. Independent polling for multi-page programming
US7833527B2 (en) * 2006-10-02 2010-11-16 Amgen Inc. Methods of treating psoriasis using IL-17 Receptor A antibodies
US7554858B2 (en) * 2007-08-10 2009-06-30 Micron Technology, Inc. System and method for reducing pin-count of memory devices, and memory device testers for same
CN110473589B (zh) * 2019-07-19 2021-07-20 苏州浪潮智能科技有限公司 一种多功能存储器芯片测试系统

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3845476A (en) * 1972-12-29 1974-10-29 Ibm Monolithic memory using partially defective chips
JPS62250593A (ja) * 1986-04-23 1987-10-31 Hitachi Ltd ダイナミツク型ｒａｍ
JP3542056B2 (ja) * 1996-04-18 2004-07-14 株式会社アドバンテスト 高速ｉｃ試験装置
US6002622A (en) * 1998-02-19 1999-12-14 Micron Technology, Inc. Device and method for margin testing a semiconductor memory by applying a stressing voltage simultaneously to complementary and true digit lines
US6144598A (en) * 1999-07-06 2000-11-07 Micron Technology, Inc. Method and apparatus for efficiently testing rambus memory devices

Also Published As

Publication number Publication date
KR100487180B1 (ko) 2005-05-03
DE60041493D1 (de) 2009-03-19
US6144598A (en) 2000-11-07
EP1200963A4 (de) 2004-07-21
AU5783400A (en) 2001-01-22
EP1200963B1 (de) 2009-01-28
JP2003504777A (ja) 2003-02-04
JP4524733B2 (ja) 2010-08-18
EP1200963A1 (de) 2002-05-02
WO2001003139A1 (en) 2001-01-11
US6314036B1 (en) 2001-11-06
KR20020027474A (ko) 2002-04-13

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Legal Events

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