ATE349115T1 - Schaltung zur erzeugung eines abtasttaktes, vorrichtung zum datentransfer, und elektronische vorrichtung - Google Patents

Schaltung zur erzeugung eines abtasttaktes, vorrichtung zum datentransfer, und elektronische vorrichtung

Info

Publication number
ATE349115T1
ATE349115T1 AT01124703T AT01124703T ATE349115T1 AT E349115 T1 ATE349115 T1 AT E349115T1 AT 01124703 T AT01124703 T AT 01124703T AT 01124703 T AT01124703 T AT 01124703T AT E349115 T1 ATE349115 T1 AT E349115T1
Authority
AT
Austria
Prior art keywords
clock
edge
sampling clock
circuit
edges
Prior art date
Application number
AT01124703T
Other languages
English (en)
Inventor
Yoshiyuki Kamihara
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Application granted granted Critical
Publication of ATE349115T1 publication Critical patent/ATE349115T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/06—Clock generators producing several clock signals
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
    • H03K3/03—Astable circuits
    • H03K3/0315—Ring oscillators
    • H03K3/0322—Ring oscillators with differential cells
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
    • H03L7/0995—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator comprising a ring oscillator
    • H03L7/0996—Selecting a signal among the plurality of phase-shifted signals produced by the ring oscillator
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H04L7/0337—Selecting between two or more discretely delayed clocks or selecting between two or more discretely delayed received code signals

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Information Transfer Systems (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Communication Control (AREA)
AT01124703T 2000-10-19 2001-10-16 Schaltung zur erzeugung eines abtasttaktes, vorrichtung zum datentransfer, und elektronische vorrichtung ATE349115T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2000319722 2000-10-19
JP2001098350A JP3622685B2 (ja) 2000-10-19 2001-03-30 サンプリングクロック生成回路、データ転送制御装置及び電子機器

Publications (1)

Publication Number Publication Date
ATE349115T1 true ATE349115T1 (de) 2007-01-15

Family

ID=26602428

Family Applications (1)

Application Number Title Priority Date Filing Date
AT01124703T ATE349115T1 (de) 2000-10-19 2001-10-16 Schaltung zur erzeugung eines abtasttaktes, vorrichtung zum datentransfer, und elektronische vorrichtung

Country Status (8)

Country Link
US (1) US20020047738A1 (de)
EP (1) EP1199837B1 (de)
JP (1) JP3622685B2 (de)
KR (1) KR100397590B1 (de)
CN (1) CN1165850C (de)
AT (1) ATE349115T1 (de)
DE (1) DE60125307D1 (de)
TW (1) TWI243297B (de)

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JP4031671B2 (ja) * 2002-06-11 2008-01-09 松下電器産業株式会社 クロックリカバリ回路
CN100420153C (zh) * 2002-08-23 2008-09-17 联发科技股份有限公司 锁相环路
TW589831B (en) 2002-12-05 2004-06-01 Via Tech Inc Multi-port network interface circuit and related method for triggering transmission signals of multiple ports with clocks of different phases
CN100352194C (zh) * 2003-04-23 2007-11-28 华为技术有限公司 调节采样时钟保障同步数据可靠接收的方法及其装置
DE60336021D1 (de) * 2003-04-29 2011-03-24 Ericsson Telefon Ab L M Mehrphasentaktwiedergewinnung
RU2244385C1 (ru) * 2003-08-27 2005-01-10 Федеральное Государственное унитарное предприятие Воронежский научно-исследовательский институт связи Устройство фазовой селекции сигналов
EP1545047B1 (de) * 2003-12-19 2009-01-14 International Business Machines Corporation Verbesserungen für Datenrückgewinnungsschaltungen mit Überabtastung zur Intersymbolinterferenzkompensation
EP1545046B1 (de) * 2003-12-19 2009-01-14 International Business Machines Corporation Verbesserungen für Datenrückgewinnungsschaltungen mit Überabtastung zu Wahl des besten Datenabtastwertes
JP2005328138A (ja) * 2004-05-12 2005-11-24 Ricoh Co Ltd 位相調整器
KR100674921B1 (ko) * 2004-11-24 2007-01-26 삼성전자주식회사 디지털 데이터 샘플링 블록 및 샘플링 방법
CN100512009C (zh) * 2004-12-29 2009-07-08 旺玖科技股份有限公司 超取样高速时脉/数据回复的系统与方法
JP4260208B2 (ja) * 2005-03-31 2009-04-30 富士通株式会社 クロック選択回路およびシンセサイザ
WO2007060756A1 (ja) * 2005-11-22 2007-05-31 Matsushita Electric Industrial Co., Ltd. 位相比較器及び位相調整回路
JP2007172574A (ja) * 2005-11-25 2007-07-05 Seiko Epson Corp 集積回路装置及び電子機器
TWI316329B (en) 2006-04-26 2009-10-21 Realtek Semiconductor Corp Phase selector, data receiving device, data transmitting device utilizing phase selector and clock-selecting method
JP2007312321A (ja) * 2006-05-22 2007-11-29 Sharp Corp シリアル・パラレル変換用の半導体集積回路
KR100866603B1 (ko) * 2007-01-03 2008-11-03 삼성전자주식회사 디시리얼라이징과 시리얼라이징을 수행하는 데이터 처리 방법 및 데이터 처리 장치
CA2677655A1 (en) * 2007-05-15 2008-11-20 Chronologic Pty Ltd. Usb based synchronization and timing system
WO2009047706A1 (en) * 2007-10-12 2009-04-16 Nxp B.V. Clock optimization and clock tree design method
US8139697B2 (en) 2008-01-29 2012-03-20 United Microelectronics Corp. Sampling method and data recovery circuit using the same
CN101521567B (zh) * 2008-02-25 2011-06-15 联华电子股份有限公司 取样方法及其数据恢复电路
TWI362834B (en) 2008-05-26 2012-04-21 Novatek Microelectronics Corp Differential transmitter and auto-adjustment method of data strobe thereof
JP5369524B2 (ja) * 2008-07-23 2013-12-18 株式会社リコー クロック・データ・リカバリ回路
KR100980405B1 (ko) * 2008-10-13 2010-09-07 주식회사 하이닉스반도체 Ｄｌｌ 회로
CN102347813B (zh) * 2011-09-26 2015-11-25 华为技术有限公司 一种选取采样时钟信号的方法和设备
US9083478B2 (en) 2012-09-21 2015-07-14 Altera Corporation Apparatus and methods for determining latency of a network port
US9787468B2 (en) * 2014-04-22 2017-10-10 Capital Microelectronics Co., Ltd. LVDS data recovery method and circuit
JP6737642B2 (ja) * 2016-06-14 2020-08-12 ローム株式会社 シリアルデータの受信回路、受信方法、トランシーバ回路、電子機器
CN106771990B (zh) * 2016-12-07 2020-01-24 武汉新芯集成电路制造有限公司 D触发器建立时间的测量电路及测量方法
US10649486B1 (en) 2016-12-28 2020-05-12 Intel Corporation Apparatus and methods for accurate latency measurements in integrated circuits
CN108345554B (zh) * 2017-01-22 2020-08-21 联发科技股份有限公司 决定出取样时脉信号的取样相位的方法及相关的电子装置
CN109213703B (zh) * 2017-06-30 2021-12-14 华为技术有限公司 一种数据检测方法及数据检测装置

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Also Published As

Publication number Publication date
JP2002198941A (ja) 2002-07-12
CN1165850C (zh) 2004-09-08
DE60125307D1 (de) 2007-02-01
KR100397590B1 (ko) 2003-09-13
JP3622685B2 (ja) 2005-02-23
TWI243297B (en) 2005-11-11
KR20020033433A (ko) 2002-05-06
CN1350234A (zh) 2002-05-22
EP1199837A3 (de) 2003-07-02
US20020047738A1 (en) 2002-04-25
EP1199837B1 (de) 2006-12-20
EP1199837A2 (de) 2002-04-24

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