ATE331289T1 - Hintergrund-ausführung einer operation mit speicherzellen - Google Patents

Hintergrund-ausführung einer operation mit speicherzellen

Info

Publication number
ATE331289T1
ATE331289T1 AT02770529T AT02770529T ATE331289T1 AT E331289 T1 ATE331289 T1 AT E331289T1 AT 02770529 T AT02770529 T AT 02770529T AT 02770529 T AT02770529 T AT 02770529T AT E331289 T1 ATE331289 T1 AT E331289T1
Authority
AT
Austria
Prior art keywords
erase
memory cells
voltage
gates
background
Prior art date
Application number
AT02770529T
Other languages
English (en)
Inventor
Raul Adrian Cernea
Original Assignee
Sandisk Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sandisk Corp filed Critical Sandisk Corp
Application granted granted Critical
Publication of ATE331289T1 publication Critical patent/ATE331289T1/de

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0483—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G11C11/5628—Programming or writing circuits; Data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/12—Programming voltage switching circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/30—Power supply circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/08—Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2216/00—Indexing scheme relating to G11C16/00 and subgroups, for features not directly covered by these groups
    • G11C2216/12—Reading and writing aspects of erasable programmable read-only memories
    • G11C2216/18—Flash erasure of all the cells in an array, sector or block simultaneously

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Read Only Memory (AREA)
  • Micro-Organisms Or Cultivation Processes Thereof (AREA)
  • Television Systems (AREA)
AT02770529T 2001-09-17 2002-09-17 Hintergrund-ausführung einer operation mit speicherzellen ATE331289T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US09/956,201 US6741502B1 (en) 2001-09-17 2001-09-17 Background operation for memory cells

Publications (1)

Publication Number Publication Date
ATE331289T1 true ATE331289T1 (de) 2006-07-15

Family

ID=25497898

Family Applications (2)

Application Number Title Priority Date Filing Date
AT06075534T ATE394778T1 (de) 2001-09-17 2002-09-17 Hintergrundbetrieb für speicherzellen
AT02770529T ATE331289T1 (de) 2001-09-17 2002-09-17 Hintergrund-ausführung einer operation mit speicherzellen

Family Applications Before (1)

Application Number Title Priority Date Filing Date
AT06075534T ATE394778T1 (de) 2001-09-17 2002-09-17 Hintergrundbetrieb für speicherzellen

Country Status (11)

Country Link
US (2) US6741502B1 (de)
EP (2) EP1428222B1 (de)
JP (1) JP4451657B2 (de)
KR (1) KR100921962B1 (de)
CN (1) CN100383894C (de)
AT (2) ATE394778T1 (de)
AU (1) AU2002335765A1 (de)
DE (2) DE60212661T2 (de)
ES (1) ES2266571T3 (de)
TW (1) TW567497B (de)
WO (1) WO2003025937A2 (de)

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US7177197B2 (en) 2001-09-17 2007-02-13 Sandisk Corporation Latched programming of memory and method
TW555100U (en) * 2002-11-27 2003-09-21 Power Quotient Int Co Ltd High speed of data transfer of solid state disk on module
US7092288B2 (en) * 2004-02-04 2006-08-15 Atmel Corporation Non-volatile memory array with simultaneous write and erase feature
US7590918B2 (en) * 2004-09-10 2009-09-15 Ovonyx, Inc. Using a phase change memory as a high volume memory
US20060215447A1 (en) * 2005-03-24 2006-09-28 Beedar Technology Inc. Asynchronous Memory Array Read/Write Control Circuit
US7366021B2 (en) * 2005-05-04 2008-04-29 Micron Technology, Inc. Method and apparatus for sensing flash memory using delta sigma modulation
US7342833B2 (en) * 2005-08-23 2008-03-11 Freescale Semiconductor, Inc. Nonvolatile memory cell programming
KR100735009B1 (ko) 2005-08-30 2007-07-03 삼성전자주식회사 소거 시간을 줄일 수 있는 플래시 메모리 장치
JP2007281481A (ja) * 2006-04-10 2007-10-25 Samsung Electronics Co Ltd 不揮発性メモリを有する半導体素子及びその形成方法
KR100719382B1 (ko) * 2006-04-10 2007-05-18 삼성전자주식회사 세 개의 트랜지스터들이 두 개의 셀을 구성하는 비휘발성메모리 소자
US7616505B2 (en) * 2006-12-28 2009-11-10 Sandisk Corporation Complete word line look ahead with efficient data latch assignment in non-volatile memory read operations
US7616506B2 (en) * 2006-12-28 2009-11-10 Sandisk Corporation Systems for complete word line look ahead with efficient data latch assignment in non-volatile memory read operations
US7818638B2 (en) * 2007-06-15 2010-10-19 Micron Technology, Inc. Systems and devices including memory with built-in self test and methods of making and using the same
US8068367B2 (en) 2007-06-15 2011-11-29 Micron Technology, Inc. Reference current sources
US7969783B2 (en) * 2007-06-15 2011-06-28 Micron Technology, Inc. Memory with correlated resistance
US7667632B2 (en) * 2007-06-15 2010-02-23 Micron Technology, Inc. Quantizing circuits for semiconductor devices
US9135962B2 (en) 2007-06-15 2015-09-15 Micron Technology, Inc. Comparators for delta-sigma modulators
US7817073B2 (en) 2007-06-15 2010-10-19 Micron Technology, Inc. Integrators for delta-sigma modulators
US8117520B2 (en) 2007-06-15 2012-02-14 Micron Technology, Inc. Error detection for multi-bit memory
US7768868B2 (en) * 2007-06-15 2010-08-03 Micron Technology, Inc. Digital filters for semiconductor devices
US7538702B2 (en) 2007-06-15 2009-05-26 Micron Technology, Inc. Quantizing circuits with variable parameters
US7830729B2 (en) 2007-06-15 2010-11-09 Micron Technology, Inc. Digital filters with memory
US7733262B2 (en) 2007-06-15 2010-06-08 Micron Technology, Inc. Quantizing circuits with variable reference signals
US7839703B2 (en) 2007-06-15 2010-11-23 Micron Technology, Inc. Subtraction circuits and digital-to-analog converters for semiconductor devices
US7864609B2 (en) 2008-06-30 2011-01-04 Micron Technology, Inc. Methods for determining resistance of phase change memory elements
KR101395152B1 (ko) 2008-07-18 2014-05-15 삼성전자주식회사 비휘발성 메모리 셀, 비휘발성 메모리 장치 및 상기비휘발성 메모리 장치의 프로그래밍 방법
KR101448915B1 (ko) * 2008-10-17 2014-10-14 삼성전자주식회사 프로그램 및 검증 동작을 수행하는 가변 저항 메모리 장치
US7876618B2 (en) * 2009-03-23 2011-01-25 Sandisk Corporation Non-volatile memory with reduced leakage current for unselected blocks and method for operating same
US8638602B1 (en) * 2010-09-10 2014-01-28 Western Digital Technologies, Inc. Background selection of voltage reference values for performing memory read operations
US8819328B2 (en) 2010-12-30 2014-08-26 Sandisk Technologies Inc. Controller and method for performing background operations
US8503237B1 (en) 2011-05-18 2013-08-06 Western Digital Technologies, Inc. System and method for data recovery in a solid state storage device
US9766972B2 (en) 2014-08-07 2017-09-19 Pure Storage, Inc. Masking defective bits in a storage array
US9558069B2 (en) 2014-08-07 2017-01-31 Pure Storage, Inc. Failure mapping in a storage array
US9747158B1 (en) * 2017-01-13 2017-08-29 Pure Storage, Inc. Intelligent refresh of 3D NAND

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US5268870A (en) 1988-06-08 1993-12-07 Eliyahou Harari Flash EEPROM system and intelligent programming and erasing methods therefor
EP0935255A2 (de) 1989-04-13 1999-08-11 SanDisk Corporation EEprom-System mit Blocklöschung
US5172338B1 (en) 1989-04-13 1997-07-08 Sandisk Corp Multi-state eeprom read and write circuits and techniques
US5343063A (en) 1990-12-18 1994-08-30 Sundisk Corporation Dense vertical programmable read only memory cell structure and processes for making them
US5270979A (en) 1991-03-15 1993-12-14 Sundisk Corporation Method for optimum erasing of EEPROM
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KR0145224B1 (ko) * 1995-05-27 1998-08-17 김광호 불휘발성 반도체 메모리의 분리된 기입 및 독출 경로를 가지는 워드라인 구동회로
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US6377502B1 (en) * 1999-05-10 2002-04-23 Kabushiki Kaisha Toshiba Semiconductor device that enables simultaneous read and write/erase operation
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US6434049B1 (en) * 2000-12-29 2002-08-13 Intel Corporation Sample and hold voltage reference source

Also Published As

Publication number Publication date
EP1428222B1 (de) 2006-06-21
US6741502B1 (en) 2004-05-25
EP1701355A3 (de) 2007-02-14
CN100383894C (zh) 2008-04-23
JP2005504403A (ja) 2005-02-10
ATE394778T1 (de) 2008-05-15
DE60226523D1 (de) 2008-06-19
AU2002335765A1 (en) 2003-04-01
US6845045B1 (en) 2005-01-18
EP1428222A2 (de) 2004-06-16
KR100921962B1 (ko) 2009-10-15
KR20040045445A (ko) 2004-06-01
TW567497B (en) 2003-12-21
DE60212661T2 (de) 2007-03-08
WO2003025937A3 (en) 2003-11-27
EP1701355B1 (de) 2008-05-07
EP1701355A2 (de) 2006-09-13
WO2003025937A2 (en) 2003-03-27
CN1555560A (zh) 2004-12-15
ES2266571T3 (es) 2007-03-01
DE60212661D1 (de) 2006-08-03
JP4451657B2 (ja) 2010-04-14

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Legal Events

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