KR100356121B1 - 비휘발성반도체메모리의소거방법및장치 - Google Patents

비휘발성반도체메모리의소거방법및장치

Info

Publication number
KR100356121B1
KR100356121B1 KR10-1998-0003632A KR19980003632A KR100356121B1 KR 100356121 B1 KR100356121 B1 KR 100356121B1 KR 19980003632 A KR19980003632 A KR 19980003632A KR 100356121 B1 KR100356121 B1 KR 100356121B1
Authority
KR
South Korea
Prior art keywords
erasing
semiconductor memory
memory cell
nonvolatile semiconductor
erasing nonvolatile
Prior art date
Application number
KR10-1998-0003632A
Other languages
English (en)
Other versions
KR19980071184A (ko
Inventor
도시카츠 진보
Original Assignee
닛본 덴기 가부시끼가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 닛본 덴기 가부시끼가이샤 filed Critical 닛본 덴기 가부시끼가이샤
Publication of KR19980071184A publication Critical patent/KR19980071184A/ko
Application granted granted Critical
Publication of KR100356121B1 publication Critical patent/KR100356121B1/ko

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/14—Circuits for erasing electrically, e.g. erase voltage switching circuits

Landscapes

  • Read Only Memory (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
KR10-1998-0003632A 1997-01-30 1998-01-30 비휘발성반도체메모리의소거방법및장치 KR100356121B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP1681197A JP3191861B2 (ja) 1997-01-30 1997-01-30 不揮発性半導体メモリ装置及びその消去方法
JP97-016811 1997-01-30

Publications (2)

Publication Number Publication Date
KR19980071184A KR19980071184A (ko) 1998-10-26
KR100356121B1 true KR100356121B1 (ko) 2003-01-24

Family

ID=11926553

Family Applications (1)

Application Number Title Priority Date Filing Date
KR10-1998-0003632A KR100356121B1 (ko) 1997-01-30 1998-01-30 비휘발성반도체메모리의소거방법및장치

Country Status (3)

Country Link
US (1) US5907506A (ko)
JP (1) JP3191861B2 (ko)
KR (1) KR100356121B1 (ko)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20040008526A (ko) * 2002-07-18 2004-01-31 주식회사 하이닉스반도체 플래시 메모리 셀의 소거 방법

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3633853B2 (ja) 2000-06-09 2005-03-30 Ｎｅｃエレクトロニクス株式会社 フラッシュメモリの消去動作制御方法およびフラッシュメモリの消去動作制御装置
US6646925B2 (en) * 2000-12-19 2003-11-11 Texas Instruments Incorporated Method and system for discharging the bit lines of a memory cell array after erase operation
TW477065B (en) * 2001-01-30 2002-02-21 Ememory Technology Inc Manufacturing method of flash memory cell structure with dynamic-like write-in/erasing through channel and its operating method
US6714458B2 (en) * 2002-02-11 2004-03-30 Micron Technology, Inc. High voltage positive and negative two-phase discharge system and method for channel erase in flash memory devices
JP4049641B2 (ja) * 2002-09-06 2008-02-20 株式会社ルネサステクノロジ 不揮発性半導体記憶装置
US7151695B2 (en) * 2004-11-18 2006-12-19 Freescale Semiconductor, Inc. Integrated circuit having a non-volatile memory with discharge rate control and method therefor
US7272053B2 (en) 2004-11-18 2007-09-18 Freescale Semiconductor, Inc. Integrated circuit having a non-volatile memory with discharge rate control and method therefor
KR100764459B1 (ko) 2005-09-20 2007-10-05 동부일렉트로닉스 주식회사 플래쉬 메모리
JP5255234B2 (ja) 2007-05-29 2013-08-07 スパンション エルエルシー 半導体装置及びその制御方法
JP2010079977A (ja) * 2008-09-25 2010-04-08 Toppan Printing Co Ltd 定電流型電源回路を有する不揮発性半導体メモリ装置
JP2010262696A (ja) 2009-04-30 2010-11-18 Toshiba Corp Ｎａｎｄ型フラッシュメモリ
US8644079B2 (en) * 2011-05-10 2014-02-04 Marco Passerini Method and circuit to discharge bit lines after an erase pulse

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5077691A (en) * 1989-10-23 1991-12-31 Advanced Micro Devices, Inc. Flash EEPROM array with negative gate voltage erase operation
EP0961290B1 (en) * 1991-12-09 2001-11-14 Fujitsu Limited Flash memory with improved erasability and its circuitry
JP2541087B2 (ja) * 1992-10-30 1996-10-09 日本電気株式会社 不揮発性半導体記憶装置のデ―タ消去方法
JP3342730B2 (ja) * 1993-03-17 2002-11-11 富士通株式会社 不揮発性半導体記憶装置
US5470773A (en) * 1994-04-25 1995-11-28 Advanced Micro Devices, Inc. Method protecting a stacked gate edge in a semiconductor device from self aligned source (SAS) etch
JP2590764B2 (ja) * 1994-11-29 1997-03-12 日本電気株式会社 不揮発性半導体記憶装置
EP0786779B1 (en) * 1996-01-24 2004-07-28 STMicroelectronics S.r.l. Erase voltage control circuit for an electrically erasable non-volatile memory cell

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20040008526A (ko) * 2002-07-18 2004-01-31 주식회사 하이닉스반도체 플래시 메모리 셀의 소거 방법

Also Published As

Publication number Publication date
JP3191861B2 (ja) 2001-07-23
JPH10214491A (ja) 1998-08-11
US5907506A (en) 1999-05-25
KR19980071184A (ko) 1998-10-26

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