WO2022230220A1 - 半導体装置 - Google Patents

半導体装置 Download PDF

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Publication number
WO2022230220A1
WO2022230220A1 PCT/JP2021/040282 JP2021040282W WO2022230220A1 WO 2022230220 A1 WO2022230220 A1 WO 2022230220A1 JP 2021040282 W JP2021040282 W JP 2021040282W WO 2022230220 A1 WO2022230220 A1 WO 2022230220A1
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WIPO (PCT)
Prior art keywords
metal layer
oxide
ceramic plate
semiconductor device
laminated substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2021/040282
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English (en)
French (fr)
Japanese (ja)
Inventor
聖一 ▲高▼橋
将義 下田
誠 磯崎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Priority to CN202180065550.XA priority Critical patent/CN116250079A/zh
Priority to JP2023517029A priority patent/JP7589807B2/ja
Priority to KR1020237010993A priority patent/KR102823564B1/ko
Priority to DE112021004170.3T priority patent/DE112021004170T5/de
Publication of WO2022230220A1 publication Critical patent/WO2022230220A1/ja
Priority to US18/193,603 priority patent/US12525504B2/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Definitions

  • the present invention relates to semiconductor devices.
  • a semiconductor device includes a semiconductor chip including a power device and a ceramic laminated substrate.
  • a ceramic laminated substrate includes a ceramic plate, a plurality of metal layers formed on the front surface of the ceramic plate and forming a circuit pattern, and a metal layer formed on the back surface of the ceramic plate.
  • a semiconductor chip, a lead frame, and the like are joined to the circuit pattern.
  • the present invention has been made in view of these points, and an object of the present invention is to provide a semiconductor device in which deterioration of the ceramic laminated substrate is prevented.
  • a semiconductor chip, a bonding member, and a plate-like front surface and a back surface opposite to the front surface are provided, and the semiconductor chip is connected to the front surface. and a laminated substrate that is bonded via the bonding member to the laminated substrate, wherein the laminated substrate is plate-shaped and has a first main surface and a second main surface opposite to the first main surface, and a plurality of a high potential metal layer that is joined to the first main surface and contains copper; and a low potential metal layer that is joined to the second main surface and contains copper and has a lower potential than the first main surface.
  • a semiconductor device is provided having a potential metal layer and an intermediate layer formed between the second main surface and the low potential metal layer and including a first oxide containing at least one of magnesium and manganese. .
  • FIG. 1 is a plan view of a semiconductor device according to a first embodiment
  • FIG. 1 is a side view of a semiconductor device according to a first embodiment
  • FIG. 4 is an equivalent circuit representing functions realized by the semiconductor device of the first embodiment
  • 4 is a flow chart showing a method of manufacturing a ceramic laminated substrate included in the semiconductor device of the first embodiment
  • 2 is a schematic cross-sectional view of a ceramic laminated substrate of Comparative Example 1.
  • FIG. 3 is a schematic cross-sectional view of the ceramic laminated substrate of Comparative Example 1 at high temperature and high voltage
  • FIG. 1 is a schematic cross-sectional view of a ceramic laminated substrate according to a first embodiment (Example 1-1);
  • FIG. 2 is a schematic cross-sectional view of the ceramic laminated substrate of the first embodiment (Example 1-1) at high temperature and high voltage.
  • 1 is a schematic cross-sectional view of a ceramic laminated substrate of a first embodiment (Example 1-2);
  • FIG. FIG. 2 is a schematic cross-sectional view of the ceramic laminated substrate of the first embodiment (Example 1-2) at high temperature and high voltage;
  • 1 is a schematic cross-sectional view of a ceramic laminated substrate according to a first embodiment (Example 1-3);
  • FIG. FIG. 2 is a schematic cross-sectional view of the ceramic laminated substrate of the first embodiment (Example 1-3) at high temperature and high voltage.
  • FIG. 4 is a table summarizing test results of the ceramic laminated substrate according to the first embodiment; 3 is a schematic cross-sectional view of a ceramic laminated substrate of Comparative Example 2.
  • FIG. 10 is a schematic cross-sectional view of the ceramic laminated substrate of Comparative Example 2 at high temperature and high voltage;
  • FIG. 4 is a schematic cross-sectional view of a ceramic laminated substrate according to a second embodiment (Example 2-1);
  • FIG. 10 is a schematic cross-sectional view of the ceramic laminated substrate of the second embodiment (Example 2-1) at high temperature and high voltage.
  • FIG. 10 is a schematic cross-sectional view of a ceramic laminated substrate according to a second embodiment (Example 2-2);
  • FIG. 10 is a schematic cross-sectional view of the ceramic laminated substrate of the second embodiment (Example 2-2) at high temperature and high voltage.
  • FIG. 10 is a schematic cross-sectional view of a ceramic laminated substrate according to a second embodiment (Example 2-3);
  • FIG. 10 is a schematic cross-sectional view of the ceramic laminated substrate of the second embodiment (Example 2-3) at high temperature and high voltage;
  • FIG. 10 is a diagram for explaining a region requiring an intermediate layer of the ceramic laminated substrate (back surface metal layer is at a low potential) according to the third embodiment;
  • FIG. 10 is a diagram for explaining a region requiring an intermediate layer of the ceramic laminated substrate (the back surface metal layer is at a high potential) according to the third embodiment;
  • FIG. 10 is a schematic cross-sectional view of the ceramic laminated substrate of the second embodiment (Example 2-2) at high temperature and high voltage.
  • FIG. 10 is a schematic cross-sectional view of a ceramic laminated substrate according to
  • FIG. 12 is a diagram for explaining a region requiring an intermediate layer of the ceramic laminated substrate (the back surface metal layer has a floating potential) according to the third embodiment
  • FIG. 10 is a diagram for explaining a region requiring an intermediate layer of the ceramic laminated substrate of the third embodiment
  • front surface and “upper surface” represent the XY plane facing upward (+Z direction) in the semiconductor device 1 shown in the drawings.
  • up means the direction of the upper side (+Z direction) in the semiconductor device 1 in the drawing.
  • Back surface and “bottom surface” represent the XY plane facing downward (-Z direction) in the semiconductor device 1 in the drawing.
  • downward means the downward direction (-Z direction) in the semiconductor device 1 in the figure. Similar directions are meant in other drawings as needed.
  • Front surface”, “upper surface”, “top”, “back surface”, “lower surface”, “lower surface”, and “side surface” are merely expedient expressions for specifying relative positional relationships.
  • Oxide conversion is calculated by converting each metal element confirmed by composition analysis as each oxide. For example, aluminum oxide (Al 2 O 3 ), silicon oxide (SiO 2 ), sodium oxide (Na 2 O ), magnesium oxide (MgO), manganese oxide (MnO), zirconium oxide (ZrO 2 ), yttrium oxide (Y 2 O 3 ), etc.
  • composition analysis is, for example, the XRF (X-ray fluorescence analysis) method, the ICP (Inductively Coupled Plasma) emission analysis method, the EPMA (Electron Probe Micro Analyzer) method, and the EDX (Energy Dispersive X-ray Spectroscopy) method. is mentioned.
  • XRF X-ray fluorescence analysis
  • ICP Inductively Coupled Plasma
  • EPMA Electro Probe Micro Analyzer
  • EDX Electronic X-ray Spectroscopy
  • does not contain means that the element or compound is below the measurement limit in the above composition analysis.
  • manganese and magnesium it refers to the case of less than 0.01 wt% in terms of oxides.
  • sodium means less than 0.001 wt % in terms of oxide.
  • FIG. 1 is a plan view of the semiconductor device of the first embodiment
  • FIG. 2 is a side view of the semiconductor device of the first embodiment
  • FIG. 3 is an equivalent circuit representing functions realized by the semiconductor device of the first embodiment. Note that FIG. 1 omits the description of the sealing member.
  • FIG. 2 is a side view of the semiconductor device 1 of FIG. 1 viewed in the +X direction.
  • the semiconductor device 1 includes at least a ceramic laminated substrate 10, semiconductor chips 60a, 60b, 65a, 65b, and external connection terminals 71-75. Further, it may include a case 90 and a sealing member 91 (see FIG. 2).
  • the semiconductor device 1 has external connection terminals 71 to 75 extending upward (+Z direction) from the front surface.
  • the ceramic laminated substrate 10 has a ceramic plate 20, metal layers 30a to 30f formed on the front surface of the ceramic plate 20, and a metal layer 40 formed on the back surface of the ceramic plate 20. Note that the metal layers 30a to 30f may be collectively referred to as the metal layer 30 below.
  • the ceramic plate 20 is mainly composed of ceramics which are insulative and have good thermal conductivity.
  • Such ceramics may be composed of, for example, aluminum oxide (Al 2 O 3 ) or zirconium oxide (ZrO 2 ) as a main component.
  • the ceramics are mainly composed of aluminum oxide (Al 2 O 3 ).
  • zirconium oxide (ZrO 2 ) is further included.
  • the ceramic mainly contains ceramic particles.
  • the ceramic particles may be made of a material containing aluminum oxide (Al 2 O 3 ) as a main component.
  • the ceramic plate 20 may also contain a grain boundary material formed at the grain boundaries and triple points of the ceramic grains.
  • Such grain boundary materials may include, for example, oxides comprising silicon (second oxides).
  • the ceramic plate 20 has a rectangular shape in plan view. Further, the corners may be R-chamfered or C-chamfered.
  • the thickness of the ceramic plate 20 is 0.1 mm or more and 1.0 mm or less, for example, about 0.3 mm. Details of the ceramic plate 20 will be described later.
  • the metal layer 30 formed on the front surface of the ceramic plate 20 is mainly composed of metal with excellent conductivity. Such metals include, for example, copper, aluminum, or alloys containing at least one of these.
  • the metal layer 30 used here is mainly composed of copper.
  • the surface of the metal layer 30 may be plated to improve corrosion resistance. At this time, plating materials used include, for example, nickel, nickel-phosphorus alloys, and nickel-boron alloys.
  • a plurality of metal layers 30 are formed on the front surface of the ceramic plate 20 .
  • a plurality of metal layers 30a-30f are formed on the front surface of the ceramic plate 20. As shown in FIG.
  • the metal layers 30a to 30f may be referred to as the metal layer 30 when not distinguished.
  • the metal layer 30 is electrically connected to the semiconductor chips 60a, 60b, 65a, 65b.
  • the metal layer 30 may be joined to the semiconductor chips 60a, 60b, 65a, 65b and the external connection terminals 71 to 75 via a joining member 35 such as solder.
  • Each metal layer 30 may be polygonal. Further, the corners may be R-chamfered or C-chamfered.
  • a plurality of metal layers 30 are formed inside the ceramic plate 20 .
  • Each of the metal layers 30 has a thickness of 0.1 mm or more, 0.5 mm or less, and may be about 0.3 mm.
  • the metal layer 40 formed on the back surface of the ceramic plate 20 is mainly composed of metal with excellent thermal conductivity. Such metals may be, for example, copper, aluminum, or alloys containing at least one of these.
  • the metal layer 40 used here is mainly composed of copper.
  • the surface of the metal layer 40 may be plated to improve corrosion resistance. At this time, plating materials used include, for example, nickel, nickel-phosphorus alloys, and nickel-boron alloys.
  • the metal layer 40 is formed on the back surface of the ceramic plate 20 so as to correspond to the metal layer 30 . That is, the metal layer 40 includes metal layers 30a to 30f formed on the front surface of the ceramic plate 20 in plan view.
  • the metal layer 40 may be connected to the heat dissipation member 92 via solder, brazing material, heat dissipation paste, or the like.
  • the ceramic laminated substrate 10 can transfer the heat generated by the semiconductor chips 60 a , 60 b , 65 a , 65 b through the metal layer 30 , the ceramic plate 20 and the metal layer 40 to the heat dissipation member 92 outside. Therefore, the ceramic plate 20 is heated during operation of the semiconductor device 1 .
  • the metal layer 40 has a rectangular shape in plan view. Further, the corners may be R-chamfered or C-chamfered.
  • the metal layer 40 is formed inside the ceramic plate 20 . It is formed so as to cover a region facing the metal layer 30 .
  • the thickness of the metal layer 40 is 0.1 mm or more and 0.5 mm or less, and may be about 0.3 mm.
  • Intermediate layers 50a and 50b are formed between the ceramic plate 20 and the metal layers 30 and 40, respectively.
  • the intermediate layers 50a and 50b contain an oxide (first oxide) containing at least one of magnesium and manganese.
  • the oxide may be, for example, magnesium oxide (MgO), manganese oxide (MnO), (Mg,Mn)O, ( Mg,Mn) Mn2O4 . These oxides are mostly contained on the front side and the back side of the ceramic plate 20 in the intermediate layers 50a and 50b.
  • the oxides contained in the intermediate layers 50a and 50b may additionally contain aluminum.
  • Such oxides may include the spinel crystal system with aluminum.
  • Spinel crystal systems include, for example, MgAl 2 O 4 , MnAl 2 O 4 , (Mg, Mn) Al 2 O 4 and (Mg, Mn) (Al, Mn) 2 O 4 .
  • the ceramic laminated substrate 10 may include at least one of the intermediate layer 50a and the intermediate layer 50b.
  • the ceramic laminated substrate 10 having such a configuration for example, a DCB (Direct Copper Bonding) substrate or an AMB (Active Metal Brazed) substrate may be used.
  • DCB Direct Copper Bonding
  • AMB Active Metal Brazed
  • the semiconductor chips 60a, 60b, 65a, 65b are mainly composed of silicon or silicon carbide.
  • the semiconductor chips 60a and 60b are switching elements.
  • the switching elements are, for example, IGBTs and power MOSFETs.
  • Such semiconductor chips 60a and 60b have a drain electrode or a collector electrode as an input electrode (main electrode) on the back surface.
  • the semiconductor chips 60a and 60b have gate electrodes as control electrodes 61a and 61b and source electrodes or emitter electrodes as output electrodes 62a and 62b (main electrodes) on the front surfaces.
  • the semiconductor chips 60a and 60b are joined to the metal layers 30b and 30c by soldering (not shown) on the back side thereof.
  • the semiconductor chips 65a and 65b are diode elements.
  • Diode elements are, for example, SBDs (Schottky Barrier Diodes), FWDs (Free Wheeling Diodes) such as PiN (P-intrinsic-N) diodes.
  • Such semiconductor chips 65a and 65b are provided with cathode electrodes as output electrodes (main electrodes) on the rear surface, and anode electrodes as input electrodes 66a and 66b (main electrodes) on the front surface.
  • the semiconductor chips 65a and 65b are joined to the metal layers 30b and 30c on their rear surface sides by the already described solder (not shown).
  • the semiconductor chips 60a, 60b, 65a, and 65b may be RC (Reverse Conductive)-IGBT elements or RB (Reverse Blocking)-IGBT elements each having a switching element and a diode element as one semiconductor chip.
  • the joining member 35 that joins the semiconductor chips 60a, 60b, 65a, 65b and the metal layers 30b, 30c may be solder.
  • Lead-free solder is used as the solder.
  • Lead-free solder is mainly composed of an alloy containing at least two of tin, silver, copper, zinc, antimony, indium, and bismuth, for example. Furthermore, the solder may contain additives.
  • a metal sintered body may be used for the joining member 35 instead of solder.
  • the material of the metal sintered body is mainly composed of silver or silver alloy.
  • solder and metal sintered bodies are not limited to joining the semiconductor chips 60a, 60b and the metal layers 30b, 30c, but also the metal layers 30a, 30e, 30c, 30f, of the external connection terminals 71 to 75, which will be described later. It may also be used for bonding to 30d.
  • the external connection terminals 71 to 75 each have a plate shape, a prism shape, or a cylindrical shape. This embodiment exemplifies the case of a prismatic shape.
  • One ends of the external connection terminals 71 to 75 are electrically and mechanically joined to the metal layers 30a, 30e, 30c, 30f, and 30d of the ceramic laminated substrate 10, respectively.
  • the other end of each extends from the sealing member 91 . The other end may be connected to an external device (not shown).
  • the external connection terminals 71 to 75 are mainly composed of metal with excellent conductivity. Such metals include, for example, aluminum, copper, iron, nickel, or alloys containing at least one of these.
  • the surfaces of the external connection terminals 71 to 75 may also be plated in order to improve their corrosion resistance. At this time, plating materials used include, for example, nickel, nickel-phosphorus alloys, and nickel-boron alloys.
  • the external connection terminals 71 to 75 and the metal layers 30a, 30e, 30c, 30f, and 30d may be joined using solder and metal sintered bodies in the same manner as the semiconductor chips 60a, 60b, 65a, and 65b.
  • the external connection terminals 71 to 75 and the metal layers 30a, 30e, 30c, 30f, and 30d may be directly joined using ultrasonic waves or laser.
  • the bonding wires 80a to 80e are mainly made of metal with excellent conductivity. Such metals are composed of aluminum, copper, or alloys containing at least one of these.
  • the bonding wire 80a mechanically and electrically connects the metal layers 30a and 30b.
  • the bonding wire 80d mechanically and electrically connects the metal layer 30e and the control electrode 61a of the semiconductor chip 60a.
  • the bonding wire 80b mechanically and electrically connects the output electrode 62a of the semiconductor chip 60a, the input electrode 66a of the semiconductor chip 65a, and the metal layer 30c.
  • the bonding wire 80e mechanically and electrically connects the metal layer 30f and the control electrode 61b of the semiconductor chip 60b.
  • the bonding wire 80c mechanically and electrically connects the output electrode 62b of the semiconductor chip 60b, the input electrode 66b of the semiconductor chip 65b, and the metal layer 30d.
  • the diameters of the control bonding wires 80d and 80e are, for example, 25 ⁇ m or more and 400 ⁇ m or less, and the diameters of the main current bonding wires 80a to 80c are 250 ⁇ m or more and 600 ⁇ m or less.
  • the case 90 accommodates the metal layer 30 on the front surface of the ceramic laminated substrate 10, the semiconductor chips 60a, 60b, 65a, 65b, and one ends of the external connection terminals 71-75.
  • the other ends of the external connection terminals 71 to 75 may extend upward (+Z direction) from the front surface of the case.
  • the case 90 is made of resin.
  • resins are mainly composed of thermoplastic resins.
  • Thermoplastic resins are, for example, polyphenylene sulfide resins, polybutylene terephthalate resins, polybutylene succinate resins, polyamide resins, or acrylonitrile butadiene styrene resins.
  • the sealing member 91 may seal the inside of the case 90 . That is, the sealing member 91 seals the metal layer 30 on the front surface of the ceramic laminated substrate 10, the semiconductor chips 60a, 60b, 65a, 65b and one ends of the external connection terminals 71-75.
  • the sealing member 91 contains, for example, a thermosetting resin and a filler contained in the thermosetting resin.
  • Thermosetting resins are, for example, epoxy resins, phenolic resins or maleimide resins.
  • An example of such a sealing member is an epoxy resin containing a filler.
  • An inorganic substance is used as the filler. Examples of inorganics are silicon oxide, aluminum oxide, boron nitride or aluminum nitride.
  • the sealing member 91 may be silicone gel in addition to the materials already mentioned.
  • the semiconductor device 1 constitutes a half bridge circuit including an upper arm portion A and a lower arm portion B.
  • the connection point P is connected to the positive electrode of an external power supply (not shown).
  • a connection point P and a connection point C1 of the collector electrode of the semiconductor chip 60a are connected by a wiring 81.
  • the connection point M is connected to a load (not shown).
  • a connection point M and a connection point E1C2 between the emitter electrode of the semiconductor chip 60a and the collector electrode of the semiconductor chip 60b are connected by a wiring 83.
  • the connection point N is connected to the negative electrode of an external power supply (not shown).
  • a wiring 85 connects the connection point N and the connection point E2 of the emitter electrode of the semiconductor chip 60b.
  • the potential of the connection point P becomes higher than that of the connection point M during operation of the semiconductor device 1 . Therefore, the wiring 81 has a higher potential than the wiring 83 .
  • the connection point M is at a higher potential than the connection point N. Therefore, the wiring 83 has a higher potential than the wiring 85 .
  • the potential of the wiring 81 may be higher than that of the wiring 83 by 250 V or more and less than 1000 V. Further, the potential of the wiring 83 may be higher than the potential of the wiring 85 by 250 V or more and less than 1000 V.
  • connection points G1 and G2 are connected to a control power supply (not shown).
  • the connection point G1 is connected to the control electrode 61a (not shown in FIG. 3, see FIG. 1) of the semiconductor chip 60a through the wiring 82.
  • the connection point G2 is connected to the control electrode 61b (not shown in FIG. 3, see FIG. 1) of the semiconductor chip 60b by the wiring 84.
  • the upper arm portion A of the semiconductor device 1 includes metal layers 30a, 30b, 30e of the ceramic laminated substrate 10, semiconductor chips 60a, 65a, external connection terminals 71, 73, 72, and bonding wires 80a, 80b, 80d connecting these. include.
  • the lower arm portion B of the semiconductor device 1 includes metal layers 30d, 30c and 30f of the ceramic laminated substrate 10, semiconductor chips 60b and 65b, external connection terminals 75, 73 and 74, and bonding wires 80c and 80e connecting them. Also, the upper arm portion A and the lower arm portion B are connected by electrically connecting the metal layers 30b and 30c with the bonding wire 80b. By doing so, the semiconductor device 1 can function as a half bridge circuit including the upper arm portion A and the lower arm portion B.
  • the wiring 81 includes an external connection terminal 71 that is a P terminal (positive electrode), a metal layer 30a to which the external connection terminal 71 is connected, a metal layer 30b on which the semiconductor chips 60a and 65a are arranged, and a metal layer 30a and a metal layer 30b. and a bonding wire 80a for connecting the .
  • the wiring 83 includes an external connection terminal 73 which is an M terminal, a metal layer 30c on which the external connection terminal 73 and the semiconductor chips 60b and 65b are arranged, and bonding wires connecting the metal layer 30c and the semiconductor chips 60a and 65a. 80b.
  • the wiring 85 also includes an external connection terminal 75 that is an N terminal (negative electrode), a metal layer 30d on which the external connection terminal 75 is arranged, and bonding wires 80c that connect the metal layer 30d and the semiconductor chips 60b and 65b.
  • the metal layer 40 formed on the back surface of the ceramic plate 20 is grounded so as to have the same potential as the N terminal, the metal layers 30a, 30b, The metal layer 40 has a low potential with respect to 30c. That is, in this case, the low-potential metal layer is the metal layer 40 formed on the back surface of the ceramic plate 20, and the high-potential metal layers are the metal layers 30a and 30a formed on the front surface of the ceramic plate 20. 30b and 30c.
  • the potential of the metal layer 40 is lower than that of the metal layers 30a and 30b by 500V or more and less than 2000V. Also, the potential of the metal layer 40 is lower than that of the metal layer 30c by 250 V or more and less than 1000 V.
  • the wiring 81 The metal layer 40 has a lower potential than the metal layers 30a and 30b corresponding to . That is, in this case, the low-potential metal layer is the metal layer 40 formed on the back surface of the ceramic plate 20, and the high-potential metal layers are the metal layers 30a and 30b formed on the front surface of the ceramic plate 20. is.
  • the potential of the metal layer 40 is lower than that of the metal layers 30a and 30b by 250V or more and less than 1000V.
  • the metal layer 30 d corresponding to the wiring 85 has a lower potential than the metal layer 40 . That is, in this case, the low-potential metal layer is the metal layer 30d formed on the front surface of the ceramic plate 20, and the high-potential metal layer is the metal layer 40 formed on the back surface of the ceramic plate 20. be.
  • the potential of the metal layer 30d is lower than that of the metal layer 40 by 250V or more and less than 1000V.
  • FIG. 4 is a flow chart showing a method of manufacturing the ceramic laminated substrate included in the semiconductor device of the first embodiment.
  • a ceramic plate and a metal foil are prepared (steps S1a and S1b). Either step S1a or S1b may be performed first.
  • step S1a Preparation of the ceramic plate will be described (step S1a).
  • silicon oxide (SiO 2 ) powder is added to aluminum oxide (Al 2 O 3 ) powder, and the mixture is stirred together with a binder or the like to form a plate.
  • Magnesium oxide (MgO) powder is applied to the surface of a plate-shaped molding, and is fired at a predetermined temperature for a predetermined time.
  • the ceramic plate thus fired contains aluminum oxide as ceramic particles, an oxide (second oxide) having silicon at the grain boundaries and triple points of the ceramic particles, and , an oxide with magnesium is formed. Also, an oxide having magnesium at the grain boundaries and the triple points of the ceramic particles may be formed. In this case, the application of magnesium oxide powder may be omitted.
  • the average particle size of the ceramic particles is 0.5 ⁇ m or more and 25 ⁇ m or less. More preferably, it is 1 ⁇ m or more and 10 ⁇ m or less.
  • the aluminum oxide content in terms of oxide is 90 wt% or more and 99 wt% or less, more preferably 92 wt% or more and 98 wt% or less.
  • the content of the oxide containing silicon in the ceramic plate 20 is 0.01 wt% or more and 3.0 wt% or less in terms of silicon oxide (SiO 2 ) with respect to the total amount in terms of oxide. and more preferably 1.0 wt % or more and 3.0 wt % or less. If the content of oxides containing silicon is too low, many voids remain in the ceramic plate, making it susceptible to cracking. On the other hand, if the amount is too large, the conduction of ions in the ceramic plate increases during the operation of the semiconductor device 1, which tends to cause a decrease in insulating properties and a decrease in bondability of the copper foil.
  • the ceramic plate 20 includes various materials used for manufacturing.
  • An example of such a material is an oxide with sodium.
  • sodium oxide ( Na2O ) The content of the oxide containing sodium in the ceramic plate 20 is 0.001 wt% or more and 0.2 wt% or less in terms of sodium oxide (Na 2 O) with respect to the total amount in terms of oxide. Yes, more preferably 0.002 wt% or more and 0.2 wt% or less. If the content of the oxide containing sodium is too low, it will be difficult to purify the ceramic raw material powder.
  • the ceramic plate 20 preferably does not contain ⁇ -alumina.
  • step S1b Preparation of the metal foil will be described (step S1b).
  • a metal foil containing copper as a main component is prepared and its surface is oxidized.
  • a film of copper oxide (Cu x O) having a thickness of 10 nm or more and 1 ⁇ m or less is formed on the surface of the metal foil.
  • a wet oxidation method or a dry oxidation method may be performed.
  • a metal foil containing copper as a main component can be immersed in a manganese-containing solution for oxidation.
  • a wet oxidation process using a manganese-containing solution forms copper oxide on the surface of the metal foil as well as an oxide comprising manganese.
  • a metal foil containing copper as a main component is heated in the air or an oxygen gas atmosphere. Therefore, in the dry oxidation method, copper oxide is formed on most of the surface of the metal foil, and other metals including manganese are not formed.
  • step S2 the metal foil formed in step S1b is joined to the front and back surfaces of the ceramic plate formed in step S1a (step S2). That is, the metal foil formed in step S1b is superimposed on the front and back surfaces of the ceramic plate formed in step S1a, and heat treatment is performed at a predetermined temperature for a predetermined time.
  • the metal layers formed on the front and back surfaces of the ceramic plate are metal foils produced by either a wet oxidation method or a dry oxidation method. Specifically, a metal foil prepared by a wet oxidation method is superimposed on the front and back surfaces of a ceramic plate. A metal foil prepared by a dry oxidation method is overlaid on the front surface and the back surface of the ceramic plate 20, respectively.
  • Copper oxide (Cu x O) is formed at the contact interface between the ceramic plate and the metal layer.
  • Intermediate layers 50a and 50b containing an oxide containing at least one of magnesium and manganese can be formed by a predetermined method at the contact interface between the ceramic plate and the metal layer.
  • the predetermined method may be at least one of applying magnesium oxide during firing of the ceramic plate, or forming the metal layer by a wet oxidation method using a manganese-containing solution.
  • a ceramic laminated substrate 10 of Example 1-1 which will be described later, is coated with magnesium oxide when the ceramic plate 20 is sintered. For this reason, intermediate layers 50a and 50b containing an oxide having magnesium as the first oxide are formed at the contact interfaces between the ceramic plate 20 and the metal layers 30 and 40, respectively.
  • magnesium oxide is applied when the ceramic plate 20 is fired, and the metal layers 30 and 40 are formed by a wet oxidation method using a manganese-containing solution. It is a thing. Therefore, intermediate layers 50a and 50b containing oxides containing both magnesium and manganese as first oxides are formed at the contact interfaces between the ceramic plate 20 and the metal layers 30 and 40, respectively.
  • the metal layers 30 and 40 are formed by a wet oxidation method using a manganese-containing solution when the ceramic plate 20 is fired. Therefore, intermediate layers 50a and 50b containing an oxide containing manganese as a first oxide are formed at the contact interfaces between the ceramic plate 20 and the metal layers 30 and 40, respectively. Thereby, the ceramic plate 20 and the metal layers 30 and 40 are suitably joined.
  • the metal layer formed on the ceramic plate in step S2 is etched (step S3). That is, the metal layers 30a to 30f are formed by etching the metal layer formed on the front surface of the ceramic plate into a predetermined shape. Also, the metal layer 40 is formed by etching the metal layer formed on the back surface of the ceramic plate. The surface of the metal layers 30a to 30f and the surface of the metal layer 40 may not be coated with copper oxide (Cu x O). The copper oxide (Cu x O) film can be removed by heat treatment in a reducing atmosphere during bonding (step S2) or by surface polishing after bonding or etching. The thickness of the ceramic plate 20 is approximately 0.32 mm. The thickness of the metal layers 30 and 40 is approximately 0.3 mm.
  • the ceramic laminated substrate 10 including the intermediate layers 50a and 50b between the ceramic plate 20 and the metal layers 30 and 40 is manufactured.
  • the intermediate layers 50a and 50b suppress deterioration in bonding between the metal layers 30 and 40 and the ceramic plate 20.
  • step S1a when the powder of magnesium oxide is applied, in the ceramic laminated substrate 10, the content of the oxide containing magnesium in the ceramic plate 20 and the intermediate layers 50a and 50b is reduced to the total amount in terms of oxide. It is 0.1 wt % or more and 1.5 wt % or less in terms of magnesium oxide (MgO) with respect to the amount.
  • MgO magnesium oxide
  • the magnesium content in terms of magnesium oxide (MgO) is 10 wt % or more and 50 wt % or less with respect to the silicon content in terms of silicon oxide (SiO 2 ). If magnesium oxide powder is not applied in step S1a, the ceramic laminated substrate 10 does not contain magnesium (less than the lower limit of measurement of 0.01 wt%). Further, when the wet oxidation method using the manganese-containing solution is performed in step S1b, in the ceramic laminated substrate 10, the content of the oxide containing manganese in the ceramic plate 20 and the intermediate layers 50a and 50b is It is 0.01 wt % or more and 0.15 wt % or less in terms of manganese oxide (MnO) with respect to the total amount.
  • MnO manganese oxide
  • the manganese content in terms of manganese oxide (MnO) is 1.0 wt % or more and 5.0 wt % or less with respect to the silicon content in terms of silicon oxide (SiO 2 ). If the wet oxidation method using the manganese-containing solution is not performed in step S1b, the ceramic laminated substrate 10 does not contain manganese (less than the lower measurement limit of 0.01 wt%).
  • the ceramic laminated substrate 10 of Example 1-1 which will be described later, was coated with magnesium oxide powder and was not subjected to wet oxidation using a manganese-containing solution.
  • the ceramic laminated substrate 10 contains an oxide containing magnesium and does not contain an oxide containing manganese.
  • a ceramic laminated substrate of Example 1-2 which will be described later, is a case where both magnesium oxide powder coating and wet oxidation using a manganese-containing solution are performed. Therefore, the ceramic laminated substrate 10 contains both an oxide containing magnesium and an oxide containing manganese.
  • a ceramic laminated substrate 10 of Example 1-3 which will be described later, was obtained by a wet oxidation method using a manganese-containing solution without applying magnesium oxide powder.
  • the ceramic laminated substrate 10 does not contain oxides containing magnesium, but contains oxides containing manganese.
  • a ceramic laminated substrate 100 of a comparative example, which will be described later, is a case in which neither the application of magnesium oxide powder nor the wet oxidation method using the manganese-containing solution is performed. Therefore, the ceramic laminated substrate 100 does not contain oxides containing magnesium and oxides containing manganese.
  • FIGS. 13 the ceramic laminated substrate that does not include the intermediate layers 50a and 50b is shown in FIGS. And FIG. 13 will be used for explanation.
  • 5 is a schematic cross-sectional view of the ceramic laminated substrate of Comparative Example 1
  • FIG. 6 is a cross-sectional schematic diagram of the ceramic laminated substrate of Comparative Example 1 at high temperature and high voltage.
  • FIG. 13 is a table summarizing test results of ceramic laminated substrates. Note that FIG. 5 schematically shows a microscopic state in the range enclosed by the dashed line in FIG.
  • FIG. 6 schematically shows a microscopic state when a high voltage is applied between the metal layers 30 and 40 at a high temperature in FIG. 5.
  • FIG. 13 also shows test results of first to third embodiments, which will be described later.
  • the ceramic plate 120 included in the ceramic laminated substrate of Comparative Example 1 was produced without applying magnesium oxide in step S1a of FIG.
  • This ceramic plate is mainly composed of aluminum oxide, and additionally contains an oxide containing silicon and an oxide containing sodium.
  • the metal layer included in the ceramic laminated substrate of Comparative Example 1 was produced by the dry oxidation method in step S1b of FIG.
  • the ceramic laminated substrate 100 of Comparative Example 1 is manufactured by subjecting the ceramic plate and the metal layer to the processes of steps S2 and S3 in FIG.
  • the ceramic laminated substrate 100 does not contain magnesium and manganese. That is, the ceramic laminated substrate 100 manufactured in this manner does not have the intermediate layers 50a, 50b containing an oxide containing at least one of magnesium and manganese.
  • the ceramic laminated substrate 100 manufactured in this manner is constructed by laminating a metal layer 40, a ceramic plate 120, and a metal layer 30 in order from the bottom.
  • the ceramic plate 120 contains at least aluminum oxide 21 (Al 2 O 3 ) particles, oxide 22 (Si—O) having silicon at its grain boundaries and triple points, and sodium oxide 23 (Na 2 O).
  • the metal layers 30 and 40 are mainly composed of copper (Cu) and do not contain oxygen. Oxides 31 and 41 (Cu—O) containing copper are formed at the boundaries between the metal layers 30 and 40 and the ceramic plate 120, respectively.
  • the peel strength evaluation test measures the peel strength of the metal layers 30 and 40 against the ceramic plate 120 of the ceramic laminated substrate 100 before and after the reliability test. Next, it is a test for evaluating the bonding strength of the metal layers 30 and 40 to the ceramic plate 120 from the measurement results. The value of the peeling strength was obtained by averaging the measured values at 40 points.
  • the half-bridge circuit is operated continuously for a predetermined period of time with a predetermined on/off pattern in a high-temperature environment.
  • the metal layer 40 formed on the back surface of the ceramic plate 20 is grounded so as to have the same potential as the N terminal. Therefore, the metal layer 30 formed on the front surface of the ceramic plate 20 is a high-potential metal layer, and the metal layer 40 formed on the back surface is a low-potential metal layer.
  • Such continuous operation is performed on the front surface of the ceramic laminated substrate 100 .
  • the peeling strength is measured as follows. In the ceramic laminated substrate 100, part of the metal layers 30 and 40 are processed into strip-shaped patterns having a predetermined width, one ends of the strip-shaped metal layers 30 and 40 are peeled off from the ceramic plate 120, and the stripped ends are The layered substrate 100 is pulled and peeled off at a constant speed in a direction perpendicular to the main surface of the layered substrate 100 by a predetermined length or longer. The load during this pulling is measured.
  • the evaluation is performed based on the change in the peeling strength of the metal layers 30 and 40 included in the ceramic laminated substrate 100 before and after the reliability test. If the peeling strength after the reliability test is 95% or more of the peeling strength before the reliability test, it is “Excellent”, and if it is less than 95% or 90% or more, it is "Very Good”, less than 90%, less than 60%, “Good", less than 60%, “Not Good” (see FIG. 13).
  • FIG. 13 shows the ceramic plate, metal layer, intermediate layer, and test results used in the evaluation for Examples 1-1 to 1-3 and Comparative Example 1.
  • FIG. 13 shows the ceramic plate, metal layer, intermediate layer, and test results used in the evaluation for Examples 1-1 to 1-3 and Comparative Example 1.
  • the evaluation result for Comparative Example 1 is "Excellent” on the front surface of the ceramic laminated substrate 100, but "Not Good” on the back surface. That is, the ceramic laminated substrate 100 is in a state in which the bonding strength of the metal layer 40 to the back surface of the ceramic plate 120 is reduced by the reliability test.
  • the reason for this has not yet been fully elucidated at present, and although it is not bound by theory, it can be considered as follows.
  • the ceramic laminated substrate 100 after the reliability test has a composition as shown in FIG.
  • sodium oxide 23 (see FIG. 5) is converted into sodium ions 24 (Na + ) and oxygen ions. 25(O 2 ⁇ ).
  • the sodium ions 24 pass through the oxide 22 containing silicon at the grain boundaries of the aluminum oxide 21 and move to the side of the low potential metal layer 40 which is the negative electrode.
  • the oxygen ions 25 pass through the oxide 22 containing silicon at the grain boundary of the aluminum oxide 21 and move toward the high-potential metal layer 30 which is the positive electrode.
  • the oxygen ions 25 that have migrated to the positive electrode react with the copper contained in the metal layer 30 to form an oxide 31 comprising copper.
  • the oxide 31 comprising copper is increased, and the bonding strength to each of the aluminum oxide 21 and the oxide 22 comprising silicon is improved.
  • the sodium ions 24 that have migrated to the negative electrode react with the copper-comprising oxide 41 (see FIG. 5) to reduce the copper oxide and the negative electrode-copper-comprising oxide 41 that has reacted with the sodium ions 24. becomes Cu and is included in the metal layer 40 .
  • the sodium ions 24 are oxidized to sodium oxide.
  • the copper-comprising oxide 41 which has a high bonding strength to each of the aluminum oxide 21 and the silicon-comprising oxide 22, is reduced.
  • the concentration of sodium ions (sodium oxide 23) increases in the ceramic plate 120 in the vicinity of the boundary of the metal layer 40 of the negative electrode, making it easier for particles of aluminum oxide 21 to detach. Therefore, the bonding strength of the metal layer 40 to the ceramic plate 120 is lowered.
  • the metal layer 40 may be left at a floating potential without being grounded, or the metal layer 40 may be grounded at an intermediate point (grounded to have the same potential as the metal layer 30c).
  • the potential of the metal layers 30a and 30b on the collector side of the upper arm is high, and the potential of the metal layer 40 is low. For this reason, the bondability of the portion of the metal layer 40 facing the metal layers 30a and 30b is lowered.
  • the potential of the metal layer 30d on the emitter side of the lower arm portion becomes low, and the potential of the metal layer 40 facing the metal layer 30d becomes high, resulting in deterioration of the bonding property of the metal layer 30d.
  • FIG. 7 is a schematic cross-sectional view of the ceramic laminated substrate of the first embodiment (Example 1-1), and FIG. 8 is a schematic cross-sectional view of the ceramic laminated substrate of the first embodiment (Example 1-1). It is a cross-sectional schematic diagram at the time of high temperature under high voltage. Note that FIG. 7 schematically shows a microscopic state in the range enclosed by the dashed line in FIG. 8 schematically shows a microscopic state when a high voltage is applied between the metal layers 30 and 40 at a high temperature in FIG.
  • the ceramic laminated substrate 10 of Example 1-1 is configured by laminating a metal layer 40, an intermediate layer 50b, a ceramic plate 20, an intermediate layer 50a, and a metal layer 30 in this order from the bottom. .
  • the ceramic plate 20 is manufactured by applying magnesium oxide powder in step S1a of FIG. Moreover, the metal layers 30 and 40 are manufactured by a dry oxidation method in step S1b of FIG.
  • the ceramic plate 20 contains, as second oxides, an oxide 22 having silicon between grains (grain boundaries and triple points) of aluminum oxide 21 and sodium oxide 23 . Additionally, magnesium oxide may be included.
  • the intermediate layers 50a and 50b respectively contain oxides 51a and 51b (Mg--O) containing magnesium as first oxides.
  • the oxides 51a and 51b containing magnesium are formed in large amounts on the front surface side and the back surface side of the ceramic plate 20 in the intermediate layers 50a and 50b, respectively.
  • the boundaries between the metal layers 30 and 40 and the ceramic plate 20, and the oxides 31 and 41 containing copper at the boundaries between the oxides 51a and 51b containing magnesium and the metal layers 30 and 40 and the ceramic plate 20 are formed, respectively. formed.
  • the intermediate layers 50a and 50b containing oxides 51a and 51b containing magnesium are formed so as to cover 10% or more and 80% or less of the joint surface between the ceramic plate 20 and the metal layers 30 and 40. preferably 20% or more and 50% or less.
  • a peeling strength evaluation test was also conducted on such a ceramic laminated substrate 10 .
  • the evaluation results for Example 1-1 are "Excellent” for the front surface of the ceramic laminated substrate 10 and “Good” for the back surface. That is, even when the ceramic laminated substrate 10 was subjected to a reliability test, compared to Comparative Example 1, the bonding strength of the metal layer 40 to the back surface of the ceramic plate 20 was somewhat improved, and deterioration of bondability was suppressed. The reason for this has not yet been fully elucidated at present, and although it is not bound by theory, it can be considered as follows.
  • the ceramic laminated substrate 10 after the reliability test has a composition as shown in FIG.
  • sodium oxide 23 (see FIG. 7) is converted into sodium ions 24 (Na + ) and oxygen. It separates into ions 25 (O 2 ⁇ ).
  • the sodium ions 24 pass through the grain boundaries of the aluminum oxide 21 and the oxide 22 with silicon at the triple point to migrate toward the low potential metal layer 40 which is the negative electrode.
  • the oxygen ions 25 pass through the grain boundaries of the aluminum oxide 21 and the oxide 22 having silicon at the triple point to move toward the high-potential metal layer 30 which is the positive electrode.
  • the oxygen ions 25 that have migrated to the positive electrode react with the copper of the metal layer 30 to form an oxide 31 comprising copper.
  • the oxide 31 containing copper is increased, and the bonding strength to each of the aluminum oxide 21 and the oxide 22 containing silicon is improved.
  • the sodium ions 24 that have migrated to the negative electrode react with the oxide 41 (see FIG. 7) comprising copper at locations where the oxide 51b comprising magnesium is not present, thereby reducing the copper oxide and producing sodium
  • the negative electrode copper oxide 41 that has reacted with the ions 24 becomes Cu and is included in the metal layer 40 .
  • the sodium ions 24 are oxidized to sodium oxide.
  • the copper-comprising oxide 41 which has a high bonding strength to each of the aluminum oxide 21 and the silicon-comprising oxide 22, is reduced.
  • the concentration of sodium ions (sodium oxide 23) increases in the ceramic plate 120 in the vicinity of the boundary of the metal layer 40 of the negative electrode, making it easier for particles of aluminum oxide 21 to detach.
  • the magnesium oxide 26 is arranged in the intermediate layers 50a and 50b. Therefore, the sodium ions 24 are blocked from reacting with the oxide 41 comprising copper. Therefore, the oxide 41 containing copper exists without becoming Cu at the location where the oxide 51b containing magnesium is formed. Also, magnesium oxide 26 exists at the grain boundaries and triple points of aluminum oxide 21 . Therefore, the movement route of a portion of the oxide 22 having silicon at the grain boundary is blocked, and the movement of a portion of the sodium ions 24 is blocked. Therefore, the reaction between the sodium ions 24 and the oxide 41 containing copper is suppressed. Therefore, the bonding strength between the ceramic plate 20 and the metal layer 40 is maintained at this location.
  • the decrease in the bonding strength between the ceramic plate 20 and the metal layer 40 is suppressed, and the metal layer 40 is bonded to the ceramic plate 20. Improves strength.
  • Comparative Example 1 even without the intermediate layers 50a and 50b, the bonding strength of the metal layer 30 on the front surface (high potential side) of the ceramic plate 120 can be maintained to some extent, and the back surface of the ceramic plate 120 ( On the low potential side), the bondability of the metal layer 40 deteriorates.
  • the intermediate layer 50b between the back surface (low potential side) of the ceramic plate 20 and the metal layer 40 of the ceramic laminated substrate 10 of the first embodiment suppresses deterioration of the bondability of the metal layer 40.
  • the ceramic laminated substrate 10 if at least the intermediate layer 50b is provided between the back surface (low potential side) of the ceramic plate 20 and the metal layer 40, the deterioration of the bondability of the metal layer 40 is suppressed, and the ceramic lamination is performed. Deterioration of the substrate 10 can be prevented.
  • the semiconductor device 1 includes semiconductor chips 60a, 60b, 65a, 65b, a bonding member 35, and a plate-like front surface and a back surface opposite to the front surface. , 65a and 65b are bonded to the front surface of the ceramic laminated substrate 10 via a bonding member 35.
  • the ceramic laminated substrate 10 has a ceramic plate 20, metal layers 30 and 40, and an intermediate layer 50b.
  • the ceramic plate 20 has a plate shape and has a first main surface (front surface in the first embodiment) and a second main surface opposite to the first main surface (back surface in the first embodiment). and ceramic particles.
  • the metal layer 30 is applied with a high potential voltage, joined to the first main surface of the ceramic plate 20, and contains copper.
  • the metal layer 40 is applied with a low potential voltage, joined to the second main surface of the ceramic plate 20, and contains copper.
  • the intermediate layer 50b is formed between the second main surface of the ceramic plate 20 and the low-potential metal layer 40 and includes an oxide 51b containing magnesium. Due to the oxide 51b containing magnesium contained between the ceramic plate 20 and the low-potential metal layer 40, the ceramic laminated substrate 10 maintains the metal layer against the ceramic plate 20 even when a high voltage is applied at a high temperature. 40 is suppressed. Therefore, deterioration of the ceramic laminated substrate 10 can be prevented, and deterioration of the reliability of the semiconductor device 1 can be suppressed.
  • the high potential metal layer is the ceramic plate 20 are metal layers 30a, 30b, and 30c formed on the front surface of.
  • the low potential metal layer is the metal layer 40 formed on the back surface of the ceramic plate 20 .
  • the metal layer 40 formed on the back surface of the ceramic plate 20 when the metal layer 40 formed on the back surface of the ceramic plate 20 is grounded so as to have the same potential as the M terminal, or when it is not installed and is floating.
  • the high-potential metal layers are metal layers 30a and 30b formed on the front surface of the ceramic plate 20, and the low-potential metal layers are formed on the back surface of the ceramic plate 20 and are formed on the metal layers 30a and 30b. It is the metal layer 40 which opposes.
  • the low-potential metal layer is the metal layer 30d formed on the front surface of the ceramic plate 20, and the high-potential metal layer is formed on the back surface of the ceramic plate 20 and is the metal layer 30d. It is the metal layer 40 which opposes.
  • the surface of the plate-like molding is coated with magnesium oxide powder in the ceramic plate manufacturing step (step S1a). and sintering at a predetermined temperature for a predetermined time.
  • a solution containing manganese may be applied to the surface of the plate-like molding and fired.
  • the intermediate layers 50a and 50b can be provided with magnesium or an oxide containing magnesium by sputtering or vapor deposition on the ceramic plate or metal foil. An oxide with magnesium can be formed.
  • the metal foil is immersed in a manganese-containing solution and oxidized.
  • powder or solution containing manganese may be applied to the surface of the plate-like molding and fired in the ceramic plate preparation step (step S1a).
  • the intermediate layers 50a and 50b can also be formed with manganese or an oxide containing manganese by sputtering or vapor deposition on the ceramic plate or metal foil during the ceramic plate forming step (step S1a) or the metal foil forming step (step S1b).
  • An oxide with manganese can be formed.
  • FIG. 9 is a schematic cross-sectional view of the ceramic laminated substrate of the first embodiment (Example 1-2)
  • FIG. 10 is a diagram of the ceramic laminated substrate of the first embodiment (Example 1-2). It is a cross-sectional schematic diagram at the time of high temperature under high voltage. Note that FIG. 9 schematically shows a microscopic state at a location corresponding to the range enclosed by the dashed line in FIG. 2 . 10 schematically shows a microscopic state when a high voltage is applied between the metal layers 30 and 40 in FIG. 2 at a high temperature.
  • the ceramic laminated substrate 10 of Example 1-2 is configured by laminating a metal layer 40, an intermediate layer 50b, a ceramic plate 20, an intermediate layer 50a, and a metal layer 30 in this order from the bottom. .
  • the ceramic plate 20 is manufactured by applying powder of magnesium oxide in step S1a of FIG. 4 in the same manner as in Example 1-1.
  • the metal layers 30 and 40 are manufactured by wet oxidation in step S1b of FIG. 4, unlike Example 1-1.
  • the ceramic plate 20 contains, as second oxides, an oxide 22 having silicon between grains (grain boundaries and triple points) of aluminum oxide 21 and sodium oxide 23 . Additionally, magnesium oxide may be included.
  • the metal layers 30 and 40 are mainly composed of copper.
  • the intermediate layers 50a, 50b contain oxides 52a, 52b (Mg--Mn--O) comprising magnesium and manganese, respectively, as first oxides.
  • the oxides 52a and 52b containing magnesium and manganese are formed in the intermediate layers 50a and 50b in large amounts on the front surface side and the back surface side of the ceramic plate 20, respectively.
  • oxides 31, 41 containing copper are respectively formed at boundaries between the metal layers 30, 40, the ceramic plate 20, and the oxides 52a, 52b containing magnesium and manganese.
  • Example 1-1 in the ceramic laminated substrate 10 (before the reliability test), the range covered by the intermediate layers 50a and 50b is limited to increase the bonding strength between the ceramic plate 20 and the metal layers 30 and 40. I could't do it.
  • Example 1-2 intermediate layers 50a, 50b containing oxides 52a, 52b comprising magnesium and manganese can be widely formed. As a result, the bonding strength between the ceramic plate 20 and the metal layers 30, 40 can be made higher than in Example 1-1.
  • Such intermediate layers 50a and 50b are preferably formed so as to cover 20% or more and 80% or less of the bonding surfaces between the ceramic plate 20 and the metal layers 30 and 40. As shown in FIG.
  • a peeling strength evaluation test was also conducted on such a ceramic laminated substrate 10 .
  • the evaluation result for Example 1-2 is "Excellent" on the front and back surfaces of the ceramic laminated substrate 10.
  • FIG. 13 That is, even when the ceramic laminated substrate 10 is subjected to a reliability test, the bonding strength of the metal layer 40 to the back surface of the ceramic plate 20 is improved compared to Example 1-1, and deterioration of bondability is suppressed.
  • the reason for this has not yet been fully elucidated at present, and although it is not bound by theory, it can be considered as follows.
  • the composition of the ceramic laminated substrate 10 after the reliability test is as shown in FIG.
  • sodium oxide 23 (see FIG. 9) is separated into sodium ions 24 and oxygen ions 25. do.
  • the sodium ions 24 pass through the grain boundaries of the aluminum oxide 21 and the oxide 22 with silicon at the triple point to migrate toward the low potential metal layer 40 which is the negative electrode.
  • the oxygen ions 25 pass through the oxide 22 containing silicon at the grain boundary of the aluminum oxide 21 and move toward the high-potential metal layer 30 which is the positive electrode.
  • the oxygen ions 25 that have migrated to the positive electrode react with the copper of the metal layer 30 to form an oxide 31 comprising copper.
  • the oxide 31 containing copper is increased, and the bonding strength to each of the aluminum oxide 21 and the oxide 22 containing silicon is improved.
  • Example 1-2 the magnesium oxide 26 is arranged at the grain boundary and the triple point of the aluminum oxide 21 in the ceramic laminated substrate 10 .
  • an oxide 52b comprising magnesium and manganese is formed at the boundary and triple point between the aluminum oxide 21 of the negative electrode and the low potential metal layer 40 .
  • the region where the oxide 52b containing magnesium and manganese is formed is wider than the oxide 51b containing magnesium in Example 1-1. Therefore, the sodium ions 24 that have migrated to the negative electrode are blocked by the oxide 52b containing magnesium and manganese. Therefore, the reaction between the sodium ion 24 and the copper-containing oxide 41 is more inhibited than in Example 1-1. Therefore, the oxide 41 containing copper exists at the boundary between the aluminum oxide 21, the metal layer 40, and the oxide 52b containing magnesium and manganese without becoming Cu. Therefore, the bonding strength between the ceramic plate 20 and the metal layer 40 is maintained more than in Example 1-1.
  • Example 1-1 As described above, in the ceramic laminated substrate 10 of Example 1-2, as compared with the case of Example 1-1, a decrease in bonding strength between the ceramic plate 20 and the metal layer 40 is suppressed, and the metal layer 40 to the ceramic plate 20 is suppressed. bond strength is improved.
  • Example 1-3 (Ceramic laminated substrate of Example 1-3)
  • the ceramic plate 20 of the ceramic laminated substrate 10 is manufactured without applying magnesium oxide powder in step S1a of FIG. 4, and the metal layers 30 and 40 are manufactured by a wet oxidation method.
  • FIG. 11, FIG. 12, and FIG. FIG. 11 is a schematic cross-sectional view of the ceramic laminated substrate of the first embodiment (Example 1-3)
  • FIG. 12 is a diagram of the ceramic laminated substrate of the first embodiment (Example 1-3). It is a cross-sectional schematic diagram at the time of high temperature under high voltage. Note that FIG. 11 schematically shows a microscopic state in the range enclosed by the dashed line in FIG. 12 schematically shows a microscopic state when a high voltage is applied between the metal layers 30 and 40 in FIG. 2 at a high temperature.
  • the ceramic laminated substrate 10 of Example 1-3 is constructed by laminating a metal layer 40, an intermediate layer 50b, a ceramic plate 20, an intermediate layer 50a, and a metal layer 30 in this order from the bottom. .
  • the ceramic plate 20 was manufactured without applying magnesium oxide powder in step S1a of FIG. Also, the metal layers 30 and 40 are manufactured by a wet oxidation method in step S1b of FIG. 4, as in Example 1-2.
  • the ceramic plate 20 contains, as second oxides, an oxide 22 having silicon between grains (grain boundaries and triple points) of aluminum oxide 21 and sodium oxide 23 .
  • the metal layers 30 and 40 are mainly composed of copper.
  • the intermediate layers 50a, 50b respectively contain manganese-containing oxides 53a, 53b (Mn--O) as first oxides.
  • Manganese-containing oxides 53a and 53b are formed in large amounts on the front surface side and the back surface side of the ceramic plate 20 in the intermediate layers 50a and 50b, respectively.
  • oxides 31 and 41 containing copper which are oxides containing copper, are formed at the boundaries of the metal layers 30 and 40, the ceramic plate 20, and the oxides 53a and 53b containing manganese, respectively.
  • the intermediate layers 50a and 50b containing oxides 53a and 53b containing manganese are formed so as to cover 10% or more and 80% or less of the bonding surfaces between the ceramic plate 20 and the metal layers 30 and 40. preferably 20% or more and 50% or less.
  • Example 1-3 A peeling strength evaluation test was also conducted on such a ceramic laminated substrate 10 .
  • the evaluation results for Example 1-3 are "Excellent” for the front surface of the ceramic laminated substrate 10 and "Very Good” for the back surface. That is, even if the ceramic laminated substrate 10 is subjected to a reliability test, compared with the first embodiment, the bonding strength of the metal layer 40 to the back surface of the ceramic plate 20 is somewhat improved, and deterioration of bondability is suppressed. ing.
  • the reason for this has not yet been fully elucidated at present, and although it is not bound by theory, it can be considered as follows.
  • the composition of the ceramic laminated substrate 10 after the reliability test is as shown in FIG.
  • sodium oxide 23 (see FIG. 11) is separated into sodium ions 24 and oxygen ions 25. do.
  • the sodium ions 24 pass through the grain boundaries of the aluminum oxide 21 and the oxide 22 with silicon at the triple point to migrate toward the low potential metal layer 40 which is the negative electrode.
  • the oxygen ions 25 pass through the oxide 22 containing silicon at the grain boundary of the aluminum oxide 21 and move toward the high-potential metal layer 30 which is the positive electrode.
  • the oxygen ions 25 that have migrated to the positive electrode react with the copper of the metal layer 30 to form an oxide 31 comprising copper.
  • the oxide 31 containing copper is increased, and the bonding strength to each of the aluminum oxide 21 and the oxide 22 containing silicon is improved.
  • the sodium ions 24 that have migrated to the negative electrode react with the copper-containing oxide 41 (see FIG. 11) where the manganese-containing oxide 53b is not present to reduce the copper oxide to sodium
  • the negative electrode copper oxide 41 that has reacted with the ions 24 becomes Cu and is included in the metal layer 40 .
  • the sodium ions 24 are oxidized to sodium oxide.
  • the copper-comprising oxide 41 which has a high bonding strength to each of the aluminum oxide 21 and the silicon-comprising oxide 22, is reduced.
  • the concentration of sodium ions (sodium oxide 23) increases at the grain boundaries and triple points of the silicon-containing oxide 22 in the vicinity of the boundary of the metal layer 40 of the negative electrode, and the particles of aluminum oxide 21 tend to detach. Become.
  • the manganese oxide 27 is arranged in the intermediate layers 50a and 50b. Therefore, the sodium ions 24 are blocked from reacting with the oxide 41 comprising copper. Therefore, the oxide 41 containing copper exists without becoming Cu at the location where the oxide 53b containing manganese is formed.
  • Manganese oxide 27 is arranged at the grain boundaries and triple points of aluminum oxide 21 . Therefore, the movement route of a portion of the oxide 22 having silicon at the grain boundary is blocked, and the movement of a portion of the sodium ions 24 is blocked. Therefore, the reaction between the sodium ions 24 and the oxide 41 containing copper is suppressed. Therefore, the bonding strength between the ceramic plate 20 and the metal layer 40 is maintained at this location. Also, it is conceivable that the bonding strength at this time is higher than that of Example 1-3.
  • Example 1-1 As described above, in the ceramic laminated substrate 10 of Example 1-3, as compared with the case of Example 1-1, a decrease in bonding strength between the ceramic plate 20 and the metal layer 40 is suppressed, and the metal layer 40 to the ceramic plate 20 is suppressed. bond strength is improved.
  • the ceramic plate 20 included in the ceramic laminated substrate 10 of the second embodiment further contains zirconium oxide (ZrO 2 ) compared to the ceramic plate 20 of the first embodiment.
  • ZrO 2 zirconium oxide
  • the second embodiment will also be described based on the semiconductor device 1 (FIGS. 1 and 2) of the first embodiment.
  • the ceramic laminated substrate 10 of the second embodiment is also manufactured along the flow chart of the manufacturing method in FIG. 4 of the first embodiment. Also in the second embodiment, when manufacturing the ceramic laminated substrate 10, first, a ceramic plate and a metal foil are prepared (steps S1a and S1b). Either step S1a or S1b may be performed first.
  • step S1a Preparation of the ceramic plate will be described (step S1a).
  • powder of zirconium oxide (ZrO 2 ) is added together with powder of silicon oxide (SiO 2 ) to powder of aluminum oxide (Al 2 O 3 ), and the mixture is stirred with a binder or the like to form a plate.
  • Magnesium oxide (MgO) powder is applied to the surface of a plate-shaped molding, and is fired at a predetermined temperature for a predetermined time.
  • the ceramic plate formed by firing in this manner contains aluminum oxide as ceramic particles, and an oxide comprising zirconium and an oxide comprising silicon (second oxide) at the grain boundaries and triple points of the ceramic particles. and an oxide comprising magnesium is formed on the surface. Also, an oxide having magnesium at the grain boundaries and the triple points of the ceramic particles may be formed.
  • the presence of the zirconium-containing oxide can increase the bending strength compared to the case where the zirconium-containing oxide is not present.
  • yttrium oxide (Y 2 O 3 ), magnesium oxide (MgO), or calcium oxide (CaO) is used in addition to zirconium oxide (ZrO 2 ) powder.
  • Powder may be added.
  • partially stabilized zirconia powder may be added instead of zirconium oxide (ZrO 2 ) powder.
  • the ceramic plate 20 contains aluminum oxide as ceramic particles and an oxide (second oxide) containing partially stabilized zirconia and silicon at the grain boundaries and triple points of the ceramic particles.
  • the partially stabilized zirconia preferably contains 2.5 mol% or more and 3.5 mol% of yttrium converted to yttrium oxide (Y 2 O 3 ) with respect to zirconia converted to zirconium oxide (ZrO 2 ). Included below. By doing so, the bending strength can be further increased compared to the case of using only zirconium oxide.
  • the average particle size of the ceramic particles is 0.5 ⁇ m or more and 25 ⁇ m or less. More preferably, it is 1 ⁇ m or more and 10 ⁇ m or less.
  • the content of aluminum oxide in terms of oxide is 80 wt% or more and 95 wt% or less, more preferably 84 wt% or more and 92 wt% or less.
  • the content of the oxide containing zirconium is 5.0 wt% or more and 20.0 wt% or less of the entire amount in terms of zirconium oxide (ZrO 2 ) with respect to the total amount in terms of oxide, more preferably contains 8 wt % or more and 16 wt % or less.
  • the content of the oxide containing silicon in the ceramic plate 20 is 0.01 wt% or more and 3.0 wt% or less in terms of silicon oxide (SiO 2 ) with respect to the total amount in terms of oxide. and more preferably 1.0 wt % or more and 3.0 wt % or less. If the content of oxides containing silicon is too low, many voids remain in the ceramic plate, making it susceptible to cracking. On the other hand, if the amount is too large, the thermal conductivity of the ceramic plate is lowered, resulting in poor heat dissipation.
  • the ceramic plate 20 of the second embodiment also includes various materials used for manufacturing in addition to ceramic particles, oxides containing magnesium, oxides containing silicon, and oxides containing zirconium. .
  • An example of such a material is an oxide with sodium.
  • sodium oxide is 0.001 wt% or more and 0.2 wt% or less in terms of sodium oxide (Na 2 O) with respect to the total amount in terms of oxide. Yes, more preferably 0.002 wt% or more and 0.2 wt% or less. If the content of the oxide containing sodium is too low, it will be difficult to purify the ceramic raw material powder. On the other hand, if it is too large, ⁇ -alumina is formed, which tends to cause a decrease in insulating properties and a decrease in strength.
  • the ceramic plate 20 preferably does not contain ⁇ -alumina.
  • step S1b The creation of the metal foil in step S1b is performed in the same manner as in the first embodiment. Further, the manufacturing method after step S2 is carried out in the same manner as in the first embodiment using the ceramic plate produced in step S1a of the second embodiment.
  • the ceramic laminated substrate 10 including the intermediate layers 50a and 50b between the ceramic plate 20 and the metal layers 30 and 40 is manufactured.
  • the intermediate layers 50a and 50b suppress deterioration in bonding between the metal layers 30 and 40 and the ceramic plate 20.
  • the content of the oxide containing magnesium in the ceramic plate 20 and the intermediate layers 50a and 50b is is 0.1 wt % or more and 1.5 wt % or less in terms of magnesium oxide (MgO) with respect to the total amount in terms of oxides.
  • MgO magnesium oxide
  • the magnesium content in terms of magnesium oxide (MgO) is 2.0 wt% or more and 20.0 wt% or less, more preferably, with respect to the content of zirconium in terms of zirconium oxide (ZrO 2 ). is 7.5 wt % or more and 15 wt % or less. If magnesium oxide powder is not applied in step S1a of the second embodiment, the ceramic laminated substrate 10 does not contain magnesium (less than the lower limit of measurement of 0.01 wt%).
  • the content of manganese oxide in the ceramic plate 20 and the intermediate layers 50a and 50b is 0.01 wt% or more and 0.01 wt% or more. .15 wt % or less.
  • the manganese content in terms of manganese oxide is 0.05 wt% or more and 2 wt% or less, more preferably 0.2 wt% or more and 0 .8 wt% or less.
  • the wet oxidation method using the manganese-containing solution was not performed in step S1b, the content of manganese was not confirmed in the ceramic laminated substrate 10, and was less than the lower limit of measurement of 0.01 wt%.
  • magnesium is sputtered or vapor-deposited onto the ceramic plate or metal foil, or oxidized to provide magnesium.
  • An oxide with magnesium can also be formed in the intermediate layers 50a, 50b by forming a material.
  • the surface of the plate-like molding may be coated with magnesium or a powder or solution containing magnesium and fired.
  • Examples 2-1 to 2-3 corresponding to the intermediate layers 50a and 50b in the ceramic laminated substrate 10 including the ceramic plate containing aluminum oxide and zirconium oxide as main components will be described. Also in the second embodiment, the same reliability test as in the first embodiment is performed.
  • FIG. 14 is a schematic cross-sectional view of the ceramic laminated substrate of Comparative Example 2
  • FIG. 15 is a cross-sectional schematic diagram of the ceramic laminated substrate of Comparative Example 2 at high temperature and high voltage. Note that FIG. 14 schematically shows a microscopic state in the range enclosed by the dashed line in FIG. 15 schematically shows a microscopic state when a high voltage is applied between the metal layers 30 and 40 at a high temperature in FIG.
  • the ceramic plate 120 of Comparative Example 2 was manufactured without applying magnesium oxide powder in step S1a (second embodiment) of FIG. Moreover, the metal layers 30 and 40 are manufactured by a dry oxidation method in step S1b of FIG.
  • the ceramic laminated substrate 100 manufactured in this manner is configured by laminating a metal layer 40, a ceramic plate 120, and a metal layer 30 in order from the bottom.
  • Ceramic plate 120 includes, as second oxides, oxide 22 having silicon between grains of aluminum oxide 21 (grain boundaries and triple points) and zirconium oxide 28 . Additionally, sodium oxide 23 may be included. Instead of the zirconium oxide 28, an oxide containing zirconium, such as partially stabilized zirconia, may be used.
  • the metal layers 30 and 40 are mainly composed of copper as in the first embodiment.
  • the ceramic laminated substrate 100 of the comparative example does not contain magnesium and manganese. That is, the ceramic laminated substrate 100 manufactured in this manner does not have the intermediate layers 50a, 50b containing an oxide containing at least one of magnesium and manganese.
  • the oxygen ions 25 generated by the reduction of the oxide 41 (Cu—O) containing copper pass through the grain boundaries of the aluminum oxide 21 and the zirconium oxide 28 at the triple point, and pass through the high-potential metal that is the positive electrode. Move to the layer 30 side.
  • Oxygen ions 25 that have migrated to the positive electrode react with copper in metal layer 30 to grow oxide 31 comprising copper. For example, the reaction Cu+O 2 ⁇ ⁇ CuO+2e (electrons) occurs. Therefore, in the positive electrode, the oxide 31 containing copper is excessively increased, and the bonding strength between the metal layer 30 and the ceramic laminated substrate 10 is lowered.
  • Example 2-1 corresponds to Example 1-1.
  • FIG. 16 is a schematic cross-sectional view of the ceramic laminated substrate of the second embodiment (Example 2-1)
  • FIG. 17 is a diagram of the ceramic laminated substrate of the second embodiment (Example 2-1). It is a cross-sectional schematic diagram at the time of high temperature under high voltage. Note that FIG. 16 schematically shows a microscopic state in the range enclosed by the dashed line in FIG. 17 schematically shows a microscopic state when a high voltage is applied between the metal layers 30 and 40 at a high temperature in FIG.
  • the ceramic laminated substrate 10 of Example 2-1 is constructed by laminating a metal layer 40, an intermediate layer 50b, a ceramic plate 20, an intermediate layer 50a, and a metal layer 30 in this order from the bottom. .
  • the ceramic plate 20 is manufactured by applying magnesium oxide powder in step S1a (second embodiment) of FIG. Moreover, the metal layers 30 and 40 are manufactured by a dry oxidation method in step S1b of FIG.
  • the ceramic plate 20 contains, as a second oxide, an oxide 22 having silicon between grains (grain boundaries and triple points) of aluminum oxide 21 and zirconium oxide 28 . Furthermore, sodium oxide 23 and magnesium oxide may be included. Instead of the zirconium oxide 28, an oxide containing zirconium, such as partially stabilized zirconia, may be used.
  • the metal layers 30 and 40 are mainly composed of copper, as in the first embodiment.
  • the intermediate layers 50a, 50b respectively contain oxides 51a, 51b comprising magnesium as first oxides.
  • the oxides 51a and 51b containing magnesium are formed in large amounts on the front surface side and the back surface side of the ceramic plate 20 in the intermediate layers 50a and 50b, respectively.
  • the boundaries between the metal layers 30 and 40 and the ceramic plate 20, and the oxides 31 and 41 containing copper at the boundaries between the oxides 51a and 51b containing magnesium and the metal layers 30 and 40 and the ceramic plate 20 are formed, respectively. formed.
  • the intermediate layers 50a and 50b containing oxides 51a and 51b containing magnesium are formed so as to cover 10% or more and 80% or less of the joint surface between the ceramic plate 20 and the metal layers 30 and 40. preferably 20% or more and 50% or less.
  • a peeling strength evaluation test was also conducted on such a ceramic laminated substrate 10 .
  • the evaluation results for Example 2-1 were "Good” for the front surface of the ceramic laminated substrate 10 and "Good” for the back surface. That is, in the ceramic laminated substrate 10, the bonding strength of the metal layers 30 and 40 to the ceramic plate 20 is somewhat improved as compared with the comparative example, and deterioration of bondability is suppressed. The reason for this has not yet been fully elucidated at present, and although it is not bound by theory, it can be considered as follows.
  • the ceramic laminated substrate 10 of Example 2-1 high potential (positive electrode) and low potential (negative electrode) voltages are applied to the metal layers 30 and 40 at high temperatures.
  • the oxide 41 containing copper (Cu—O) is reduced at the boundary between the metal layer 40 on the negative electrode side and the zirconium oxide 28 of the ceramic plate 20. be done.
  • the ceramic laminated substrate 10 has an intermediate layer 50b including an oxide 51b containing magnesium on the negative electrode side.
  • the zirconium oxide 28 and the oxide 41 containing copper do not come into direct contact, and the reduction of the oxide 41 containing copper is suppressed. be done. That is, the intermediate layer 50b blocks reduction of the oxide 41 comprising copper. Therefore, the oxide 41 containing copper is present without becoming copper at the location where the intermediate layer 50b is formed. Moreover, since reduction at the negative electrode is suppressed, less oxygen ions are generated, and excessive oxidation of copper at the boundary between the metal layer 30 and the ceramic plate 20 is suppressed on the positive electrode side as well. Therefore, since the intermediate layer 50b containing the oxide 51b containing magnesium is formed on the negative electrode side, the bonding strength of the metal layers 30 and 40 to the ceramic plate 20 is somewhat improved compared to Comparative Example 2. Decrease in bondability is suppressed.
  • magnesium oxide 26 may exist at grain boundaries and triple points. By doing so, the movement route of oxygen ions at the grain boundary is partially blocked. This also suppresses oxidation-reduction reactions at the positive electrode and the negative electrode.
  • the ceramic laminated substrate 10 may have an intermediate layer 50a including an oxide 51a containing magnesium on the positive electrode side. By doing this, the zirconium oxide 28 and the oxide 31 (Cu—O) containing copper do not come into direct contact with each other in the portion where the intermediate layer 50b is formed on the positive electrode side, and oxidation of the metal layer 30 is suppressed. be. That is, the intermediate layer 50a blocks oxidation of the metal layer 30. FIG. By doing so, the bonding strength of the metal layers 30 and 40 to the ceramic plate 20 is further improved, and deterioration of the bondability is suppressed.
  • Example 1-1 As described above, in the ceramic laminated substrate 10 of Example 2-1, as in Example 1-1, a decrease in the bonding strength between the ceramic plate 20 and the metal layer 40 is suppressed, and the metal layer 40 is bonded to the ceramic plate 20. Improves strength.
  • Example 2-1 as in Example 1-1, if the ceramic laminated substrate 10 has at least an intermediate layer 50b between the back surface (low potential side) of the ceramic plate 20 and the metal layer 40, A decrease in bondability of the metal layer 40 is suppressed, and deterioration of the ceramic laminated substrate 10 can be prevented.
  • Example 2-2 the ceramic plate 20 of the ceramic laminated substrate 10 is manufactured by applying magnesium oxide powder in step S1a (second embodiment) of FIG. 4, and the metal layers 30 and 40 are wet-oxidized. 18 and 19, the case of manufacturing by the method will be described.
  • FIG. 18 is a schematic cross-sectional view of the ceramic laminated substrate of the second embodiment (Example 2-2)
  • FIG. 19 is a diagram of the ceramic laminated substrate of the second embodiment (Example 2-2). It is a cross-sectional schematic diagram at the time of high temperature under high voltage. Note that FIG. 18 schematically shows a microscopic state at a location corresponding to the range enclosed by the dashed line in FIG. 19 schematically shows a microscopic state when a high voltage is applied between the metal layers 30 and 40 in FIG. 2 at a high temperature.
  • the ceramic laminated substrate 10 of Example 2-2 is constructed by laminating a metal layer 40, an intermediate layer 50b, a ceramic plate 20, an intermediate layer 50a, and a metal layer 30 in this order from the bottom. .
  • the ceramic plate 20 is manufactured by applying magnesium oxide powder in step S1a (second embodiment) of FIG. 4 in the same manner as in Example 2-1. Also, the metal layers 30 and 40 are manufactured by a wet oxidation method in step S1b of FIG. 4, unlike Example 2-1.
  • the ceramic plate 20 contains, as a second oxide, an oxide 22 having silicon between grains (grain boundaries and triple points) of aluminum oxide 21 and zirconium oxide 28 . Furthermore, sodium oxide 23 and magnesium oxide may be included. Instead of the zirconium oxide 28, an oxide containing zirconium, such as partially stabilized zirconia, may be used.
  • the metal layers 30 and 40 are mainly composed of copper.
  • Intermediate layers 50a and 50b contain oxides 52a and 52b, respectively, containing magnesium and manganese as first oxides, as in Example 1-2.
  • the oxides 52a and 52b containing magnesium and manganese are formed in the intermediate layers 50a and 50b in large amounts on the front surface side and the back surface side of the ceramic plate 20, respectively.
  • oxides 31, 41 containing copper are respectively formed at boundaries between the metal layers 30, 40, the ceramic plate 20, and the oxides 52a, 52b containing magnesium and manganese.
  • Example 2-1 in the ceramic laminated substrate 10 (before the reliability test), the range covered by the intermediate layers 50a and 50b is limited to increase the bonding strength between the ceramic plate 20 and the metal layers 30 and 40. I could't do it.
  • Example 2-2 intermediate layers 50a, 50b containing oxides 52a, 52b comprising magnesium and manganese can be widely formed. As a result, the bonding strength between the ceramic plate 20 and the metal layers 30, 40 can be made higher than in Example 2-1.
  • Such intermediate layers 50a and 50b are preferably formed so as to cover 20% or more and 80% or less of the bonding surfaces between the ceramic plate 20 and the metal layers 30 and 40. As shown in FIG.
  • Example 2-2 A peeling strength evaluation test was also conducted on such a ceramic laminated substrate 10 .
  • the evaluation results for Example 2-2 were "Excellent" for the front surface of the ceramic laminate substrate 10 and "Excellent” for the back surface. That is, in the ceramic laminated substrate 10, the decrease in the bonding strength of the metal layers 30, 40 to the ceramic plate 20 is greatly suppressed as compared with the comparative example. Furthermore, the reduction in the bonding strength of the metal layers 30 and 40 to the ceramic plate 20 is suppressed more than in Example 2-1.
  • the reason for this has not yet been fully elucidated at present, and although it is not bound by theory, it can be considered as follows.
  • the ceramic laminated substrate 10 of Example 2-2 has an intermediate layer 50b including an oxide 52b containing magnesium and manganese on the negative electrode side. Therefore, in the portion where the intermediate layer 50b is formed on the negative electrode side, the zirconium oxide 28 and the oxide 41 containing copper (Cu—O) do not come into direct contact, and the reduction of the oxide 41 containing copper is suppressed. be done. That is, the intermediate layer 50b blocks reduction of the oxide 41 comprising copper. Therefore, the oxide 41 containing copper is present without becoming copper at the location where the intermediate layer 50b is formed.
  • magnesium oxide 26 may exist at grain boundaries and triple points. By doing so, the movement route of oxygen ions at the grain boundary is partially blocked. This also suppresses oxidation-reduction reactions at the positive electrode and the negative electrode.
  • the ceramic laminated substrate 10 may have an intermediate layer 50a including an oxide 52a containing magnesium and manganese on the positive electrode side. By doing this, the zirconium oxide 28 and the oxide 31 (Cu—O) containing copper do not come into direct contact with each other in the portion where the intermediate layer 50b is formed on the positive electrode side, and oxidation of the metal layer 30 is suppressed. be. That is, the intermediate layer 50a blocks oxidation of the metal layer 30. FIG. By doing so, the bonding strength of the metal layers 30 and 40 to the ceramic plate 20 is further improved, and deterioration of the bondability is suppressed.
  • Example 2-2 As described above, in the ceramic laminated substrate 10 of Example 2-2, the decrease in the bonding strength between the ceramic plate 20 and the metal layer 40 is further suppressed as compared with Example 2-1 and Example 2-3 described later. As a result, the bonding strength of the metal layer 40 to the ceramic plate 20 is improved.
  • FIG. 20 is a schematic cross-sectional view of the ceramic laminated substrate of the second embodiment (Example 2-3)
  • FIG. 21 is a diagram of the ceramic laminated substrate of the second embodiment (Example 2-3). It is a cross-sectional schematic diagram at the time of high temperature under high voltage. Note that FIG. 20 schematically shows a microscopic state in the range enclosed by the dashed line in FIG. 21 schematically shows a microscopic state when a high voltage is applied between the metal layers 30 and 40 at a high temperature in FIG.
  • the ceramic laminated substrate 10 of Example 2-3 is constructed by laminating a metal layer 40, an intermediate layer 50b, a ceramic plate 20, an intermediate layer 50a, and a metal layer 30 in this order from the bottom. .
  • the ceramic plate 20 was manufactured without applying magnesium oxide powder in step S1a (second embodiment) of FIG. Also, the metal layers 30 and 40 are manufactured by a wet oxidation method in step S1b of FIG. 4, similarly to Example 2-2.
  • the ceramic plate 20 contains, as a second oxide, an oxide 22 having silicon between grains (grain boundaries and triple points) of aluminum oxide 21 and zirconium oxide 28 . Additionally, sodium oxide 23 may be included. Instead of the zirconium oxide 28, an oxide containing zirconium, such as partially stabilized zirconia, may be used.
  • the metal layers 30 and 40 are mainly composed of copper.
  • the intermediate layers 50a, 50b respectively contain oxides 53a, 53b comprising manganese as first oxides.
  • Manganese-containing oxides 53a and 53b are formed in large amounts on the front surface side and the back surface side of the ceramic plate 20 in the intermediate layers 50a and 50b, respectively.
  • oxides 31 and 41 containing copper which are oxides containing copper, are formed at the boundaries of the metal layers 30 and 40, the ceramic plate 20, and the oxides 53a and 53b containing manganese, respectively.
  • the intermediate layers 50a and 50b containing oxides 53a and 53b containing manganese are formed so as to cover 10% or more and 80% or less of the bonding surfaces between the ceramic plate 20 and the metal layers 30 and 40. preferably 20% or more and 50% or less.
  • a peeling strength evaluation test was also conducted on such a ceramic laminated substrate 10 .
  • the evaluation results for Example 2-2 were "Excellent” for the front surface of the ceramic laminated substrate 10 and "Very Good” for the back surface. That is, in the ceramic laminated substrate 10, the decrease in the bonding strength of the metal layers 30, 40 to the ceramic plate 20 is suppressed as compared with the second comparative example. Furthermore, the reduction in the bonding strength of the metal layers 30 and 40 to the ceramic plate 20 is suppressed more than in Example 2-1.
  • the reason for this has not yet been fully elucidated at present, and although it is not bound by theory, it can be considered as follows.
  • the ceramic laminated substrate 10 of Example 2-3 has an intermediate layer 50b including an oxide 53b containing manganese on the negative electrode side. Therefore, in the portion where the intermediate layer 50b is formed on the negative electrode side, the zirconium oxide 28 and the oxide 41 containing copper (Cu—O) do not come into direct contact, and the reduction of the oxide 41 containing copper is suppressed. be done. That is, the intermediate layer 50b blocks reduction of the oxide 41 comprising copper. Therefore, the oxide 41 containing copper is present without becoming copper at the location where the intermediate layer 50b is formed.
  • the ceramic laminated substrate 10 may have an intermediate layer 50a including an oxide 53a containing manganese on the positive electrode side.
  • the zirconium oxide 28 and the oxide 31 (Cu—O) containing copper do not come into direct contact with each other in the portion where the intermediate layer 50b is formed on the positive electrode side, and oxidation of the metal layer 30 is suppressed. be. That is, the intermediate layer 50a blocks oxidation of the metal layer 30. FIG. By doing so, the bonding strength of the metal layers 30 and 40 to the ceramic plate 20 is further improved, and deterioration of the bondability is suppressed.
  • Example 2-3 As described above, in the ceramic laminated substrate 10 of Example 2-3, compared with the case of Example 2-1, the decrease in the bonding strength between the ceramic plate 20 and the metal layer 40 is further suppressed, and the metal layer to the ceramic plate 20 The joint strength of 40 is improved.
  • the intermediate layer are required.
  • the control signals input to the control electrodes 61a and 61b of the semiconductor chips 60a and 60b are off. Therefore, in the ceramic laminated substrate 10, the metal layers 30a and 30b are at high potential, and the metal layer 30d is at low potential.
  • the upper arm portion A and the lower arm portion B at this time are called a stopped state. 22(A), 23(A), and 24(A), which will be described later, respectively, when the semiconductor device 1 is stopped.
  • the control signal input to the control electrode 61a of the semiconductor chip 60a is on, and the control signal input to the control electrode 61b of the semiconductor chip 60b is off. Therefore, in the ceramic laminated substrate 10, the metal layers 30a, 30b, 30c are at high potential, and the metal layer 30d is at low potential.
  • the upper arm portion A at this time is called a driving state, and the lower arm portion B is called a stopped state. 22(B), 23(B), and 24(B), which will be described later, correspond to the driving of the semiconductor device 1, respectively.
  • the control electrode 61a of the semiconductor chip 60a is off and the control electrode 61b of the semiconductor chip 60b is on. Therefore, in the ceramic laminated substrate 10, the metal layers 30a and 30b are at high potential, and the metal layers 30c and 30d are at low potential.
  • the upper arm portion A at this time is called a stopped state, and the lower arm portion B is called a driving state. Further, when the semiconductor device 1 is driven, it corresponds to the cases of FIGS.
  • FIG. 22 is a diagram for explaining a region requiring an intermediate layer of the ceramic laminated substrate (the back surface metal layer has a low potential) according to the third embodiment.
  • FIG. 23 is a diagram for explaining a region requiring an intermediate layer of the ceramic laminated substrate (the back surface metal layer has a high potential) according to the third embodiment.
  • FIG. 24 is a diagram for explaining a region requiring an intermediate layer of the ceramic laminated substrate (the back surface metal layer has a floating potential) according to the third embodiment.
  • FIG. 25 is a diagram for explaining a region requiring an intermediate layer of the ceramic laminated substrate of the third embodiment.
  • 22 to 24 simply illustrate the ceramic laminated substrate 10, the semiconductor chips 60a and 60b, and the external connection terminals 71 to 75 of FIG. Only components necessary for explanation are given reference numerals.
  • 22(A), 23(A), and 24(A) correspond to the case where the upper arm portion A and the lower arm portion B are in a stopped state.
  • 22(B), 23(B), and 24(B) correspond to the case where the upper arm portion A is in the driving state and the lower arm portion B is in the stopped state.
  • 22(C), 23(C), and 24(C) correspond to the case where the upper arm portion A is in a stopped state and the lower arm portion B is in a driving state.
  • FIGS. 22(D), 23(D), and 24(D) respectively show intermediate layer forming regions.
  • the metal layer 40 which is the back metal layer
  • the metal layers 30a and 30b have a high potential and the metal layer 30d has a low potential, as shown in FIG. 22(A).
  • the metal layer 30c has a floating potential.
  • a potential difference is generated between the high-potential metal layers 30a and 30b and the low-potential metal layer 40 (areas P1 and P2 indicated by dashed lines) on the ceramic plate 20 .
  • the metal layer 40 is peeled off between the ceramic plate 20 in the region P1 and the region of the metal layer 40 facing the metal layer 30a. Moreover, it is conceivable that the metal layer 40 is peeled off between the ceramic plate 20 in the P2 region and the region of the metal layer 40 facing the metal layer 30b.
  • the L1 area is the boundary between the ceramic plate 20 and the area of the metal layer 40 facing the metal layer 30a.
  • the L2 area is the boundary between the ceramic plate 20 and the area of the metal layer 40 facing the metal layer 30b.
  • the L3 area is the boundary between the ceramic plate 20 and the area of the metal layer 40 facing the metal layer 30c.
  • FIGS. 22(A) to 22(C) it is conceivable that the potential difference is frequently generated between the ceramic plate 20 and the regions of the metal layer 40 facing the metal layers 30a and 30b. Therefore, it is necessary to form an intermediate layer at least in the L1 and L2 regions.
  • the metal layer 40 which is the back metal layer
  • the metal layers 30a and 30b have a high potential and the metal layer 30d has a low potential, as shown in FIG. 23(A).
  • the metal layer 30c has a floating potential.
  • a potential difference is generated between the low-potential metal layer 30d and the high-potential metal layer 40 in the ceramic plate 20 (area P4 indicated by the dashed line). Therefore, it is conceivable that the metal layer 30d is peeled off between the ceramic plate 20 and the metal layer 30d in the P4 region.
  • the L4 area is the boundary between the ceramic plate 20 and the metal layer 30c.
  • the L5 area is the boundary between the ceramic plate 20 and the metal layer 30d.
  • FIGS. 23A to 23C it is conceivable that the potential difference between the ceramic plate 20 and the metal layer 30d occurs frequently. Therefore, it is necessary to form an intermediate layer at least in the L5 region.
  • the metal layer 40 which is the rear metal layer in the ceramic laminated substrate 10 has a floating potential. That is, when the semiconductor device 1 is not driven, no potential is applied to the metal layer 40 . At this time, when the upper arm portion A and the lower arm portion B are in a stopped state, the metal layers 30a and 30b have a high potential and the metal layer 30d has a low potential, as shown in FIG. 24(A). At this time, the metal layer 40, which is the back metal layer, has a potential corresponding to the area ratio of the potential of the front surface. In this embodiment, the high potential area is larger than the low potential area (see FIG. 1). Therefore, the metal layer 40 has a potential closer to the high potential than the low potential.
  • the metal layer 40 which is the back metal layer, has a potential corresponding to the area ratio of the potential of the front surface.
  • the high potential area is much larger than the low potential area (see FIG. 1). Therefore, the metal layer 40 has a potential substantially equal to the high potential. Therefore, the gold augmentation layer 40 has substantially the same potential as the metal layers 30a, 30b, 30c.
  • a potential difference is generated between the low-potential metal layer 30d and the high-potential metal layer 40 in the ceramic plate 20 (area P4 indicated by the dashed line). Therefore, it is conceivable that the metal layer 30d is peeled off between the ceramic plate 20 and the metal layer 30d in the P4 region.
  • the metal layer 40 which is the back metal layer, has a potential corresponding to the area ratio of the potential of the front surface.
  • the high potential area and the low potential area are almost the same (see FIG. 1). Therefore, the metal layer 40 has an intermediate potential between the high potential and the low potential.
  • the high potential metal layers 30a, 30b and the metal layer 40 on the ceramic plate 20 P1, P2 regions indicated by broken lines
  • a potential difference half the difference between the high potential and the low potential is generated.
  • a potential difference half the difference between the high potential and the low potential is generated between the low potential metal layers 30c and 30d and the metal layer 40 (P3 and P4 regions indicated by broken lines). Therefore, it is conceivable that separation occurs between the ceramic plate 20 and the metal layer 40 in the P1 and P2 regions. Also, it is conceivable that separation occurs between the ceramic plate 20 and the metal layers 30c and 30d in the P3 and P4 regions.
  • intermediate layers are formed in the L1, L2 and L5 regions shown in FIG. It requires
  • the L1 area is the boundary between the ceramic plate 20 and the area of the metal layer 40 facing the metal layer 30a.
  • the L2 area is the boundary between the ceramic plate 20 and the area of the metal layer 40 facing the metal layer 30b.
  • the L5 area is the boundary between the ceramic plate 20 and the metal layer 30d.
  • FIGS. 24(A) to 24(C) it is conceivable that the potential difference between the ceramic plate 20 and the metal layer 30d occurs frequently. Therefore, it is necessary to form an intermediate layer at least in the L5 region.
  • the ceramic laminated substrate 10 has intermediate layers in the L1 to L5 regions indicated by broken lines, as shown in FIG. It is necessary to form
  • the L1 area is the boundary between the ceramic plate 20 and the area of the metal layer 40 facing the metal layer 30a.
  • the L2 area is the boundary between the ceramic plate 20 and the area of the metal layer 40 facing the metal layer 30b.
  • the L3 area is the boundary between the ceramic plate 20 and the area of the metal layer 40 facing the metal layer 30c.
  • the L4 area is the boundary between the ceramic plate 20 and the metal layer 30c.
  • the L5 area is the boundary between the ceramic plate 20 and the metal layer 30d. Considering the frequency of occurrence of potential differences in FIGS. 22 to 24, it is necessary to form intermediate layers at least in the L1, L2 and L5 regions.
  • the intermediate layer may not be present at the boundary between the ceramic plate 20 and the region of the metal layer 40 facing the metal layer 30d.
  • the ceramic plate 20 may be made mainly of ceramics that are insulating and have good thermal conductivity. Such ceramics are not limited to aluminum oxide and zirconium oxide. For example, aluminum nitride (AlN) or silicon nitride (Si 3 N 4 ) may be used as the main component. Furthermore, zirconium oxide may be added to such aluminum nitride or silicon nitride.
  • the ceramic plate 20 may also contain a grain boundary material formed at the grain boundaries and triple points of the ceramic grains. Such grain boundary materials may include, for example, oxides comprising aluminum and silicon (second oxides).
  • Reference Signs List 1 semiconductor device 10 ceramic laminated substrate 20 ceramic plate 21 aluminum oxide 22 oxide containing silicon 23 sodium oxide 24 sodium ion 25 oxygen ion 26 magnesium oxide 27 manganese oxide 30, 30a to 30f metal layer (high potential metal layer) 35 joining member 31, 41 oxide comprising copper 40 metal layer (low potential metal layer) 50a, 50b intermediate layer 51a, 51b oxide comprising magnesium 52a, 52b oxide comprising magnesium and manganese 53a, 53b oxide comprising manganese 60a, 60b, 65a, 65b semiconductor chip 61a, 61b control electrode 62a, 62b Output electrodes 66a, 66b Input electrodes 71-75 External connection terminals 80a-80e Bonding wires 81-85 Wiring 90 Case 91 Sealing member 92 Heat dissipation member 92 Heat dissipation member

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