WO2021146931A1 - 发光板、线路板以及显示装置 - Google Patents

发光板、线路板以及显示装置 Download PDF

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Publication number
WO2021146931A1
WO2021146931A1 PCT/CN2020/073558 CN2020073558W WO2021146931A1 WO 2021146931 A1 WO2021146931 A1 WO 2021146931A1 CN 2020073558 W CN2020073558 W CN 2020073558W WO 2021146931 A1 WO2021146931 A1 WO 2021146931A1
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WIPO (PCT)
Prior art keywords
electrode
light
sub
emitting
contact point
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PCT/CN2020/073558
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English (en)
French (fr)
Inventor
杨明
谷其兵
胡国锋
时凌云
玄明花
张粲
Original Assignee
京东方科技集团股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by 京东方科技集团股份有限公司 filed Critical 京东方科技集团股份有限公司
Priority to EP20866971.3A priority Critical patent/EP4095918A4/en
Priority to JP2022505510A priority patent/JP2023520088A/ja
Priority to US17/281,443 priority patent/US11869921B2/en
Priority to PCT/CN2020/073558 priority patent/WO2021146931A1/zh
Priority to CN202080000063.0A priority patent/CN113498554A/zh
Priority to TW109146206A priority patent/TWI764471B/zh
Publication of WO2021146931A1 publication Critical patent/WO2021146931A1/zh
Priority to US18/507,284 priority patent/US20240079443A1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/15Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission
    • H01L27/153Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission in a repetitive configuration, e.g. LED bars
    • H01L27/156Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/075Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
    • H01L25/0753Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00 the devices being arranged next to each other
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09FDISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • G09F9/30Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
    • G09F9/33Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements being semiconductor devices, e.g. diodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/38Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
    • H01L33/387Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape with a plurality of electrode regions in direct contact with the semiconductor body and being electrically interconnected by another electrode layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls

Definitions

  • At least one embodiment of the present disclosure relates to a light-emitting board, a circuit board, and a display device.
  • Mini LED can be used as a backlight source.
  • the Mini LED is used as a backlight source and combined with a traditional liquid crystal display panel, by controlling the switch of the Mini LED in the subarea, the liquid crystal display device can have a high contrast ratio equivalent to that of an organic light emitting diode display device.
  • Mini LED can also be directly made into large-size display products, which has a good market prospect.
  • the embodiments of the present disclosure provide a light-emitting board, a circuit board, and a display device.
  • At least one embodiment of the present disclosure provides a light-emitting panel, including: a base substrate; a plurality of light-emitting units arranged on the base substrate in an array along a first direction and a second direction, and each light-emitting unit includes at least one light-emitting sub-unit
  • the light emitting subunit includes a connecting line unit and a light emitting diode chip connected to the connecting line unit, and the light emitting diode chip is located on a side of the connecting line unit away from the base substrate.
  • the light-emitting panel further includes: a plurality of first electrode traces extending along the first direction.
  • the plurality of first electrode traces includes a plurality of first electrode traces of the first type and a plurality of first electrode traces of the second type, and a row of light-emitting subunits arranged along the first direction includes a plurality of first light-emitting subunits and multiple A second light-emitting subunit, the first light-emitting subunit is connected to the first electrode trace of the first type through the first electrode contact point, and the second light-emitting subunit is connected to the first electrode trace of the second type through the first electrode contact point .
  • first electrode traces of the first type and the first electrode traces of the second type connected to a row of light emitting subunits arranged along the first direction are respectively located on both sides of the row of light emitting subunits.
  • each of the first electrode traces of the first type includes a first sub-electrode trace and a second sub-electrode trace extending along the same straight line and mutually insulated and spaced apart, and the plurality of first light-emitting sub-units are close to the first sub-electrode trace
  • the part of the first light-emitting subunit is connected to the first sub-electrode trace, and the part of the plurality of first light-emitting sub-units close to the second sub-electrode trace is connected to the second sub-electrode trace
  • each second type of first electrode trace includes a line along the same line
  • the third sub-electrode wiring and the fourth sub-electrode wiring that extend and are insulated from each other, the part of the plurality of second light-emitting sub-units close to the third sub-electrode wiring is connected to the third sub-electrode wiring, and the plurality of second light-emitting sub-units are connected to the third
  • the light-emitting panel further includes: a plurality of second electrode traces extending along the second direction, and the second electrode traces are located between the first electrode traces and the base substrate.
  • Each connection line unit further includes a second electrode connection part, the second electrode connection part and the first electrode wiring are arranged in the same layer, and the second electrode contact point in each connection line unit is connected to the second electrode connection part through the second electrode connection part. Electrode wiring connection.
  • the second electrode contact point and the second electrode connecting portion are an integral structure.
  • the orthographic projection of each second electrode trace on the base substrate overlaps the orthographic projection of an electrical contact point pair and a part of the second electrode connecting portion on the base substrate.
  • each light-emitting unit includes three light-emitting sub-units of different colors arranged along the second direction
  • the second electrode wiring includes a first-type second electrode wiring and a second-type second electrode wiring
  • the light-emitting unit One of the light-emitting sub-units is connected to the first-type second electrode wiring, and the other two light-emitting sub-units in the light-emitting unit are connected to the second-type second electrode wiring.
  • each connection line unit includes two pairs of electrical contact points, and each connection line unit further includes two first electrode connection parts connected to each first electrode contact point, and the first electrode connection part is located at the first electrode contact point.
  • the first electrode contact point is connected to the first electrode trace through the first electrode connection part, and the orthographic projection of at least part of the first electrode connection part on the base substrate and the second electrode The orthographic projections of the traces on the base substrate do not overlap.
  • At least one embodiment of the present disclosure provides a circuit board, including: a base substrate; a plurality of connection circuit units arranged in an array on the base substrate in a first direction and a second direction.
  • Each connection line unit includes at least two electrical contact point pairs, each electrical contact point pair includes a first electrode contact point and a second electrode contact point, in each connection line unit, the first electrode contact points are electrically connected to each other, The second electrode contact points are electrically connected to each other.
  • first electrode traces of the first type and the first electrode traces of the second type connected to a row of connection line units arranged along the first direction are respectively located on both sides of the row of connection line units.
  • each first-type first electrode wiring includes a first sub-electrode wiring and a second sub-electrode wiring that extend along the same straight line and are insulated from each other.
  • the wiring is close to the first sub-electrode.
  • the part of the first electrode is connected to the first sub-electrode trace, and the part of the plurality of first connection line units that is close to the second sub-electrode trace is connected to the second sub-electrode trace; each second type of first electrode trace includes a line along the same line
  • the third sub-electrode traces and the fourth sub-electrode traces that extend and are insulated from each other are connected to the third sub-electrode traces in multiple second connection line units that are close to the third sub-electrode traces, and multiple second connections
  • the part of the circuit unit close to the fourth sub-electrode trace is connected to the fourth sub-electrode trace.
  • the circuit board further includes a plurality of second electrode traces extending along the second direction, and the second electrode trace is located on the side of the first electrode trace facing the base substrate.
  • Each connection line unit further includes a second electrode connection part, the second electrode connection part and the first electrode wiring are arranged in the same layer, and the second electrode contact point in each connection line unit is connected to the second electrode connection part through the second electrode connection part. Electrode wiring connection.
  • the orthographic projection of each second electrode trace on the base substrate overlaps the orthographic projection of an electrical contact point pair and a part of the second electrode connecting portion on the base substrate.
  • connection line unit group three adjacent connection line units arranged in the second direction form a connection line unit group, and the second electrode wiring includes a first type of second electrode wiring and a second type of second electrode wiring, and the connection line unit group
  • One of the connecting circuit units is connected to the first type of second electrode wiring, and the other two connecting circuit units in the connecting circuit unit group are connected to the second type of second electrode wiring, and along the first direction, the first type of second electrode
  • the width of the electrode trace is smaller than the width of the second type of second electrode trace.
  • An embodiment of the present disclosure provides a display device including the above-mentioned light-emitting panel.
  • the light-emitting panel is a display panel.
  • FIG. 1A is a schematic diagram of a partial plane structure of a light-emitting panel provided according to an embodiment of the present disclosure
  • FIG. 3 is a schematic diagram of a partial plane structure of a light-emitting panel provided by another embodiment of the present disclosure.
  • FIG. 4 is a schematic diagram of a partial plane structure of a circuit board provided by an embodiment of the present disclosure.
  • FIG. 5 is a schematic diagram of a partial plane structure of a circuit board provided by another embodiment of the present disclosure.
  • the embodiments of the present disclosure provide a light-emitting board, a circuit board, and a display device.
  • the light-emitting panel includes a base substrate and a plurality of light-emitting units located on the base substrate.
  • a plurality of light-emitting units are arrayed on the base substrate in a first direction and a second direction, each light-emitting unit includes at least one light-emitting sub-unit, and the light-emitting sub-unit includes a connection line unit and a light-emitting diode chip connected to the connection line unit ,
  • the light-emitting diode chip is located on the side of the connection line unit away from the base substrate.
  • Each connection line unit includes at least two electrical contact point pairs, each electrical contact point pair includes a first electrode contact point and a second electrode contact point, in each connection line unit, the first electrode contact points are electrically connected to each other, The second electrode contact points are electrically connected to each other, and only one of the at least two electrical contact point pairs is connected to the light emitting diode chip.
  • all the first electrode contact points in the at least two electrical contact point pairs provided in each connection circuit unit are electrically connected to each other, and all the second electrode contact points are electrically connected to each other, when the When an electrical contact point fails the connected light-emitting diode chip, a standby light-emitting diode chip can be connected to other spare electrical contact point pairs, thereby realizing the repair of the light-emitting subunit.
  • Figure 1A is a schematic partial plan view of a light-emitting panel provided according to an embodiment of the present disclosure
  • Figure 1B is a schematic cross-sectional structural view taken along the line AA shown in Figure 1A
  • Figure 2 is a schematic diagram of the two parts of the light-emitting panel shown in Figure 1A.
  • the light-emitting panel in the embodiment of the present disclosure includes a base substrate 100 and a plurality of light-emitting units 200 on the base substrate 100.
  • a plurality of light-emitting units 200 are arrayed on the base substrate 100 along a first direction and a second direction.
  • the 1A uses the X direction as the first direction and the Y direction as the second direction as an example for description.
  • the directions intersect, for example, the first direction and the second direction are perpendicular, and the embodiments of the present disclosure include but are not limited thereto.
  • the embodiments of the present disclosure are described by taking the first direction as the column direction and the second direction as the row direction as an example for description.
  • the column direction and the row direction are opposite.
  • the first direction and the second direction can also be interchanged, that is, The first direction can also refer to the row direction, and the second direction can also refer to the column direction.
  • each light-emitting unit 200 includes at least one light-emitting sub-unit 201, the light-emitting sub-unit 201 includes a connection line unit 210 and a light-emitting diode chip 220 connected to the connection line unit 210, the light-emitting diode chip 220 is located
  • the connection line unit 210 is away from the side of the base substrate 100.
  • Each connection line unit 210 includes at least two electrical contact point pairs 211, and each electrical contact point pair 211 includes a positive contact point 2111 and a negative contact point 2112. In each connection line unit 210, the positive contact points 2111 are electrically connected to each other.
  • the diode chip can realize the repair of the light-emitting subunit.
  • the present disclosure is described by taking the second electrode contact point as the positive electrode contact point and the first electrode contact point as the negative electrode contact point as an example, but it is not limited to this, and the two can be interchanged.
  • each connection line unit 210 includes two electrical contact point pairs 211.
  • One of the two electrical contact point pairs 211 is connected to the light emitting diode chip, and the other is used as Pair of spare electrical contacts.
  • the embodiments of the present disclosure are not limited to this.
  • the size of the light-emitting diode chips used in the embodiments of the present disclosure is small, for example, the size of each light-emitting diode chip accounts for a very low ratio of the pixel area/light-emitting area where the light-emitting unit is located (for example, about 2%), so it is compared with other types.
  • the display panel has sufficient space for setting a spare pair of electrical contacts.
  • connection line unit may also include three or more electrical contact point pairs.
  • one of the electrical contact point pairs is connected to the light emitting diode chip, and the other electrical contact point pairs are connected to the light emitting diode chip.
  • the failure of the light-emitting diode chip may include a short circuit or open circuit between the positive and negative electrodes of the light-emitting diode chip. At this time, the connection between the negative electrode and the negative electrode of the bad light-emitting diode chip can be cut off, and then the standby The light-emitting diode chip is connected to the spare electric contact point pair to realize the repair of the light-emitting subunit.
  • the spare light-emitting diode chip connected to the spare electrical contact pair and the defective light-emitting diode chip should be chips emitting light of the same color.
  • the light-emitting panel can be driven by both sides, and the light-emitting panel can also include two drivers connected to the negative electrode wiring, and the two drivers are respectively located on two sides of the light-emitting panel along the first direction. Side edge.
  • the first negative trace can be connected to one driver, and the second negative trace can be connected to another driver.
  • the first negative electrode trace and the second negative electrode trace connected to a row of light-emitting subunits may be located on the same side of the row of light-emitting subunits, and also located on both sides of the row of light-emitting subunits.
  • first negative electrode trace and the second negative electrode trace may both pass through the aforementioned separation line, as long as the first negative electrode trace and the second negative electrode trace are connected to the light emitting elements located on both sides of the separation line respectively. Just connect the unit.
  • the first negative electrode trace and the second negative electrode trace are respectively located on both sides of the separation line
  • the first negative electrode trace and the second negative electrode trace connected to a row of light-emitting subunits can be located in the row of light-emitting subunits.
  • the same side can also be located on both sides of the row of light-emitting subunits, as long as the orthographic projections of the first negative electrode trace and the second negative electrode trace on the straight line extending in the first direction do not overlap.
  • each negative electrode trace can be set to have a wider line width to reduce power consumption.
  • each negative wire has a signal input terminal as an example, but it is not limited to this.
  • the first negative electrode wiring 310 and the second negative electrode wiring 320 connected to a row of light emitting subunits 201 arranged in the first direction are respectively located on both sides of the row of light emitting subunits 201, so that the row When the negative electrode contact point in the light-emitting subunit is connected to the corresponding negative electrode trace, it will not intersect with other negative electrode traces, which facilitates the design of the trace.
  • Two negative electrode traces 300 are arranged between two adjacent rows of light-emitting subunits 201 arranged in the second direction.
  • the first light-emitting sub-units 2011 and the second light-emitting sub-units 2012 may be alternately arranged, which can ensure the uniformity of light emission of the light-emitting sub-units.
  • the embodiment of the present disclosure does not limit the arrangement and number of the first light-emitting subunit and the second light-emitting subunit, as long as the first light-emitting subunit is connected to the first negative electrode wiring, and the second light-emitting subunit is connected to the second negative electrode wiring. Therefore, the number of light-emitting subunits connected to each negative electrode wiring can be reduced.
  • the positive electrode contact point 2111 and the negative electrode contact point 2112 can be arranged in the same layer as the negative electrode wiring 300 and have the same material.
  • the positive electrode contact point 2111, the negative electrode contact point 2112, and the negative electrode trace 300 may be formed by using the same patterning process on the same material.
  • the material of the negative electrode wiring 300 may include copper.
  • the line width of the positive connection portion 212 can be as wide as possible to reduce the resistance of the positive connection portion 212, thereby reducing power consumption.
  • the connecting circuit unit 210 when the connecting circuit unit 210 includes two electrical contact point pairs 211, along the first direction, the two positive electrode contact points 2111 are respectively located on both sides of the positive electrode connecting portion 212, and the two negative electrode contact points 2112 is located on a side of the corresponding positive electrode contact point 2111 away from the positive electrode connecting portion 212, and is separated from the positive electrode contact point 2111.
  • an insulating layer (not shown) is provided between the positive electrode connection portion 212 and the positive electrode wiring 400, and the positive electrode connection portion 212 can be electrically connected to the positive electrode wiring 400 through a via 500 penetrating the insulating layer. connect.
  • each positive electrode connecting portion 212 may be electrically connected to the positive electrode wiring 400 through a plurality of via holes 500 to ensure the effect of electrical connection.
  • the distance between two positive electrode electrical contact points 2111 is greater than 20 micrometers, so that the positive electrode connection portion 212 and the via hole 500 are provided between the two positive electrode contact points 2111.
  • the orthographic projection of each positive electrode trace 400 on the base substrate 100 and the orthographic projection of an electrical contact point pair 211 and part of the positive electrode connection portion 212 on the base substrate 100 overlap.
  • the line width of the positive electrode wiring is set to be wider, which can reduce the power consumption of the wiring.
  • each light-emitting unit 200 may include three light-emitting sub-units 201 of different colors arranged in a second direction, and the anode wiring 400 includes a first anode wiring 410 and a second anode wiring 420,
  • one light-emitting sub-unit 201 in the light-emitting unit 200 is connected to the first anode wire 410, and the other two light-emitting sub-units 201 in the light-emitting unit 200 are connected to the second anode wire 420.
  • each light-emitting unit is connected to two anode wires, so that the light-emitting subunits of one color can be independently controlled.
  • the light emitting unit may include a red light emitting subunit, a green light emitting subunit, and a blue light emitting subunit. Since the lighting voltage of the green light emitting unit and the blue light emitting unit (referring to the working voltage when the brightness of the device reaches 1cd/m 2 ) is similar, the lighting voltage of the red light emitting subunit is quite different from the above two lighting voltages.
  • both the first positive electrode trace 410 and the second positive electrode trace 420 have a minimum width.
  • Rs is the sheet resistance of the first anode trace
  • Wr is the width of the first anode trace
  • P is the period of the light-emitting unit in the second direction.
  • the width of the first anode trace 410 may be smaller than the width of the second anode trace 420. But it is not limited to this, and the relationship between the width of the two positive electrode traces needs to be determined according to the relationship between the current flowing.
  • the base substrate 100 may be a glass substrate.
  • a glass substrate provided with a circuit connection unit is used instead of a commonly used substrate, such as a printed circuit board (PCB board) for electrically connecting light-emitting diode chips in a backlight or a display panel, which can overcome the problem of general PCB substrates. Poor heat dissipation problem.
  • PCB board printed circuit board
  • a first buffer layer 103 is provided between the positive electrode trace 400 and the base substrate 100, and the material of the first buffer layer 103 may include silicon nitride.
  • a second buffer layer 104, a flat layer 105, and a passivation layer 106 are sequentially arranged between the positive electrode wiring 400 and the first negative electrode wiring 310.
  • the material of the flat layer 105 may be resin. The greater the thickness of the flat layer 105, the smaller the coupling capacitance between the wiring layers located on both sides of the flat layer 105.
  • the material of the second buffer layer 104 and the passivation layer 106 may be silicon nitride, which is used to avoid the problem of poor adhesion due to direct contact between the flat layer 105 and the metal layers on both sides.
  • the second buffer layer 104, the flat layer 105 and the passivation layer 106 are provided with via holes 500 so that the positive electrode connection portion 212 can be electrically connected to the positive electrode trace 400.
  • an insulating layer 107 is provided on the side of the circuit connection unit 210 away from the base substrate 100.
  • the insulating layer 107 includes two via holes to expose the positive electrode contact point 2111 and the negative electrode contact point 2112, respectively.
  • 220 is located on the side of the insulating layer 107 away from the line connection unit 210, and the positive electrode and the negative electrode included in the light emitting diode chip 220 are electrically connected to the positive electrode contact 2111 and the negative electrode contact 2112 through the via holes in the insulating layer 107, respectively.
  • the positive electrode contact point 2111 and the positive electrode connecting portion 212 are an integral structure, and the positive electrode connecting portion 212 is connected to the positive electrode wiring 400 through a plurality of via holes 500, so that the positive electrode wiring 400 and the light emitting diode chip 220 are connected to each other.
  • the positive pole is electrically connected.
  • the positive electrode contact point 2111 and the negative electrode contact point 2112 are arranged in the same layer and spaced apart from each other.
  • the surface of the positive electrode contact point 2111 and the negative electrode contact point 2112 away from the base substrate 100 may be on the same plane as the surface of the positive electrode connection portion 212 away from the base substrate 100, and the embodiment of the present disclosure is not limited thereto.
  • the positive electrode contact point 2111 and the negative electrode contact point 2112 include two protrusions respectively extending into the two via holes of the insulating layer 107, and the light emitting diode chip 220 includes the positive electrode and the negative electrode through the above-mentioned via holes and the electrical contact point pair of protrusions. Electric connection.
  • the above-mentioned protrusions can be made by the same film forming process as the film layer where the positive electrode connecting portion 212 is located, and formed in a sequential patterning process through a half-tone mask process.
  • each light-emitting unit 200 may include two bonding regions (light-emitting diode chip connection regions), that is, a first bonding region 2201 and a second bonding region 2202.
  • Each connection line unit 210 includes two electrical contact point pairs 211 located in the first binding area 2201 and the second binding area 2202, respectively, and the positive connection portion 212 may be located between the two binding areas to realize wiring with the positive electrode. 400 electrical connection.
  • the multiple light-emitting subunits 201 in the light-emitting unit 200 may be all bound to the first binding area 2201 to realize the centralized arrangement of the light-emitting positions of the three light-emitting subunits, and the display is uniform.
  • the light-emitting diode chip in any one of the light-emitting subunits in the first binding area 2201 is defective, the light-emitting diode chip of the same color can be bound to the spare electrical contact point in the second binding area 2202
  • the pair of spare electrical contact points and the pair of electrical contact points connected to the defective light-emitting diode chip may be located in a straight line.
  • the multiple light-emitting subunits in the light-emitting unit may also be bound in the second binding area, and the pairs of electrical contacts in the first binding area are used as spare electrical contacts. Point right.
  • the light-emitting unit 200 includes three light-emitting sub-units 201 arranged along the second direction.
  • the light-emitting sub-units 201 located on both sides can be bound to the same binding area, and the light-emitting sub-unit 201 located in the middle is bound to another one.
  • the connection of the binding positions of the three light-emitting subunits 201 forms a triangle, which is more conducive to achieving uniformity of light emission.
  • the light-emitting panel shown in FIG. 1A may be a display panel, such as a passive matrix (PM) display panel, the light-emitting unit is a pixel unit, and the light-emitting subunits included in the light-emitting unit are sub-pixels.
  • the display panel provided by the embodiment of the present disclosure can not only improve the bonding yield of the product by providing backup electrical contact pairs, but also reduce the power consumption of the negative electrode wiring.
  • the light-emitting panel provided in the embodiment of the present disclosure can also be used as a backlight source to be combined with a liquid crystal display panel, which is not limited in the embodiment of the present disclosure.
  • FIG. 3 is a schematic diagram of a partial plane structure of a light-emitting panel provided by another embodiment of the present disclosure. As shown in FIG. 3, compared with the embodiment shown in FIG. 1A, the difference of the embodiment shown in FIG. 3 is that the first negative electrode wiring 310 is not a continuous wiring, but is broken in the middle. A first sub-negative wire 311 and a second sub-negative wire 312 are formed.
  • the two ends of the first sub-negative wire 311 and the second sub-negative wire 312 away from each other are two signal input terminals 301 and 302;
  • the second-negative wiring 320 is not a continuous wiring, but is disconnected in the middle to form the third sub-negative wiring 321 and the fourth sub-negative wiring 322, the third sub-negative wiring 321 and the fourth sub-negative wiring
  • the two ends of 322 far away from each other are configured as two signal input ends 303 and 304.
  • the present disclosure takes the first sub-electrode trace as the first sub-negative trace, the second sub-electrode trace as the second sub-negative trace, the third sub-electrode trace as the third sub-negative trace, and the fourth sub-electrode trace.
  • the wire is the fourth sub-negative wire as an example for description.
  • each first negative wiring 310 includes a first negative negative wiring 311 and a second negative wiring 312 that extend along the same straight line and are insulated from each other.
  • the first negative wiring 311 and the second negative wiring 312 are separated from each other.
  • the interval between the two adjacent light-emitting subunits is not greater than the direct interval between two adjacent light-emitting subunits;
  • each second negative electrode wiring 320 includes a third negative electrode wiring 321 and a fourth negative electrode wiring 322 that extend along the same straight line and are insulated from each other.
  • the interval between the third sub-negative wire 321 and the fourth sub-negative wire 322 is not greater than the direct interval between two adjacent light-emitting subunits.
  • the light-emitting panel provided in this embodiment can adopt bilateral driving.
  • the first negative electrode wiring 311 and the second negative electrode wiring 312 included in the first negative electrode wiring 310 are respectively connected to two drivers.
  • the third sub-negative wiring 321 and the fourth sub-negative wiring 322 included in the negative wiring 320 are respectively connected to the above-mentioned two drivers, and the two drivers may be respectively located on two sides of the light-emitting panel along the first direction.
  • the signal input terminal 301 of the first sub-negative wiring 311 and the signal input terminal 303 of the third sub-negative wiring 321 can be connected to the same driver, and the signal input of the second sub-negative wiring 312
  • the terminal 302 and the signal input terminal 304 of the fourth sub-negative wire 322 may be connected to the same driver.
  • the first sub-negative wiring 311 and the second sub-negative wiring 312 may be located on the same straight line, and the third sub-negative wiring 321 and the fourth negative wiring 322 may be located on the same straight line.
  • a portion of the plurality of first light-emitting subunits 2011 close to the first sub-negative wire 311 is connected to the first sub-negative wire 311, and among the plurality of first light-emitting subunits 2011, which is close to the second sub-wire
  • the portion of the negative electrode trace 312 is connected to the second sub-negative electrode trace 312.
  • the portion of the plurality of second light-emitting subunits 2012 close to the third sub-negative wire 321 is connected to the third sub-negative wire 321, and the portion of the plurality of second light-emitting subunits 2012 that is close to the fourth sub-negative wire 322 is connected to the third sub-negative wire 322.
  • the four sub-negative wires 322 are connected.
  • multiple light emitting subunits located in the same column may be divided into two parts along the first direction, and the number of light emitting subunits of the two parts may be the same or different.
  • the first sub-negative electrode trace and the second sub-negative electrode trace are respectively located on both sides of the separation line, and are connected by the light-emitting sub-units located on both sides of the separation line.
  • the negative wire and the fourth sub-negative wire are respectively located on both sides of the separation line, and are connected by the light-emitting subunits located on both sides of the separation line.
  • a row of light-emitting subunits arranged along the first direction includes four parts of light-emitting subunits, and the first part The light-emitting sub-unit is connected to the first sub-negative wire, the second part of the light-emitting sub-unit is connected to the second sub-negative wire, the third part of the light-emitting sub-unit is connected to the third sub-negative wire, and the fourth part of the light-emitting sub-unit is connected to the second sub-negative wire.
  • the characteristics of the positive wiring, the number and arrangement of the light-emitting sub-units included in the light-emitting unit, and the characteristics of the light-emitting sub-units including the connecting line unit in the embodiment of the present disclosure are the same as those of the embodiment shown in FIG. 1A and FIG. Go into details again.
  • the light-emitting panel provided in the embodiment of the present disclosure can also be used as a backlight source to be combined with the liquid crystal display panel, which is not limited in the embodiment of the present disclosure.
  • Another embodiment of the present disclosure provides a display device including any of the above-mentioned display panels.
  • the display device provided by the embodiment of the present disclosure can not only improve the bonding yield of the product by providing backup electrical contact pairs, but also reduce the power consumption of the negative electrode wiring.
  • FIG. 4 is a schematic diagram of a partial plane structure of a circuit board provided by an embodiment of the present disclosure.
  • the circuit board includes a base substrate 100 and a plurality of connection circuit units 210 on the base substrate 100.
  • the multiple connection line units 210 are arrayed on the base substrate 100 along the first direction and the second direction.
  • FIG. 4 uses the X direction as the first direction and the Y direction as the second direction as an example for description.
  • each connection line unit 210 includes at least two electrical contact point pairs 211, and each electrical contact point pair 211 includes a positive electrode contact point 2111 and a negative electrode contact point 2112.
  • each positive electrode The contact points 2111 are electrically connected to each other, and the negative electrode contact points 2112 are electrically connected to each other. Only the positive electrode contact point 2111 and the negative electrode contact point 2112 of the at least two electrical contact point pairs 211 described above are configured to be respectively connected to the positive electrode and the negative electrode of a light emitting diode chip.
  • each connection line unit includes at least two electrical contact point pairs, one electrical contact point pair of the at least two electrical contact point pairs is used to connect the light emitting diode chip, and the other electrical contact point pairs are used as spares Pair of electrical contacts.
  • the light-emitting diode chip connected to one of the electrical contact point pairs is defective, the light-emitting subunit can be repaired by binding the light-emitting diode chip to any other spare electrical contact point pair.
  • each connection line unit 210 includes two electrical contact point pairs 211, one of the two electrical contact point pairs 211 is configured to be connected to a light emitting diode chip, The other serves as a spare pair of electrical contacts.
  • the connection line unit may also include three or more electrical contact point pairs. When the connection line unit includes more than three electrical contact point pairs, one of the electrical contact point pairs is configured to The light-emitting diode chip is connected, and the other electrical contact point pairs are used as spare electrical contact point pairs.
  • the circuit board further includes a plurality of negative electrode traces 300 extending in the first direction (X direction).
  • the negative wiring 300 includes a first negative wiring 310 and a second negative wiring 320.
  • a column of connecting circuit units 210 arranged along the first direction includes a plurality of first connecting circuit units 2101 and a plurality of second connecting circuit units 2102.
  • the negative contact point 2112 of a connecting circuit unit 2101 is connected to the first negative wiring 310
  • the negative contact point 2112 of the second connecting circuit unit 2102 is connected to the second negative wiring 320.
  • a column of connecting circuit units arranged along the first direction as a column of connecting circuit units as an example, then a column of connecting circuit units is connected to two corresponding negative wires.
  • connection line units for example, a column of connection line units are configured to be connected to a column of sub-pixels
  • the connection line units arranged along the first direction are connected to two
  • a negative wiring connection can reduce the number of connection line units connected to each negative wiring, that is, reducing the number of light-emitting diode chips connected to each negative wiring, thereby effectively reducing the current on each negative wiring to reduce The power consumption of the negative trace.
  • the first negative wiring 310 and the second negative wiring 320 connected to a row of connection line units 210 arranged along the first direction are respectively located on both sides of the row of connection line units 210, so that the row When the negative electrode contact point in the light-emitting subunit is connected to the corresponding negative electrode trace, it will not intersect with other negative electrode traces, which facilitates the design of the trace.
  • two adjacent rows of connecting line units 210 arranged in the second direction are provided with two negative wiring 300, one of the two negative wiring 300
  • the distance between the two is a safe distance to ensure that the two will not be short-circuited.
  • the distance between the two negative electrode traces 300 may not be less than 15 microns.
  • the line width of each negative electrode trace 300 can be set as wide as possible (for example, It can be 30 microns), and can also reduce the resistance of the negative wire.
  • the first connection line unit 2101 and the second connection line unit 2102 may be alternately arranged.
  • the embodiments of the present disclosure are not limited to this, as long as the first connection line unit is connected to the first negative electrode line, and the second connection line unit is connected to the second negative electrode line, so as to reduce the number of connection line units connected to each negative electrode line. .
  • the numbers of the first connection line units 2101 and the second connection line units 2102 are the same.
  • the circuit board further includes a plurality of positive wires 400 extending in the second direction (ie, the Y direction), and the positive wires 400 are located between the negative wires 300 and the base substrate 100.
  • Each connection line unit 210 also includes a positive connection portion 212.
  • the positive connection portion 212 and the negative wiring 300 are arranged in the same layer, and the positive contact point 2111 in each connection wiring unit 210 is connected to the positive wiring 400 through the positive connection 212 .
  • the positive electrode contact point 2111 and the positive electrode connecting portion 212 may be an integral structure to facilitate manufacturing.
  • the connecting circuit unit 210 when the connecting circuit unit 210 includes two pairs of electrical contact points 211, along the first direction, the two positive electrode contact points 2111 are respectively located on both sides of the positive electrode connecting portion 212, and the two negative electrode contact points 2112 is located on a side of the corresponding positive electrode contact point 2111 away from the positive electrode connecting portion 212, and is separated from the positive electrode contact point 2111.
  • an insulating layer (not shown) is provided between the positive electrode connection portion 212 and the positive electrode wiring 400, and the positive electrode connection portion 212 may be connected to the positive electrode wiring 400 through a plurality of via holes 500 penetrating the insulating layer. Electrical connection.
  • the orthographic projection of each positive electrode trace 400 on the base substrate 100 and the orthographic projection of an electrical contact point pair 211 and part of the positive electrode connection portion 212 on the base substrate 100 overlap.
  • the line width of the positive electrode wiring is set to be wider, which can reduce the power consumption of the wiring.
  • each connection line unit 210 further includes two negative connection portions 213 connected to each negative electrode contact point 2112.
  • the negative electrode connection portion 213 is located on the side of the negative electrode contact point 2112 away from the positive electrode contact point 2111.
  • the contact point 2112 is connected to the negative wiring 300 through the negative connecting portion 213, and the orthographic projection of at least part of the negative connecting portion 213 on the base substrate 100 and the orthographic projection of the positive wiring 400 on the base substrate 100 do not overlap.
  • a negative connection part that does not overlap with the positive electrode wiring and the negative electrode wiring at least partly, it is possible to cut the negative connection part by means such as laser cutting when the light-emitting diode chip is defective. Disconnect the negative electrode contact point and the negative electrode wiring to realize the repair of the light-emitting sub-unit.
  • the negative connection part it is possible to prevent the cutting process from affecting the positive wiring and the negative wiring.
  • connection line unit group 2100 three adjacent connection line units 210 arranged in the second direction form a connection line unit group 2100, and the positive wiring 400 includes a first positive wiring 410 and a second positive wiring 420, and the connection wiring One connection line unit 210 in the unit group 2100 is connected to the first positive electrode line 410, and the other two connection line units 210 in the connection line unit group 2100 are connected to the second positive electrode line 420, and along the first direction, the first The width of the anode trace 410 is smaller than the width of the second anode trace 420.
  • each connection line unit group is connected to two positive wires, so that one connection line unit can be independently controlled.
  • connection line units are respectively connected to the red light emitting diode chip, the green light emitting diode chip and the blue light emitting diode chip.
  • connection line unit connected to the red light emitting diode chip can be connected to the first anode trace
  • connection line unit connected to the green light emitting diode chip and the blue light emitting diode chip can be connected to the second anode trace to ensure that each The light-emitting sub-units are all applied with corresponding light-up voltages, which can not only save power, but also prevent the overload voltage from being applied to a certain color light-emitting sub-unit.
  • the circuit board shown in FIG. 4 is a structure other than the light-emitting diode chip in the light-emitting board shown in FIG. 1A, and the specific features of the circuit board are also the same as the circuit board shown in FIG. 1A. Therefore, in the embodiment of FIG. 4, reference may be made to the embodiment corresponding to FIG. 1A for the characteristics of the circuit board.
  • the circuit board can be applied to a display panel or a backlight.
  • the circuit board provided in the embodiment of the present disclosure can not only improve the bonding yield of the product by providing spare electrical contact pairs, but also reduce the power of the negative wiring. Consumption.
  • the circuit board provided in this embodiment can be used for bilateral driving.
  • the first negative electrode wiring 311 and the second negative electrode wiring 312 included in the first negative electrode wiring 310 are respectively connected to two drivers.
  • the third sub-negative wiring 321 and the fourth sub-negative wiring 322 included in the second negative wiring 320 are respectively connected to the above two drivers, and the two drivers may be respectively located on two sides of the circuit board along the first direction.
  • the first sub-negative wiring 311 and the second sub-negative wiring 312 may be located on the same straight line, and the third sub-negative wiring 321 and the fourth negative wiring 322 may be located on the same straight line.
  • the portion of the plurality of first connection line units 2101 close to the first sub-negative wiring 311 is connected to the first sub-negative wiring 311, and the plurality of first connection line units 2101 is close to the second sub-line.
  • the portion of the negative electrode trace 312 is connected to the second sub-negative electrode trace 312.
  • the portion of the plurality of second connection line units 2102 close to the third sub-negative wiring 321 is connected to the third sub-negative wiring 321, and the portion of the plurality of second connection line units 2102 that is close to the fourth sub-negative wiring 322 is connected to the third sub-negative wiring 322.
  • the four sub-negative wires 322 are connected.
  • connection line units located in the same column may be divided into two parts along the first direction, and the number of connection line units of the two parts may be the same or different.
  • the first sub-negative wiring and the second sub-negative wiring are respectively located on both sides of the separation line to connect to the connecting line units located on both sides of the separation line.
  • the third sub-negative wire and the fourth sub-negative wire are respectively located on both sides of the separation line to connect to the connection line units located on both sides of the separation line.
  • a column of connection line units (for example, a column of connection line units are configured to be connected to a column of sub-pixels) is connected to a negative wire
  • a column of connection line units are connected to four negative wires, It can reduce the number of connection line units connected to each negative trace, that is, reduce the number of light-emitting diode chips connected to each negative trace, thereby effectively reducing the current on each negative trace to reduce the power consumption of the negative trace .

Abstract

一种发光板、线路板以及显示装置。发光板包括:衬底基板(100)以及位于衬底基板(100)上的发光单元(200)。发光单元(200)包括发光子单元(201),发光子单元(201)包括连接线路单元(210)以及与连接线路单元(210)连接的一个发光二极管芯片(220)。连接线路单元(210)包括至少两个电接触点对(211),每个电接触点对(211)包括第一电极接触点(2112)和第二电极接触点(2111),每个连接线路单元(210)中,各第二电极接触点(2111)彼此电连接,各第一电极接触点(2112)彼此电连接,且每个连接线路单元(210)中仅一个电接触点对(211)与发光二极管芯片(220)连接。发光板既可以通过提供备用电接触点对提高产品的绑定良率,还可以降低负极走线的功耗。

Description

发光板、线路板以及显示装置 技术领域
本公开至少一个实施例涉及一种发光板、线路板以及显示装置。
背景技术
目前,随着显示技术的不断进步,用户对产品的亮度、对比度等性能要求也不断提高。一方面,迷你发光二极管(Mini LED)可以作为背光源。在Mini LED作为背光源与传统的液晶显示面板结合时,通过控制分区内的Mini LED的开关,可以使液晶显示装置具有与有机发光二极管显示装置相当的高对比度。另一方面,Mini LED还可以直接制作成大尺寸的显示产品,具有很好的市场前景。
发明内容
本公开实施例提供一种发光板、线路板以及显示装置。
本公开至少一实施例提供一种发光板,包括:衬底基板;多个发光单元,沿第一方向和第二方向阵列排布在衬底基板上,每个发光单元包括至少一个发光子单元,发光子单元包括连接线路单元以及与连接线路单元连接的一个发光二极管芯片,发光二极管芯片位于连接线路单元远离衬底基板的一侧。每个连接线路单元包括至少两个电接触点对,每个电接触点对包括第一电极接触点和第二电极接触点,每个连接线路单元中,各第一电极接触点彼此电连接,各第二电极接触点彼此电连接,且至少两个电接触点对中仅一个电接触点对与发光二极管芯片连接。
例如,发光板还包括:多条第一电极走线,沿第一方向延伸。多条第一电极走线包括多条第一类第一电极走线和多条第二类第一电极走线,沿第一方向排列的一列发光子单元包括多个第一发光子单元和多个第二发光子单元,第一发光子单元通过第一电极接触点与第一类第一电极走线连接,第二发光子单元通过第一电极接触点与第二类第一电极走线连接。
例如,与沿第一方向排列的一列发光子单元连接的第一类第一电极走线和第二类第一电极走线分别位于该排发光子单元的两侧。
例如,各第一类第一电极走线包括沿同一直线延伸且互相绝缘间隔的第一子电极走线和第二子电极走线,多个第一发光子单元中靠近第一子电极走线的部分与第一子电极走线连接,多个第一发光子单元中靠近第二子电极走线的部分与第二子电极走线连接;各第二类第一电极走线包括沿同一直线延伸且互相绝缘间隔的第三子电极走线和第四子电极走线,多个第二发光子单元中靠近第三子电极走线的部分与第三子电极走线连接,多个第二发光子单元中靠近第四子电极走线的部分与第四子电极走线连接。
例如,发光板还包括:多条第二电极走线,沿第二方向延伸,第二电极走线位于第一电极走线与衬底基板之间。每个连接线路单元还包括第二电极连接部,第二电极连接部与第一电极走线同层设置,且每个连接线路单元中的第二电极接触点通过第二电极连接部与第二电极走线连接。
例如,第二电极接触点与第二电极连接部为一体结构。
例如,在第一方向上,每条第二电极走线在衬底基板上的正投影与一个电接触点对以及部分第二电极连接部在衬底基板上的正投影交叠。
例如,每个发光单元包括沿第二方向排列的三个不同颜色的发光子单元,第二电极走线包括第一类第二电极走线和第二类第二电极走线,且发光单元中的一个发光子单元与第一类第二电极走线连接,发光单元中的另外两个发光子单元与第二类第二电极走线连接。
例如,每个连接线路单元包括两个电接触点对,每个连接线路单元还包括与各第一电极接触点连接的两个第一电极连接部,第一电极连接部位于第一电极接触点远离第二电极接触点的一侧,第一电极接触点通过第一电极连接部与第一电极走线连接,且第一电极连接部的至少部分在衬底基板上的正投影与第二电极走线在衬底基板上的正投影没有交叠。
本公开至少一实施例提供一种线路板,包括:衬底基板;多个连接线路单元,沿第一方向和第二方向阵列排布在衬底基板上。每个连接线路单元包括至少两个电接触点对,每个电接触点对包括第一电极接触点和第二电极接触点,每个连接线路单元中,各第一电极接触点彼此电连接,各第二电极接触点彼此电连接。
例如,线路板还包括:多条第一电极走线,沿第一方向延伸。多条第一电极走线包括多条第一类第一电极走线和多条第二类第一电极走线,沿第一方向排列的一列连接线路单元包括多个第一连接线路单元和多个第二连接线路单 元,第一连接线路单元的第一电极接触点与第一类第一电极走线连接,第二连接线路单元的第一电极接触点与第二类第一电极走线连接。
例如,与沿第一方向排列的一列连接线路单元连接的第一类第一电极走线和第二类第一电极走线分别位于该排连接线路单元的两侧。
例如,各第一类第一电极走线包括沿同一直线延伸且互相绝缘间隔的第一子电极走线和第二子电极走线,多个第一连接线路单元中靠近第一子电极走线的部分与第一子电极走线连接,多个第一连接线路单元中靠近第二子电极走线的部分与第二子电极走线连接;各第二类第一电极走线包括沿同一直线延伸且互相绝缘间隔的第三子电极走线和第四子电极走线多个第二连接线路单元中靠近第三子电极走线的部分与第三子电极走线连接,多个第二连接线路单元中靠近第四子电极走线的部分与第四子电极走线连接。
例如,线路板还包括:多条第二电极走线,沿第二方向延伸,第二电极走线位于第一电极走线面向衬底基板的一侧。每个连接线路单元还包括第二电极连接部,第二电极连接部与第一电极走线同层设置,且每个连接线路单元中的第二电极接触点通过第二电极连接部与第二电极走线连接。
例如,在第一方向上,每条第二电极走线在衬底基板上的正投影与一个电接触点对以及部分第二电极连接部在衬底基板上的正投影交叠。
例如,沿第二方向排列的相邻三个连接线路单元组成连接线路单元组,第二电极走线包括第一类第二电极走线和第二类第二电极走线,连接线路单元组中的一个连接线路单元与第一类第二电极走线连接,连接线路单元组中的另外两个连接线路单元与第二类第二电极走线连接,且沿第一方向,第一类第二电极走线的宽度小于第二类第二电极走线的宽度。
例如,每个连接线路单元包括两个电接触点对,每个连接线路单元还包括与各第一电极接触点连接的两个第一电极连接部,第一电极连接部位于第一电极接触点远离第二电极接触点的一侧,第一电极接触点通过第一电极连接部与第一电极走线连接,且第一电极连接部的至少部分在衬底基板上的正投影与第二电极走线在衬底基板上的正投影没有交叠。
本公开一实施例提供一种显示装置,包括上述的发光板。发光板为显示面板。
附图说明
为了更清楚地说明本公开实施例的技术方案,下面将对实施例的附图作简单地介绍,显而易见地,下面描述中的附图仅仅涉及本公开的一些实施例,而非对本公开的限制。
图1A为根据本公开一实施例提供的发光板的局部平面结构示意图;
图1B为沿图1A所示的AA线所截的截面结构示意图;
图2为图1A所示的发光板包括的两个发光单元的电路示意图;
图3为本公开另一实施例提供的发光板的局部平面结构示意图;
图4为本公开一实施例提供的线路板的局部平面结构示意图;以及
图5为本公开另一实施例提供的线路板的局部平面结构示意图。
具体实施方式
为使本公开实施例的目的、技术方案和优点更加清楚,下面将结合本公开实施例的附图,对本公开实施例的技术方案进行清楚、完整地描述。显然,所描述的实施例是本公开的一部分实施例,而不是全部的实施例。基于所描述的本公开的实施例,本领域普通技术人员在无需创造性劳动的前提下所获得的所有其它实施例,都属于本公开保护的范围。
除非另外定义,本公开使用的技术术语或者科学术语应当为本公开所属领域内具有一般技能的人士所理解的通常意义。本公开中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性,而只是用来区分不同的组成部分。“包括”或者“包含”等类似的词语意指出现该词前面的元件或者物件涵盖出现在该词后面列举的元件或者物件及其等同,而不排除其他元件或者物件。
本公开的实施例提供一种发光板、线路板以及显示装置。发光板包括:衬底基板以及位于衬底基板上的多个发光单元。多个发光单元沿第一方向和第二方向阵列排布在衬底基板上,每个发光单元包括至少一个发光子单元,发光子单元包括连接线路单元以及与连接线路单元连接的一个发光二极管芯片,发光二极管芯片位于连接线路单元远离衬底基板的一侧。每个连接线路单元包括至少两个电接触点对,每个电接触点对包括第一电极接触点和第二电极接触点,每个连接线路单元中,各第一电极接触点彼此电连接,各第二电极接触点彼此电连接,且至少两个电接触点对中仅一个电接触点对与发光二极管芯片连接。本公开实施例中,每个连接线路单元中设置的至少两个电接触点对中的所有第 一电极接触点彼此电连接,所有第二电极接触点彼此电连接,当与连接线路单元中的一个电接触点对连接的发光二极管芯片发生不良时,可以在其他备用的电接触点对上连接备用的发光二极管芯片,从而实现对发光子单元的修复。
下面结合附图对本公开实施例提供的发光板、线路板以及显示装置进行描述。
图1A为根据本公开一实施例提供的发光板的局部平面结构示意图,图1B为沿图1A所示的AA线所截的截面结构示意图,图2为图1A所示的发光板包括的两个发光单元的电路示意图。如图1A所示,本公开实施例中的发光板包括衬底基板100以及位于衬底基板100上的多个发光单元200。多个发光单元200沿第一方向和第二方向阵列排布在衬底基板100上,图1A以X方向为第一方向,Y方向为第二方向为例进行描述,第一方向和第二方向相交,例如第一方向和第二方向垂直,本公开实施例包括但不限于此。本公开实施例以第一方向为列方向,第二方向为行方向为例进行描述,这里的列方向和行方向是相对的,例如,第一方向和第二方向也可以互换,也就是第一方向也可以指行方向,第二方向也可以指列方向。
如图1A和图1B所示,每个发光单元200包括至少一个发光子单元201,发光子单元201包括连接线路单元210以及与连接线路单元210连接的一个发光二极管芯片220,发光二极管芯片220位于连接线路单元210远离衬底基板100的一侧。每个连接线路单元210包括至少两个电接触点对211,每个电接触点对211包括正极接触点2111和负极接触点2112,每个连接线路单元210中,各正极接触点2111彼此电连接,各负极接触点2112彼此电连接,且至少两个电接触点对211中仅一个电接触点对211与发光二极管芯片220连接。也就是,每个连接线路单元中的所有正极接触点电连接,所有负极接触点电连接。上述正极接触点2111与发光二极管芯片220的正极连接,上述负极接触点2112与发光二极管芯片220的负极连接。本公开实施例中,每个连接线路单元包括至少两个电接触点对,该至少两个电接触点对中的一个电接触点对用于连接发光二极管芯片,其他电接触点对作为备用电接触点对。当与其中一个电接触点对连接的发光二极管芯片发生不良,或者电接触点对发生断线等问题而导致发光二极管芯片不能发光时,通过在其他任一备用电接触点对上绑定发光二极管芯片,可以实现对该发光子单元的修复。本公开以第二电极接触点为正极接触点,第一电极接触点为负极接触点为例进行描述,但不限于此,两者可以互换。
例如,如图1A所示,本公开实施例以每个连接线路单元210包括两个电接触点对211为例进行描述,两个电接触点对211之一与发光二极管芯片连接,另一个作为备用的电接触点对。但本公开实施例不限于此。
例如,本公开实施例中的发光二极管芯片可以为Mini LED。例如,mini LED在平行于衬底基板100的方向的最大尺寸不大于500微米。例如,mini LED的尺寸可以为0.1mm×0.17mm。本公开实施例不限于此,发光二极管芯片也可以为微发光二极管芯片(micro LED)。由于本公开实施例采用的发光二极管芯片的尺寸较小,例如,每个发光二极管芯片的尺寸占发光单元所在的像素区域/发光区域的比例很低(例如2%左右),所以相对于其他类型的显示面板,其有充足的空间用于设置备用的电接触点对。
例如,连接线路单元还可以包括三个或者更多个电接触点对,在连接线路单元包括三个以上电接触点对时,其中一个电接触点对与发光二极管芯片连接,其他电接触点对作为备用的电接触点对。例如,发光二极管芯片发生不良的情况可以包括该发光二极管芯片的正负极之间发生短路或者断路,此时,可以通过切断发生不良的发光二极管芯片的负极与负极走线的连接,然后将备用的发光二极管芯片连接到备用的电接触点对上,以实现对发光子单元的修复。需要说明的是,与备用的电接触点对连接的备用的发光二极管芯片与发生不良的发光二极管芯片应为发射相同颜色光的芯片。
例如,如图1A所示,发光板还包括沿第一方向(X方向)延伸的多条负极走线300。负极走线300包括第一负极走线310和第二负极走线320,沿第一方向排列的一列发光子单元201包括第一发光子单元2011和第二发光子单元2012,第一发光子单元2011通过相应的负极接触点2112与第一负极走线310连接,第二发光子单元2012通过相应的负极接触点2112与第二负极走线320连接,则一列发光子单元与对应的两条负极走线连接。
与一般的将一列发光子单元(例如一列子像素)与一条负极走线连接的情况相比,本公开实施例中,沿第一方向排列的多个发光子单元中的一部分与第一负极走线连接,另一部分与第二负极走线连接,可以减少每条负极走线连接的发光子单元的数量,即减少每条负极走线连接的发光二极管芯片的数量,进而有效降低每条负极走线上的电流,以降低负极走线的功耗。
例如,在本公开实施例的一示例中,发光板可以采用双边驱动,则发光板还可以包括与负极走线连接的两个驱动器,这两个驱动器分别位于发光板的沿 第一方向的两侧边缘。第一负极走线可以与一个驱动器连接,第二负极走线可以与另一个驱动器连接。与一列发光子单元连接的第一负极走线和第二负极走线可以位于该列发光子单元的同侧,也位于该列发光子单元的两侧。
例如,以图1A所示的X方向的正方向(箭头所指的方向)为上为例,位于同一列的多个发光子单元可以划分为上下两部分,两部分发光子单元的数量可以相同,也可以不同。以两部分发光子单元之间的间隔为分隔线,第一负极走线和第二负极走线可以分别位于分隔线的两侧,从而分别与位于分隔线两侧的发光子单元连接。本公开实施例不限于此,第一负极走线和第二负极走线也可以均穿过上述分隔线,只要第一负极走线和第二负极走线分别与位于分隔线两侧的发光子单元连接即可。
例如,当第一负极走线和第二负极走线分别位于分隔线的两侧时,与一列发光子单元连接的第一负极走线和第二负极走线既可以位于该列发光子单元的同侧,也可以位于该列发光子单元的两侧,只要第一负极走线与第二负极走线在沿第一方向延伸的直线上的正投影没有交叠即可。此时,各负极走线可以设置为具有较宽的线宽以降低功耗。
例如,在本公开实施例的另一示例中,发光板可以采用单边驱动,则发光板还可以包括与各负极走线连接的一个驱动器,该驱动器位于发光板的沿第一方向的任一侧边缘。第一负极走线和第二负极走线均与该驱动器连接。与一列发光子单元连接的第一负极走线和第二负极走线可以位于该列发光子单元的两侧。
图1A所示实施例中,第一负极走线和第二负极走线均为连续的走线。图1A所示的实施例以各负极走线均具有一个信号输入端为例,但不限于此。
例如,如图1A所示,与沿第一方向排列的一列发光子单元201连接的第一负极走线310和第二负极走线320分别位于该列发光子单元201的两侧,从而该排发光子单元中的负极接触点与相应的负极走线连接时不会出现与其他负极走线相交的情况,方便走线的设计。沿第二方向排列的相邻两列发光子单元201之间设置两条负极走线300,两条负极走线300之间的间距为保证两者不会发生短路的安全距离,例如,两条负极走线300之间的间距可以不小于15微米。例如,在保证位于相邻两列发光子单元201之间的两条负极走线300之间的间距满足安全间距的情况下,可以将各负极走线300的线宽设置的尽量宽,既可以保证负极走线的平整性,还可以降低负极走线的电阻。
例如,如图1A所示,沿第一方向,第一发光子单元2011和第二发光子单元2012可以交替排列,可以保证发光子单元发光的均匀性。本公开实施例对第一发光子单元和第二发光子单元的排列以及数量不作限制,只要第一发光子单元与第一负极走线连接,第二发光子单元与第二负极走线连接,从而减少各负极走线连接的发光子单元的数量即可。
例如,第一发光子单元2011和第二发光子单元2012的数量相同,从而可以尽量保证各负极走线流过的电流大致相等,防止出现个别负极走线功耗较大的情况。
例如,如图1A所示,发光板还包括沿第二方向(即Y方向)延伸的多条正极走线400,正极走线400位于负极走线300与衬底基板100之间。每个连接线路单元210还包括正极连接部212,正极连接部212与负极走线300同层设置,且每个连接线路单元210中的正极接触点2111通过正极连接部212与正极走线400连接。本公开以第一电极走线为负极走线,第二电极走线为正极走线为例进行描述。但不限于此,两者还可以互换,即第一电极走线可以为正极走线,第二电极走线可以为负极走线。
例如,如图1A所示,正极接触点2111和负极接触点2112可以与负极走线300同层设置,且材料相同。例如,正极接触点2111、负极接触点2112以及负极走线300可以为对同一材料采用同一步图案化工艺形成的。例如,负极走线300的材料可以包括铜。
例如,如图1A所示,正极连接部212和负极走线300也可以为对同一材料采用同一步图案化工艺形成的。
例如,在正极连接部212与位于其两侧的负极走线300之间保持安全间距的情况下,正极连接部212的线宽可以尽量宽,以降低正极连接部212的电阻,进而降低功耗。
例如,如图1A所示,正极接触点2111可以与正极连接部212为一体结构,以方便制作。
例如,如图1A所示,在连接线路单元210包括两个电接触点对211时,沿第一方向,两个正极接触点2111分别位于正极连接部212的两侧边缘,两个负极接触点2112位于相应的正极接触点2111远离正极连接部212的一侧,且与正极接触点2111彼此分隔。
例如,如图1A所示,正极连接部212与正极走线400之间设置有绝缘层 (未示出),正极连接部212可以通过贯穿绝缘层的过孔500实现与正极走线400的电连接。例如,每条正极连接部212可以通过多个过孔500与正极走线400电连接,以保证电连接的效果。
例如,如图1A所示,每个线路单元210中,两个正极电接触点2111之间的距离大于20微米,以在两个正极接触点2111之间设置正极连接部212以及过孔500。
例如,如图1A所示,第一方向上,每条正极走线400在衬底基板100上的正投影与一个电接触点对211以及部分正极连接部212在衬底基板100上的正投影交叠。本公开实施例中,将正极走线的线宽设置的较宽,可以降低走线的功耗。
例如,如图1A所示,每个连接线路单元210还包括与各负极接触点2112连接的两个负极连接部213,负极连接部213位于负极接触点2112远离正极接触点2111的一侧,负极接触点2112通过负极连接部213与负极走线300连接,且负极连接部213的至少部分在衬底基板100上的正投影与正极走线400在衬底基板100上的正投影没有交叠。本公开实施例中,通过设置与正极走线以及负极走线均至少部分不交叠的负极连接部,可以在发光二极管芯片发生不良时,采用例如激光切割等手段对负极连接部进行切割,以断开负极接触点与负极走线的连接,实现发光子单元的修复。通过设置负极连接部,可以避免切割过程影响正极走线以及负极走线。
例如,如图1A所示,负极连接部213可以与负极接触点2112一体设置。例如,负极连接部213可以包括沿第一方向延伸的第一部分以及沿第二方向延伸的第二部分,第一部分用于与负极走线300连接,第二部分用于与负极接触点连接。本公开以第一电极连接部为负极连接部,第二电极连接部为正极连接部为例进行描述。但不限于此,第一电极连接部也可以为正极连接部,第二电极连接部也可以为负极连接部。
例如,如图1A所示,每个发光单元200可以包括沿第二方向排列的三个不同颜色的发光子单元201,正极走线400包括第一正极走线410和第二正极走线420,且发光单元200中的一个发光子单元201与第一正极走线410连接,发光单元200中的另外两个发光子单元201与第二正极走线420连接。本公开实施例中,将每个发光单元与两个正极走线连接,可以使得一种颜色的发光子单元能够被独立控制。
例如,发光单元可以包括红光发光子单元、绿光发光子单元以及蓝光发光子单元。由于绿光发光单元和蓝光发光单元的起亮电压(指器件亮度达到1cd/m 2时的工作电压)相近,而红光发光子单元的起亮电压与上述两者的起亮电压相差较大,将红光发光子单元单独连接至第一正极走线,而将绿光发光子单元和蓝光发光子单元连接至第二正极走线,可以保证各发光子单元都被施加相应的起亮电压,既可以节省电能,又可以防止对某一种颜色发光子单元加载过载的电压。
例如,如图1A所述,沿第一方向,第一正极走线410和第二正极走线420均存在一最小宽度。以第一正极走线为例,假设沿第二方向排列M个发光单元,则第一正极走线的电压降低值IRdrop=I t*R,I t为沿第二方向排列的M个发光单元的总电流,R为发光单元内第一正极走线的电阻,且满足R=Rs*P/Wr。Rs为第一正极走线的方块电阻,Wr为第一正极走线宽度,P为沿第二方向上发光单元的周期,上述两个公式结合,可以得到:Wr=(I t*Rs*P)/(IR drop)。为保证显示亮度均一性,第一正极走线电压降低(IR drop)需小于一定数值K,当IR drop=K时,Wr存在一最小宽度Wrm。同理,第二正极走线420也存在一最小宽度。
例如,沿第一方向,第一正极走线410的宽度可以小于第二正极走线420的宽度。但不限于此,两条正极走线宽度大小关系需根据流过电流大小关系而定。
例如,如图1B所示,衬底基板100可以为玻璃基板。本公开实施例中采用设置有线路连接单元的玻璃基板替代通常使用的基板,例如背光源或显示面板中用于电连接发光二极管芯片的印刷电路板(PCB板),可以克服一般PCB基材的散热性能不良的问题。
例如,如图1A和图1B所示,第一负极走线310、第二负极走线320以及正极走线400的材料例如可以为铜等导电材料。以上述走线的材料为铜为例,则两个铜层可以采用溅射方法沉积在衬底基板上,也可以采用电镀方式形成在衬底基板上。例如,第一负极走线、第二负极走线以及正极走线的厚度越大,功耗越低,当发光板作为显示面板时,其显示效果越好。
例如,如图1A和图1B所示,正极走线400与衬底基板100之间设置有第一缓冲层103,第一缓冲层103的材料可以包括氮化硅。正极走线400与第一负极走线310之间依次设置有第二缓冲层104、平坦层105以及钝化层106。 平坦层105的材料可以为树脂,平坦层105的厚度越大,位于其两侧的走线层之间耦合电容越小。第二缓冲层104以及钝化层106的材料均可以为氮化硅,用于避免平坦层105与两侧金属层直接接触而发生粘附力不好的问题。
例如,如图1A和图1B所示,第二缓冲层104、平坦层105以及钝化层106中设置有过孔500,以使正极连接部212可以与正极走线400电连接。
例如,如图1B所示,线路连接单元210远离衬底基板100的一侧设置有绝缘层107,绝缘层107包括两个过孔以分别暴露正极接触点2111和负极接触点2112,发光二极管芯片220位于绝缘层107远离线路连接单元210的一侧,且发光二极管芯片220包括的正极和负极分别通过绝缘层107中的过孔与正极接触点2111和负极接触点2112电连接。
例如,如图1B所示,正极接触点2111与正极连接部212为一体结构,且正极连接部212通过多个过孔500与正极走线400连接,以使正极走线400与发光二极管芯片220的正极电连接。
例如,如图1B所示,正极接触点2111和负极接触点2112同层设置,且彼此间隔。
例如,正极接触点2111和负极接触点2112远离衬底基板100的表面可以与正极连接部212远离衬底基板100的表面位于同一平面,本公开实施例不限于此。例如,正极接触点2111和负极接触点2112包括分别伸入绝缘层107的两个过孔的两个凸起,发光二极管芯片220包括的正极和负极通过上述过孔与电接触点对的凸起电连接。上述凸起可以与正极连接部212所在膜层使用同一次成膜工艺制作,并通过半色调掩模工艺在依次构图工艺中形成。
例如,如图1A和图2所示,每个发光单元200中可以包括两个绑定区(发光二极管芯片连接区),即第一绑定区2201和第二绑定区2202。每个连接线路单元210包括的两个电接触点对211分别位于第一绑定区2201和第二绑定区2202,正极连接部212可以位于两个绑定区之间以实现与正极走线400的电连接。
例如,如图1A和图2所示,发光单元200中的多个发光子单元201可以都绑定在第一绑定区2201以实现三个发光子单元发光位置集中设置,显示均匀。当绑定在第一绑定区2201中的任一个发光子单元中的发光二极管芯片发生不良时,可以在第二绑定区2202中的备用电接触点对绑定相同颜色的发光二极管芯片,该备用电接触点对和与发生不良的发光二极管芯片连接的电接触 点对可以位于一条直线上。当然,本公开实施例不限于此,发光单元中的多个发光子单元还可以都绑定在第二绑定区,而第一绑定区内的电接触点对均用作备用电接触点对。
例如,发光单元200中包括沿第二方向排列的三个发光子单元201,位于两侧的发光子单元201可以绑定在同一个绑定区,位于中间的发光子单元201绑定在另一个绑定区,三个发光子单元201的绑定位置的连线构成三角形,更有利于实现发光的均匀性。
图1A所示的发光板可以为显示面板,例如为无源矩阵(Passive Matrix,PM)显示面板,发光单元为像素单元,发光单元包括的发光子单元为子像素。本公开实施例提供的显示面板既可以通过提供备用电接触点对提高产品的绑定良率,还可以降低负极走线的功耗。
当然本公开实施例提供的发光板还可以作为背光源以与液晶显示面板结合,本公开实施例对此不作限制。
图3为本公开另一实施例提供的发光板的局部平面结构示意图。如图3所示,与图1A所示的实施例相比,图3所示的实施例的不同之处在于,第一负极走线310不是一条连续的走线,而是中间断开的以形成第一子负极走线311和第二子负极走线312,第一子负极走线311和第二子负极走线312彼此远离的两个端部为两个信号输入端301和302;第二负极走线320不是一条连续的走线,而是中间断开的以形成第三子负极走线321和第四子负极走线322,第三子负极走线321和第四子负极走线322彼此远离的两个端部被配置为两个信号输入端303和304。本公开以第一子电极走线为第一子负极走线、第二子电极走线为第二子负极走线、第三子电极走线为第三子负极走线、第四子电极走线为第四子负极走线为例进行描述。
例如,各第一负极走线310包括沿同一直线延伸且互相绝缘间隔的第一子负极走线311和第二子负极走线312,第一子负极走线311与第二子负极走线312之间的间隔不大于相邻两个发光子单元直接的间隔;各第二负极走线320包括沿同一直线延伸且互相绝缘间隔的第三子负极走线321和第四子负极走线322,第三子负极走线321与第四子负极走线322之间的间隔不大于相邻两个发光子单元直接的间隔。
如图3所示,本实施例提供的发光板可以采用双边驱动,第一负极走线310包括的第一子负极走线311和第二子负极走线312分别连接至两个驱动器,第 二负极走线320包括的第三子负极走线321和第四子负极走线322分别连接至上述两个驱动器,这两个驱动器可以分别位于发光板的沿第一方向的两侧边缘。
例如,如图3所示,第一子负极走线311的信号输入端301和第三子负极走线321的信号输入端303可以与同一个驱动器连接,第二子负极走线312的信号输入端302和第四子负极走线322的信号输入端304可以与同一个驱动器连接。
例如,如图3所示,第一子负极走线311和第二子负极走线312可以位于同一直线上,第三子负极走线321和第四负极走线322可以位于同一直线上。
例如,如图3所示,多个第一发光子单元2011中靠近第一子负极走线311的部分与第一子负极走线311连接,多个第一发光子单元2011中靠近第二子负极走线312的部分与第二子负极走线312连接。多个第二发光子单元2012中靠近第三子负极走线321的部分与第三子负极走线321连接,多个第二发光子单元2012中靠近第四子负极走线322的部分与第四子负极走线322连接。
例如,位于同一列的多个发光子单元可以沿第一方向划分为两部分,两部分发光子单元的数量可以相同,也可以不同。以两部分发光子单元之间的间隔为分隔线,第一子负极走线和第二子负极走线分别位于分隔线的两侧,以位于分隔线两侧的发光子单元连接,第三子负极走线和第四子负极走线分别位于分隔线的两侧,以位于分隔线两侧的发光子单元连接。
与一般的将一列发光子单元(例如一列子像素)与一条负极走线连接的情况相比,本公开实施例中,沿第一方向排列的一列发光子单元包括四部分发光子单元,第一部分发光子单元与第一子负极走线连接,第二部分发光子单元与第二子负极走线连接,第三部分发光子单元与第三子负极走线连接,第四部分发光子单元与第四子负极走线连接,即一列发光子单元与四条负极走线连接,可以进一步减少每条负极走线连接的发光子单元的数量,即减少每条负极走线连接的发光二极管芯片的数量,进而有效降低每条负极走线上的电流,以降低负极走线的功耗。
本公开实施例中正极走线的特征、发光单元包括的发光子单元的数量以及排布、发光子单元包括连接线路单元的特征均与图1A和图2所示的实施例相同,在此不再赘述。
图3所示的发光板可以为显示面板,发光单元为像素单元,发光单元包括 的发光子单元为子像素。本公开实施例提供的显示面板既可以通过提供备用电接触点对提高产品的绑定良率,还可以降低负极走线的功耗。
当然本公开实施例提供的发光板还可以作为背光源与液晶显示面板结合,本公开实施例对此不作限制。
本公开另一实施例提供一种显示装置,包括上述任一种显示面板。本公开实施例提供的显示装置既可以通过提供备用电接触点对提高产品的绑定良率,还可以降低负极走线的功耗。
图4为本公开一实施例提供的线路板的局部平面结构示意图。如图4所示,线路板包括衬底基板100以及位于衬底基板100上的多个连接线路单元210。多个连接线路单元210沿第一方向和第二方向阵列排布在衬底基板100上,图4以X方向为第一方向,Y方向为第二方向为例进行描述。
如图4所示,每个连接线路单元210包括至少两个电接触点对211,每个电接触点对211包括正极接触点2111和负极接触点2112,每个连接线路单元210中,各正极接触点2111彼此电连接,各负极接触点2112彼此电连接。上述至少两个电接触点对211中仅一个电接触点对211的正极接触点2111和负极接触点2112被配置为分别与一个发光二极管芯片的正极和负极连接。本公开实施例中,每个连接线路单元包括至少两个电接触点对,该至少两个电接触点对中的一个电接触点对用于连接发光二极管芯片,其他电接触点对作为备用电接触点对。当与其中一个电接触点对连接的发光二极管芯片发生不良时,通过在其他任一备用的电接触点对上绑定发光二极管芯片,可以实现对该发光子单元的修复。
例如,如图4所示,本公开实施例以每个连接线路单元210包括两个电接触点对211为例进行描述,两个电接触点对211之一被配置为与发光二极管芯片连接,另一个作为备用的电接触点对。但本公开实施例不限于此,连接线路单元还可以包括三个或者更多个电接触点对,在连接线路单元包括三个以上电接触点对时,其中一个电接触点对被配置为与发光二极管芯片连接,其他电接触点对作为备用的电接触点对。
例如,如图4所示,线路板还包括沿第一方向(X方向)延伸的多条负极走线300。负极走线300包括第一负极走线310和第二负极走线320,沿第一方向排列的一列连接线路单元210包括多个第一连接线路单元2101和多个第二连接线路单元2102,第一连接线路单元2101的负极接触点2112与第一负极 走线310连接,第二连接线路单元2102的负极接触点2112与第二负极走线320连接。例如,以沿第一方向排列的一列连接线路单元为一列连接线路单元为例,则一列连接线路单元与对应的两条负极走线连接。
相对于一般的将一列连接线路单元(例如一列连接线路单元被配置为与一列子像素连接)与一条负极走线连接的情况,本公开实施例中,沿第一方向排列的连接线路单元与两条负极走线连接,可以减少每条负极走线连接的连接线路单元的数量,即减少每条负极走线连接的发光二极管芯片的数量,进而有效降低每条负极走线上的电流,以降低负极走线的功耗。
例如,如图4所示,与沿第一方向排列的一列连接线路单元210连接的第一负极走线310和第二负极走线320分别位于该列连接线路单元210的两侧,从而该排发光子单元中的负极接触点与相应的负极走线连接时不会出现与其他负极走线相交的情况,方便走线的设计。以沿第一方向排列的一列发光子单元为一列发光子单元为例,沿第二方向排列的相邻两列连接线路单元210之间设置两条负极走线300,两条负极走线300之间的间距为保证两者不会发生短路的安全距离,例如,两条负极走线300之间的间距可以不小于15微米。例如,在保证位于相邻两列连接线路单元210之间的两条负极走线300之间的间距满足安全间距的情况下,可以将各负极走线300的线宽设置的尽量宽(例如,可以为30微米),还可以降低负极走线的电阻。
例如,如图4所示,沿第一方向,第一连接线路单元2101和第二连接线路单元2102可以交替排列。本公开实施例不限于此,只要第一连接线路单元与第一负极走线连接,第二连接线路单元与第二负极走线连接,以减少各负极走线连接的连接线路单元的数量即可。
例如,第一连接线路单元2101和第二连接线路单元2102的数量相同。
例如,如图4所示,线路板还包括沿第二方向(即Y方向)延伸的多条正极走线400,正极走线400位于负极走线300与衬底基板100之间。每个连接线路单元210还包括正极连接部212,正极连接部212与负极走线300同层设置,且每个连接线路单元210中的正极接触点2111通过正极连接部212与正极走线400连接。
例如,如图4所示,正极接触点2111可以与正极连接部212为一体结构,以方便制作。
例如,如图4所示,在连接线路单元210包括两个电接触点对211时,沿 第一方向,两个正极接触点2111分别位于正极连接部212的两侧边缘,两个负极接触点2112位于相应的正极接触点2111远离正极连接部212的一侧,且与正极接触点2111彼此分隔。
例如,如图4所示,正极连接部212与正极走线400之间设置有绝缘层(未示出),正极连接部212可以通过贯穿绝缘层的多个过孔500实现与正极走线400的电连接。
例如,如图4所示,第一方向上,每条正极走线400在衬底基板100上的正投影与一个电接触点对211以及部分正极连接部212在衬底基板100上的正投影交叠。本公开实施例中,将正极走线的线宽设置的较宽,可以降低走线的功耗。
例如,如图4所示,每个连接线路单元210还包括与各负极接触点2112连接的两个负极连接部213,负极连接部213位于负极接触点2112远离正极接触点2111的一侧,负极接触点2112通过负极连接部213与负极走线300连接,且负极连接部213的至少部分在衬底基板100上的正投影与正极走线400在衬底基板100上的正投影没有交叠。本公开实施例中,通过设置与正极走线以及负极走线均至少部分不交叠的负极连接部,可以在发光二极管芯片发生不良时,采用例如激光切割等手段对负极连接部进行切割,以断开负极接触点与负极走线的连接,实现发光子单元的修复。通过设置负极连接部,可以避免切割过程影响正极走线以及负极走线。
例如,如图4所示,沿第二方向排列的相邻三个连接线路单元210组成连接线路单元组2100,正极走线400包括第一正极走线410和第二正极走线420,连接线路单元组2100中的一个连接线路单元210与第一正极走线410连接,连接线路单元组2100中的另外两个连接线路单元210与第二正极走线420连接,且沿第一方向,第一正极走线410的宽度小于第二正极走线420的宽度。本公开实施例中,将每个连接线路单元组与两个正极走线连接,可以使得一个连接线路单元能够被独立控制。
例如,三个连接线路单元分别与红光发光二极管芯片、绿光发光二极管芯片以及蓝光发光二极管芯片连接。例如,与红光发光二极管芯片连接的连接线路单元可以与第一正极走线连接,与绿光发光二极管芯片以及蓝光发光二极管芯片连接的连接线路单元可以与第二正极走线连接,以保证各发光子单元都被施加相应的起亮电压,既可以节省电能,又可以防止对某一种颜色发光子单元 加载过载的电压。
图4所示的线路板为图1A所示的发光板中除发光二极管芯片以外的结构,该线路板的具体特征也同图1A所示的线路板相同。因此,在图4的实施例中关于线路板的特征均可以参考图1A对应的实施例。该线路板可以应用于显示面板,也可以应用于背光源,本公开实施例提供的线路板既可以通过提供备用电接触点对提高产品的绑定良率,还可以降低负极走线的功耗。
图5为本公开另一实施例提供的线路板的局部平面结构示意图。如图5所示,与图4所示的实施例相比,图5所示的实施例的不同之处在于,第一负极走线310不是一条连续的走线,而是中间断开的以形成第一子负极走线311和第二子负极走线312;第二负极走线320不是一条连续的走线,而是中间断开的以形成第三子负极走线321和第四子负极走线322。
如图5所示,本实施例提供的线路板可以用于双边驱动,第一负极走线310包括的第一子负极走线311和第二子负极走线312分别连接至两个驱动器,第二负极走线320包括的第三子负极走线321和第四子负极走线322分别连接至上述两个驱动器,这两个驱动器可以分别位于线路板的沿第一方向的两侧边缘。
例如,如图5所示,第一子负极走线311和第二子负极走线312可以位于同一直线上,第三子负极走线321和第四负极走线322可以位于同一直线上。
例如,如图5所示,多个第一连接线路单元2101中靠近第一子负极走线311的部分与第一子负极走线311连接,多个第一连接线路单元2101中靠近第二子负极走线312的部分与第二子负极走线312连接。多个第二连接线路单元2102中靠近第三子负极走线321的部分与第三子负极走线321连接,多个第二连接线路单元2102中靠近第四子负极走线322的部分与第四子负极走线322连接。
例如,位于同一列的多个连接线路单元可以沿第一方向划分为两部分,两部分连接线路单元的数量可以相同,也可以不同。以两部分连接线路单元之间的间隔为分隔线,第一子负极走线和第二子负极走线分别位于分隔线的两侧,以分别与位于分隔线两侧的连接线路单元连接,第三子负极走线和第四子负极走线分别位于分隔线的两侧,以分别与位于分隔线两侧的连接线路单元连接。
相对于一般的将一列连接线路单元(例如一列连接线路单元被配置为与一列子像素连接)与一条负极走线连接的情况,本公开实施例中,一列连接线路 单元与四条负极走线连接,可以减少每条负极走线连接的连接线路单元的数量,即减少每条负极走线连接的发光二极管芯片的数量,进而有效降低每条负极走线上的电流,以降低负极走线的功耗。
本公开实施例中正极走线的特征、连接线路单元的数量以及排布等特征均与图4所示的实施例相同,在此不再赘述。
图5所示的线路板为图3所示的发光板中除发光二极管芯片以外的结构,该线路板的具体特征也同图3所示的线路板相同。因此,在图5的实施例中关于线路板的特征均可以参考图3对应的实施例。该线路板可以应用于显示面板,也可以应用于背光源,本公开实施例提供的线路板既可以通过提供备用电接触点对提高产品的绑定良率,还可以降低负极走线的功耗。
有以下几点需要说明:
(1)本公开的实施例附图中,只涉及到与本公开实施例涉及到的结构,其他结构可参考通常设计。
(2)在不冲突的情况下,本公开的同一实施例及不同实施例中的特征可以相互组合。
以上所述仅是本公开的示范性实施方式,而非用于限制本公开的保护范围,本公开的保护范围由所附的权利要求确定。

Claims (18)

  1. 一种发光板,包括:
    衬底基板;
    多个发光单元,沿第一方向和第二方向阵列排布在所述衬底基板上,每个所述发光单元包括至少一个发光子单元,所述发光子单元包括连接线路单元以及与所述连接线路单元连接的一个发光二极管芯片,所述发光二极管芯片位于所述连接线路单元远离所述衬底基板的一侧,
    其中,每个所述连接线路单元包括至少两个电接触点对,每个所述电接触点对包括第一电极接触点和第二电极接触点,每个所述连接线路单元中,各所述第一电极接触点彼此电连接,各所述第二电极接触点彼此电连接,且所述至少两个电接触点对中仅一个电接触点对与所述发光二极管芯片连接。
  2. 根据权利要求1所述的发光板,还包括:
    多条第一电极走线,沿所述第一方向延伸,
    其中,所述多条第一电极走线包括多条第一类第一电极走线和多条第二类第一电极走线,沿所述第一方向排列的一列所述发光子单元包括多个第一发光子单元和多个第二发光子单元,所述第一发光子单元通过所述第一电极接触点与所述第一类第一电极走线连接,所述第二发光子单元通过所述第一电极接触点与所述第二类第一电极走线连接。
  3. 根据权利要求2所述的发光板,其中,与沿所述第一方向排列的一列所述发光子单元连接的所述第一类第一电极走线和所述第二类第一电极走线分别位于该排所述发光子单元的两侧。
  4. 根据权利要求2或3所述的发光板,其中,各所述第一类第一电极走线包括沿同一直线延伸且互相绝缘间隔的第一子电极走线和第二子电极走线,所述多个第一发光子单元中靠近所述第一子电极走线的部分与所述第一子电极走线连接,所述多个第一发光子单元中靠近所述第二子电极走线的部分与所述第二子电极走线连接;
    各所述第二类第一电极走线包括沿同一直线延伸且互相绝缘间隔的第三子电极走线和第四子电极走线,所述多个第二发光子单元中靠近所述第三子电极走线的部分与所述第三子电极走线连接,所述多个第二发光子单元中靠近所述第四子电极走线的部分与所述第四子电极走线连接。
  5. 根据权利要求2-4任一项所述的发光板,还包括:
    多条第二电极走线,沿所述第二方向延伸,所述第二电极走线位于所述第一电极走线与所述衬底基板之间,
    其中,每个所述连接线路单元还包括第二电极连接部,所述第二电极连接部与所述第一电极走线同层设置,且每个所述连接线路单元中的所述第二电极接触点通过所述第二电极连接部与所述第二电极走线连接。
  6. 根据权利要求5所述的发光板,其中,所述第二电极接触点与所述第二电极连接部为一体结构。
  7. 根据权利要求5或6所述的发光板,其中,在所述第一方向上,每条所述第二电极走线在所述衬底基板上的正投影与一个所述电接触点对以及部分所述第二电极连接部在所述衬底基板上的正投影交叠。
  8. 根据权利要求5-7任一项所述的发光板,其中,每个所述发光单元包括沿所述第二方向排列的三个不同颜色的发光子单元,所述第二电极走线包括第一类第二电极走线和第二类第二电极走线,且所述发光单元中的一个所述发光子单元与所述第一类第二电极走线连接,所述发光单元中的另外两个所述发光子单元与所述第二类第二电极走线连接。
  9. 根据权利要求5-8任一项所述的发光板,其中,每个所述连接线路单元包括两个电接触点对,每个所述连接线路单元还包括与各所述第一电极接触点连接的两个第一电极连接部,所述第一电极连接部位于所述第一电极接触点远离所述第二电极接触点的一侧,所述第一电极接触点通过所述第一电极连接部与所述第一电极走线连接,且所述第一电极连接部的至少部分在所述衬底基板上的正投影与所述第二电极走线在所述衬底基板上的正投影没有交叠。
  10. 一种线路板,包括:
    衬底基板;
    多个连接线路单元,沿第一方向和第二方向阵列排布在所述衬底基板上,
    其中,每个所述连接线路单元包括至少两个电接触点对,每个所述电接触点对包括第一电极接触点和第二电极接触点,每个所述连接线路单元中,各所述第一电极接触点彼此电连接,各所述第二电极接触点彼此电连接。
  11. 根据权利要求10所述的线路板,还包括:
    多条第一电极走线,沿所述第一方向延伸,
    其中,所述多条第一电极走线包括多条第一类第一电极走线和多条第二类 第一电极走线,沿所述第一方向排列的一列所述连接线路单元包括多个第一连接线路单元和多个第二连接线路单元,所述第一连接线路单元的所述第一电极接触点与所述第一类第一电极走线连接,所述第二连接线路单元的所述第一电极接触点与所述第二类第一电极走线连接。
  12. 根据权利要求11所述的线路板,其中,与沿所述第一方向排列的一列所述连接线路单元连接的所述第一类第一电极走线和所述第二类第一电极走线分别位于该排所述连接线路单元的两侧。
  13. 根据权利要求12所述的线路板,其中,各所述第一类第一电极走线包括沿同一直线延伸且互相绝缘间隔的第一子电极走线和第二子电极走线,所述多个第一连接线路单元中靠近所述第一子电极走线的部分与所述第一子电极走线连接,所述多个第一连接线路单元中靠近所述第二子电极走线的部分与所述第二子电极走线连接;
    各所述第二类第一电极走线包括沿同一直线延伸且互相绝缘间隔的第三子电极走线和第四子电极走线所述多个第二连接线路单元中靠近所述第三子电极走线的部分与所述第三子电极走线连接,所述多个第二连接线路单元中靠近所述第四子电极走线的部分与所述第四子电极走线连接。
  14. 根据权利要求11-13任一项所述的线路板,还包括:
    多条第二电极走线,沿所述第二方向延伸,所述第二电极走线位于所述第一电极走线面向所述衬底基板的一侧,
    其中,每个所述连接线路单元还包括第二电极连接部,所述第二电极连接部与所述第一电极走线同层设置,且每个所述连接线路单元中的所述第二电极接触点通过所述第二电极连接部与所述第二电极走线连接。
  15. 根据权利要求14所述的线路板,其中,在所述第一方向上,每条所述第二电极走线在所述衬底基板上的正投影与一个所述电接触点对以及部分所述第二电极连接部在所述衬底基板上的正投影交叠。
  16. 根据权利要求14或15所述的线路板,其中,沿所述第二方向排列的相邻三个所述连接线路单元组成连接线路单元组,所述第二电极走线包括第一类第二电极走线和第二类第二电极走线,所述连接线路单元组中的一个所述连接线路单元与所述第一类第二电极走线连接,所述连接线路单元组中的另外两个所述连接线路单元与所述第二类第二电极走线连接。
  17. 根据权利要求14-16任一项所述的线路板,其中,每个所述连接线路 单元包括两个电接触点对,每个所述连接线路单元还包括与各所述第一电极接触点连接的两个第一电极连接部,所述第一电极连接部位于所述第一电极接触点远离所述第二电极接触点的一侧,所述第一电极接触点通过所述第一电极连接部与所述第一电极走线连接,且所述第一电极连接部的至少部分在所述衬底基板上的正投影与所述第二电极走线在所述衬底基板上的正投影没有交叠。
  18. 一种显示装置,包括权利要求1-9任一项所述的发光板,其中,所述发光板为显示面板。
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