WO2020203541A1 - ＧａＮ基板ウエハおよびＧａＮ基板ウエハの製造方法 - Google Patents

ＧａＮ基板ウエハおよびＧａＮ基板ウエハの製造方法 Download PDF

Info

Publication number
WO2020203541A1
WO2020203541A1 PCT/JP2020/013298 JP2020013298W WO2020203541A1 WO 2020203541 A1 WO2020203541 A1 WO 2020203541A1 JP 2020013298 W JP2020013298 W JP 2020013298W WO 2020203541 A1 WO2020203541 A1 WO 2020203541A1
Authority
WO
WIPO (PCT)
Prior art keywords
gan
region
substrate wafer
gan substrate
less
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2020/013298
Other languages
English (en)
French (fr)
Japanese (ja)
Inventor
憲司 磯
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Chemical Corp
Original Assignee
Mitsubishi Chemical Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Chemical Corp filed Critical Mitsubishi Chemical Corp
Priority to EP20782703.1A priority Critical patent/EP3951025A4/en
Priority to JP2021511860A priority patent/JP7775708B2/ja
Priority to CN202080025770.5A priority patent/CN113692459B/zh
Priority to KR1020217031332A priority patent/KR20210144729A/ko
Publication of WO2020203541A1 publication Critical patent/WO2020203541A1/ja
Priority to US17/485,617 priority patent/US20220010455A1/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/29—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
    • H10P14/2924—Structures
    • H10P14/2925—Surface structures
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/01—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes on temporary substrates, e.g. substrates subsequently removed by etching
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
    • C23C16/34—Nitrides
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
    • C30B25/02—Epitaxial-layer growth
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
    • C30B25/02—Epitaxial-layer growth
    • C30B25/18—Epitaxial-layer growth characterised by the substrate
    • C30B25/186—Epitaxial-layer growth characterised by the substrate being specially pre-treated by, e.g. chemical or physical means
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
    • C30B25/02—Epitaxial-layer growth
    • C30B25/18—Epitaxial-layer growth characterised by the substrate
    • C30B25/20—Epitaxial-layer growth characterised by the substrate the substrate being of the same materials as the epitaxial layer
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/10—Inorganic compounds or compositions
    • C30B29/38—Nitrides
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/10—Inorganic compounds or compositions
    • C30B29/40—AIIIBV compounds wherein A is B, Al, Ga, In or Tl and B is N, P, As, Sb or Bi
    • C30B29/403—AIII-nitrides
    • C30B29/406—Gallium nitride
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/40—Crystalline structures
    • H10D62/405—Orientations of crystalline planes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/60—Impurity distributions or concentrations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/85—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group III-V materials, e.g. GaAs
    • H10D62/8503—Nitride Group III-V materials, e.g. AlN or GaN
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/24—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials using chemical vapour deposition [CVD]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/29—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
    • H10P14/2901—Materials
    • H10P14/2907—Materials being Group IIIA-VA materials
    • H10P14/2908—Nitrides
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/29—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
    • H10P14/2926—Crystal orientations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34—Deposited materials, e.g. layers
    • H10P14/3402—Deposited materials, e.g. layers characterised by the chemical composition
    • H10P14/3414—Deposited materials, e.g. layers characterised by the chemical composition being group IIIA-VIA materials
    • H10P14/3416—Nitrides
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34—Deposited materials, e.g. layers
    • H10P14/3438—Doping during depositing
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34—Deposited materials, e.g. layers
    • H10P14/3438—Doping during depositing
    • H10P14/3441—Conductivity type
    • H10P14/3442—N-type
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34—Deposited materials, e.g. layers
    • H10P14/3466—Crystal orientation

Definitions

  • the present invention mainly relates to a GaN substrate wafer and a method for manufacturing the same.
  • the GaN substrate wafer is a substrate wafer made of GaN (gallium nitride).
  • a substrate wafer is a wafer mainly used as a substrate in a semiconductor device manufacturing process.
  • the substrate used for the InGaN-based laser diode (LD) currently commercially produced is a GaN substrate having a relatively high carrier concentration. Recently, research and development of vertical GaN power devices using such GaN substrates have been active.
  • GaN thick film When a GaN thick film is grown on a sapphire wafer by HVPE (Hydride Vapor Phase Epitaxy), if a region with a low impurity concentration is provided at the bottom of the GaN thick film and a region with a high impurity concentration is provided at the top, the GaN thick film is formed.
  • HVPE Hadride Vapor Phase Epitaxy
  • a GaN substrate wafer having a region having a low impurity concentration on the back surface side and a region having a high impurity concentration on the front surface side can be obtained (Patent Documents 1 and 2). ..
  • Patent Document 1 or Patent Document 2 When manufacturing a GaN substrate wafer having a region having a low impurity concentration on the back surface side and a region having a high impurity concentration on the front surface side by the method disclosed in Patent Document 1 or Patent Document 2, one wafer every time a GaN substrate wafer is made, it is necessary to grow a GaN thick film with HVPE on one sapphire wafer. Therefore, the method disclosed in Patent Document 1 or Patent Document 2 cannot be said to have high manufacturing efficiency.
  • the present inventor manufactures a GaN wafer having a low impurity concentration in advance, and then grows a GaN layer having a high impurity concentration on the wafer to a specific thickness, so that the region where the impurity concentration is increased is placed on the front surface side. It has been found that a GaN substrate wafer having only one can be produced more efficiently.
  • the present invention has been made based on such an idea, and its embodiments include the following.
  • a (0001) oriented GaN substrate wafer having a first region provided on the N-polar side and a second region provided on the Ga-polar side across the regrowth interface.
  • a GaN substrate wafer having a minimum thickness of 20 ⁇ m or more and 300 ⁇ m or less in two regions, and the second region includes a region having a higher total donor impurity concentration than the first region.
  • (1) It has a diameter of 50 mm or more and 55 mm or less and a thickness of 250 ⁇ m or more and 450 ⁇ m or less.
  • (2) It has a diameter of 100 mm or more and 105 mm or less and a thickness of 350 ⁇ m or more and 750 ⁇ m or less.
  • Si concentration is 5 ⁇ 10 16 atoms / cm 3 or more
  • O concentration is 3 ⁇ 10 16 atoms / cm 3 or less
  • H concentration is 1 ⁇ 10 17 atoms / cm 3 or less
  • a method for manufacturing a GaN substrate wafer having a first region provided on the N-polar side and a second region provided on the Ga-polar side across the regrowth interface (I) A first GaN thick film composed of (0001) oriented GaN that is not intentionally doped is grown on a seed wafer by HVPE, and then at least one first c-plane from the first GaN thick film. The first step to obtain a GaN wafer, (Ii) A second GaN thick film made of (0001) oriented GaN that is not intentionally doped is grown on the first c-plane GaN wafer with HVPE, and then the second GaN thick film is sliced.
  • the second step of obtaining the second c-plane GaN wafer and (Iii) (0001) It has a third step of growing an oriented GaN film having a thickness of 500 ⁇ m or less on the second c-plane GaN wafer with HVPE, and A method for manufacturing a GaN substrate wafer, wherein the GaN film has a region in which the total concentration of donor impurities is higher than that of the second c-plane GaN wafer.
  • GaN substrate wafer manufacturing method [23] The method for producing a GaN substrate wafer according to any one of [20] to [22], wherein the GaN substrate wafer satisfies any of the conditions selected from the following (1) to (3).
  • (1) Has a diameter of 50 mm or more and 55 mm or less and a thickness of 250 ⁇ m or more and 450 ⁇ m or less
  • (2) Has a diameter of 100 mm or more and 105 mm or less and a thickness of 350 ⁇ m or more and 750 ⁇ m or less
  • the GaN film having a thickness of 800 ⁇ m or less has a region length of 1 ⁇ m or more in the c-axis direction from the upper surface of the GaN film, and the total concentration of donor impurities in the region is 1 ⁇ 10 18 atoms /.
  • the present invention it is possible to provide a high-performance GaN substrate wafer having a high carrier concentration. Further, according to the present invention, it is possible to provide a method for efficiently producing a GaN substrate wafer having a high carrier concentration. Therefore, it can be preferably used for manufacturing a nitride semiconductor device in which a device structure is provided on a GaN substrate having a high carrier concentration.
  • FIG. 1 is a perspective view showing a GaN substrate wafer according to an embodiment.
  • FIG. 2 is a cross-sectional view showing a GaN substrate wafer according to the embodiment.
  • FIG. 3 is a cross-sectional view showing a GaN substrate wafer according to the embodiment.
  • FIG. 4 is a process sectional view for explaining a manufacturing process of a nitride semiconductor device using the GaN substrate wafer according to the embodiment.
  • FIG. 5 is a process sectional view for explaining the GaN substrate wafer manufacturing method according to the embodiment.
  • FIG. 6 is a process sectional view for explaining the GaN substrate wafer manufacturing method according to the embodiment.
  • FIG. 7 is a process sectional view for explaining the GaN substrate wafer manufacturing method according to the embodiment.
  • FIG. 8 is a schematic view showing the basic configuration of the HVPE apparatus.
  • FIG. 9 is a diagram showing the carrier concentration of the GaN substrate wafer produced in the examples.
  • GaN Substrate Wafer An embodiment of the present invention relates to a GaN substrate wafer.
  • the GaN substrate wafer according to the embodiment is a (0001) oriented GaN wafer, and is composed of a first region provided on the N-polar side with the regrowth interface interposed therebetween and a second region provided on the Ga-polar side. ..
  • the minimum thickness of the second region is 20 ⁇ m or more and 300 ⁇ m or less.
  • the second region includes a region in which the total concentration of donor impurities is higher than that of the first region.
  • impurity means a component other than Ga element and N element contained in a GaN substrate.
  • the carrier concentration in at least a part of the region is 1 ⁇ 10 18 cm -3 or more, further 2 ⁇ 10 18 cm -3 or more, further 3 ⁇ 10 18 cm -3 or more, and further 4 ⁇ 10 18 cm ⁇ . It can be 3 or more, even 6 ⁇ 10 18 cm -3 or more, and even 8 ⁇ 10 18 cm -3 or more.
  • the carrier concentration is referred to in the present specification, it means the carrier concentration at room temperature unless otherwise specified.
  • the (0001) oriented GaN wafer is a GaN wafer having a (0001) crystal plane, that is, a main plane (large area plane) parallel to or substantially parallel to the c plane, and is also referred to as a c plane GaN wafer.
  • 1 and 2 show an example of the GaN substrate wafer according to the embodiment.
  • FIG. 1 is a perspective view and
  • FIG. 2 is a cross-sectional view.
  • the GaN substrate wafer 100 shown in FIGS. 1 and 2 is a self-supporting substrate wafer made of only GaN crystals, one of the two main surfaces being an N-polar surface 101 and the other being a Ga polar surface 102.
  • the N-polar surface 101 and the Ga polar surface 102 are parallel to each other.
  • the GaN substrate wafer 100 is oriented (0001), and the inclination of the Ga polar plane 102 from the (0001) crystal plane is 10 degrees or less (including 0 degrees).
  • the inclination may be 0.2 degrees or more.
  • the inclination is preferably 5 degrees or less, more preferably 2.5 degrees or less.
  • the inclination may be 1.5 degrees or less, or may be 1 degree or less.
  • the diameter of the GaN substrate wafer 100 is usually 45 mm or more, and may be 95 mm or more, or 145 mm or more. Typically, it is 50 to 55 mm (about 2 inches), 100 to 105 mm (about 4 inches), 150 to 155 mm (about 6 inches), and the like.
  • the preferred range of thickness of the GaN substrate wafer 100 varies with diameter. When the diameter of the GaN substrate wafer 100 is about 2 inches, the thickness is preferably 250 ⁇ m or more, more preferably 300 ⁇ m or more, further preferably 350 ⁇ m or more, and preferably 450 ⁇ m or less, more preferably 400 ⁇ m or less.
  • the thickness is preferably 350 ⁇ m or more, more preferably 400 ⁇ m or more, and preferably 750 ⁇ m or less, more preferably 650 ⁇ m or less, still more preferably 600 ⁇ m or less.
  • the thickness is preferably 450 ⁇ m or more, more preferably 550 ⁇ m or more, and preferably 800 ⁇ m or less, more preferably 700 ⁇ m or less.
  • the GaN substrate wafer 100 is usually disk-shaped, but in the modified example, the shape of the main surface may be square, rectangular, hexagonal, octagonal, elliptical, or irregular. Good.
  • the diameter can be read as "the shortest length as a straight line passing through the center of gravity on the main surface".
  • the N-polar surface 101 of the GaN substrate wafer 100 is a “back surface” and may be mirror-finished, rough-finished, or matte-finished.
  • the Ga polar surface 102 of the GaN substrate wafer 100 is a “front surface”, and when the GaN substrate wafer 100 is used for manufacturing a nitride semiconductor device, the nitride semiconductor layer is usually placed on the Ga polar surface 102. It is epitaxially grown.
  • the Ga polar surface 102 may be a surface as-grown as it is crystal-grown, but is preferably a surface flattened by processing such as polishing, CMP (Chemical Mechanical Polishing), and etching. (Flat surface).
  • the root mean square (RMS) roughness of the Ga polar plane 102 measured by an atomic force microscope (AFM) is preferably less than 5 nm, more preferably less than 2 nm, still more preferably less than 1 nm in the measurement range of 2 ⁇ m ⁇ 2 ⁇ m. , May be less than 0.5 nm.
  • the Ga polar surface 102 may be a surface formed by cutting, but it is preferably a surface that has been flattened by polishing, CMP, etching, or the like without cutting.
  • the GaN substrate wafer 100 has a regrowth interface 103 between its two main surfaces, and has a first region 110 on the N-polar side and a second region 120 on the Ga-polar side with the regrowth interface 103 interposed therebetween. are doing.
  • the "re-growth interface” means a boundary surface generated when a GaN crystal grows on an arbitrary substrate, and its existence means, for example, a scanning electron microscope cathode luminescence observation or a fluorescence microscope observation of a cross section of a GaN substrate wafer. Can be confirmed by.
  • the regrowth interface 103 is preferably, but not essential, parallel to the Ga polar plane 102.
  • the thickness of the second region 120 is usually minimal at one end in the tilt direction and maximal at the other end. It is preferable that the difference between the thickness of the second region 120 at one end and the thickness at the other end does not exceed 200 ⁇ m.
  • the first region 110 is finally removed. That is, it is assumed that the nitride semiconductor device chip manufactured by using the GaN substrate wafer 100 does not include a portion derived from the first region 110. In such a usage mode, there is no particular requirement for the electrical characteristics of the GaN crystal forming the first region 110.
  • HVPE Hydride Vapor Phase Epitaxy.
  • Si concentration is 5 ⁇ 10 16 atoms / cm 3 or more
  • O concentration is 3 ⁇ 10 16 atoms / cm 3 or less
  • H concentration is 1 ⁇ 10 17 atoms / cm 3 or less
  • Si concentration is less than 1 ⁇ 10 18 atoms / cm 3 .
  • the Si concentration is 5 ⁇ 10 17 atoms / cm 3 or less
  • the O concentration is 2 ⁇ 10 17 atoms / cm 3 or less
  • the H concentration is 5 ⁇ 10 16 atoms.
  • the concentration of each impurity other than / cm 3 or less and Si, O and H can be 5 ⁇ 10 15 atoms / cm 3 or less.
  • "intentional doping” means that a target element is added as a raw material in the process of growing a GaN crystal.
  • the second region 120 is usually grown on the first region 110 with HVPE.
  • the reason why the regrowth interface 103 exists between the first region 110 and the second region 120 is that the step of growing the first region 110 and the step of growing the second region 120 are not continuous.
  • the minimum thickness of the second region 120 is at least 20 ⁇ m, preferably 40 ⁇ m or more, more preferably 50 ⁇ m or more, and may be 100 ⁇ m or more. The reason is that in the process of manufacturing the nitride semiconductor device chip using the GaN substrate wafer 100, after the first region 110 is removed from the substrate wafer 100, the remaining second region 120 supports the structure of the semiconductor device chip. This is so that it can play a role as a substrate.
  • the minimum thickness means the thickness of the portion where the thickness is the minimum.
  • the upper limit of the minimum thickness of the second region 120 is 300 ⁇ m.
  • the thickness of the second region 120 is considered to be the minimum thickness at all points.
  • the main doping region 120 a region within a specific length L from the Ga polar surface 102 of the GaN substrate wafer 100 is defined as the main doping region 120a.
  • the second region 120 is doped so that the total concentration of donor impurities is at least 1 ⁇ 10 18 atoms / cm 3 or more in at least the main doping region 120a.
  • the total concentration of donor impurities is the sum of the concentrations of all types of donor impurities.
  • the specific length L is usually at least 1 ⁇ m, and may be 5 ⁇ m or more, 10 ⁇ m or more, 20 ⁇ m or more, 25 ⁇ m or more, 50 ⁇ m or more, 75 ⁇ m or more, 100 ⁇ m or more, 150 ⁇ m or more, 200 ⁇ m or more, and the like.
  • the total concentration of donor impurities in at least a portion of the main dope region 120a is preferably 2 ⁇ 10 18 atoms / cm 3 or greater, more preferably 3 ⁇ 10 18 atoms / cm 3 or greater, and 4 ⁇ 10 18 atoms / cm.
  • main-doped region 120a has a higher carrier concentration than the first region 110.
  • the specific length L is determined so that the GaN substrate consisting of only the main doping region 120a can support the structure of the semiconductor device chip.
  • the specific length L is at least 20 ⁇ m, preferably 40 ⁇ m or more, more preferably 50 ⁇ m or more, and may be 100 ⁇ m or more.
  • the minimum thickness t120 of the second region 120 is preferably 1.2 times or less the specific length L.
  • the variation in the total concentration of donor impurities along the c-axis direction in the main doping region 120a is preferably within ⁇ 25%, more preferably within ⁇ 20%, still more preferably within ⁇ 15%, and more from the median. More preferably, it is within ⁇ 10%.
  • the total concentration of donor impurities in the second region 120, including the main doped region 120a is 5 ⁇ 10 19 atoms / cm 3 or less, and even 2 ⁇ 10 19 atoms, to avoid significant deterioration of crystal quality due to excessive doping. / Cm 3 or less.
  • Donor impurities that can be contained in the second region 120 include Group 14 elements such as Si (silicon) and Ge (germanium), and Group 16 elements such as O (oxygen) and S (sulfur).
  • the donor impurity contained at the highest concentration in the second region 120 or the main doped region 120a is preferably Si or Ge, mainly for the following two reasons.
  • Si and Ge are donor impurities that show a high activation rate along with O.
  • facet growth is required to obtain GaN doped with O at a high concentration, whereas GaN doped with Si or Ge at a high concentration can be obtained by c-plane growth.
  • Facet growth is a technique for growing a (0001) oriented GaN film so that the growth surface is full of pits.
  • c-plane growth is the growth of such a GaN film so that the growth surface is flat. Since the through dislocations have the property of gathering at the bottom of the pit, when the second region 120 is formed by facet growth, the uniformity of the through dislocation density on the Ga polar surface 102 is lowered.
  • manufacturers of nitride semiconductor devices prefer GaN substrate wafers with high uniformity of through-dislocation density. Forming the second region 120 by facet growth is also disadvantageous in terms of the productivity of the substrate wafer 100. This is because the faceted-grown GaN film requires more processing time to flatten the surface than the c-plane grown GaN film.
  • the total concentration of donor impurities excluding Si is set to 10% or less, further 5% or less, and further 1% or less of the Si concentration, so that the carrier concentration in the region is the Si concentration. It can be controlled by adjustment.
  • the Si concentration in the region is preferably 4 ⁇ 10 17 atoms / cm 3 or more. is there.
  • the second region 120 is normally grown in HVPE, one or more conditions selected from the following (a') to (c') are satisfied with respect to the impurity concentration thereof.
  • the condition of the second region 120 may be independent of the condition of the first region 110 described above, that is, the conditions may be the same or different from each other.
  • (A') Si concentration is 5 ⁇ 10 16 atoms / cm 3 or more
  • (b') O concentration is 3 ⁇ 10 16 atoms / cm 3 or less
  • c') H concentration is 1 ⁇ 10 17 atoms / cm 3 or less
  • the regrowth interface 103 between the first region 110 and the second region 120 may be a rough surface.
  • the regrowth interface 103 can become a rough surface.
  • the direction from the first region 110 to the second region 120 perpendicular to the regrowth interface 103 is the height direction, and the height difference between the highest point and the lowest point at the regrowth interface is the roughness of the regrowth interface.
  • the roughness r can be, for example, 0.3 ⁇ m or more and 12 ⁇ m or less.
  • the dislocation density on the Ga polar surface 102 of the GaN substrate wafer 100 is 0.5 times or more and less than 2 times, or 2 times or more and less than 5 times, or 5 times or more and 10 times the dislocation density of the first region 110 in the vicinity of the regrowth interface 103. Can be less than.
  • a method for keeping the dislocation density of the Ga polar surface 102 within the above range a method of making the regrowth interface 103 a rough surface can be mentioned.
  • the “neighborhood of the regrowth interface 103” means a region up to 1 ⁇ m from the regrowth interface 103 to the Ga polar surface 102 side. When the regrowth interface 103 is a rough surface, the highest point at the regrowth interface is used as a reference.
  • the edge of the GaN substrate wafer 100 may be chamfered.
  • the substrate wafer 100 may be provided with various markings as necessary, such as an orientation flat or notch for displaying the crystal orientation, and an index flat for facilitating the identification of the front surface and the back surface. it can.
  • the semiconductor device manufactured by using the GaN substrate wafer 100 is basically a nitride semiconductor device.
  • a nitride semiconductor device is a semiconductor device in which the main part of the device structure is formed of a nitride semiconductor.
  • Nitride semiconductors are also called nitride-based III-V group compound semiconductors, group III nitride-based compound semiconductors, GaN-based semiconductors, etc., and include GaN and part or all of GaN gallium in other periodic tables. Includes compounds substituted with Group 13 elements (B, Al, In, etc.).
  • the types of nitride semiconductor devices that can be manufactured using the GaN substrate wafer 100 are not limited, and as an example, light emitting devices such as laser diodes (LD) and light emitting diodes (LEDs), rectifiers, bipolar transistors, and field effect transistors. , Electronic devices such as high electron mobility transistors (HEMTs).
  • a nitride semiconductor device is manufactured using the GaN substrate wafer 100, after the GaN substrate wafer 100 is prepared as shown in FIG. 4 (a), the Ga polar surface 102 thereof is shown in FIG. 4 (b).
  • the epitaxial film 300 including at least the n-type nitride semiconductor layer 310 and the p-type nitride semiconductor layer 320 is grown by the metalorganic vapor phase growth method (MOVPE) to form an epitaxial wafer.
  • MOVPE metalorganic vapor phase growth method
  • the epitaxial wafer is fragmented into a nitride semiconductor device chip, but to thin the epitaxial wafer before fragmentation.
  • the first region 110 of the GaN substrate wafer 100 is removed by a method such as grinding or etching. This thinning process may be performed so that a ring-shaped thick portion remains on the outer peripheral portion of the epitaxial wafer. That is, the first region 110 of the GaN substrate wafer 100 can be removed only in the portion excluding the outer peripheral portion of the epitaxial wafer.
  • the second region 120 is also partially removed from the GaN substrate wafer 100 so that the main doping region 120a is exposed on the N-polar surface side of the thinned epitaxial wafer, and only the main doping region 120a is exposed. Remaining.
  • the epitaxial wafer 300 may be divided after the electrodes are formed on the surface of the exposed main doping region 120a.
  • GaN substrate wafer Next, a method for manufacturing a GaN substrate wafer, which is another embodiment of the present invention, will be described.
  • the manufacturing method described below is a preferred embodiment for manufacturing the GaN substrate wafer according to the embodiment of the present invention described above.
  • the above-mentioned GaN substrate wafer is mentioned as a preferable embodiment of the GaN substrate wafer obtained by the method of manufacturing a GaN substrate wafer described below.
  • the above-mentioned GaN substrate wafer 100 according to the embodiment can be preferably manufactured by using the method described below. This method is applied to the production of a GaN substrate wafer having an N-polar side and a Ga-polar side across a regrowth interface, and has the following steps.
  • a region is provided in which the total concentration of donor impurities is higher than that of the GaN wafer.
  • the step of manufacturing the substrate in the second step it is preferable to perform the following steps in which the first step is added. Therefore, the following first step is optional.
  • a first GaN thick film composed of (0001) oriented GaN that is not intentionally doped is grown on a seed wafer by HVPE, and the first GaN thick film is processed to form at least one first GaN thick film.
  • a second GaN thick film made of (0001) oriented GaN that is not intentionally doped is grown on the first c-plane GaN wafer obtained in the first step by HVPE, and the second GaN thickness is formed.
  • the second step of slicing the second c-plane GaN wafer from the film (Iii) (0001) A third step of growing an oriented GaN film having a thickness of 500 ⁇ m or less on a second c-plane GaN wafer obtained in the second step with HVPE to obtain a laminated structure. However, at least a part of the GaN film is doped so that the total concentration of donor impurities is higher than that of the second c-plane GaN wafer. In the present specification, "on the wafer” is synonymous with "on the surface of the wafer”.
  • the seed wafer 1 shown in FIG. 5 (a) is prepared, and as shown in FIG. 5 (b), the seed wafer 1 is composed of (0001) unintentionally undoped GaN and oriented first.
  • the GaN thick film 2 is grown with HVPE.
  • FIG. 5 (c) at least one first c-plane GaN wafer 3 is obtained by processing the first GaN thick film 2.
  • An example of the seed wafer 1 is a c-plane sapphire wafer, and preferably, a release layer may be provided on the main surface.
  • a GaN layer having a thickness of several hundred nm is grown on a c-plane sapphire wafer with MOVPE via a low temperature buffer layer, and a Ti (titanium) layer having a thickness of several tens nm is further formed on the GaN layer by vacuum deposition.
  • a c-plane sapphire wafer with a release layer is formed by annealing in a mixed gas of 80% H 2 (hydrogen gas) and 20% NH 3 (ammonia) at, for example, 1060 ° C. for 30 minutes. Can be done.
  • the seed wafer 1 may be a c-plane GaN wafer manufactured in a separate process.
  • the first GaN thick film 2 is grown to a thickness sufficient to produce at least one self-supporting c-plane GaN wafer.
  • the first GaN thick film 2 is grown to a thickness of several mm or more, from which at least two first c-plane GaN wafers 3 are sliced.
  • FIG. 6A is a cross-sectional view showing one of the first c-plane GaN wafers 3 produced in the first step.
  • the first c-plane GaN wafer 3 is not limited to the one obtained by the first step.
  • the second step as shown in FIG.
  • the second GaN thick film 4 made of (0001) unintentionally doped GaN on the Ga polar plane of the first c-plane GaN wafer 3 is oriented. Is then grown on HVPE, and then the second c-plane GaN wafer 5 is sliced from the second GaN thick film 4 as shown in FIG. 6 (c).
  • the second GaN thick film 4 is grown to a thickness sufficient to produce at least one second c-plane GaN wafer 5 by processing the second GaN thick film 4.
  • the second GaN thick film 4 is grown to a thickness of several mm or more, from which at least two second c-plane GaN wafers 5 are sliced.
  • the second c-plane GaN wafer 5 has an N-polar plane and a Ga-polar plane parallel to each other as main planes.
  • the Ga polar plane in the second GaN wafer 5 The inclination angle (off-cut angle) and inclination direction (off-cut direction) from the crystal plane of (0001) are preferably the same as the off-cut angle and off-cut direction that the GaN substrate wafer 100 should have, but are essential. is not.
  • the off-cut orientation that the GaN substrate wafer 100 should have varies depending on the requirements of the manufacturer of the semiconductor device that uses the GaN substrate wafer 100, but the second c-plane GaN having various off-cut orientations accordingly. Preparing the wafer 5 may lead to a decrease in the production efficiency of the GaN substrate wafer 100. It should also be noted that the optimum conditions for growing the GaN film 6 with HVPE on the second c-plane GaN wafer 5 in the next third step may change depending on the off-cut orientation of the second c-plane GaN wafer 5. Is.
  • the initial thickness t5i of the second c-plane GaN wafer 5 may be thinner than the thickness normally possessed by the GaN substrate wafer used for manufacturing a nitride semiconductor device. This is because, unlike the GaN substrate wafer, which needs to withstand a semiconductor process including a large number of processes, the second c-plane GaN wafer 5 only needs to be damaged during the next third process. For example, when the diameter of the second c-plane GaN wafer 5 is about 2 inches, its initial thickness t5i is preferably 300 ⁇ m or less, 250 ⁇ m or less, and even 200 ⁇ m or less. By reducing the initial thickness t5i of the second c-plane GaN wafer 5, the number of second c-plane GaN wafers 5 that can be sliced from the second GaN thick film 4 can be increased.
  • a (0001) oriented GaN film 6 having a thickness of 500 ⁇ m or less is grown on the Ga polar surface of the second c-plane GaN wafer 5 with HVPE and laminated. Get the structure. At this time, a regrowth interface is formed between the second c-plane GaN wafer 5 and the GaN film 6.
  • the Ga polar surface of the second c-plane GaN wafer 5 is flattened by appropriately using techniques such as grinding, polishing, and CMP before growing the GaN film 6 (flattening step).
  • the Ga polar surface of the second c-plane GaN wafer 5 may be flattened and then further processed into a rough surface by etching (roughening step) to grow the GaN film 6.
  • etching roughening step
  • the dislocation density of the GaN film 6 is about the same as or higher than that of the second c-plane GaN wafer 5, specifically, 0.5 times or more and less than 2 times the dislocation density on the Ga polar plane of the second c-plane GaN wafer 5. Or it will be a higher value.
  • the advantage of roughening the Ga polar surface of the second c-plane GaN wafer 5 is that the laminated structure formed by the growth of the GaN film 6 is less likely to crack, and the crack occurrence frequency roughens the Ga polar surface. It can be less than 1/10 of the time when it does not turn into.
  • the Ga polar surface of GaN can be roughened without using an etching mask. If the HVPE apparatus used for growing the GaN film 6 is provided with an HCl supply line for etching, the Ga polar surface of the second c-plane GaN wafer 5 is roughened in the reactor of the HVPE apparatus immediately before the growth of the GaN film 6. Can be transformed into.
  • Preferred etching conditions when HCl is used as an etching gas are as follows.
  • the HCl partial pressure is, for example, 0.002-0.05 atm.
  • H 2 partial pressure is, for example, 0.2 ⁇ 0.8 atm.
  • the NH 3 partial pressure is, for example, 0.01 to 0.05 atm.
  • the etching temperature is, for example, 900 to 1050 ° C.
  • the etching time is, for example, 1 to 60 minutes.
  • the roughness of the Ga polar surface of the second c-plane GaN wafer after etching is defined as the height difference between the highest point and the lowest point, the roughness can be, for example, 0.3 to 12 ⁇ m.
  • the roughness of the Ga polar surface of the second c-plane GaN wafer tends to increase with the etching time.
  • the etching time when HCl is used as the etching gas is set so that the roughness of the Ga polar surface does not exceed 0.5 ⁇ m.
  • the second c-plane GaN under the conditions of HCl partial pressure 0.01 to 0.02 atm, H 2 partial pressure 0.05 to 0.08 atm, NH 3 partial pressure 0.01 to 0.03 atm, and temperature 970 to 1000 ° C.
  • the preferable etching time when etching the Ga polar surface of the wafer 5 is 5 minutes or less.
  • the Ga polar surface of the second c-plane GaN wafer 5 may be roughened by forming an etching mask patterned by a photolithography technique and then dry etching. Dot patterns and net patterns are typical examples of suitable patterns for etching masks.
  • the dry etching may be RIE (reactive ion etching) using Cl 2 (chlorine gas) or a chlorine-containing compound as the etching gas.
  • the GaN film 6 is provided with a portion doped so that the total concentration of donor impurities is higher than that of the second c-plane GaN wafer 5.
  • the carrier concentration in at least a part of the portion is 1 ⁇ 10 18 cm -3 or more, further 2 ⁇ 10 18 cm -3 or more, further 3 ⁇ 10 18 cm -3 or more, and further 4 ⁇ 10 18 cm ⁇ . It can be 3 or more, even 6 ⁇ 10 18 cm -3 or more, and even 8 ⁇ 10 18 cm -3 or more.
  • Preferred donor impurities are Si and Ge.
  • the GaN film 6 may be provided with the specific doping region 6a.
  • the upper end (end on the [0001] side) of the specific doped region 6a is preferably the upper surface of the GaN film 6, the region length in the c-axis direction is preferably 1 ⁇ m or more, and the total concentration of donor impurities in the region. Is a region of 1 ⁇ 10 18 atoms / cm 3 or more. In other words, this region length means the thickness (height in the thickness direction) of the region where the total concentration of donor impurities is 1 ⁇ 10 18 atoms / cm 3 or more.
  • the region length of the specific doped region 6a in the c-axis direction can be 5 ⁇ m or more, 10 ⁇ m or more, 20 ⁇ m or more, 25 ⁇ m or more, 50 ⁇ m or more, 75 ⁇ m or more, 100 ⁇ m or more, 150 ⁇ m or more, 200 ⁇ m or more, and the like.
  • the total concentration of donor impurities in the specific doped region 6a is preferably 2 ⁇ 10 18 atoms / cm 3 or more, more preferably 3 ⁇ 10 18 atoms / cm 3 or more, and 4 ⁇ 10 18 atoms / cm 3 or more, 6 It may be ⁇ 10 18 atoms / cm 3 or more, 8 ⁇ 10 18 atoms / cm 3 or more, and the like.
  • the carrier concentration is higher than that of the second c-plane GaN wafer 5 in at least a part, preferably the whole, of the specific doping region 6a.
  • the GaN film 6 is specified so that a region having a sufficient carrier concentration can be provided on the Ga polar side of the GaN substrate wafer to be manufactured with a thickness of 20 ⁇ m or more, 50 ⁇ m or more, 100 ⁇ m or more, and the like.
  • the region length of the dope region 6a in the c-axis direction can be 20 ⁇ m or more, 50 ⁇ m or more, 100 ⁇ m or more, and the like. In the preferred embodiment, it is desirable that there is no change in carrier concentration along the c-axis direction within the specific doping region 6a.
  • the variation in the total concentration of donor impurities along the c-axis direction in the specific doped region 6a is preferably within ⁇ 25%, more preferably within ⁇ 20%, still more preferably within ⁇ 15% from the median. More preferably, it is within ⁇ 10%.
  • the GaN film 6 may have an intervening region 6b between the specific doping region 6a and the second c-plane GaN wafer 5.
  • the intervening region 6b is not subject to any restrictions regarding doping.
  • the intervening region 6b can only be partially intentionally doped.
  • the intervening region corresponds to a region of the GaN film 6 that does not correspond to the specific doping region 6a. That is, the total concentration of donor impurities in the intervening region is less than 1 ⁇ 10 18 atoms / cm 3 .
  • a dopant of the same type as the dopant added to the specific doping region 6a may be added to the intervening region 6b at least partially, and the concentration of the dopant approaches the specific doping region 6a within the intervening region 6b. It may increase continuously or gradually as it increases.
  • the thickness of the intervening region 6b may be determined so that the thickness of the GaN film 6 including the specific doped region 6a and the intervening region 6b does not exceed 500 ⁇ m, but is preferably 50 ⁇ m or less, more preferably 40 ⁇ m or less. More preferably, it is 20 ⁇ m or less, and may be 10 ⁇ m or less.
  • the total concentration of donor impurities excluding Si is set to 10% or less, further 5% or less, and further 1% or less of the Si concentration, so that the carrier concentration in the same region is the Si concentration. It can be controlled by adjustment.
  • the Si concentration in the region is preferably 4 ⁇ 10 17 atoms / cm 3 or more.
  • the maximum value of the total concentration of donor impurities in the GaN film 6 is 5 ⁇ 10 19 atoms / cm 3 or less, and further 2 ⁇ 10 19 atoms / cm 3 or less, in order to avoid a significant decrease in crystal quality due to excessive doping. Further, it may be 1 ⁇ 10 19 atoms / cm 3 or less.
  • the growth thickness t6g of the GaN film 6 is set between 20 ⁇ m and 500 ⁇ m in consideration of the design thickness of the second region 120 of the GaN substrate wafer. ..
  • the growth thickness t6g of the GaN film 6 may be the same as the design thickness of the second region 120 in the GaN substrate wafer to be manufactured, but is preferably larger than the design thickness. By doing so, the surface of the GaN film 6 can be flattened in the subsequent thinning step.
  • the growth thickness t6g of the GaN film 6 is preferably 50 ⁇ m or more larger than the design thickness of the second region 120, more preferably 100 ⁇ m or more, and preferably 200 ⁇ m or more not exceeding the design thickness.
  • the thickness difference of the GaN film 6 before and after the thinning step is preferably 200 ⁇ m or less.
  • the thickness of the GaN film 6 is reduced by 50 ⁇ m or more in the subsequent thinning step.
  • the thickness difference of the GaN film 6 before and after the thinning step is 50 ⁇ m or more.
  • the GaN film 6 can be formed in a relatively short time, and therefore the by-product NH 4 Cl (ammonium chloride) blocks the exhaust system of the HVPE apparatus. It is possible to grow the GaN film 6 on a large number of second c-plane GaN wafers 5 at a time without worrying about the above. Therefore, the throughput in the third step can be extremely high. Further, the short time required to form the GaN film 6 can also contribute to the reduction of costs associated with cleaning and maintenance of the HVPE reactor. This is because the HVPE reactor deteriorates more slowly and has a longer service life when the time required for one growth step is shorter.
  • NH 4 Cl ammonium chloride
  • a thinning step of thinning the laminated structure obtained in the third step is performed.
  • the thickness of the second c-plane GaN wafer 5 is reduced from the initial thickness t5i to the final thickness t5f
  • the thickness of the GaN film 6 is reduced from the growth thickness t6g to the final thickness t6f.
  • the thinning step only one of the second c-plane GaN wafer 5 and the GaN film 6 may be processed.
  • the thickness of the second c-plane GaN wafer 5 and the GaN film 6 is the first region 110 and the second in the GaN substrate wafer. It is reduced until it matches the design thickness of each region 120.
  • the technique used for processing the second c-plane GaN wafer 5 and / or the GaN film 6 in the thinning step can be appropriately selected from grinding, wrapping, CMP, dry etching, wet etching and the like.
  • the off-cut orientation of the GaN substrate wafer 100 to be manufactured and the off-cut orientation of the second c-plane GaN wafer 5 are the same, the N-polar plane of the laminated structure to be processed, that is, the second c-plane, is used as a reference for the plane orientation.
  • the back surface of the two-c-plane GaN wafer 5 can be used.
  • the off-cut orientation of the GaN substrate wafer 100 to be manufactured is different from that of the second c-plane GaN wafer 5, that is, when at least one of the off-cut angle and the off-cut direction is different, the crystal of the laminated structure to be processed The orientation is confirmed by an X-ray diffractometer.
  • the GaN substrate wafer 100 according to the embodiment can be produced with a high yield.
  • the reason is that there is no step of growing the intentionally doped GaN thick film with HVPE to a thickness on the order of mm, and a step of slicing the grown GaN thick film.
  • the GaN thick film may be grown to a thickness on the order of mm by HVPE, but the first GaN thick film 2 and the second GaN thick film 4 to be grown in these steps are intended. Since it is not specifically doped, morphology abnormalities and cracks are less likely to occur during growth, and the frequency of cracking during slicing is low.
  • the GaN film 6 grown in the third step is intentionally doped, but since the growth thickness of the GaN film 6 is only 500 ⁇ m or less, morphology abnormalities and cracks are unlikely to occur during the growth. Moreover, the GaN film 6 does not need to be sliced. That is, it is not necessary to perform slicing in the thinning step described above. In particular, it is preferable that the GaN film 6 formed in the third section undergoes a thinning step without slicing.
  • the manufacturing method described above it is possible to reduce the variation in the off-cut angle in the main surface of the GaN substrate wafer 100.
  • the reason is that the warpage of the second GaN thick film 4 that is homoepitaxially grown on the first c-plane GaN wafer 3 that has not been intentionally doped can be extremely small.
  • the variation in the off-cut angle can be extremely small.
  • the change in warpage due to stacking the GaN film 6 on the second c-plane GaN wafer 5 in the third step is small, because the growth thickness of the GaN film 6 is as small as 500 ⁇ m or less.
  • the HVPE apparatus 10 shown in FIG. 8 includes a hot wall type reactor 11, a gallium reservoir 12 and a susceptor 13 arranged in the reactor, and a first heater 14 and a second heater 15 arranged outside the reactor. I have.
  • the first heater 14 and the second heater 15 respectively surround the reactor 11 in an annular shape.
  • the reactor 11 is a quartz tube chamber.
  • the reactor 11 there is a first zone Z1 that is mainly heated by the first heater 14, and a second zone Z2 that is mainly heated by the second heater 15.
  • the exhaust pipe PE is connected to the reactor end on the second zone Z2 side.
  • the gallium reservoir 12 arranged in the first zone Z1 is a quartz container having a gas inlet and a gas outlet.
  • the susceptor 13 arranged in the second zone Z2 is formed of, for example, graphite. A mechanism for rotating the susceptor 13 can be arbitrarily provided.
  • NH 3 reacts with GaCl in the second zone Z2, and the resulting GaN crystallizes on the seed placed on the susceptor 13.
  • the doping gas diluted with the carrier gas is led to the second zone Z2 in the reactor 11 through the dopant introduction tube P4.
  • Ammonia introduction pipe P1, hydrogen chloride introduction pipe P2, gallium chloride introduction pipe P3 and dopant introduction pipe P4 are formed of quartz at a portion arranged in the reactor 11.
  • H 2 hydrogen gas
  • N 2 nitrogen gas
  • a mixed gas of H 2 and N 2 is preferably used as the carrier gas for diluting each of NH 3 , HCl and the doping gas.
  • the preferred conditions for growing GaN using the HVPE apparatus 10 are as follows.
  • the temperature of the gallium reservoir is, for example, 500 to 1000 ° C, preferably 700 ° C or higher, and preferably 900 ° C or lower.
  • the susceptor temperature is, for example, 900 to 1100 ° C., preferably 930 ° C. or higher, more preferably 950 ° C. or higher, and preferably 1050 ° C. or lower, more preferably 1020 ° C. or lower.
  • the V / III ratio which is the ratio of the NH 3 partial pressure to the GaCl partial pressure in the reactor, is, for example, 1 to 20, preferably 2 or more, more preferably 3 or more, and preferably 10 or less. .. If the V / III ratio is too large or too small, it causes deterioration of the morphology of the growth surface of GaN. Deterioration of morphology on the growth surface can cause deterioration of crystal quality.
  • the efficiency of incorporation into the GaN crystal is strongly dependent on the crystal orientation of the growth surface.
  • O oxygen
  • Ge germanium
  • the use of a V / III ratio that is too low increases the nitrogen vacancy concentration of the growing GaN crystal.
  • the effect of nitrogen vacancies on a GaN crystal, a GaN substrate using it, or a nitride semiconductor device formed on the GaN substrate is not clear at present, but the concentration is as low as possible because it is a point defect. I think it should be done.
  • GaN growth rate can control the product of the NH 3 partial pressure and GaCl partial pressure in the reactor as a parameter.
  • the rate is, for example, 20 to 200 ⁇ m / h, and particularly when the GaN film 6 is grown in the third step, it is preferably 120 ⁇ m / h or less, more preferably 100 ⁇ m / h or less, and further preferably 80 ⁇ m / h or less. .. This is because a growth rate that is too high deteriorates the surface morphology of the growing GaN.
  • the supply rate of the doping gas is gradually increased to a predetermined value over several minutes to several tens of minutes from the start of supply in order to prevent deterioration of the morphology of the growth surface. Is preferable.
  • the supply of the doping gas is preferably started when the GaN film 6 is grown by at least several ⁇ m.
  • SiH 4 silane
  • SiH 3 Cl monoochlorosilane
  • SiH 2 Cls diichlorosilane
  • SiHCl 3 trichlorosilane
  • SiCl 4 tetrachlorosilane
  • GeH 4 German), GeH 3 Cl (monochrome Rogerman), GeH 2 Cls (dichlorogerman), GeHCl 3 (trichlorogerman) or GeCl 4 (tetrachlorogerman) can be preferably used as the doping gas for Ge doping. ..
  • the molar ratio of H 2 in the carrier gas can affect the impurity concentration of the growing GaN.
  • the molar ratio of H 2 in the carrier gas referred to here is calculated based on the flow rate of each gas type supplied as a carrier gas from outside the reactor into the reactor. Impurities of Si or Ge-doped GaN grown by HVPE on the Ga polar plane of a c-plane GaN wafer cut out from a GaN crystal grown by HVPE on a sapphire substrate at substantially the same growth rate using the same V / III ratio. Table 1 below shows the results of investigating how the concentration changes depending on the molar ratio of H 2 in the carrier gas.
  • the O concentration of Si-doped GaN is 10% or less of the Si concentration when the carrier gas is only N 2 . Since the only donor other than Si is substantially O, this is equivalent to the total concentration of donors excluding Si being 10% or less of the Si concentration. Increasing the molar ratio of H 2 in the carrier gas further lowers the O concentration of Si-doped GaN, which is less than 1% of the Si concentration when the molar ratio is 0.7.
  • the molar ratio of H 2 in the carrier gas when the molar ratio of H 2 in the carrier gas is 0 (zero), the Ge concentration is 10 times or more higher than when the molar ratio is 0.7, and Ge with respect to the Si concentration. The concentration ratio is also higher. Therefore, at first glance, the molar ratio of H 2 carrier gas is lower is preferred going. However, when the molar ratio of H 2 in the carrier gas is 0 and 0.7, as can be seen from the fact that the O concentration is also an order of magnitude higher in the former, the former condition is used. The present inventors have confirmed that the growth surface morphology of GaN is poor and that this is the reason for the high Ge concentration. Under the condition that the molar ratio of H 2 in the carrier gas is too low, a GaN crystal having low Ge concentration uniformity grows.
  • the molar ratio of H 2 in the carrier gas is preferably about 0.3 to 0.7, and the Ge-doped GaN grown in this way has a Ge concentration of 1.
  • the Si concentration is 4 ⁇ 10 17 atoms / cm 3 or more.
  • O concentration of the GaN grown by HVPE tend to decrease with increasing the molar ratio of H 2 carrier gas, 2 ⁇ 10 16 atoms / cm 3 or less, Furthermore, it can be 1 ⁇ 10 16 atoms / cm 3 or less. This is because the growing surface morphology is improved.
  • the GaN grown using the HVPE apparatus 10 may contain O and Si in SIMS detectable concentrations, even when not intentionally doped.
  • the Si source is quartz (SiO 2 ) used in the reactor and piping in the reactor, and the O source is either or both of such quartz and moisture remaining or invading the reactor.
  • the parts arranged in the reactor 11, including the parts not shown in FIG. 8, include SiC (silicon carbide), SiNx (silicon nitride), BN (boron nitride), and alumina. , W (tungsten), Mo (molybdenum) and the like can be used. By doing so, the concentration of each impurity other than Si, O and H in the GaN grown using the HVPE apparatus 10 can be 5 ⁇ 10 15 atoms / cm 3 or less unless intentional doping is performed.
  • the GaN seed was set on the susceptor of the HVPE apparatus.
  • a GaN template substrate on sapphire prepared by MOCVD Metalorganic Vapor Deposition Growth Method
  • MOCVD Metalorganic Vapor Deposition Growth Method
  • the c-plane side was used as the growth plane.
  • the inside of the reactor is filled with a heater installed outside the reactor. It was heated. After the susceptor temperature reached 1000 ° C., the susceptor temperature was kept constant and GaN was grown.
  • the temperature of the gallium reservoir was set to 900 ° C. 69 mol% of the carrier gas supplied into the reactor during growth was H 2 , and the rest was N 2 .
  • GaCl and NH 3 are supplied into the reactor so that the partial pressures are 7.9 ⁇ 10 -3 atm and 0.024 atm, respectively, and a second GaN thick film containing no donor impurities is about 2.5 mm. Grow to thickness. The growth rate of the second GaN thick film calculated from the thickness and the growth time was about 40 ⁇ m / h. Next, this GaN thick film was sliced parallel to the c-plane to obtain a wafer, and then the Ga polar plane of the wafer was flattened by grinding and subsequently subjected to CMP finishing.
  • a second c-plane GaN wafer having a thickness of 350 ⁇ m and containing no donor impurities was prepared. If the thickness of the second GaN thick film is increased by lengthening the growth time, two or more second c-plane GaN wafers can be obtained.
  • the partial pressures of GaCl, NH 3 and SiH 2 Cl 2 are 7.9 ⁇ 10 -3 atm, 0.024 atm and 1.9 ⁇ 10, respectively. It was supplied into the reactor so as to be -8 atm, and a GaN film doped with Si as a donor impurity was grown to a thickness of about 0.4 mm. The surface of the GaN film was finished by polishing without slicing to obtain a Si-doped GaN substrate wafer having a diameter of about 60 mm. The growth rate of the Si-doped GaN film calculated from the thickness and the growth time was about 40 ⁇ m / h.
  • the GaN substrate wafer obtained by the above manufacturing method is a two-layer substrate having a regrowth interface, a first region on the N-polar side and a second region on the Ga-polar side, and is a Ga-polar side, that is, a GaN film.
  • the carrier concentration was 4.0 ⁇ 10 18 cm -3 .
  • the carrier concentration on the Ga polar side was 1.0 ⁇ 10 18 cm -3 or more over the entire surface, and was stable at approximately 4.0 ⁇ 10 18 cm -3 except for the end. .. In addition, no cracks or surface roughness were observed.
  • the growth time of the Si-doped GaN film was extended about 6 times to make the thickness of the GaN film about 2.5 mm.
  • the obtained GaN substrate wafer two-layer substrate
  • an abnormal growth portion was generated.
  • the abnormal growth portion referred to here deep dents due to SiNx were scattered in some parts in the surface of the substrate.

Landscapes

  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Inorganic Chemistry (AREA)
  • Mechanical Engineering (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
PCT/JP2020/013298 2019-03-29 2020-03-25 ＧａＮ基板ウエハおよびＧａＮ基板ウエハの製造方法 Ceased WO2020203541A1 (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
EP20782703.1A EP3951025A4 (en) 2019-03-29 2020-03-25 GAN SUBSTRATE WAFER AND PROCESS FOR MAKING A GAN SUBSTRATE WAFER
JP2021511860A JP7775708B2 (ja) 2019-03-29 2020-03-25 ＧａＮ基板ウエハおよびＧａＮ基板ウエハの製造方法
CN202080025770.5A CN113692459B (zh) 2019-03-29 2020-03-25 GaN基板晶片和GaN基板晶片的制造方法
KR1020217031332A KR20210144729A (ko) 2019-03-29 2020-03-25 GaN 기판 웨이퍼 및 GaN 기판 웨이퍼의 제조 방법
US17/485,617 US20220010455A1 (en) 2019-03-29 2021-09-27 GaN SUBSTRATE WAFER AND METHOD FOR MANUFACTURING GaN SUBSTRATE WAFER

Applications Claiming Priority (6)

Application Number Priority Date Filing Date Title
JP2019066016 2019-03-29
JP2019-066016 2019-03-29
JP2019-095873 2019-05-22
JP2019095873 2019-05-22
JP2019109206 2019-06-12
JP2019-109206 2019-06-12

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US17/485,617 Continuation US20220010455A1 (en) 2019-03-29 2021-09-27 GaN SUBSTRATE WAFER AND METHOD FOR MANUFACTURING GaN SUBSTRATE WAFER

Publications (1)

Publication Number Publication Date
WO2020203541A1 true WO2020203541A1 (ja) 2020-10-08

Family

ID=72667670

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2020/013298 Ceased WO2020203541A1 (ja) 2019-03-29 2020-03-25 ＧａＮ基板ウエハおよびＧａＮ基板ウエハの製造方法

Country Status (7)

Country Link
US (1) US20220010455A1 (https=)
EP (1) EP3951025A4 (https=)
JP (1) JP7775708B2 (https=)
KR (1) KR20210144729A (https=)
CN (1) CN113692459B (https=)
TW (1) TWI849096B (https=)
WO (1) WO2020203541A1 (https=)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2023210696A1 (ja) * 2022-04-27 2023-11-02 三菱ケミカル株式会社 ｎ型ＧａＮ基板及びｎ型ＧａＮ結晶

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN120380207A (zh) * 2022-12-21 2025-07-25 三菱化学株式会社 GaN衬底

Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006128710A (ja) * 2004-10-28 2006-05-18 Lumileds Lighting Us Llc パッケージ統合された薄膜ｌｅｄ
JP2007070154A (ja) 2005-09-06 2007-03-22 Hitachi Cable Ltd Ｉｉｉ−ｖ族窒化物系半導体基板及びその製造方法
JP2007251178A (ja) 2006-03-17 2007-09-27 Samsung Electro Mech Co Ltd 窒化物半導体単結晶基板、その製造方法、及び、これを用いた垂直構造窒化物発光素子の製造方法
JP2009167053A (ja) * 2008-01-16 2009-07-30 Sumitomo Electric Ind Ltd Ｉｉｉ族窒化物結晶の成長方法
JP2011530173A (ja) * 2008-08-01 2011-12-15 イルミテックス， インコーポレイテッド 光子通過発光ダイオードおよび方法
JP2013155085A (ja) * 2012-01-30 2013-08-15 Jx Nippon Mining & Metals Corp 窒化ガリウム系化合物半導体層の製造方法、発光デバイスの製造方法
JP2015214441A (ja) * 2014-05-09 2015-12-03 古河機械金属株式会社 自立基板の製造方法および自立基板
JP2018154523A (ja) * 2017-03-17 2018-10-04 古河機械金属株式会社 Ｉｉｉ族窒化物半導体基板
JP2019004047A (ja) * 2017-06-15 2019-01-10 株式会社サイオクス 窒化物半導体積層物、半導体装置、窒化物半導体積層物の製造方法、窒化物半導体自立基板の製造方法および半導体装置の製造方法

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000349338A (ja) * 1998-09-30 2000-12-15 Nec Corp ＧａＮ結晶膜、ＩＩＩ族元素窒化物半導体ウェーハ及びその製造方法
JP4442093B2 (ja) * 2002-12-24 2010-03-31 日亜化学工業株式会社 窒化物半導体積層用基板の製造方法
CN100453712C (zh) * 2003-08-28 2009-01-21 日立电线株式会社 Ⅲ-ⅴ族氮化物系半导体衬底及其制造方法
JP4518209B1 (ja) * 2009-09-07 2010-08-04 住友電気工業株式会社 Ｉｉｉ族窒化物結晶基板、エピ層付ｉｉｉ族窒化物結晶基板、ならびに半導体デバイスおよびその製造方法
JP4714192B2 (ja) * 2007-07-27 2011-06-29 住友電気工業株式会社 窒化ガリウム結晶の成長方法、窒化ガリウム結晶基板、エピウエハの製造方法およびエピウエハ
US7727874B2 (en) * 2007-09-14 2010-06-01 Kyma Technologies, Inc. Non-polar and semi-polar GaN substrates, devices, and methods for making them
JP5381581B2 (ja) * 2009-09-30 2014-01-08 住友電気工業株式会社 窒化ガリウム基板
KR20140029024A (ko) * 2012-08-31 2014-03-10 에스케이하이닉스 주식회사 매립 게이트형 무접합 반도체 소자와 그 반도체 소자를 갖는 모듈 및 시스템 그리고 그 반도체 소자의 제조 방법
JP2014072397A (ja) * 2012-09-28 2014-04-21 Fujitsu Ltd 化合物半導体装置及びその製造方法
US8669168B1 (en) * 2013-01-09 2014-03-11 The United States Of America, As Represented By The Secretary Of The Navy Method for reducing the concentration of oxygen, carbon, and silicon impurities on nitrogen-polar surfaces of gallium nitride
EP2955253A4 (en) * 2013-02-08 2016-11-23 Namiki Precision Jewel Co Ltd GAN SUBSTRATE AND METHOD FOR PRODUCING THE GAN SUBSTRATE
US9653554B2 (en) * 2014-07-21 2017-05-16 Soraa, Inc. Reusable nitride wafer, method of making, and use thereof
JP2017024927A (ja) * 2015-07-17 2017-02-02 古河機械金属株式会社 Ｉｉｉ族窒化物半導体基板の製造方法
JP6548509B2 (ja) * 2015-08-10 2019-07-24 株式会社サイオクス １３族窒化物単結晶の製造方法、および１３族窒化物単結晶の製造装置
WO2018039236A1 (en) * 2016-08-22 2018-03-01 The Regents Of The University Of California Semiconductor heterostructure with reduced unintentional calcium impurity incorporation
US10461216B2 (en) * 2016-09-23 2019-10-29 Wright State University Gallium nitride cross-gap light emitters based on unipolar-doped tunneling structures
US10177247B2 (en) * 2017-01-20 2019-01-08 Qorvo Us, Inc. Continuous crystalline gallium nitride (GaN) PN structure with no internal regrowth interfaces
US10283358B2 (en) * 2017-05-18 2019-05-07 Hrl Laboratories, Llc Lateral GaN PN junction diode enabled by sidewall regrowth
JP6356315B1 (ja) * 2017-05-29 2018-07-11 株式会社サイオクス 窒化物結晶基板、半導体積層物、半導体積層物の製造方法および半導体装置の製造方法

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006128710A (ja) * 2004-10-28 2006-05-18 Lumileds Lighting Us Llc パッケージ統合された薄膜ｌｅｄ
JP2007070154A (ja) 2005-09-06 2007-03-22 Hitachi Cable Ltd Ｉｉｉ−ｖ族窒化物系半導体基板及びその製造方法
JP2007251178A (ja) 2006-03-17 2007-09-27 Samsung Electro Mech Co Ltd 窒化物半導体単結晶基板、その製造方法、及び、これを用いた垂直構造窒化物発光素子の製造方法
JP2009167053A (ja) * 2008-01-16 2009-07-30 Sumitomo Electric Ind Ltd Ｉｉｉ族窒化物結晶の成長方法
JP2011530173A (ja) * 2008-08-01 2011-12-15 イルミテックス， インコーポレイテッド 光子通過発光ダイオードおよび方法
JP2013155085A (ja) * 2012-01-30 2013-08-15 Jx Nippon Mining & Metals Corp 窒化ガリウム系化合物半導体層の製造方法、発光デバイスの製造方法
JP2015214441A (ja) * 2014-05-09 2015-12-03 古河機械金属株式会社 自立基板の製造方法および自立基板
JP2018154523A (ja) * 2017-03-17 2018-10-04 古河機械金属株式会社 Ｉｉｉ族窒化物半導体基板
JP2019004047A (ja) * 2017-06-15 2019-01-10 株式会社サイオクス 窒化物半導体積層物、半導体装置、窒化物半導体積層物の製造方法、窒化物半導体自立基板の製造方法および半導体装置の製造方法

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of EP3951025A4

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2023210696A1 (ja) * 2022-04-27 2023-11-02 三菱ケミカル株式会社 ｎ型ＧａＮ基板及びｎ型ＧａＮ結晶

Also Published As

Publication number Publication date
CN113692459A (zh) 2021-11-23
US20220010455A1 (en) 2022-01-13
TW202104685A (zh) 2021-02-01
CN113692459B (zh) 2024-07-09
JP7775708B2 (ja) 2025-11-26
TWI849096B (zh) 2024-07-21
JPWO2020203541A1 (https=) 2020-10-08
EP3951025A1 (en) 2022-02-09
KR20210144729A (ko) 2021-11-30
EP3951025A4 (en) 2022-06-01

Similar Documents

Publication Publication Date Title
JP5018423B2 (ja) Ｉｉｉ族窒化物半導体結晶基板および半導体デバイス
EP2064730B1 (en) Nitride semiconductor structures with interlayer structures and methods of fabricating nitride semiconductor structures with interlayer structures
US9343525B2 (en) Aluminum nitride substrate and group-III nitride laminate
JP2009126723A (ja) Ｉｉｉ族窒化物半導体結晶の成長方法、ｉｉｉ族窒化物半導体結晶基板の製造方法およびｉｉｉ族窒化物半導体結晶基板
CN101440521A (zh) 半导体晶体生长方法、半导体晶体基板及其制造方法
JP6669157B2 (ja) Ｃ面ＧａＮ基板
US20220010455A1 (en) GaN SUBSTRATE WAFER AND METHOD FOR MANUFACTURING GaN SUBSTRATE WAFER
US20250313992A1 (en) GaN SUBSTRATE
US12288686B2 (en) GaN substrate wafer and method for manufacturing same
CN116997691A (zh) Iii族氮化物晶体、iii族氮化物半导体、iii族氮化物衬底、和iii族氮化物晶体的制造方法
US12476108B2 (en) GaN substrate wafer and production method for same
JP2012012292A (ja) Ｉｉｉ族窒化物結晶の製造方法、および該製造方法により得られるｉｉｉ族窒化物結晶、ｉｉｉ族窒化物結晶基板
JP2012224486A (ja) 第１３族窒化物結晶の製造方法

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 20782703

Country of ref document: EP

Kind code of ref document: A1

ENP Entry into the national phase

Ref document number: 2021511860

Country of ref document: JP

Kind code of ref document: A

NENP Non-entry into the national phase

Ref country code: DE

ENP Entry into the national phase

Ref document number: 2020782703

Country of ref document: EP

Effective date: 20211029