WO2020087852A1 - 显示面板、复合屏和复合屏的制备方法 - Google Patents

显示面板、复合屏和复合屏的制备方法 Download PDF

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Publication number
WO2020087852A1
WO2020087852A1 PCT/CN2019/080182 CN2019080182W WO2020087852A1 WO 2020087852 A1 WO2020087852 A1 WO 2020087852A1 CN 2019080182 W CN2019080182 W CN 2019080182W WO 2020087852 A1 WO2020087852 A1 WO 2020087852A1
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layer
film
cathode
display panel
display
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PCT/CN2019/080182
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English (en)
French (fr)
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范俊
谢峰
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云谷（固安）科技有限公司
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/805—Electrodes
    • H10K50/82—Cathodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/84—Passivation; Containers; Encapsulations
    • H10K50/842—Containers
    • H10K50/8428—Vertical spacers, e.g. arranged between the sealing arrangement and the OLED
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass

Definitions

  • the present application relates to the technical field of display devices, and in particular, to a display panel, a composite screen using the display panel, and a preparation method of the composite screen.
  • the present application provides a display panel, including: a plurality of cathodes; a plurality of cathode isolation columns for isolating two adjacent cathodes; in a longitudinal section of the display panel, the side of each cathode isolation column
  • the wall has an uneven portion, which is located above the cathode.
  • the above display panel further includes: a substrate; an anode layer provided on a part of the surface of the substrate; a light emitting layer provided on at least a part of the surface of the anode layer away from the substrate; And a pixel definition layer, covering the substrate and the anode layer, and located around the light-emitting layer, wherein the cathode is formed on the light-emitting layer, and the cathode spacer is disposed on the The surface of the pixel definition layer remote from the anode layer.
  • the non-flat portion is a groove or a protrusion.
  • the non-flat portion is the groove
  • the depth of the groove is 1.5 ⁇ m to 2.5 ⁇ m
  • the opening size of the groove is
  • the non-flat portion is one of an arc-shaped groove, a trapezoidal protrusion, and a bird-shaped groove.
  • the display panel is a PMOLED display panel.
  • the cathode separator has a composite membrane structure.
  • the composite film layer structure includes an etching barrier layer, an inorganic layer, and an organic glue layer stacked in sequence, and a selective etching ratio between the inorganic layer and the etching barrier layer is greater than 1.
  • the thickness of the etch stop layer is
  • the composite film layer structure includes a first film layer and a second film layer stacked in sequence, and the width of the second film layer is greater than the width of the first film layer, so that the first The side surface of one film layer and the side surface of the second film layer are alternately formed to form a stepped portion.
  • the materials of the first film layer and the second film layer are both negative photoresists.
  • the side surface of the cathode separation column forms an angle of 25 ° -30 ° with a direction perpendicular to the substrate.
  • the present application also provides a display terminal, including: a device body having a device area; and a display panel as described above, covering the device body; wherein the display panel further includes a PM panel or an AM-like panel part, The device area is located below the PM panel or AM-like panel portion, and the device body includes a photosensitive device disposed in the device area and collecting light through the PM panel or AM-like panel portion.
  • the device area is a slotted area
  • the photosensitive device includes a camera and / or a light sensor.
  • the present application also provides a method for preparing a composite screen, including: providing a semiconductor substrate having an AM display area and a PM display area; preparing an AM anode layer in the AM display area A pixel-defining layer is prepared in the display area, the pixel-defining layer has a pixel opening, and a PM light-emitting layer is prepared in the pixel opening; an etching barrier film, an inorganic film, and an organic glue film that are sequentially stacked are prepared, and the etching barrier film Covering the upper surface of the AM anode layer, the upper surface of the pixel definition layer and the upper surface of the PM light emitting layer; patterning the organic glue film to form an organic glue layer; using the organic glue layer as a mask, Wet etching the inorganic film to form an inorganic layer; etching to remove part of the etching barrier film to form an etching barrier layer, so that the etching barrier layer, the inorganic layer and the organic adhesive layer are stacked in sequence Forming a catho
  • the non-flat portion is a groove or a protrusion.
  • the etching selection ratio between the etching barrier layer and the inorganic thin film is greater than 1.
  • the preparing the etch barrier film includes preparing the etch barrier film by chemical vapor deposition, and then preparing Indium tin oxide film, and coated to form the organic glue layer.
  • the patterning the organic glue film to form an organic glue layer includes exposing and developing the organic glue film, and then ashing the organic glue film to remove excess photoresist to form the cathode Isolate the organic glue layer of the pillar pattern.
  • FIG. 1 is a schematic diagram of a display panel in an embodiment.
  • FIG. 2 is a schematic diagram of a cathode isolation column provided with grooves on the side walls in an embodiment.
  • FIG. 3 is a schematic view of a cathode isolation column provided with a bird-shaped groove on the side wall in an embodiment.
  • FIG. 4 is a schematic diagram of a cathode separation column provided with a step on the side wall in one embodiment.
  • FIG. 5 is a schematic diagram of a display terminal in an embodiment.
  • FIG. 6 is a schematic diagram of the device body of the display terminal shown in FIG. 5.
  • FIG. 7 is a schematic diagram of a composite screen of the display terminal shown in FIG. 5.
  • FIG. 9 is a flowchart of a method for preparing a composite screen in an embodiment.
  • 10a to 10d are schematic diagrams of four stages of preparing a cathode separator with sidewall grooves in an embodiment.
  • planar schematic view refers to the drawing when the target portion is viewed from above
  • phrase “schematic cross-sectional view” refers to the drawing when viewing the cross section taken by vertically cutting the target portion from the side.
  • OLED can be divided into two types: PMOLED (Passive Matrix OLED, passive drive organic light emitting diode) and AMOLED (Active Matrix OLED, active drive organic light emitting diode).
  • PMOLED Passive Matrix OLED, passive drive organic light emitting diode
  • AMOLED Active Matrix OLED, active drive organic light emitting diode
  • the electrodes of the same nature in the same row of display cells of the PMOLED display array are shared, and the electrodes of the same nature in the same column of display cells are also shared.
  • the PMOLED display panel forms a matrix with cathodes and anodes, and illuminates the pixels in the array in a scanning manner. Each pixel operates in a short pulse mode and emits light at high brightness for an instant.
  • TFT backplane and metal wiring the light transmittance is high and can be applied to the aforementioned transparent display panel.
  • a PMOLED display panel needs to form an isolation barrier between two adjacent rows and columns through a photolithography process to avoid short circuits between the cathodes of two adjacent rows and columns.
  • the applicant has found that during the formation of the cathode layer by sputtering, the movement direction of metal atoms is not fixed, so that the cathode layer will also be formed on the side wall of the isolation barrier, and the adhesion between the formed cathode layer and the side wall of the isolation barrier The adhesion is relatively good, and it is not easy to fall off, so that the cathode layer on the partition wall and the cathode layer on the light-emitting layer are connected as a whole, which leads to short-circuit of the cathodes of adjacent rows and columns.
  • the height of the isolation barrier must be the same as the height of the support layer (SPC) used to support the mask (for example, 1.6 microns).
  • the isolation wall is usually formed by photolithography technology, and is limited by the height, material and equipment of the isolation wall. For example, the inclination angle of the side wall of the inverted trapezoidal isolation wall in the existing design cannot be small, further The difficulty of cathode blocking is increased, which is not conducive to realizing full-screen normal display.
  • the height of the cathode isolation column is limited, which in turn prevents the cathode isolation column from blocking the cathode, causing a defect of short circuit of adjacent cathodes.
  • a composite screen for example, a composite screen integratedly designed by AMOLED (hereinafter referred to as AM screen) and PMOLED screen (hereinafter referred to as PM screen), in order to facilitate the subsequent AM screen body process, the PM screen will be further restricted The height of the cathode isolation column in the body.
  • indium tin oxide (hereinafter referred to as ITO) can be used instead of Mg / Ag as the cathode of the PM screen body, and the material of the cathode isolation column can be organic glue.
  • PVD physical vapor deposition
  • the ITO film has good step coverage on the organic glue, so that the side wall of the cathode separation column will also have an ITO film attached to it.
  • the ITO film attached to the side wall will be adjacent to the adjacent cathode, so that adjacent cathodes are formed by the ITO film attached to the side wall of the cathode isolation column and the ITO film covering the upper surface of the cathode isolation column Continuous metal film.
  • there will be a defect of cathode short circuit that is, the current cathode separation column has a poor effect of blocking the cathode, which will increase the risk of connecting adjacent cathodes in the PM screen.
  • the embodiments of the present application creatively propose that by forming non-flat portions such as grooves, protrusions, etc. on the sidewalls of the cathode separator, the non-flat portions can be used to further improve the cathode separator separation
  • the effect of the cathode can also keep the height of the cathode separation column unchanged or smaller, so that the prepared display screen has better display performance and a thinner thickness.
  • FIG. 1 is a schematic structural diagram of a display panel in an alternative embodiment.
  • the display panel may include a substrate 10, an anode layer 11, a pixel definition layer 12, a light-emitting layer 13, a plurality of cathode spacers 15, and a plurality of cathodes 16.
  • the cathode separation column 15 is used to isolate two adjacent cathodes 16.
  • only two cathode separation columns 15 are shown in FIG. 1 .
  • the substrate 10 may be a composite film layer structure.
  • the substrate 10 may include a glass substrate, a PI layer, a buffer layer (BL), etc. stacked in sequence, and the light-emitting layer 13 is a PMOLED light-emitting layer.
  • the anode layer 11 described above is provided on the substrate 10, and the pixel definition layer 12 covers the exposed surface of the substrate 10 and the anode layer 11 and is located around the light-emitting layer 13.
  • the light-emitting layer 13 can penetrate the pixel definition layer 12 and be disposed on at least a portion of the surface of the anode layer 11 away from the substrate 10, and the cathode spacer 15 can be disposed adjacent to the light-emitting layer 13 on the pixel definition layer 12 away from the anode layer And the cathode 16 may be formed on the light-emitting layer 13. It should be understood that when the cathode 16 is formed, a cover layer 161 of the same material as that of the cathode 16 is inevitably formed on the cathode separator 15.
  • both side surfaces of the cathode separation column 15 described above are formed with uneven portions 151, which may be, for example, grooves as shown in FIG. 1 or protrusions as shown in FIG. 4
  • the cathode separation column 15 can block the cathodes 16 located on the adjacent light-emitting layer 13 into the cathodes 16 separated from each other.
  • the above-mentioned cathode isolation column 15 separates the cathode 16 into a plurality of mutually isolated areas, thereby effectively avoiding the continuous film layer between the cathodes 16 and causing a short circuit, thereby improving the display performance of the display panel .
  • FIG. 2 is a schematic view of the structure of a cathode isolation column provided with grooves on the side walls in an embodiment.
  • an arc-shaped groove 24 may be formed on the sidewall of the cathode separation column 15 according to actual process requirements , Trapezoidal protrusions, bird head-shaped grooves and other non-flat portions 151 of various shapes.
  • the above-mentioned cathode separation column 15 may be a single-layer membrane structure or a composite membrane structure, which may be set according to actual requirements.
  • the cathode separation column 15 having a composite film layer structure will be described in detail below.
  • the cathode isolation column 15 may include an etch stop layer 21, an inorganic layer 22 and an organic glue layer 23, and the etch stop layer 21, the inorganic layer 22 and the organic glue layer 23 are far away from the pixel definition layer
  • the directions of the upper surfaces of 12 are sequentially stacked, and at the same time, the selective etching ratio between the inorganic layer 22 and the etching barrier layer 21 is greater than 1, such as 3, 5, or 10, so that the etching process (such as Wet etching) forming an arc-shaped groove 24 on the sidewall of the inorganic layer 22.
  • the etch stop layer 21 can also provide an etch stop protection for the covered film layer (for example, anode) to avoid damage to the film layer covered by the etch stop layer 21 due to over-etching.
  • the material of the cathode 16 may be ITO, and the depth of the arc-shaped groove 24 shown in FIG. 2 may be 1.5 ⁇ m to 2.5 ⁇ m (such as 1.5 ⁇ m, 1.75 ⁇ m, 2.0 ⁇ m, 2.25 ⁇ m, 2.5 ⁇ m, etc.), the height of the opening of the groove 24 in the direction perpendicular to the upper surface of the pixel defining layer 12 may be (Such as or Etc.), and the thickness of the etch stop layer 21 may correspond to (Such as or Etc.), so that under the condition that the height of the cathode separation column composed of the etching barrier layer 21, the inorganic layer 22 and the organic glue layer 23 is constant, the groove 24 can effectively cut off the cathode layer prepared subsequently, avoiding adjacent cathodes The layer is short-circuited.
  • FIG. 3 is a schematic structural view of a cathode isolation column provided with a bird-shaped groove on a side wall in an embodiment.
  • the above cathode spacer may also be composed of a first silicon nitride layer 31, a silicon oxide layer 32, a second silicon nitride layer 33 and a photosensitive polyimide layer 34, that is In the direction of the upper surface of the layer 12, the above-mentioned first silicon nitride layer 31, silicon oxide layer 32, second silicon nitride layer 33, and photosensitive polyimide layer 34 are sequentially stacked to form a structure as shown in FIG.
  • the side wall of the second silicon nitride layer 33 is opposite to the photosensitive polyimide
  • the layer 34 forms a groove region, and based on the tip effect, a groove extending into the photosensitive polyimide layer 34 is formed in the region where the groove region is in contact with the photosensitive polyimide layer 34, so that
  • the layer 33 is etched to form a structure together to form a bird's head groove 35 as shown in FIG. 3, so as to enhance the effect of the cathode separation column to block the cathode layer to be prepared later.
  • FIG. 4 is a schematic structural view of a cathode isolation column with a stepped side wall in an alternative embodiment.
  • the cathode spacer may also be composed of a first film layer 41 and a second film layer 42, that is, the first film layer 41 covers the upper surface of the pixel definition layer 12, and the width of the second film layer 42 is greater than the The width of a film layer 41, so that the side surface of the first film layer 41 and the side surface 42 of the second film layer are staggered to form the step 43 shown in FIG. 4 to use the step to raise the cathode separation column to cut off the subsequent preparation of the cathode layer effect.
  • the materials of the first film layer 41 and the second film layer 42 may be the same or different. When the materials of the first film layer 41 and the second film layer 42 are the same, for example, the first film layer 41 and the second film layer 42 The materials of the film layer 42 are all negative photoresists, which can effectively reduce the process difficulty and cost.
  • the present application also provides a composite screen, which is the composite screen 54 shown in FIG. 7.
  • the composite screen 54 may include an integrated main screen body 542 and an auxiliary screen body 544.
  • the main screen body 542 It may be an AM screen body
  • the sub-screen body 544 may be a PM screen body or an AM-like screen body.
  • the AM-like screen means that its pixel circuit includes only one switching element (ie, driving TFT) without a capacitor structure.
  • the other structure of the AMOLED-like display panel is the same as the AMOLED display panel.
  • the sub-screen body 544 is a PM screen body, the sub-screen body 544 may be provided with the display panel described in any of the embodiments of the present application, such as by any embodiment corresponding to FIGS. 1-4.
  • the non-flat parts such as the grooves or steps explained further improve the effect of the cathode separation column to cut off the cathode layer, so as to improve the display performance and effect of the composite screen.
  • the present application further provides a display terminal 50, which may include a device body 52 and a composite screen 54.
  • the composite screen 54 covers the device body 52 and is mutually
  • the device body 52 may be provided with a non-device area 522 and a device area 524 (such as a slotted area), and the device area 524 may be provided with a photosensitive device such as a camera 526 and a light sensor.
  • the above-mentioned composite screen 54 may include an integrated main screen body 542 and a sub-screen body 544.
  • the main screen body 542 may be an AM screen body
  • the sub-screen body 544 may be a PM screen body or an AM-like screen body.
  • the auxiliary screen body 544 when the composite screen 54 is attached and fixed on the device body 52, the auxiliary screen body 544 can be used as a slotted area corresponding to the above-mentioned device area 524, so that the above-mentioned camera 526 and Photosensitive devices such as light sensors can pass through the auxiliary screen body 544 to perform light collection and sensing operations on external light.
  • the above secondary screen body 544 may include the display panel described in any of the above embodiments, that is, by forming an uneven portion such as a groove or a step on the side wall of the cathode separation column to effectively enhance the effect of the cathode layer to form a cathode To avoid short-circuiting of adjacent cathodes and affecting the display performance and effect of the display terminal.
  • the above-mentioned display terminal may be a mobile phone, a personal computer, a tablet computer, a smart watch, a smart bracelet and other electronic devices with a display screen device.
  • the secondary screen 544 may be in a non-display state when the photosensitive device is in operation, so as to improve Light rate, which in turn improves the performance of the photosensitive device in collecting external light.
  • this type of AM panel includes a substrate 710 and a pixel circuit 720 (that is, a TFT array) provided on the substrate 710.
  • a first electrode layer is provided on the pixel circuit 720.
  • the first electrode layer includes a plurality of first electrodes 730.
  • the first electrode 730 corresponds to the pixel circuit 720 in one-to-one correspondence.
  • the first electrode 730 here is an anode.
  • the AM-like screen body further includes a pixel defining layer 740, which is disposed on the first electrode 730.
  • the pixel defining layer 740 has a plurality of pixel openings 770, and a light emitting structure 750 is disposed in the pixel openings to form a plurality of sub-pixels (not shown).
  • the sub-pixels correspond to the first electrodes 730 in one-to-one relationship.
  • a second electrode (not shown) is provided above the light emitting structure layer 750.
  • the second electrode is a cathode, and the cathode is a surface electrode, that is, an entire surface electrode formed of an entire surface electrode material.
  • the pixel circuit 740 is provided with scanning lines, data lines, and TFT switching elements. Both the scanning line and the data line are connected to the TFT switching element. The scan line controls the turning on and off of the TFT switching element. When the pixel is turned on, the data line provides a driving current to the first electrode 730 to control the sub-pixel to emit light.
  • FIG. 9 is a flowchart of a method for manufacturing a composite screen in an embodiment
  • FIGS. 10a to 10d are schematic diagrams of four stages of preparing a cathode isolation column having a sidewall groove in an embodiment.
  • the ITO cathode layer It has good step coverage on the cathode isolation column (such as organic glue), and the AM screen in the composite screen limits the height of the above cathode isolation column (generally about 2.5 ⁇ m), which will cause the cathode isolation column The cathode blocking effect is not good.
  • the present application creatively provides a method for preparing a composite screen, which can be applied to prepare the composite screen described in any of the above embodiments.
  • the method may include:
  • Step S01 providing a semiconductor substrate.
  • the semiconductor substrate may have an AM display area and a PM display area
  • the PM display area of the semiconductor substrate may include a glass substrate, a PI layer, a BL layer, a SiN / SiO layer, a GI layer, and a CI layer , ILD layer, PLN layer, PM anode layer and other structures, specifically through such as double-layer PI process, three-layer film process, P-Si patterning process, G1 layer / M1 patterning process, CI layer / M2 patterning process , ILD / M3 patterning process, PLA layer / PM anode preparation process, etc. to prepare the above semiconductor substrate.
  • Step S02 an anode layer of AM and a pixel definition layer of PM are prepared on the semiconductor substrate.
  • an anode layer of AM is prepared in the AM display area, and a pixel definition layer (ie, PDL) is prepared in the PM display area; wherein, a light-emitting layer of PM penetrating the pixel definition layer is prepared in the pixel definition layer.
  • a pixel definition layer ie, PDL
  • Step S03 preparing an etching barrier film, an inorganic film and an organic glue film stacked in sequence.
  • the etching barrier film may be prepared by using chemical vapor deposition (hereinafter referred to as CVD), and then prepared ITO film, and coated to form an organic glue layer.
  • CVD chemical vapor deposition
  • a PM anode 61, a pixel fixing layer 62, and a light emitting layer 63 penetrating through the pixel definition layer 62 are formed in the PM display area on the substrate 60 of the composite film layer, and are formed in the AM display area AM anode (not shown in the figure); then, using the CVD process to prepare an etch stop film 64, the etch stop film 64 covers the upper surface of the pixel definition layer 62, the upper surface of the light emitting layer 63 and the anode of the AM On the upper surface, continue to prepare the ITO film 65 and coat the photoresist layer 66 (that is, the organic resist layer).
  • the above-mentioned etching barrier film 64 can effectively avoid subsequent contact between the ITO film 65 and the AM anode to be crystallized, thereby facilitating subsequent removal of the ITO film 65 on the AM anode.
  • an excess photoresist can be removed by using an ashing process, for example, to form an organic adhesive layer 661 having a pattern of cathode spacers.
  • Step S05 the organic thin film is used as a mask, and the inorganic thin film is wet-etched to form an inorganic layer.
  • the ITO film 65 is wet-etched using the above-mentioned organic glue layer 661 as a mask.
  • Has a certain corrosion resistance the etching selection ratio between the etching barrier layer 64 and the inorganic thin film is greater than 1
  • it can effectively protect the anode such as AM, the pixel definition layer 62 and the light emitting layer 63 under the etching barrier layer It will not be affected by the wet etching.
  • a groove 652 is formed on the side wall of the formed ITO layer 651.
  • the above etching barrier layer can also be processed in the above over etching process
  • the anode of AM is protected in order to avoid damage due to over-etching due to thin thickness (generally around 20nm).
  • the cutting depth of the groove 652 may be 1.5 ⁇ m to 2.5 ⁇ m (such as 1.5 ⁇ m, 2.1 ⁇ m or 2.5 ⁇ m, etc.), and the width of the opening of the groove in the thickness direction of the ITO layer 651 may be (Such as or Wait).
  • Step S06 etching to remove part of the etch stop film to form an etch stop layer, so that the etch stop layer, the inorganic layer, and the organic glue layer stacked in sequence form a cathode isolation column with an uneven portion on the side.
  • the cathode isolation column has a structure with a large top and a small bottom, and the non-flat portion is a groove or a protrusion.
  • etching removes the excess etching barrier film 64, for example, etching removes the etching barrier located on the anode layer of AM, the light emitting layer 63, and part of the pixel definition layer 62
  • the thin film 64 that is, using the organic glue layer 661 and the ITO layer 651 as masks, removes the remaining part of the etch stop film, thereby forming an etch stop layer 641 having grooves 652 on the side walls as shown in FIG. 10d.
  • etching barrier layer 641, ITO layer 651 and organic adhesive layer 661 are sequentially stacked to form a cathode separator 6 with a large upper and a lower side, and the side of the cathode separator 6 is formed at 25 ° to the direction perpendicular to the substrate 30 ° included angle.

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Abstract

一种显示面板包括：若干阴极；若干阴极隔离柱，其用于将相邻的两个所述阴极隔离开；在所述显示面板的纵截面上，每一阴极隔离柱的侧壁具有非平坦部，所述非平坦部位于所述阴极的上方。

Description

显示面板、复合屏和复合屏的制备方法
相关申请的交叉引用
本申请要求于2018年10月31日提交中国专利局，申请号为201811290667.4，申请名称为“显示面板、复合屏、显示终端和复合屏的制备方法”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及显示器件技术领域，特别是涉及一种显示面板、使用该显示面板的复合屏和该复合屏的制备方法。
背景技术
随着电子设备的快速发展，用户对屏占比的要求越来越高，使得电子设备的全面屏显示受到业界越来越多的关注。
对于传统的电子设备如手机、平板电脑等，由于需要集成诸如前置摄像头、听筒和红外感应元件等的器件，所以需要在显示屏上开槽(Notch)或在显示屏上开孔，以在开槽区域或开孔区域设置这些器件。但是，开槽区域或开孔区域均不用于显示画面。
因此，这些电子设备均不是真正意义上的全面屏，并不能在整个屏幕的各个区域均进行显示，如在摄像头区域不能显示画面。同时，PMOLED(Passive Matrix OLED，被动式驱动有机发光二极管)显示屏中的阴极隔离柱的隔断效果较差。
发明内容
本申请提供一种显示面板，包括：若干阴极；若干阴极隔离柱，其用于将相邻的两个所述阴极隔离开；在所述显示面板的纵截面上，每一阴极隔离柱的侧壁具有非平坦部，所述非平坦部位于所述阴极的上方。
在其中一个实施例中，上述显示面板还包括：衬底；阳极层，设置于所述衬底的部分表面；发光层，设置于所述阳极层的远离所述衬底的表面的至少一部分；以及像素定义层，覆盖于所述衬底以及所述阳极层之上，并位于所述发光层的周围，其中所述阴极形成在所述发光层之上，所述阴极隔离柱设置在所述像素定义层的远离所述阳极层的表面。
在其中一个实施例中，所述非平坦部为凹槽或凸起。
在其中一个实施例中，所述非平坦部为所述凹槽，所述凹槽的深度为1.5μm～2.5μm，所述凹槽的开口尺寸为
Figure PCTCN2019080182-appb-000001
在其中一个实施例中，所述非平坦部为弧形凹槽、梯形凸起、和鸟头形凹槽的其中一种。
在其中一个实施例中，所述显示面板为PMOLED显示面板。
在其中一个实施例中，所述阴极隔离柱为复合膜层结构。
在其中一个实施例中，所述复合膜层结构包括依次层叠的刻蚀阻挡层、无机层和有机胶层，所述无机层与所述刻蚀阻挡层之间的选择刻蚀比大于1。
在其中一个实施例中，所述刻蚀阻挡层的厚度为
Figure PCTCN2019080182-appb-000002
在其中一个实施例中，所述复合膜层结构包括依次层叠的第一氮化硅层、氧化硅层、第二氮化硅层和光敏聚酰亚胺层。
在其中一个实施例中，所述复合膜层结构包括依次层叠的第一膜层和第二膜层，所述第二膜层的宽度大于所述第一膜层的宽度，以使得所述第一膜层的侧面和所述第二膜层的侧面交错形成阶梯部。
在其中一个实施例中，所述第一膜层和所述第二膜层的材质均为负性光刻胶。
在其中一个实施例中，所述阴极隔离柱的侧面与垂直所述衬底的方向形成25°～30°的夹角。
本申请还提供一种显示终端，包括：设备本体，具有器件区；及如上所述的显示面板，覆盖在所述设备本体上；其中，所述显示面板还包括PM面板或类AM面板部分，所述器件区位于所述PM面板或类AM面板部分的下 方，且所述设备本体包括设置于所述器件区的透过所述PM面板或类AM面板部分进行光线采集的感光器件。
在其中一个实施例中，所述器件区为开槽区；以及
所述感光器件包括摄像头和/或光线感应器。
本申请还提供一种复合屏的制备方法，包括：提供一半导体衬底，所述半导体衬底具有AM显示区和PM显示区；于所述AM显示区中制备AM阳极层，于所述PM显示区中制备像素定义层，所述像素定义层具有像素开口，在所述像素开口制备PM发光层；制备依次叠置的刻蚀阻挡薄膜、无机薄膜和有机胶薄膜，所述刻蚀阻挡薄膜覆盖所述AM阳极层的上表面、所述像素定义层的上表面和所述PM发光层的上表面；图形化所述有机胶薄膜形成有机胶层；以所述有机胶层为掩膜，湿法刻蚀所述无机薄膜，形成无机层；刻蚀去除部分所述刻蚀阻挡薄膜，形成刻蚀阻挡层，使依次叠置的所述刻蚀阻挡层、无机层和所述有机胶层形成侧面具有非平坦部的阴极隔离柱；以及在所述阴极隔离柱之上制备阴极层，以利用所述阴极隔离柱将所述阴极层隔断为相互隔离的PM的阴极。
在其中一个实施例中，所述非平坦部为凹槽或凸起。
在其中一个实施例中，湿法刻蚀所述无机薄膜形成无机层时，所述刻蚀阻挡层与所述无机薄膜之间的刻蚀选择比大于1。
在其中一个实施例中，所述制备所述刻蚀阻挡薄膜包括采用化学气相沉积制备所述刻蚀阻挡薄膜，然后制备
Figure PCTCN2019080182-appb-000003
的氧化铟锡薄膜，并涂覆形成所述有机胶层。
在其中一个实施例中，所述图形化所述有机胶薄膜形成有机胶层包括曝光及显影有机胶薄膜，然后灰化所述有机胶薄膜以去除多余的光刻胶，以形成具有所述阴极隔离柱图形的有机胶层。
本申请的一个或多个实施例的细节在下面的附图和描述中提出。本申请的其它特征、目的和优点将根据说明书、附图以及权利要求书的描述变得明显。
附图说明
为了更好地描述和说明本申请的实施例和/或示例，可以参考一幅或多幅附图。用于描述附图的附加细节或示例不应当被认为是对所公开的申请、目前描述的实施例和示例以及目前理解的这些申请的最佳模式中的任何一者的范围的限制。
图1是一个实施例中显示面板的示意图。
图2是一个实施例中侧壁设置有凹槽的阴极隔离柱的示意图。
图3是一个实施例中侧壁设置有鸟头形凹槽的阴极隔离柱的示意图。
图4是一个实施例中侧壁设置有阶梯的阴极隔离柱的示意图。
图5是一个实施例中显示终端的示意图。
图6是图5中所示的显示终端的设备本体的示意图。
图7是图5中所示的显示终端的复合屏的示意图。
图8是一实施例中的类AM屏体的剖视图。
图9是一个实施例中复合屏的制备方法的流程图。
图10a～10d是一个实施例中制备具有侧壁凹槽的阴极隔离柱的四个阶段的示意图。
具体实施方式
为了便于理解本申请，下面将参照相关附图对本申请进行更全面的描述。附图中给出了本申请的较佳的实施例。但是，本申请可以以许多不同的形式来实现，并不限于本文所描述的实施例。相反地，提供这些实施例的目的是使对本申请的公开内容的理解更加透彻全面。
还应当理解的是，在解释元件时，尽管没有明确描述，但元件解释为包括误差范围，该误差范围应当由本领域技术人员所确定的特定值可接受的偏差范围内。例如，“大约”、“近似”或“基本上”可以意味着一个或多个标准偏差内，在此不作限定。
此外，在说明书中，短语“平面示意图”是指当从上方观察目标部分时的附图，短语“截面示意图”是指从侧面观察通过竖直地切割目标部分截取的剖面时的附图。
此外，附图并不是1：1的比例绘制，并且各元件的相对尺寸在附图中仅以示例地绘制，而不一定按照真实比例绘制。
正如背景技术所述，传统的电子设备如手机、平板电脑等，由于需要集成诸如前置摄像头、听筒以及红外感应元件等，故而可通过在显示屏上开槽(Notch)，在开槽区域设置摄像头、听筒以及红外感应元件等。但开槽区域并不用来显示画面，如现有技术中的刘海屏，或者采用在屏幕上开孔的方式，对于实现摄像功能的电子设备来说，外界光线可通过屏幕上的开孔处进入位于屏幕下方的感光元件。但是这些电子设备均不是真正意义上的全面屏，并不能在整个屏幕的各个区域均进行显示，如在摄像头区域不能显示画面。
针对上述问题，技术人员研发了一种显示屏，其通过在在开槽区域设置透明显示面板的方式来实现电子设备的全面屏显示。根据驱动方式的不同，OLED可以分为PMOLED(Passive Matrix OLED，被动式驱动有机发光二极管)和AMOLED(Active Matrix OLED，主动式驱动有机发光二极管)两种。以PMOLED为例，PMOLED显示阵列的同一行显示单元的同一性质电极是共用的，并且同一列显示单元同一性质电极也是共用的。具体而言，PMOLED显示面板是以阴极、阳极构成矩阵，以扫描方式点亮阵列中的像素，每个像素都是操作在短脉冲模式下，为瞬间高亮度发光。研究发现，由于PMOLED显示面板无TFT背板和金属走线，使得光线透过率高，而可以被应用于前述的透明显示面板。
通常，PMOLED显示面板需要通过光刻工艺形成位于相邻两行、列之间的隔离挡墙，以避免相邻的两行、列的阴极之间短路。申请人研究发现，溅射形成阴极层的过程中，由金属原子的移动方向不定，使隔离挡墙的侧壁上也会形成阴极层，而且形成的阴极层与隔离挡墙的侧壁的粘附性比较好，不易脱落，从而使隔离挡墙上阴极层与发光层上的阴极层连接为一体，进而导 致相邻的行、列的阴极发生短路。同时，在蒸镀形成其他结构膜层时，由于考虑到蒸镀的阴影效应，隔离挡墙的高度需与用于支撑掩膜板的支撑层(SPC)的高度相同(例如，1.6微米)。现有设计中隔离挡墙通常采用光刻技术形成，而受限于隔离墙高度、材料及设备，例如现有设计中的倒梯形的隔离挡墙的侧壁倾斜角度无法做到较小，进一步加大了阴极阻断的难度，不利于实现全面屏正常显示。
由于显示器件越来越薄，针对被动矩阵有机发光二极管PMOLED显示屏而言，会限制阴极隔离柱的高度，进而会使得阴极隔离柱不能隔断阴极，造成相邻阴极短路的缺陷。当采用复合屏时，例如采用AMOLED(以下简称AM屏体)和PMOLED屏体(以下简称PM屏体)一体化设计的复合屏，为了利于后续AM屏体工艺的进行，会进一步的限制PM屏体中阴极隔离柱的高度。
另外，一体化复合屏中可采用氧化铟锡(indium tin oxide，以下简称ITO)来代替Mg/Ag作为PM屏体的阴极，阴极隔离柱的材质可为有机胶。在采用物理气相沉积(physical vapor deposition，以下简称PVD)制备ITO薄膜时，由于ITO在有机胶上具有较好的台阶覆盖性，会使得阴极隔离柱的侧壁也会附着有ITO薄膜。而该附着在侧壁的ITO薄膜会与邻近的阴极相邻，从而会使得相邻的阴极之间通过附着在阴极隔离柱侧壁的ITO薄膜，以及覆盖在阴极隔离柱上表面的ITO薄膜形成连续的金属膜层。进而会出现阴极短路的缺陷，即目前的阴极隔离柱的隔断阴极的效果不佳，会增大PM屏体中相邻阴极连接的风险。
为了解决上述的问题，本申请的实施例中创造性地提出，通过在阴极隔离柱的侧壁上形成诸如凹槽、凸起等非平坦部，以利用该非平坦部来进一步提升阴极隔离柱隔断阴极的效果，同时还可保持阴极隔离柱的高度不变或更小，使得所制备的显示屏具有更好的显示性能及更薄的厚度。
图1是一个可选的实施例中显示面板的结构示意图。如图1所示，显示面板可包括衬底10、阳极层11、像素定义层12、发光层13、若干阴极隔离 柱15，以及若干阴极16。为了方便描述，图1中仅示出了一个阴极16，阴极隔离柱15用于将相邻的两个所述阴极16隔离，为了方便描述，图1中仅示出了两个阴极隔离柱15。
衬底10可为复合膜层结构，例如该衬底10可包括依次叠置的玻璃基板、PI层、缓冲层(BL)等，而发光层13则为PMOLED发光层。上述的阳极层11设置在衬底10之上，像素定义层12覆盖衬底10的暴露出的表面以及阳极层11之上，并位于发光层13的周围。发光层13则可贯穿该像素定义层12并设置于阳极层11的远离衬底10的表面的至少一部分，阴极隔离柱15则可邻近发光层13设置在像素定义层12的远离所述阳极层的表面，而阴极16则可形成在发光层13之上。应当理解，在形成阴极16时，阴极隔离柱15上也会不可避免地形成材料与阴极16的材料相同的覆盖层161。
如图1所示，上述的阴极隔离柱15的两个侧面均形成有非平坦部151，该非平坦部151可为例如图1中所示的凹槽也可为图4中所示的凸起，只要该阴极隔离柱15能够将位于相邻发光层13之上的阴极16隔断为相互隔离的阴极16即可。换言之，在制备形成阴极16时，上述的阴极隔离柱15将阴极16隔断成若干个相互隔离的区域，进而有效避免阴极16之间出现连续的膜层而造成短路，以提升显示面板的显示性能。
图2是一个实施例中侧壁设置有凹槽的阴极隔离柱的结构示意图。在一个实施例中，如图1～2所示，为了进一步提升阴极隔离柱15隔断阴极16的效果，可根据实际工艺需求在上述的阴极隔离柱15的侧壁上形成诸如弧形凹槽24、梯形凸起、或鸟头形凹槽等各种形状的非平坦部151。
在一个实施例中，上述的阴极隔离柱15可为单层膜层结构或复合膜层结构，具体可根据实际需求而设定。下面就以具有复合膜层结构的阴极隔离柱15进行详细说明。
如图2所示，阴极隔离柱15可包括刻蚀阻挡层21、无机层22和有机胶层23，且该刻蚀阻挡层21、无机层22和有机胶层23在沿远离上述像素定义层12的上表面的方向依次叠置，同时上述的无机层22与刻蚀阻挡层21之间 的选择刻蚀比大于1，比如可以为3、5或10等，以使得通过刻蚀工艺(如湿法刻蚀)在无机层22的侧壁形成弧形凹槽24。同时，刻蚀阻挡层21还能够对于所覆盖的膜层(例如阳极)起到刻蚀阻挡保护作用，避免因过刻蚀而对位于刻蚀阻挡层21所覆盖的膜层造成损伤。
在一个实施例中，如图2所示，上述的阴极16的材质均可为ITO，而图2中所示的弧形凹槽24的深度可为1.5μm～2.5μm(如1.5μm、1.75μm、2.0μm、2.25μm或2.5μm等)，该凹槽24的开口在垂直于上述像素定义层12的上表面的方向上的高度可为
Figure PCTCN2019080182-appb-000004
(如
Figure PCTCN2019080182-appb-000005
Figure PCTCN2019080182-appb-000006
或
Figure PCTCN2019080182-appb-000007
等)，而刻蚀阻挡层21的厚度则可对应为
Figure PCTCN2019080182-appb-000008
(如
Figure PCTCN2019080182-appb-000009
或
Figure PCTCN2019080182-appb-000010
等)，以使得由刻蚀阻挡层21、无机层22和有机胶层23所构成的阴极隔离柱高度不变的情况下，凹槽24能够有效隔断后续制备的阴极层，避免相邻的阴极层出现短接的缺陷。
图3是一个实施例中侧壁设置有鸟头形凹槽的阴极隔离柱的结构示意图。如图3所示，上述的阴极隔离柱还可由第一氮化硅层31、氧化硅层32、第二氮化硅层33和光敏聚酰亚胺层34构成，即在沿远离上述像素定义层12的上表面的方向上，上述的第一氮化硅层31、氧化硅层32、第二氮化硅层33和光敏聚酰亚胺层34依次叠置而构成如图3所示的隔离结构；同时，通过在刻蚀氧化硅层32时，利用氮化硅与氧化硅之间所存在的刻蚀速率差异，在第二氮化硅层33的侧壁相对于光敏聚酰亚胺层34形成凹槽区，并基于尖端效应在上述凹槽区域与光敏聚酰亚胺层34接触的区域形成延伸至该光敏聚酰亚胺层34内的凹槽，从而与第二氮化硅层33刻蚀形成结构一起构成形成如图3所示的鸟头凹槽35，以提升阴极隔离柱隔断后续制备的阴极层的效果。
图4是一个可选的实施例中侧壁设置有阶梯的阴极隔离柱的结构示意图。如图4所示，阴极隔离柱还可由第一膜层41和第二膜层42构成，即第一膜层41覆盖在像素定义层12的上表面，第二膜层42的宽度大于于第一膜层41的宽度，以使得第一膜层41的侧面和第二膜层的侧面42交错形成图4所示的阶梯43，以利用该阶梯来提升阴极隔离柱隔断后续制备的阴极层的效果。 其中，上述的第一膜层41和第二膜层42的材质可相同或相异，当第一膜层41和第二膜层42的材质相同时，例如该第一膜层41和第二膜层42的材质均为负性光刻胶，能够有效降低工艺难度及成本。
图5是一个实施例中显示面板的示意图，图6是图5中所示的显示终端的设备本体的示意图，图7是图5中所示的显示终端的复合屏的示意图。
本申请还提供了一种复合屏，该复合屏为图7所示的复合屏54，如图7所示，该复合屏54可包括一体化的主屏体542和副屏体544，主屏体542可为AM屏体，而副屏体544可为PM屏体或类AM屏体，类AM屏是指其像素电路仅包含一个开关元件(即驱动TFT)，而无电容结构。类AMOLED显示面板的其他结构与AMOLED显示面板相同。且当副屏体544为PM屏体时，该副屏体544中可设置有本申请中任一实施例所阐述的显示面板，即可通过诸如图1～4所对应的任一实施例所阐述的凹槽或阶梯等非平坦部，来进一步提升阴极隔离柱隔断阴极层的效果，以提升复合屏的显示性能及效果。
在另一个可选的实施例中，如图5～7所示，本申请还提供了一种显示终端50，可包括设备本体52和复合屏54，复合屏54覆盖在设备本体52上并相互连接，且该设备本体52上可开设有非器件区522和器件区524(如开槽区)，且在器件区524中可设置有诸如摄像头526及光线传感器等感光器件。继续参见图7所示，上述的复合屏54可包括一体化的主屏体542和副屏体544，主屏体542可为AM屏体，副屏体544可为PM屏体或类AM屏体。参见图5～7所示，当复合屏54贴合固定在设备本体52上时，副屏体544可作为开槽区对应上述的器件区524贴合在一起，以使得上述的诸如摄像头526及光线传感器等感光器件能够透过该副屏体544，对外部光线进行光线采集及感测等操作。上述的副屏体544中可包括上述任意一个实施例所描述的显示面板，即通过在阴极隔离柱的侧壁形成诸如凹槽或阶梯等非平坦部，来有效提升阴极层隔断形成阴极的效果，避免相邻阴极出现短接而影响显示终端的显示性能及效果。
在一个可选的实施例中，参见图5～7，在一个可选的实施例中，上述的 显示终端可为手机、个人电脑、平板电脑、智能手表、智能手环等具有显示屏的电子设备。另外，如图7所示，为了提升感光器件透过上述的副屏体544所采集光线的数量，可在感光器件工作时使得副屏体544处于非显示状态，以提升副屏体544的透光率，进而提升感光器件采集外部光线的性能。
图8是一实施例中的类AM屏体的剖视图。参见图8所示，该类AM屏体包括基板710以及设置于基板710上的像素电路720(也即TFT阵列)。像素电路720上设置有第一电极层。第一电极层包括多个第一电极730。第一电极730与像素电路720一一对应。此处的第一电极730为阳极。类AM屏体还包括像素限定层740，设置于第一电极730上。像素限定层740上具有多个像素开口770，像素开口内设置有发光结构750，以形成多个子像素(未图示)，子像素与第一电极730一一对应。发光结构层750的上方设置有第二电极(未图示)，第二电极为阴极，该阴极为面电极，也就是由整面的电极材料形成的整面电极。像素电路740中设置有扫描线、数据线和TFT开关元件。扫描线和数据线均与TFT开关元件连接。扫描线控制TFT开关元件的开启和关闭，数据线在像素开启时，为第一电极730提供驱动电流，以控制子像素发光。
图9一个实施例中复合屏的制备方法的流程图，图10a～10d是一个实施例中制备具有侧壁凹槽的阴极隔离柱的四个阶段的示意图。如图9、10a～10d所示，在另一个可选的实施例中，针对目前具有一体化的AM屏体和PM屏体的复合屏，在采用诸如PVD制备ITO阴极时，由于ITO阴极层在阴极隔离柱(如有机胶)上具有较好的台阶覆盖性，同时复合屏中的AM屏体又限制了上述阴极隔离柱的高度(一般为2.5μm左右)，进而会造成该阴极隔离柱的阴极隔断效果不佳，本申请创造性的提供了一种复合屏的制备方法，可应用于制备上述任一实施例中所阐述的复合屏，该方法可包括：
步骤S01，提供一半导体衬底。
具体地，该半导体衬底上可具有AM显示区和PM显示区，且该半导体衬底的PM显示区中可包括玻璃衬底、PI层、BL层、SiN/SiO层、GI层、 CI层、ILD层、PLN层和PM阳极层等结构，具体可依次通过诸如双层PI工艺、三层膜工艺、P-Si图形化工艺、G1层/M1图形化工艺、CI层/M2图形化工艺、ILD/M3图形化工艺、PLA层/PM的阳极制备工艺等制备上述的半导体衬底。
步骤S02，在半导体衬底上制备AM的阳极层和PM的像素定义层。
具体地，于上述AM显示区中制备AM的阳极层，于PM显示区中制备像素定义层(即PDL)；其中，在上述像素定义层中制备有贯穿该像素定义层的PM的发光层。
步骤S03，制备依次叠置的刻蚀阻挡薄膜、无机薄膜和有机胶薄膜。
具体地，可通过采用化学气相沉积(chemical vapor deposition，以下简称CVD)制备刻蚀阻挡薄膜，然后制备
Figure PCTCN2019080182-appb-000011
的ITO薄膜，并涂覆形成有机胶层。例如，如图10a所示，先在复合膜层的基底60上PM显示区中形成PM的阳极61、像素定影层62及贯穿该像素定义层62的发光层63，而在AM显示区中形成AM的阳极(图中未示出)；然后，采用CVD工艺制备刻蚀阻挡薄膜64，该刻蚀阻挡薄膜64覆盖上述像素定义层62的上表面、发光层63的上表面以及AM的阳极的上表面，继续制备ITO薄膜65和涂覆光刻胶层66(即有机胶层)。由于AM的阳极的材质一般为结晶的ITO膜，上述的刻蚀阻挡薄膜64能够有效规避后续制备ITO薄膜65与AM的阳极接触而结晶，从而便于后续去除位于AM的阳极上的ITO薄膜65。
步骤S04，图形化有机胶薄膜形成有机胶层。
具体地，如图10b所示，可通过曝光、显影等工艺后，采用诸如灰化工艺去除多余的光刻胶，以形成具有阴极隔离柱图形的有机胶层661。
步骤S05，以有机胶层为掩膜，湿法刻蚀无机薄膜形成无机层。
具体地，如图10c所示，以上述的有机胶层661为掩膜，对ITO薄膜65进行湿法刻蚀，由于有机胶层661和刻蚀阻挡薄膜64对于上述的湿法刻蚀溶液均具有一定的抗腐蚀性(刻蚀阻挡层64与无机薄膜之间的刻蚀选择比大于1)，故而能够有效保护位于刻蚀阻挡层下方的诸如AM的阳极、像素定义层 62及发光层63等不会受到该湿法刻蚀的影响，同时继续过刻蚀处理后，所形成的ITO层651的侧壁上形成凹槽652，上述的刻蚀阻挡层也能在上述的过刻蚀处理中对AM的阳极进行保护，避免因过刻蚀而造成厚度较薄(一般在20nm左右)损伤。该凹槽652的切入深度可为1.5μm～2.5μm(如1.5μm、2.1μm或2.5μm等)，而凹槽的开口在ITO层651厚度方向上的宽度可在
Figure PCTCN2019080182-appb-000012
(如
Figure PCTCN2019080182-appb-000013
或
Figure PCTCN2019080182-appb-000014
等)。
步骤S06，刻蚀去除部分刻蚀阻挡薄膜形成刻蚀阻挡层，以使依次叠置的刻蚀阻挡层、无机层和有机胶层形成侧面具有非平坦部的阴极隔离柱。并且该阴极隔离柱为上大下小结构，所述非平坦部为凹槽或凸起。
具体地，如图10d所示，刻蚀去除多余的刻蚀阻挡薄膜64，例如刻蚀去除位于AM的阳极层之上、发光层63之上以及部分位于像素定义层62之上的刻蚀阻挡薄膜64，即以上述有机胶层661和ITO层651为掩膜，去除其余部分的刻蚀阻挡薄膜，从而形成如图10d中所示的侧壁具有凹槽652的刻蚀阻挡层641。上述的刻蚀阻挡层641、ITO层651和有机胶层661依次叠置，从而形成上大下小的阴极隔离柱6，且该阴极隔离柱6的侧面与垂直衬底的方向形成25°～30°的夹角。
步骤S07，在阴极隔离柱之上制备阴极层，以利用上述阴极隔离柱6将该阴极层隔断为相互隔离的PM的阴极。能够有效降低PVD制备ITO薄膜时的覆盖性。
具体地，基于上述图10d中所形成的阴极隔离柱6进行后续的阴极层的沉积，并且由于凹槽652的存在，能够有效降低阴极层在阴极隔离柱6的表面上的覆盖特性，即该侧壁具有凹槽652的阴极隔离柱6能够更有效地将上述的阴极层隔断为相互隔离的阴极结构。
在上述复合屏的制备方法的实施例中，通过利用无机层(即ITO)和有机胶等复合膜层构成阴极隔离柱，并且能够在阴极隔离柱的侧壁形成凹槽，从而有效提升后续阴极隔断的概率。同时，在阴极隔离柱的底层增加CVD刻蚀阻挡层，能够有效保护AM的阳极在制备上述无机层的过程中免受损伤， 同时也避免了制备无机层时因与结晶的AM的阳极接触而出现的结晶缺陷，降低后续刻蚀去除多余无机层的工艺难度及成本。
以上所述实施例的各技术特征可以进行任意的组合，为使描述简洁，未对上述实施例中的各个技术特征所有可能的组合都进行描述，然而，只要这些技术特征的组合不存在矛盾，都应当认为是本说明书记载的范围。
以上所述实施例仅表达了本申请的几种实施方式，其描述较为具体和详细，但并不能因此而理解为对申请专利范围的限制。应当指出的是，对于本领域的普通技术人员来说，在不脱离本申请构思的前提下，还可以做出若干变形和改进，这些都属于本申请的保护范围。因此，本申请专利的保护范围应以所附权利要求为准。

Claims (20)

  1. 一种显示面板，包括：
    若干阴极；
    若干阴极隔离柱，其用于将相邻的两个所述阴极隔离开；
    在所述显示面板的纵截面上，每一阴极隔离柱的侧壁具有非平坦部，所述非平坦部位于所述阴极的上方。
  2. 如权利要求1所述的显示面板，还包括：
    衬底；
    阳极层，设置于所述衬底的部分表面；
    发光层，设置于所述阳极层的远离所述衬底的表面的至少一部分；以及
    像素定义层，覆盖于所述衬底以及所述阳极层之上，并位于所述发光层的周围，其中所述阴极形成在所述发光层之上，所述阴极隔离柱设置在所述像素定义层的远离所述阳极层的表面。
  3. 如权利要求1所述的显示面板，其中，所述非平坦部为凹槽或凸起。
  4. 如权利要求3所述的显示面板，其中，所述非平坦部为所述凹槽，所述凹槽的深度为1.5μm～2.5μm，所述凹槽的开口尺寸为
    Figure PCTCN2019080182-appb-100001
  5. 如权利要求3所述的显示面板，其中，所述非平坦部为弧形凹槽、梯形凸起、和鸟头形凹槽的其中一种。
  6. 如权利要求1所述的显示面板，其中，所述显示面板为PMOLED显示面板。
  7. 如权利要求1所述的显示面板，其中，所述阴极隔离柱为复合膜层结构。
  8. 如权利要求7所述的显示面板，其中，所述复合膜层结构包括依次层叠的刻蚀阻挡层、无机层和有机胶层，所述无机层与所述刻蚀阻挡层之间的选择刻蚀比大于1。
  9. 如权利要求8所述的显示面板，其中，所述刻蚀阻挡层的厚度为
    Figure PCTCN2019080182-appb-100002
  10. 如权利要求7所述的显示面板，其中，所述复合膜层结构包括依次层叠的第一氮化硅层、氧化硅层、第二氮化硅层和光敏聚酰亚胺层。
  11. 如权利要求7所述的显示面板，其中，所述复合膜层结构包括依次层叠的第一膜层和第二膜层，所述第二膜层的宽度大于于所述第一膜层的宽度，以使得所述第一膜层的侧面和所述第二膜层的侧面交错形成阶梯部。
  12. 如权利要求11所述的显示面板，其中，所述第一膜层和所述第二膜层的材质均为负性光刻胶。
  13. 权利要求2所述的显示面板，其中，所述阴极隔离柱的侧面与垂直所述衬底的方向形成25°～30°的夹角。
  14. 一种显示终端，包括：
    设备本体，具有器件区；及
    如权利要求1所述的显示面板，覆盖在所述设备本体上；
    其中，所述显示面板还包括PM面板或类AM面板部分，所述器件区位于所述PM面板或类AM面板部分的下方，且所述设备本体包括设置于所述器件区的透过所述PM面板或类AM面板部分进行光线采集的感光器件。
  15. 如权利要求14所述的显示终端，所述器件区为开槽区；以及
    所述感光器件包括摄像头和/或光线感应器。
  16. 一种复合屏的制备方法，包括：
    提供一半导体衬底，所述半导体衬底具有AM显示区和PM显示区；
    于所述AM显示区中制备AM阳极层，于所述PM显示区中制备像素定义层，所述像素定义层具有像素开口，在所述像素开口制备PM发光层；
    制备依次叠置的刻蚀阻挡薄膜、无机薄膜和有机胶薄膜，所述刻蚀阻挡薄膜覆盖所述AM阳极层的上表面、所述像素定义层的上表面和所述PM发光层的上表面；
    图形化所述有机胶薄膜形成有机胶层；
    以所述有机胶层为掩膜，湿法刻蚀所述无机薄膜，形成无机层；
    刻蚀去除部分所述刻蚀阻挡薄膜，形成刻蚀阻挡层，使依次叠置的所述 刻蚀阻挡层、无机层和所述有机胶层形成侧面具有非平坦部的阴极隔离柱；以及
    在所述阴极隔离柱之上制备阴极层，以利用所述阴极隔离柱将所述阴极层隔断为相互隔离的PM的阴极。
  17. 如权利要求16所述的方法，其中，所述非平坦部为凹槽或凸起。
  18. 如权利要求16所述的方法，其中，湿法刻蚀所述无机薄膜形成无机层时，所述刻蚀阻挡层与所述无机薄膜之间的刻蚀选择比大于1。
  19. 如权利要求18所述的方法，其中，所述制备所述刻蚀阻挡薄膜包括采用化学气相沉积制备所述刻蚀阻挡薄膜，然后制备
    Figure PCTCN2019080182-appb-100003
    的氧化铟锡薄膜，并涂覆形成所述有机胶层。
  20. 如权利要求19所述的方法，其中，所述图形化所述有机胶薄膜形成有机胶层包括曝光及显影有机胶薄膜，然后灰化所述有机胶薄膜以去除多余的光刻胶，以形成具有所述阴极隔离柱图形的有机胶层。
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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111326675A (zh) * 2020-02-27 2020-06-23 京东方科技集团股份有限公司 一种显示面板及其制备方法、显示装置
CN113497089A (zh) * 2020-03-20 2021-10-12 京东方科技集团股份有限公司 阵列基板及其制备方法、显示装置
CN111755622B (zh) * 2020-06-17 2021-12-28 武汉华星光电半导体显示技术有限公司 显示面板
CN111916578B (zh) * 2020-07-15 2023-12-19 京东方科技集团股份有限公司 一种阵列基板、其制备方法及显示装置
CN112802979A (zh) * 2021-01-11 2021-05-14 合肥维信诺科技有限公司 显示面板及其制备方法
CN115884633B (zh) * 2023-03-03 2023-05-26 惠科股份有限公司 显示面板及显示面板制备方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10106747A (ja) * 1996-09-26 1998-04-24 Mitsubishi Electric Corp 有機エレクトロルミネッセンス表示装置およびその製法
US20030017360A1 (en) * 2001-07-20 2003-01-23 Elizabeth Tai Structure-defining material for OLEDs
CN107622975A (zh) * 2017-09-05 2018-01-23 深圳市华星光电半导体显示技术有限公司 一种显示面板及其制程

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN207781599U (zh) * 2017-09-30 2018-08-28 云谷（固安）科技有限公司 显示屏以及电子设备

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10106747A (ja) * 1996-09-26 1998-04-24 Mitsubishi Electric Corp 有機エレクトロルミネッセンス表示装置およびその製法
US20030017360A1 (en) * 2001-07-20 2003-01-23 Elizabeth Tai Structure-defining material for OLEDs
CN107622975A (zh) * 2017-09-05 2018-01-23 深圳市华星光电半导体显示技术有限公司 一种显示面板及其制程

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112331803A (zh) * 2020-11-04 2021-02-05 福建华佳彩有限公司 一种柔性oled器件结构及其制造方法
CN112928215A (zh) * 2021-01-25 2021-06-08 京东方科技集团股份有限公司 有机光检测器及其制备方法、显示面板、显示设备
CN112928215B (zh) * 2021-01-25 2024-07-16 京东方科技集团股份有限公司 有机光检测器及其制备方法、显示面板、显示设备
CN113540196A (zh) * 2021-07-13 2021-10-22 京东方科技集团股份有限公司 一种可拉伸显示基板及显示装置
CN113540196B (zh) * 2021-07-13 2024-03-05 京东方科技集团股份有限公司 一种可拉伸显示基板及显示装置
CN114094030A (zh) * 2021-11-18 2022-02-25 京东方科技集团股份有限公司 显示基板及其制备方法、显示面板、显示装置
CN115359728A (zh) * 2022-09-23 2022-11-18 昆山国显光电有限公司 一种柔性显示面板、仿形冶具和显示装置
CN115359728B (zh) * 2022-09-23 2023-12-22 昆山国显光电有限公司 一种柔性显示面板、仿形冶具和显示装置
CN116709832A (zh) * 2023-08-08 2023-09-05 惠科股份有限公司 屏下摄像显示屏和显示装置

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