WO2019151260A1 - 半導体装置の製造方法及び接着フィルム - Google Patents

半導体装置の製造方法及び接着フィルム Download PDF

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Publication number
WO2019151260A1
WO2019151260A1 PCT/JP2019/003010 JP2019003010W WO2019151260A1 WO 2019151260 A1 WO2019151260 A1 WO 2019151260A1 JP 2019003010 W JP2019003010 W JP 2019003010W WO 2019151260 A1 WO2019151260 A1 WO 2019151260A1
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Prior art keywords
film
adhesive film
semiconductor
semiconductor chip
adhesive
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PCT/JP2019/003010
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English (en)
French (fr)
Japanese (ja)
Inventor
由衣 國土
山本　和弘
紘平 谷口
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日立化成株式会社
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Application filed by 日立化成株式会社 filed Critical 日立化成株式会社
Priority to KR1020207021839A priority Critical patent/KR102602489B1/ko
Priority to SG11202007053XA priority patent/SG11202007053XA/en
Priority to CN201980010201.0A priority patent/CN111656500B/zh
Publication of WO2019151260A1 publication Critical patent/WO2019151260A1/ja

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    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B27/00—Layered products comprising a layer of synthetic resin
    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J201/00—Adhesives based on unspecified macromolecular compounds
    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J7/00—Adhesives in the form of films or foils
    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J7/00—Adhesives in the form of films or foils
    • C09J7/30—Adhesives in the form of films or foils characterised by the adhesive composition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/52—Mounting semiconductor bodies in containers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/18—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83191—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92—Specific sequence of method steps
    • H01L2224/922—Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
    • H01L2224/9222—Sequential connecting processes
    • H01L2224/92242—Sequential connecting processes the first connecting process involving a layer connector
    • H01L2224/92247—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Definitions

  • the present invention relates to a method for manufacturing a semiconductor device and an adhesive film.
  • silver paste is mainly used for joining a semiconductor chip and a semiconductor substrate.
  • the semiconductor substrates used are required to be miniaturized and miniaturized.
  • problems such as occurrence of defects during wire bonding due to protrusion of the paste or inclination of the semiconductor chip, difficulty in controlling the film thickness, and generation of voids may occur.
  • an adhesive film for joining a semiconductor chip and a semiconductor substrate has been used (see, for example, Patent Document 1).
  • an adhesive film comprising a dicing tape and an adhesive film laminated on the dicing tape
  • the adhesive film is attached to the back surface of the semiconductor wafer, and the semiconductor wafer is separated into pieces by dicing, whereby the semiconductor chip with the adhesive film is obtained.
  • the obtained semiconductor chip with an adhesive film can be attached to a semiconductor substrate via an adhesive film and bonded by thermocompression bonding.
  • the semiconductor substrate of the semiconductor device may be warped when the adhesive film is cured.
  • the semiconductor substrate may protrude from the sealing material, and an electrical failure may occur.
  • the present invention has been made in view of such circumstances, and a main object of the present invention is to provide a semiconductor device manufacturing method capable of suppressing warpage of a semiconductor substrate.
  • One aspect of the present invention is a step of preparing a semiconductor wafer with an adhesive film comprising an adhesive film and a semiconductor wafer in this order on an adhesive film, and dicing the semiconductor wafer with an adhesive film to obtain a semiconductor chip with an adhesive film
  • the manufacturing method of a semiconductor device is provided in which the shear viscosity at 80 ° C. of the second film is 500 Pa ⁇ s or more. According to such a method for manufacturing a semiconductor device, it is possible to suppress warping of the semiconductor substrate.
  • the thickness of the second film may be 3 to 150 ⁇ m.
  • the storage elastic modulus at 150 ° C. after curing of the second film may be 1000 MPa or less.
  • a first semiconductor chip is wire-bonded to a semiconductor substrate via a first wire
  • a second semiconductor chip is pressure-bonded to the first semiconductor chip via an adhesive film.
  • it may be a wire-embedded semiconductor device in which at least a part of the first wire is embedded in the adhesive film, and the first wire and the first semiconductor chip are embedded in the adhesive film.
  • a chip-embedded semiconductor device may be used. In such a semiconductor device, it is possible to suppress not only the warp of the semiconductor substrate but also the warp of the semiconductor chip with the adhesive film (second semiconductor chip).
  • the present invention includes a first film and a second film laminated on the first film and having a shear viscosity of 80 ° C. different from that of the first film, An adhesive film in which the shear viscosity at 80 ° C. of the film is 500 Pa ⁇ s or more is provided.
  • the thickness of the second film may be 3 to 150 ⁇ m.
  • the storage elastic modulus at 150 ° C. after curing of the second film may be 1000 MPa or less.
  • the above-mentioned adhesive film is a semiconductor in which a first semiconductor chip is wire-bonded to a semiconductor substrate via a first wire, and a second semiconductor chip is pressure-bonded on the first semiconductor chip.
  • the second semiconductor chip may be used for pressure bonding and at least part of the first wire is embedded (that is, for FOW use).
  • the first wire and the first semiconductor chip may be used. Used for embedding (that is, FOD use).
  • a method for manufacturing a semiconductor device capable of suppressing warpage of a semiconductor substrate is provided.
  • the manufacturing methods according to some embodiments can also suppress warping of the semiconductor chip with an adhesive film.
  • the adhesive film used for such a manufacturing method is provided.
  • A It is a schematic diagram of a film provided with a base film and an adhesive film.
  • B It is a schematic diagram of a film provided with a base film and an adhesive film.
  • C It is a schematic diagram of an adhesive film. It is a schematic diagram of an adhesive film. It is a schematic diagram of a semiconductor wafer with an adhesive film. It is a schematic diagram which shows a dicing process. It is a schematic diagram which shows an ultraviolet irradiation process. It is a schematic diagram which shows a pick-up process. It is a schematic diagram which shows a crimping
  • (meth) acrylic acid means acrylic acid or methacrylic acid corresponding thereto.
  • a separate adhesive, a first adhesive, and a second adhesive are applied onto the base films 1, 4a, and 4b, respectively, and a film 100 including the base film 1 and the adhesive film 2 (FIG. 1).
  • a film 110 (FIG. 2A) including the base film 4a and the first film 3a
  • a film 120 including the base film 4b and the second film 3b (FIG. 2B).
  • the base film 4a and the base film 4b are peeled off from the film 110 and the film 120, and the first film 3a and the second film 3b are bonded together to produce an adhesive film 130 (FIG. 2C).
  • a sheet 200 (FIG. 3) can be obtained.
  • the adhesive sheet 200 may be produced by a method of applying a first adhesive varnish on the film 100 (FIG. 1) and then applying a second adhesive varnish.
  • the adhesive sheet 200 excluding the base film 1 may be referred to as a dicing-die bonding integrated adhesive film 140.
  • the semiconductor wafer 300 with an adhesive film can be obtained by sticking the semiconductor wafer A on the adhesive film 130 (FIG. 4). That is, it can be said that the semiconductor wafer with an adhesive film 300 obtained in this manner is a laminate including an adhesive film and a semiconductor wafer in this order on an adhesive film.
  • Examples of the base films 1, 4a, and 4b include plastic films such as a polytetrafluoroethylene film, a polyethylene terephthalate film, a polyethylene film, a polypropylene film, a polymethylpentene film, and a polyimide film.
  • the base film may be subjected to surface treatment such as primer coating, UV treatment, corona discharge treatment, polishing treatment, etching treatment, etc., if necessary.
  • the pressure-sensitive adhesive film 2 can be formed from a pressure-sensitive or ultraviolet curable pressure-sensitive adhesive.
  • the thickness of the adhesive film 2 can be appropriately set according to the shape and dimensions of the semiconductor device to be manufactured, but is preferably 1 to 100 ⁇ m, more preferably 5 to 70 ⁇ m, and still more preferably 10 to 40 ⁇ m.
  • the adhesive film 130 includes a first film 3a and a second film laminated on the first film 3a and having a shear viscosity of 80 ° C. different from that of the first film 3a.
  • the shear viscosity at 80 ° C. of the second film 3b is 500 Pa ⁇ s or more.
  • the first film 3a and the second film 3b are both thermosetting, and after passing through a semi-cured (B stage) state, a first adhesive that can be in a completely cured product (C stage) state after the curing treatment, It can be formed from a second adhesive.
  • the first film 3a and the second film 3b are a thermosetting resin (hereinafter sometimes simply referred to as “(a) component”) and a high molecular weight component (hereinafter simply referred to as “(b) component”). And an inorganic filler (hereinafter sometimes simply referred to as “component (c)”).
  • the first film 3a and the second film 3b may be a coupling agent (hereinafter sometimes simply referred to as “(d) component”) and a curing accelerator (hereinafter simply referred to as “(e) component”). And may further contain.
  • Thermosetting resin (a) Thermosetting resin (a) The component is an epoxy resin (hereinafter sometimes simply referred to as “(a1) component”) and a phenol resin (hereinafter referred to as a curing agent for the epoxy resin) from the viewpoint of adhesiveness. It is preferable that it is simply included as “(a2) component”.
  • the component (a1) can be used without particular limitation as long as it has an epoxy group in the molecule.
  • the component (a1) for example, bisphenol A type epoxy resin, bisphenol F type epoxy resin, bisphenol S type epoxy resin, phenol novolac type epoxy resin, cresol novolac type epoxy resin, bisphenol A novolak type epoxy resin, bisphenol F novolak type Epoxy resin, stilbene type epoxy resin, triazine skeleton containing epoxy resin, fluorene skeleton containing epoxy resin, triphenol phenol methane type epoxy resin, biphenyl type epoxy resin, xylylene type epoxy resin, biphenyl aralkyl type epoxy resin, naphthalene type epoxy resin, many Examples thereof include diglycidyl ether compounds of polycyclic aromatics such as functional phenols and anthracene.
  • the component (a1) may be a cresol novolac type epoxy resin, a bisphenol F type epoxy resin, or a bisphenol A type epoxy resin from the viewpoints of film tackiness and flexibility.
  • the component (a1) may contain a liquid epoxy resin having a softening point of less than 30 ° C. or a normal temperature (25 ° C.).
  • a liquid epoxy resin having a softening point of less than 30 ° C. or a normal temperature (25 ° C.).
  • the component may contain an epoxy resin having a softening point of 50 ° C. or higher. In this case, it is preferable to use a material excellent in fluidity when softened.
  • the component (a2) can be used without particular limitation as long as it has a phenolic hydroxyl group in the molecule.
  • examples of the component (a2) include phenols such as phenol, cresol, resorcin, catechol, bisphenol A, bisphenol F, phenylphenol, aminophenol, and / or naphthols such as ⁇ -naphthol, ⁇ -naphthol, and dihydroxynaphthalene.
  • Phenols such as novolak-type phenolic resin, allylated bisphenol A, allylated bisphenol F, allylated naphthalene diol, phenol novolak, phenol and the like obtained by condensation or cocondensation with a compound having an aldehyde group such as formaldehyde under an acidic catalyst And / or phenol aralkyl resins and naphthol aralkyl resins synthesized from naphthols and dimethoxyparaxylene or bis (methoxymethyl) biphenyl. You may use these individually by 1 type or in combination of 2 or more types.
  • the component (a2) may be a phenol aralkyl resin or a naphthol aralkyl resin.
  • the hydroxyl equivalent of the component (a2) is preferably 70 g / eq or more, more preferably 70 to 300 g / eq.
  • the hydroxyl equivalent of the component (a2) is 70 g / eq or more, the storage elastic modulus of the film tends to be further improved, and when it is 300 g / eq or less, problems due to generation of foaming, outgas, etc. can be prevented. It becomes.
  • the softening point of the component (a2) is preferably 50 to 200 ° C, more preferably 60 to 150 ° C. When the softening point of the component (a2) is 200 ° C. or lower, it tends to be possible to suppress a decrease in compatibility with the epoxy resin.
  • the ratio of the epoxy equivalent of component (a1) to the hydroxyl equivalent of component (a2) is 0.30 / 0.70 from the viewpoint of curability. ⁇ 0.70 / 0.30, 0.35 / 0.65 ⁇ 0.65 / 0.35, 0.40 / 0.60 ⁇ 0.60 / 0.40, or 0.45 / 0.55 ⁇ It may be 0.55 / 0.45.
  • the equivalent ratio is 0.30 / 0.70 or more, more sufficient curability tends to be obtained.
  • the equivalent ratio is 0.70 / 0.30 or less, the viscosity can be prevented from becoming too high, and more sufficient fluidity can be obtained.
  • the content of the component (a) is 5 to 70 parts by mass, 10 to 65 parts by mass, or 20 to 60 parts by mass with respect to 100 parts by mass as the total mass of the components (a), (b), and (c). It may be a mass part.
  • the content of component (a) is 5 parts by mass or more, the elastic modulus tends to be improved by crosslinking.
  • the content of the component (a) is 70 parts by mass or less, the film handleability can be maintained, and the shear viscosity and elastic modulus tend to be in desired ranges.
  • the component (b) preferably has a glass transition temperature (Tg) of 50 ° C or lower.
  • Tg glass transition temperature
  • examples of the component (b) include acrylic resins, polyester resins, polyamide resins, polyimide resins, silicone resins, butadiene resins, acrylonitrile resins, and the like, and modified products thereof.
  • the component may contain an acrylic resin from a fluid viewpoint.
  • the acrylic resin means a polymer containing a structural unit derived from a (meth) acrylic acid ester.
  • the acrylic resin is preferably a polymer containing a structural unit derived from a (meth) acrylic acid ester having a crosslinkable functional group such as an epoxy group, an alcoholic or phenolic hydroxyl group, or a carboxyl group as a structural unit.
  • the acrylic resin may be an acrylic rubber such as a copolymer of (meth) acrylic acid ester and acrylonitrile.
  • the glass transition temperature (Tg) of the acrylic resin may be ⁇ 50 to 50 ° C. or ⁇ 30 to 30 ° C.
  • Tg of the acrylic resin is ⁇ 50 ° C. or more, the adhesive tends to be prevented from becoming too flexible. Thereby, it becomes easy to cut
  • the glass transition temperature (Tg) means a value measured using a DSC (thermal differential scanning calorimeter) (for example, “Thermo Plus 2” manufactured by Rigaku Corporation).
  • the weight average molecular weight (Mw) of the acrylic resin may be 100,000 to 3 million or 200,000 to 2 million.
  • Mw molecular weight
  • the film formability, strength in film form, flexibility, tackiness, etc. can be appropriately controlled, and the reflow property is excellent and the embedding property is improved. Can do.
  • the embedding property tends to be improved by using an acrylic resin having a low Mw (for example, less than 100,000) and increasing the amount of the acrylic resin having a low Mw (for example, less than 100,000).
  • Mw means a value measured by gel permeation chromatography (GPC) and converted using a standard polystyrene calibration curve.
  • acrylic resins examples include SG-70L, SG-708-6, WS-023 EK30, SG-280 EK23, HTR-860P-3CSP, HTR-860P-3CSP-30B (all Nagase ChemteX Corporation) Company-made).
  • the content of the component (b) is 5 to 95 parts by mass, 5 to 85 parts by mass, or 10 to 80 with respect to 100 parts by mass of the total mass of the components (a), (b), and (c). It may be a mass part.
  • the content of the component (b) is 5 parts by mass or more, the shear viscosity of the film at 80 ° C. tends to increase.
  • Inorganic filler examples include aluminum hydroxide, magnesium hydroxide, calcium carbonate, magnesium carbonate, calcium silicate, magnesium silicate, calcium oxide, magnesium oxide, aluminum oxide, aluminum nitride, and boric acid.
  • Aluminum whisker, boron nitride, silica and the like can be mentioned. You may use these individually by 1 type or in combination of 2 or more types.
  • the component (c) may be silica from the viewpoint of adjusting the melt viscosity.
  • the average particle diameter of the component (c) may be 0.01 to 1 ⁇ m, 0.01 to 0.08 ⁇ m, or 0.03 to 0.06 ⁇ m from the viewpoint of fluidity.
  • an average particle diameter means the value calculated
  • the content of the component (c) is 3 to 80 parts by weight, 3 to 70 parts by weight, or 3 to 60 parts with respect to 100 parts by weight of the total weight of the components (a), (b), and (c). It may be a mass part. When the content of the component (c) is 3 parts by mass or more, the shear viscosity and the elastic modulus tend to be further improved.
  • the component (d) may be a silane coupling agent.
  • the silane coupling agent include ⁇ -ureidopropyltriethoxysilane, ⁇ -mercaptopropyltrimethoxysilane, 3-phenylaminopropyltrimethoxysilane, 3- (2-aminoethyl) aminopropyltrimethoxysilane, and the like. It is done. You may use these individually by 1 type or in combination of 2 or more types.
  • Curing accelerator (e) A component is not specifically limited, What is generally used can be used. Examples of the component (e) include imidazoles and derivatives thereof, organic phosphorus compounds, secondary amines, tertiary amines, quaternary ammonium salts, and the like. You may use these individually by 1 type or in combination of 2 or more types. Among these, from the viewpoint of reactivity, the component (e) may be imidazoles and derivatives thereof.
  • imidazoles examples include 2-methylimidazole, 1-benzyl-2-methylimidazole, 1-cyanoethyl-2-phenylimidazole, 1-cyanoethyl-2-methylimidazole, and the like. You may use these individually by 1 type or in combination of 2 or more types.
  • the first film 3a and the second film 3b may further contain other components.
  • other components include pigments, ion scavengers and antioxidants.
  • the content of the component (d), the component (e), and other components is 0 to 30 parts by mass with respect to 100 parts by mass of the total mass of the component (a), the component (b), and the component (c). It may be.
  • the first film 3a and the second film 3b are composed of a first adhesive varnish and a second component containing the components (a) to (c) and optionally the component (d) and the component (e) and a solvent.
  • the adhesive varnish can be prepared, these can be applied to a base film, and the solvent can be removed by heating and drying.
  • the first adhesive varnish and the second adhesive varnish can be prepared, for example, by mixing and kneading the components (a) to (e) in a solvent.
  • Mixing and kneading can be performed by using a normal stirrer, a raking machine, a three-roller, a ball mill, or other disperser and appropriately combining them.
  • the solvent for preparing the first adhesive varnish and the second adhesive varnish is not limited as long as it can uniformly dissolve, knead or disperse the above components, and a conventionally known one can be used. it can.
  • a solvent include ketone solvents such as acetone, methyl ethyl ketone, methyl isobutyl ketone, and cyclohexanone, dimethylformamide, dimethylacetamide, N-methylpyrrolidone, toluene, xylene, and the like. It is preferable to use methyl ethyl ketone, cyclohexanone, etc. in terms of fast drying speed and low price.
  • first adhesive varnish and the second adhesive varnish can be used, for example, knife coating method, roll coating method, spray coating method, gravure coating method. , Bar coating method, curtain coating method and the like.
  • the heating and drying conditions are not particularly limited as long as the solvent used is sufficiently volatilized, but can be performed by heating at 50 to 150 ° C. for 1 to 30 minutes.
  • the thickness of the first film 3a can be appropriately set according to the shape or size of the semiconductor device to be manufactured, but may be, for example, 1 to 200 ⁇ m.
  • the thickness of the first film 3a may be 3 to 150 ⁇ m, or 3 to 120 ⁇ m.
  • the thickness is preferably 20 to 120 ⁇ m, more preferably 30 to 80 ⁇ m.
  • it is preferably 40 to 200 ⁇ m, more preferably 60 to 150 ⁇ m.
  • a chip for example, a controller chip
  • the thickness of the second film 3b can be appropriately set according to the shape or dimensions of the semiconductor device to be manufactured, but may be, for example, 3 to 150 ⁇ m.
  • the thickness of the second film 3b may be 3 to 100 ⁇ m, or 3 to 50 ⁇ m.
  • the thickness is preferably 3 to 150 ⁇ m, more preferably 3 to 80 ⁇ m.
  • the thickness is preferably 3 to 150 ⁇ m, more preferably 3 to 100 ⁇ m.
  • a chip for example, a controller chip
  • the thickness of the adhesive film 130 composed of the first film 3a and the second film 3b can be appropriately set according to the shape or size of the semiconductor device to be manufactured, but is preferably 6 to 300 ⁇ m, more preferably 10 to The thickness is 250 ⁇ m, more preferably 20 to 200 ⁇ m. For FOW applications, the thickness is preferably 40 to 250 ⁇ m, more preferably 50 to 80 ⁇ m. In order to embed the wire, it is necessary to ensure a sufficient thickness so that the wire does not contact the chip. For FOD use, it is preferably 60 to 250 ⁇ m, more preferably 80 to 150 ⁇ m. In order to embed a chip (for example, a controller chip), depending on its thickness, it is important to ensure a sufficient thickness.
  • a chip for example, a controller chip
  • the shear viscosity at 80 ° C. of the first film 3a is not particularly limited as long as it differs from the shear viscosity at 80 ° C. of the second film 3b.
  • the shear viscosity at 80 ° C. of the first film 3a becomes higher than the shear viscosity at 80 ° C. of the second film 3b, the second film 3b buffers the warping stress, and the warpage of the semiconductor substrate moves to the upper surface of the chip. Propagation is difficult, and as a result, warpage of the semiconductor substrate tends to be suppressed.
  • the shear viscosity at 80 ° C. of the first film 3a is preferably lower than the shear viscosity at 80 ° C. of the second film 3b from the viewpoint of suppressing the warpage of the semiconductor substrate.
  • the shear viscosity at 80 ° C. of the first film 3a may be, for example, 500 to 30000 Pa ⁇ s.
  • the shear viscosity at 80 ° C. of the first film 3a may be 500 Pa ⁇ s or more, 700 Pa ⁇ s or more, or 1000 Pa ⁇ s or more.
  • the shear viscosity at 80 ° C. of the first film 3a is 500 Pa ⁇ s or more, the film tends to be more easily handled.
  • the shear viscosity at 80 ° C. of the first film 3a may be 30000 Pa ⁇ s or less, 20000 Pa ⁇ s or less, or 15000 Pa ⁇ s or less.
  • the shear viscosity at 80 ° C. of the first film 3a is 30000 Pa ⁇ s or less, the chip, the wire, or the semiconductor substrate can be sufficiently embedded, and the warp tends to be suppressed.
  • the second film 3b has a shear viscosity of 80 ° C. different from that of the first film 3a.
  • the shear viscosity at 80 ° C. of the second film 3b is 500 Pa ⁇ s or more.
  • the shear viscosity at 80 ° C. of the second film 3b is not particularly limited as long as such a condition is satisfied.
  • the 80 ° C. shear viscosity of the second film 3b is preferably higher than the 80 ° C. shear viscosity of the first film 3a from the viewpoint of further suppressing the warpage of the semiconductor substrate.
  • the shear viscosity at 80 ° C. of the second film 3b is 500 Pa ⁇ s or more, 3000 Pa ⁇ s or more, 5000 Pa ⁇ s or more, 10000 Pa ⁇ s or more, 15000 Pa ⁇ s or more, 20000 Pa ⁇ s or more, or 25000 Pa ⁇ s or more. It may be.
  • the shear viscosity at 80 ° C. of the second film 3b is 500 Pa ⁇ s or more, the handleability of the film tends to be more excellent.
  • the upper limit of the shear viscosity at 80 ° C. of the second film 3b is not particularly limited, but may be 100000 Pa ⁇ s or less, 70000 Pa ⁇ s or less, or 50000 Pa ⁇ s or less.
  • the shear viscosity at 80 ° C. of the first film 3a and the second film 3b can be measured by, for example, the method described in the examples.
  • the shear viscosity at 80 ° C. of the first film 3a and the second film 3b can be adjusted, for example, by changing the type and content of components contained in these films.
  • the storage elastic modulus at 150 ° C. after curing of the first film 3a is not particularly limited, but may be 1000 MPa or less, 500 MPa or less, or 300 MPa or less, or 10 MPa or more, 15 MPa or more, or 20 MPa or more.
  • the storage elastic modulus at 150 ° C. after the curing of the first film 3a is 1000 MPa or less, the chip, the wire, or the semiconductor substrate can be sufficiently embedded, and the warp tends to be suppressed.
  • the storage elastic modulus at 150 ° C. after the curing of the first film 3a is 10 MPa or more, the film is prevented from being crushed during crimping, and the protrusion from the end of the chip tends to be suppressed.
  • the storage elastic modulus at 150 ° C. after curing of the second film 3b may be 1000 MPa or less.
  • the storage elastic modulus at 150 ° C. after the curing of the second film 3b may be 500 MPa or less, 100 MPa or less, or 70 MPa or less, or 10 MPa or more, 15 MPa or more, or 20 MPa or more.
  • the warp of the semiconductor substrate or the chip tends to be more relaxed.
  • the storage elastic modulus in 150 degreeC after hardening of the 1st film 3a and the 2nd film 3b can be measured by the method as described in an Example, for example.
  • the adhesive film 130 is obtained by laminating the first film 3a and the second film 3b using a roll laminator, a vacuum laminator, or the like under predetermined conditions (for example, room temperature (20 ° C.) or a heated state), and the base film 4a And 4b can be removed.
  • a roll laminator for example, room temperature (20 ° C.) or a heated state
  • predetermined conditions for example, room temperature (20 ° C.) or a heated state
  • the varnish of the first adhesive composition is applied to the base film, and the solvent is removed by heating and drying to produce the first film 3a, and then on the first film 3a.
  • the varnish of the second adhesive composition may be applied, the solvent may be removed by heating and drying to form a second adhesive film, and the base film may be removed.
  • the semiconductor wafer A is not particularly limited. For example, a thin semiconductor wafer of 10 to 100 ⁇ m can be used. Examples of the semiconductor wafer A include single crystal silicon, polycrystalline silicon, various ceramics, and compound semiconductors such as gallium arsenide.
  • the semiconductor wafer with an adhesive film 300 is diced using, for example, a blade B, and further subjected to washing and drying processes.
  • a dicer may be used instead of the blade B.
  • the blade B for example, a dicing blade NBC-ZH05 series and NBC-ZH series manufactured by DISCO Corporation can be used.
  • the dicer for example, a full automatic dicing saw 6000 series, a semi-automatic dicing saw 3000 series (both manufactured by DISCO Corporation), and the like can be used.
  • a wafer ring (not shown) is disposed around the semiconductor wafer A, and the semiconductor wafer A is fixed via an adhesive film.
  • the bonding surface of the semiconductor wafer A to the adhesive film may be a circuit surface or a surface opposite to the circuit surface.
  • the semiconductor chip size is preferably 20 mm or less on one side, that is, 20 mm ⁇ 20 mm or less.
  • the semiconductor chip size is more preferably 3 to 15 mm on one side, and further preferably 5 to 10 mm on one side.
  • the semiconductor substrate includes a chip or an equivalent.
  • UV irradiation process You may further provide the ultraviolet irradiation process which irradiates an ultraviolet-ray to the adhesive film 2 after a dicing process (FIG. 6). Thereby, a part or most of the adhesive film 2 can be polymerized and cured.
  • the illuminance of ultraviolet irradiation is not particularly limited, but is preferably 10 to 200 mW / cm 2 , more preferably 20 to 150 mW / cm 2 .
  • the irradiation amount of time the ultraviolet irradiation is not particularly limited, is preferably 50 ⁇ 400mJ / cm 2, more preferably 100 ⁇ 250mJ / cm 2.
  • the semiconductor chip a to be picked up is picked up by the suction collet 5, for example.
  • the semiconductor chip a to be picked up can also be pushed up from the lower surface of the base film 1 with, for example, a needle rod.
  • the adhesion force between the semiconductor chip a and the adhesive film 130 is higher than the adhesion force between the adhesive film 2 and the base film 1 and between the adhesive film 130 and the adhesive film 2. If it does, the adhesive film 130 will peel in the state adhering to the lower surface of the semiconductor chip a (refer FIG. 7).
  • the adhesive force between the adhesive film 2 and the first film 3a is smaller than the adhesive force between the semiconductor wafer A and the second film 3b.
  • the adhesive force has such a relationship, it is possible to prevent peeling between the first film 3a and the second film 3b when the chip is pushed up in the pickup process. If peeling occurs at the interface between the first film 3a and the second film 3b, the warp reduction effect tends not to be obtained.
  • the semiconductor chip a is placed on the semiconductor substrate 6 through the adhesive film 130 and heated.
  • the adhesive film 130 exhibits a sufficient adhesive force, and the bonding between the semiconductor chip a and the semiconductor substrate 6 through the cured adhesive film 130c is completed (FIG. 8).
  • the semiconductor substrate 6 include a semiconductor chip mounting support member and other semiconductor chips.
  • the crimping temperature is not particularly limited, but is preferably 50 to 200 ° C, more preferably 100 to 150 ° C.
  • the crimping time is not particularly limited, but is preferably 0.5 to 20 seconds, more preferably 1 to 5 seconds.
  • the pressure at the time of pressure bonding is not particularly limited, but is preferably 0.01 to 5 MPa, more preferably 0.02 to 2 MPa. In FOW and FOD applications, it is preferable to set the pressure bonding pressure higher to improve embedding.
  • a curing process for curing the adhesive film 130 is performed.
  • the temperature and time for curing the adhesive film 130 can be appropriately set according to the curing temperature of the components contained in the adhesive film.
  • the temperature may be changed stepwise, and one having such a mechanism may be used.
  • the temperature and time may be, for example, 40 to 300 ° C., for example, 30 to 300 minutes.
  • FIG. 9 is a schematic cross-sectional view showing an embodiment of a semiconductor device.
  • a semiconductor chip a which is a semiconductor chip with an adhesive film is pressure-bonded to the semiconductor substrate 10 via the adhesive film 130, and the semiconductor chip a is attached to the semiconductor substrate 10 via the wire 11. It is a semiconductor device formed by wire bonding connection.
  • the semiconductor chip a is bonded to the semiconductor substrate 10 by a cured product 130c of an adhesive film, and the connection terminal (not shown) of the semiconductor chip a is electrically connected to the external connection terminal (not shown) via the wire 11. Connected to each other and sealed with a sealing material 12.
  • FIG. 10 is a schematic cross-sectional view showing an embodiment of a semiconductor device.
  • the first semiconductor chip a 1 is bonded to the semiconductor substrate 10 on which the terminals 13 are formed by the cured product 130c 1 of the adhesive film, and the adhesive film is further cured on the first semiconductor chip a 1.
  • the second semiconductor chip a 2 are bonded by the object 130c 2.
  • the first semiconductor chip a 1 and the second semiconductor chip a 2 of connection terminals (not shown) is electrically connected to the circuit pattern 14 via the first wire 11a and the second wire 11b, sealed It is sealed with a stopper 12.
  • the above manufacturing method can be suitably used even when the semiconductor device has a structure in which a plurality of semiconductor chips are stacked and a part of the wire needs to be embedded.
  • FIG. 11 and 12 are diagrams showing a manufacturing procedure of the semiconductor device shown in FIG.
  • the first semiconductor chip a 1 with the adhesive film is bonded to the semiconductor substrate 10 by thermocompression bonding via the adhesive film 130.
  • the first semiconductor chip a 1 is filled with a cured product 130c 1 of the adhesive film.
  • other general manufacturing methods may be used.
  • the semiconductor substrate shown in FIG. 11 is obtained through a wire bonding process.
  • the second semiconductor chip a 2 with the adhesive film is bonded to the first semiconductor chip a 1 by thermocompression bonding via the adhesive film 130.
  • the semiconductor substrate shown in FIG. 12 is obtained.
  • the semiconductor device shown in FIG. 10 can be obtained through a wire bonding process and a sealing process.
  • FIG. 13 is a schematic cross-sectional view showing an embodiment of a semiconductor device.
  • the first semiconductor chip a 3 is connected to the semiconductor substrate 10 via the first wire 11 a by wire bonding, and an adhesive film is provided on the first semiconductor chip a 3.
  • the second semiconductor chip a 4 that is a semiconductor chip and is larger than the area of the first semiconductor chip a 3 is pressure-bonded via the adhesive film 130, whereby the first wire 11a and the first semiconductor chip a 3 Is a chip embedded type semiconductor device embedded in an adhesive film 130.
  • the second semiconductor chip a 4 is the sealing member 12 sealing Has been.
  • the first thickness of the semiconductor chip a 3 is 10 ⁇ 170 [mu] m
  • the thickness of the second semiconductor chip a 4 may be 20 ⁇ 400 [mu] m
  • Cured 130c 5 of the thickness is 20 ⁇ 200 [mu] m adhesive film, preferably 30 ⁇ 200 [mu] m, more preferably 40 ⁇ 150 [mu] m.
  • the first semiconductor chip a 3 embedded in the cured adhesive film 130 c 5 is a controller chip for driving the semiconductor device 500, for example.
  • the semiconductor substrate 10 may be, for example, an organic substrate having a circuit pattern 14 formed on the surface.
  • the first semiconductor chip a 3 is crimped over a cured product 130c 3 of the adhesive film on the circuit pattern 14, the second semiconductor chip a 4, a first semiconductor chip a 3 is not crimped
  • the circuit pattern 14, the first semiconductor chip a 3 , the first wire 11 a, and a part of the circuit pattern 14 are pressure-bonded to the semiconductor substrate 10 through a cured product 130 c 4 of an adhesive film.
  • a cured product 130 c 4 of an adhesive film is embedded in the uneven step due to the circuit pattern 14 on the semiconductor substrate 10.
  • the second semiconductor chip a 4 , the circuit pattern 14, and the second wire 11 b are sealed with a resin sealing material 12.
  • FIG. 14 to 18 are diagrams showing a manufacturing procedure of the semiconductor device shown in FIG. First, as shown in FIG. 14, on the circuit pattern 14 on the semiconductor substrate 10, a first semiconductor chip a 3 with adhesive film and pressed, the circuit pattern on the semiconductor substrate 10 through the first wire 11a electrically bonding connection 14 between the first semiconductor chip a 3. At this time, other general manufacturing methods may be used.
  • a second semiconductor chip a 4 with an adhesive film that is larger than the area of the first semiconductor chip a 3 is prepared.
  • the second semiconductor chip a 4 with the adhesive film is pressure-bonded to the semiconductor substrate 10 to which the first semiconductor chip a 3 is bonded and connected via the first wire 11a.
  • the second semiconductor chip a 4 with the adhesive film is placed so that the adhesive film covers the first semiconductor chip a 3 , and then, as shown in FIG. 17.
  • the second semiconductor chip a 4 is fixed to the semiconductor substrate 10 by pressing the second semiconductor chip a 4 to the semiconductor substrate 10.
  • the semiconductor substrate 10 and the second semiconductor chip a 4 connected second wire 11b electrically via a circuit pattern 14 the second wire 11b and the second the semiconductor chip a 4 is sealed with the sealing member 12.
  • the semiconductor device 500 can be manufactured through such steps.
  • EXA-830CRP (trade name, manufactured by DIC Corporation, bisphenol F type epoxy resin, epoxy equivalent: 159 g / eq) YDF-8170C (trade name, manufactured by Nippon Kasei Epoxy Manufacturing Co., Ltd., bisphenol F type epoxy resin, epoxy equivalent: 156, liquid at room temperature, weight molecular weight of about 310)
  • PSM-4326 (trade name, manufactured by Gunei Chemical Co., Ltd., phenol novolac resin, hydroxyl group equivalent: 105 g / eq)
  • HE-100C-30 (trade name, manufactured by Air Water Co., Ltd., phenylaralkyl type phenol resin, hydroxyl group equivalent: 174 g / eq, softening point 77 ° C.)
  • HTR-860P-3CSP (trade name, manufactured by Nagase ChemteX Corporation, acrylic rubber, weight average molecular weight: 800,000, Tg: 12 ° C.)
  • HTR-860P-3CSP-30DB (trade name, manufactured by Nagase ChemteX Corporation, acrylic rubber, weight average molecular weight: 300,000, Tg: 12 ° C.)
  • Films having thicknesses of 10 ⁇ m, 20 ⁇ m, 40 ⁇ m, 100 ⁇ m, 120 ⁇ m, and 130 ⁇ m were designated as films A-10, A-20, A-40, A-100, A-120, and A-130, respectively.
  • the shear viscosity was measured using ARES (manufactured by Rheometric Scientific).
  • the measurement sample was produced by bonding a die bonding film (manufactured by Hitachi Chemical Co., Ltd.) to film A so as to have a thickness of 160 ⁇ m or more at 70 ° C., and punching out to a diameter of 9 mm ⁇ .
  • the measurement was performed by raising the temperature at a rate of temperature increase of 5 ° C./min while giving a 5% strain to the measurement sample, and the value at 80 ° C. was defined as a shear viscosity of 80 ° C.
  • the shear viscosity of the film A at 80 ° C. was 2000 Pa ⁇ s.
  • the storage elastic modulus was measured using a dynamic viscoelasticity measuring device (Rheology Co., Ltd., trade name: DVE Leospectra).
  • the measurement sample was bonded to film A with a die bonding film (manufactured by Hitachi Chemical Co., Ltd.) so that the thickness would be 160 ⁇ m or more at 70 ° C., processed into a 4 mm wide strip, and a differential scanning calorimeter (DSC). It was produced by curing under the condition that the reaction rate was 100%.
  • the storage elastic modulus from room temperature to 270 ° C. was measured for the prepared measurement sample at a temperature rising rate of 10 ° C./min, and the value at 150 ° C. was defined as the storage elastic modulus at 150 ° C. after curing.
  • the storage elastic modulus at 150 ° C. after the film A was cured was 54 MPa.
  • a film B was obtained in the same manner as the production of the film A except that the adhesive varnish of the synthesis example A was changed to the adhesive varnish of the synthesis example B.
  • As this film B a film B-120 having a thickness of 120 ⁇ m was produced.
  • the shear viscosity at 80 ° C. of the film B was 1200 Pa ⁇ s, and the storage elastic modulus at 150 ° C. after the film B was cured was 31 MPa.
  • a film C was obtained in the same manner as the production of the film A except that the adhesive varnish of the synthesis example A was changed to the adhesive varnish of the synthesis example C.
  • this film C a film C-120 having a thickness of 120 ⁇ m was produced.
  • the shear viscosity at 80 ° C. of the film C was 9000 Pa ⁇ s, and the storage elastic modulus at 150 ° C. after the film C was cured was 160 MPa.
  • a film D was obtained in the same manner as the production of the film A except that the adhesive varnish of the synthesis example A was changed to the adhesive varnish of the synthesis example D.
  • films having different thicknesses were prepared by adjusting the coating amount of the adhesive varnish. Films having thicknesses of 10 ⁇ m, 20 ⁇ m, and 40 ⁇ m were designated as films D-10, D-20, and D-40, respectively.
  • the shear viscosity of the film D was 28000 Pa ⁇ s, and the storage elastic modulus at 150 ° C. after the film D was cured was 6 MPa.
  • a film E was obtained in the same manner as the production of the film A except that the adhesive varnish of the synthesis example A was changed to the adhesive varnish of the synthesis example E.
  • a film E-10 having a thickness of 10 ⁇ m was produced.
  • the shear viscosity at 80 ° C. of the film E was 7400 Pa ⁇ s, and the storage elastic modulus at 150 ° C. after the film E was cured was 760 MPa.
  • a film F was obtained in the same manner as the production of the film A except that the adhesive varnish of the synthesis example A was changed to the adhesive varnish of the synthesis example F.
  • a film F-20 having a thickness of 20 ⁇ m was produced.
  • the shear viscosity at 80 ° C. of the film F was 14200 Pa ⁇ s, and the storage elastic modulus at 150 ° C. after the film F was cured was 20 MPa.
  • Example 2-1 (Production of a semiconductor substrate provided with a first semiconductor chip)
  • a dicing-die bonding integrated adhesive film (adhesive film: thickness 10 ⁇ m, film E-10, adhesive film: thickness 110 ⁇ m, manufactured by Hitachi Chemical Co., Ltd.) provided with an adhesive film and an adhesive film was prepared.
  • a dicing sample was produced by laminating a 50 ⁇ m thick semiconductor wafer on the adhesive film at a stage temperature of 70 ° C.
  • the obtained dicing sample was cut using a full auto dicer DFD-6361 (manufactured by DISCO Corporation).
  • the cutting was performed by a step cut method using two blades, and dicing blades ZH05-SD3500-N1-xx-DD and ZH05-SD4000-N1-xx-BB (both manufactured by DISCO Corporation) were used.
  • the cutting conditions were a blade rotation speed of 4000 rpm, a cutting speed of 50 mm / sec, and a chip size of 3 mm ⁇ 3 mm.
  • the first stage cutting was performed so that the semiconductor wafer remained about 25 ⁇ m, and then the second stage cutting was performed so that the adhesive film was cut about 20 ⁇ m.
  • FIG. 19 is a view showing a push-up surface of the pickup collet.
  • the pick-up collet 20 used has, for example, a 3 mm ⁇ 3 mm push-up surface 21, and five push-up pins 22 are arranged at predetermined intervals along the diagonal line of the push-up surface 21. Yes.
  • the pickup conditions were a push-up speed of 20 mm / s and a push-up height of 450 ⁇ m.
  • the 1st semiconductor chip (controller chip) with an adhesive film was obtained.
  • a first semiconductor chip with an adhesive film was pressure-bonded to a glass epoxy substrate having a dummy circuit using a die bonder BESTTEM-D02 (manufactured by Canon Machinery). At this time, the position was adjusted so that the first semiconductor chip was at the center of the dummy circuit. In this way, a semiconductor substrate provided with the first semiconductor chip was obtained.
  • Example 1-1 (Production of second semiconductor chip with adhesive film) A dicing-die bonding integrated adhesive film of Example 1-1 was prepared, and a 100 ⁇ m-thick semiconductor wafer (silicon wafer) was placed on the surface of the second film opposite to the first film at a stage temperature of 70 ° C. was laminated to prepare a dicing sample.
  • the obtained dicing sample was cut using a full auto dicer DFD-6361 (manufactured by DISCO Corporation).
  • the cutting was performed by a step cut method using two blades, and dicing blades ZH05-SD2000-N1-xx-FF and ZH05-SD2000-N1-xx-EE (both manufactured by DISCO Corporation) were used.
  • Cutting conditions were a blade rotation speed of 4000 rpm, a cutting speed of 50 mm / s, and a chip size of 7 mm ⁇ 7 mm.
  • the first stage cutting was performed so that the semiconductor wafer remained about 50 ⁇ m, and then the second stage cutting was performed so that the adhesive film was cut about 20 ⁇ m.
  • a semiconductor chip was picked up by using a pickup collet.
  • a second semiconductor chip with an adhesive film was obtained in the same manner as the pickup conditions for the first semiconductor chip, except that it was pushed up using five push-up pins.
  • the obtained second semiconductor chip with an adhesive film was pressure-bonded to a semiconductor substrate provided with the first semiconductor chip. At this time, the position was adjusted so that the second semiconductor chip was at the center of the first semiconductor chip. Subsequently, the semiconductor substrate to which the second semiconductor chip is bonded is held in a pressure oven (manufactured by Chiyoda Electric Co., Ltd.) at a temperature of 70 ° C. for 2 hours and further held at a temperature of 150 ° C. for 30 minutes to form an adhesive film Was cured to produce the semiconductor device of Example 2-1.
  • a pressure oven manufactured by Chiyoda Electric Co., Ltd.
  • ⁇ War amount of second semiconductor chip> The surface of the semiconductor wafer of the second semiconductor chip of the semiconductor device of Example 2-1 was at room temperature (25 ° C.) with a laser displacement meter (manufactured by Keyence Corporation, LKG80, step 100 ⁇ m, measurement range length 7 mm, width 7 mm). It was measured. A three-dimensional average surface was calculated from the obtained displacement of each point and corrected so that the points at both ends were zero points. The amount of warpage of the second semiconductor chip was determined with the amount of warpage being the largest difference between the obtained zero point and the displacement obtained by measurement. The results are shown in Table 5.
  • Examples 2-2 to 2-6 Implemented in the same manner as in Example 2-1, except that the dicing-die bonding integrated adhesive film of Example 1-1 was changed to the dicing-die bonding integrated adhesive film of Examples 1-2 to 1-6.
  • the semiconductor devices of Examples 2-2 to 2-6 were respectively produced, and the warpage amount of the semiconductor substrate and the warpage amount of the second semiconductor chip were obtained. The results are shown in Table 5, Table 6, and Table 7.
  • Comparative Example 2-1 was the same as Example 2-1 except that the dicing-die bonding integrated adhesive film of Example 1-1 was changed to the dicing-die bonding integrated adhesive film of Comparative Example 1-1.
  • the semiconductor device was manufactured, and the warpage amount of the semiconductor substrate and the warpage amount of the second semiconductor chip were obtained. The results are shown in Tables 5 and 6.
  • the warpage of the semiconductor substrate was suppressed and the warpage of the second semiconductor chip was further suppressed as compared with the semiconductor device of Comparative Example 2-1. .
  • the amount of warp could be reduced as the shear viscosity of the first film was lower. This is presumably because the embeddability of the first semiconductor chip was improved, voids around this chip could be reduced, and warpage derived from voids could be suppressed.
  • Example 2-7 (Production of semiconductor chip with adhesive film) A dicing-die bonding integrated adhesive film of Example 1-7 was prepared, and a 100 ⁇ m-thick semiconductor wafer (silicon wafer) was placed on the surface of the second film opposite to the first film at a stage temperature of 70 ° C. was laminated to prepare a dicing sample.
  • the obtained dicing sample was cut using a full auto dicer DFD-6361 (manufactured by DISCO Corporation).
  • the cutting was performed by a step cut method using two blades, and dicing blades ZH05-SD2000-N1-xx-FF and ZH05-SD2000-N1-xx-EE (both manufactured by DISCO Corporation) were used.
  • the cutting conditions were a blade rotation speed of 4000 rpm, a cutting speed of 50 mm / s, and a chip size of 7 mm ⁇ 7 mm.
  • the first stage cutting was performed so that the semiconductor wafer remained about 50 ⁇ m, and then the second stage cutting was performed so that the adhesive film was cut about 20 ⁇ m.
  • a semiconductor chip was picked up by using a pickup collet.
  • a semiconductor chip with an adhesive film was obtained in the same manner as in the first semiconductor chip pickup condition except that the pins were pushed up using five pins.
  • the obtained semiconductor chip with an adhesive film was pressure-bonded to a glass epoxy substrate having a dummy circuit. At this time, the position was adjusted so that the semiconductor chip would be in the center of the dummy circuit. Subsequently, the glass epoxy substrate to which the semiconductor chip is bonded is held in a pressure oven (manufactured by Chiyoda Electric Co., Ltd.) at a temperature of 70 ° C. for 2 hours and further held at a temperature of 150 ° C. for 30 minutes to cure the adhesive film. Thus, the semiconductor device of Example 2-7 was manufactured.
  • the warpage amount of the semiconductor substrate was obtained by the same method as the warpage amount of the semiconductor substrate. The results are shown in Table 8.
  • Example 2-7 Example 2-7, except that the dicing-die bonding integrated adhesive film of Example 1-7 was changed to the dicing-die bonding integrated adhesive film of Example 1-8 and Comparative Examples 1-2, 1-3.
  • the semiconductor devices of Example 2-8 and Comparative Examples 2-2 and 2-3 were manufactured, and the warpage amount of the semiconductor substrate was obtained. The results are shown in Table 8.
  • the semiconductor device manufacturing method of the present invention can suppress warping of the semiconductor substrate.

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