WO2018076429A1 - 阵列基板及其制造方法、液晶面板及液晶显示屏 - Google Patents

阵列基板及其制造方法、液晶面板及液晶显示屏 Download PDF

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WO2018076429A1
WO2018076429A1 PCT/CN2016/106898 CN2016106898W WO2018076429A1 WO 2018076429 A1 WO2018076429 A1 WO 2018076429A1 CN 2016106898 W CN2016106898 W CN 2016106898W WO 2018076429 A1 WO2018076429 A1 WO 2018076429A1
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layer
insulating layer
common electrode
electrode layer
array substrate
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PCT/CN2016/106898
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English (en)
French (fr)
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张春倩
陈彩琴
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武汉华星光电技术有限公司
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Priority to US15/328,130 priority Critical patent/US10261372B2/en
Publication of WO2018076429A1 publication Critical patent/WO2018076429A1/zh

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    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
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    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136231—Active matrix addressed cells for reducing the number of lithographic steps
    • G02F1/136236—Active matrix addressed cells for reducing the number of lithographic steps using a grey or half tone lithographic process
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G02F1/136295—Materials; Compositions; Manufacture processes
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2201/00—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
    • G02F2201/12—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode
    • G02F2201/121—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode common or background

Definitions

  • the present invention relates to the field of manufacturing liquid crystal panels, and more particularly to an array substrate manufacturing method, an array substrate, a liquid crystal panel, and a liquid crystal display.
  • Liquid crystal display is a commonly used technique in modern displays. With the development of thinner mobile phones, flat panels, lightweight, cost control, etc., it is particularly important to integrate the original external touch panel components with the liquid crystal panels. However, due to the introduction of electrodes and the addition of an insulating layer, the embedded touch reduces the construction space, causing various display problems due to leakage.
  • the invention provides an array substrate manufacturing method and an array substrate, which reduces the thickness of the insulating layer between the two common electrodes, and increases the capacitance to reduce various display problems caused by leakage.
  • the invention also provides a liquid crystal panel and a liquid crystal display.
  • the method for fabricating an array substrate includes providing a substrate substrate,
  • a second common electrode layer is formed on the second insulating layer on which the via holes are formed.
  • the step of forming a via hole on the second insulating layer comprises: forming a photoresist layer
  • the second insulating layer is etched according to the second common electrode pattern to form the via hole corresponding to the hollow region on the second insulating layer.
  • step of forming a second common electrode layer on the second insulating layer formed with vias comprising depositing the electrode layer on the photoresist layer
  • the electrode layer portion other than the via hole is removed to form a second common electrode layer.
  • the step of removing the electrode layer portion other than the via hole to form the second common electrode layer includes etching the electrode layer portion other than the via hole; and removing the photoresist layer.
  • the step of removing the electrode layer portion other than the via hole to form the second common electrode comprises removing the photoresist layer using an acetone agent.
  • the step of removing the electrode layer portion other than the via hole to form the second common electrode is to remove the photoresist layer and the electrode layer portion on the photoresist layer by a half tone mask.
  • the substrate includes a glass substrate, a gate sequentially formed on a surface of the glass substrate, a gate insulating layer, a thin film transistor switch and an insulating layer, and a first metal line, wherein the flat layer covers the first metal line layer And exposing the base substrate of the first metal line.
  • the array substrate of the present application includes a base substrate, a flat layer sequentially formed on the base substrate, a first common electrode layer, a first insulating layer, a metal wire layer, and a cover of the second metal layer and the a second insulating layer of the first insulating layer; a plurality of via holes are formed on the second insulating layer; and the plurality of via holes are filled with an electrode material to form a second common electrode layer.
  • the liquid crystal panel of the present application includes the array substrate, the color filter substrate, and a liquid crystal layer sandwiched between the array substrate and the color filter substrate.
  • the liquid crystal display panel described in the present application includes the liquid crystal panel.
  • the second common electrode layer is embedded in the via hole of the second insulating layer, and the storage capacitor and the parasitic capacitance are added to reduce various display problems of the liquid crystal panel caused by leakage.
  • FIG. 1 is a flow chart of a method of fabricating an array substrate of the present invention.
  • FIG. 2 is a schematic flow chart showing the specific steps of step 5 in the method for manufacturing the array substrate shown in FIG. 1.
  • FIG. 3 is a schematic view of an array substrate of the present invention.
  • FIG. 4 is a schematic view of a liquid crystal panel of the present invention.
  • the present invention provides an array substrate 100 and a liquid crystal panel 200 .
  • the array substrate includes a base substrate 10, a flat layer 20, a first common electrode layer 21, a first insulating layer 22, a metal wire layer 23, and a second metal layer, which are sequentially formed on the base substrate 10.
  • the liquid crystal panel 200 is used in a liquid crystal display.
  • the liquid crystal panel 200 includes the array substrate 100, the color filter substrate 210, and the liquid crystal layer 220 sandwiched between the array substrate 100 and the color filter substrate 210.
  • the second common electrode layer 25 is deposited in the via hole of the second insulating layer 24, which reduces the overall thickness of the first insulating layer 22 and the second insulating layer 24, and increases Storage capacitors and parasitic capacitors can reduce various display problems of the LCD panel caused by leakage.
  • the present invention further provides a method for fabricating an array substrate, the method comprising:
  • Step S1 providing a substrate substrate 10,
  • Step S2 the flat substrate 20, the first common electrode layer 21 and the first insulating layer 22 are sequentially formed on the substrate;
  • Step S3 forming a metal line layer 23 on the first insulating layer 22;
  • Step S4 depositing a second insulating layer 24 on the second metal layer 23 and the first insulating layer 22;
  • Step S5 forming a plurality of vias 241 on the second insulating layer 24;
  • step S6 a second common electrode layer 25 is formed on the second insulating layer 24 on which the via holes 241 are formed.
  • step S5 forms a via hole on the second insulating layer 24.
  • step S51 a photoresist layer is formed on the second insulating layer.
  • Step S52 forming a second common electrode pattern by the photoresist layer by a patterning process, wherein the second common electrode pattern includes a plurality of hollow regions.
  • Step S53 etching the second insulating layer 24 according to the second common electrode pattern to form the via hole 241 corresponding to the hollow region on the second insulating layer 24.
  • step S6 forms a second common electrode layer 25 on the second insulating layer 24 formed with the via hole 241, including the step of depositing the electrode layer on the photoresist layer;
  • the step of removing the electrode layer portion other than the via hole 241 to form the second common electrode layer includes etching the electrode layer portion other than the via hole 241; the portion is mainly used for removing the excess electrode layer
  • the electrode material in the via hole is further retained, and the second common electrode layer 25 is removed, and then the photoresist layer is removed, thereby exposing the second common electrode layer 25.
  • the above step removes the electrode layer portion other than the via hole 241 to form the second common electrode layer, including removing the photoresist layer using an acetone agent. Since the electrode is formed on the photoresist layer and the photoresist layer is formed in the via hole, the photoresist layer can be removed to directly remove the electrode layer portion other than the via hole 241, thereby forming a second common electrode layer. 25.
  • the step of removing the electrode layer portion other than the via hole to form the second common electrode layer is to remove the photoresist layer and the electrode layer portion on the photoresist layer by a half tone mask.
  • the base substrate 10 mainly includes a glass substrate, a gate electrode sequentially formed on the surface of the glass substrate, a gate insulating layer, a thin film transistor switch and an insulating layer, and a first metal line 15 covering the flat layer
  • the first metal line layer and the base substrate exposing the first metal line, the specific position of the thin film transistor is set according to an array substrate design requirement, and the first metal line is a data line.
  • the array substrate of the present invention reduces the thickness of the insulating layer between the first common electrode layer 21 and the second common electrode layer 25 by embedding a second common electrode on the second insulating layer, thereby increasing the storage capacitance and
  • the parasitic capacitance can reduce various display problems of the liquid crystal panel caused by leakage.

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Abstract

一种阵列基板制造方法、液晶面板及液晶显示屏，包括提供一衬底基板（10），衬底基板（10）上依次形成平坦层（20）、第一公共电极层（21）及第一绝缘层（22）；在第一绝缘层（22）上形成金属线层（23）；在金属线层（23）及第一绝缘层（22）上沉积形成第二绝缘层（24）；在第二绝缘层（24）上形成数个过孔（241）；在形成有过孔（241）的第二绝缘层（24）上形成第二公共电极层（25）。

Description

阵列基板及其制造方法、液晶面板及液晶显示屏
本发明要求2016年10月26日递交的发明名称为“阵列基板及其制造方法、液晶面板及液晶显示屏”的申请号201610948550.5的在先申请优先权，上述在先申请的内容以引入的方式并入本文本中。
技术领域
本发明涉及液晶面板的制造领域，尤其涉及一种阵列基板制造方法、阵列基板、液晶面板及液晶显示屏。
背景技术
液晶显示是现代显示中常用的技术。随着手机、平板薄型化，轻量化，成本管控等发展需求，使原本外置的触摸面板部件与液晶面板实现一体化，便显得尤为重要。但嵌入式触控由于引入电极和增加绝缘层等，导致构造空间减小，造成各种由于漏电的显示问题。
发明内容
本发明提供一种阵列基板制造方法及阵列基板，减小两层公共电极之间绝缘层厚度，增加了电容量可以减小漏电造成的各种显示问题。
本发明还提供一液晶面板及液晶显示屏。
所述阵列基板制造方法，包括提供一衬底基板，
所述衬底基板上依次形成平坦层、第一公共电极层及第一绝缘层；
在所述第一绝缘层上形成金属线层；
在所述第二金属层及所述第一绝缘层上沉积形成第二绝缘层；
在所述第二绝缘层上形成数个过孔；
在形成有过孔的第二绝缘层上形成第二公共电极层。
其中，步骤在所述第二绝缘层上形成过孔，包括，形成光阻层，
通过图案化工艺所述光阻层形成第二公共电极层图案，其中第二公共电极图案包括数个镂空区；
根据所述第二公共电极图案蚀刻所述第二绝缘层，以在所述第二绝缘层上与所述镂空区对应位于形成所述过孔。
其中，步骤在形成有过孔的第二绝缘层上形成第二公共电极层，包括，在所述光阻层上沉积所述电极层，
去除所述过孔以外的电极层部分以形成第二公共电极层。
其中，步骤去除所述过孔以外的电极层部分以形成第二公共电极层包括，蚀刻所述过孔以外的电极层部分；去除所述光阻层。
其中，步骤去除所述过孔以外的电极层部分以形成第二公共电极，包括使用丙酮药剂去除所述光阻层。
其中，步骤去除所述过孔以外的电极层部分以形成第二公共电极，是通过half tone光罩去除所述光阻层及位于光阻层上的电极层部分。
其中，所述衬底基板包括玻璃基板、依次形成于玻璃基板表面的栅极、栅极绝缘层、薄膜晶体管开关及绝缘层及第一金属线，所述平坦层覆盖所述第一金属线层及露出所述第一金属线的所述衬底基板。
本申请所述的阵列基板包括衬底基板，依次形成于所述衬底基板上的平坦层、第一公共电极层、第一绝缘层、金属线层，以及覆盖所述第二金属层及所述第一绝缘层的第二绝缘层；所述第二绝缘层上形成有数个过孔；数个所述过孔内填充有电极材料以形成第二公共电极层。
本申请所述液晶面板，其包括所述的阵列基板、彩膜基板及夹持于所述阵列基板及彩膜基板之间的液晶层。
本申请所述的液晶显示屏，其包括所述的液晶面板。
本发明所述的阵列基板中第二公共电极层嵌设于所述第二绝缘层的过孔内，增加了存储电容和寄生电容可以减小漏电造成的液晶面板各种显示问题。
附图说明
为了更清楚地说明本发明实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为本发明的阵列基板制造方法的流程图。
图2为图1所示的阵列基板制造方法中步骤5的具体步骤流程示意图。
图3为本发明的阵列基板的示意图。
图4为本发明液晶面板的示意图。
具体实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
请参阅图3，本发明提供一种阵列基板100及液晶面板200。所述阵列基板包括衬底基板10，依次形成于所述衬底基板10上的平坦层20、第一公共电极层21、第一绝缘层22、金属线层23，以及覆盖所述第二金属层23及所述第一绝缘层22的第二绝缘层24；所述第二绝缘层24上形成有数个过孔241；数个所述过孔241内填充有电极材料以形成第二公共电极层25。
请参阅图4，所述液晶面板200用于一液晶显示屏中。所述液晶面板200包括所述的阵列基板100、彩膜基板210及夹持于所述阵列基板100及彩膜基板210之间的液晶层220。
本发明所述的阵列基板中第二公共电极层25沉淀于所述第二绝缘层24的过孔内，减小了所述第一绝缘层22与第二绝缘层24的整体厚度，增加了存储电容和寄生电容可以减小漏电造成的液晶面板各种显示问题。
请参阅图1，本发明还提供一种阵列基板制造方法，所述方法包括：
步骤S1，提供一衬底基板10，
步骤S2，所述衬底基板上依次形成平坦层20、第一公共电极层21及第一绝缘层22；
步骤S3，在所述第一绝缘层22上形成金属线层23；
步骤S4，在所述第二金属层23及所述第一绝缘层22上沉积形成第二绝缘层24；
步骤S5，在所述第二绝缘层24上形成数个过孔241；
步骤S6，在形成有过孔241的第二绝缘层24上形成第二公共电极层25。
请参阅图2，进一步的，步骤S5在所述第二绝缘层24上形成过孔，包括，步骤S51，在第二绝缘层上形成光阻层。
步骤S52，通过图案化工艺所述光阻层形成第二公共电极图案，其中第二公共电极图案包括数个镂空区。
步骤S53，根据所述第二公共电极图案蚀刻所述第二绝缘层24，以在所述第二绝缘层24上与所述镂空区对应位于形成所述过孔241。
本实施例中，步骤S6在形成有过孔241的第二绝缘层24上形成第二公共电极层25，包括，步骤在所述光阻层上沉积所述电极层；
以及，步骤去除所述过孔241以外的电极层部分以形成第二公共电极25。
本发明一实施例中，上述步骤去除所述过孔241以外的电极层部分以形成第二公共电极层包括，蚀刻所述过孔241以外的电极层部分；本部主要用于去除多余的电极层已保留过孔内的电极材料，进而第二公共电极层25，然后再去除所述光阻层，进而露出第二公共电极层25。
本发明另一实施例中，上述步骤去除所述过孔241以外的电极层部分以形成第二公共电极层，包括使用丙酮药剂去除所述光阻层。因为电极蹭形成于所述光阻层上以及透过光阻层形成于过孔内，那么去除光阻层就可以直接去除过孔241以外的所述电极层部分，进而形成第二公共电极层25。
本发明第三实施例中，步骤去除所述过孔以外的电极层部分以形成第二公共电极层，是通过half tone光罩去除所述光阻层及位于光阻层上的电极层部分。
本实施例中，所述衬底基板10主要包括玻璃基板、依次形成于玻璃基板表面的栅极、栅极绝缘层、薄膜晶体管开关及绝缘层及第一金属线15，所述平坦层覆盖所述第一金属线层及露出所述第一金属线的所述衬底基板，薄膜晶体管具体位置根据阵列基板设计需求而设定，所述第一金属线为数据线。
本发明所述的阵列基板通过在第二绝缘层上嵌入形成第二公共电极，减小了第一公共电极层21与第二公共电极层25之间的绝缘层的厚度，增加了存储电容和寄生电容可以减小漏电造成的液晶面板各种显示问题。
以上所揭露的仅为本发明一种较佳实施例而已，当然不能以此来限定本发 明之权利范围，本领域普通技术人员可以理解实现上述实施例的全部或部分流程，并依本发明权利要求所作的等同变化，仍属于发明所涵盖的范围。

Claims (10)

  1. 一种阵列基板制造方法，其中，提供一衬底基板，
    所述衬底基板上依次形成平坦层、第一公共电极层及第一绝缘层；
    在所述第一绝缘层上形成金属线层；
    在所述第二金属层及所述第一绝缘层上沉积形成第二绝缘层；
    在所述第二绝缘层上形成数个过孔；
    在形成有过孔的第二绝缘层上形成第二公共电极层。
  2. 如权利要求1所述的阵列基板制造方法，其中，步骤在所述第二绝缘层上形成过孔，包括，形成光阻层，
    通过图案化工艺所述光阻层形成第二公共电极层图案，其中第二公共电极图案包括数个镂空区；
    根据所述第二公共电极图案蚀刻所述第二绝缘层，以在所述第二绝缘层上与所述镂空区对应位于形成所述过孔。
  3. 如权利要求2所述的阵列基板制造方法，其中，步骤在形成有过孔的第二绝缘层上形成第二公共电极层，包括，在所述光阻层上沉积所述电极层，
    去除所述过孔以外的电极层部分以形成第二公共电极层。
  4. 如权利要求3所述的阵列基板制造方法，其中，步骤去除所述过孔以外的电极层部分以形成第二公共电极层包括，蚀刻所述过孔以外的电极层部分；去除所述光阻层。
  5. 如权利要求3所述的阵列基板制造方法，其中，步骤去除所述过孔以外的电极层部分以形成第二公共电极层，包括使用丙酮药剂去除所述光阻层。
  6. 如权利要求3所述的阵列基板制造方法，其中，步骤去除所述过孔以外的电极层部分以形成第二公共电极层，是通过half tone光罩去除所述光阻层及位于光阻层上的电极层部分。
  7. 如权利要求1所述的阵列基板制造方法，其中，所述衬底基板
    包括玻璃基板、依次形成于玻璃基板表面的栅极、栅极绝缘层、薄膜晶体管开关及绝缘层及第一金属线，所述平坦层覆盖所述第一金属线层及露出所述第一金属线的所述衬底基板。
  8. 一种阵列基板，其中，包括衬底基板，依次形成于所述衬底基板上的平坦层、第一公共电极层、第一绝缘层、金属线层，以及覆盖所述第二金属层及所述第一绝缘层的第二绝缘层；所述第二绝缘层上形成有数个过孔；数个所述过孔内填充有电极材料以形成第二公共电极层。
  9. 一种液晶面板，其中，包括权利要求8所述的阵列基板、彩膜基板及夹持于所述阵列基板及彩膜基板之间的液晶层。
  10. 一种液晶显示屏，其中，包括权利要求9所述的液晶面板。
PCT/CN2016/106898 2016-10-26 2016-11-23 阵列基板及其制造方法、液晶面板及液晶显示屏 WO2018076429A1 (zh)

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