WO2018051487A1 - 表示装置及び表示装置基板 - Google Patents
表示装置及び表示装置基板 Download PDFInfo
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- WO2018051487A1 WO2018051487A1 PCT/JP2016/077445 JP2016077445W WO2018051487A1 WO 2018051487 A1 WO2018051487 A1 WO 2018051487A1 JP 2016077445 W JP2016077445 W JP 2016077445W WO 2018051487 A1 WO2018051487 A1 WO 2018051487A1
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- layer
- touch sensing
- oxide
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Images
Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
- G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
- G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
- G06F3/0412—Digitisers structurally integrated in a display
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
- G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
- G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
- G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
- G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
- G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01B—CABLES; CONDUCTORS; INSULATORS; SELECTION OF MATERIALS FOR THEIR CONDUCTIVE, INSULATING OR DIELECTRIC PROPERTIES
- H01B1/00—Conductors or conductive bodies characterised by the conductive materials; Selection of materials as conductors
- H01B1/06—Conductors or conductive bodies characterised by the conductive materials; Selection of materials as conductors mainly consisting of other non-metallic substances
- H01B1/08—Conductors or conductive bodies characterised by the conductive materials; Selection of materials as conductors mainly consisting of other non-metallic substances oxides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
- H01L27/153—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars
- H01L27/156—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/30—Devices specially adapted for multicolour light emission
- H10K59/38—Devices specially adapted for multicolour light emission comprising colour filters or colour changing media [CCM]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/40—OLEDs integrated with touch screens
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/80—Constructional details
- H10K59/8791—Arrangements for improving contrast, e.g. preventing reflection of ambient light
- H10K59/8792—Arrangements for improving contrast, e.g. preventing reflection of ambient light comprising light absorbing layers, e.g. black layers
Definitions
- the present invention relates to a display device and a display device substrate provided with a light emitting layer including organic electroluminescence or LEDs, and more particularly to a display device provided with a touch sensing function and a display device substrate used for the display device.
- an organic electroluminescent display (hereinafter referred to as an organic EL) can contribute to thinning of such a mobile device.
- an organic EL substrate provided with a white organic EL and a counter substrate provided with a color filter for realizing color display and disposed opposite to the organic EL substrate may be used.
- a red light emitting LED chip, a green light emitting LED chip, and a blue light emitting LED chip are mounted on a small light emitting unit, and a plurality of light emitting units are arranged in a matrix on an array substrate.
- a blue light emitting diode with high luminous efficiency is known as an LED, and a white LED in which a green phosphor and a red phosphor are disposed on a blue LED chip may be used.
- the display device is formed of aluminum or silver in order to improve the brightness when the display device is viewed from the observer side.
- the lower electrode (light reflective pixel electrode) is essential.
- the lower electrode is an electrode at a distant position when the display device is viewed from the observer side
- the upper electrode is an electrode at a position closer to the observer with respect to the lower electrode. .
- Patent Document 1 describes a touch sensing display including a thinned encapsulation layer between an organic light emitting diode, a capacitive touch sensor electrode, and a control line carrying a touch sensor signal.
- Claim 2 of Patent Document 1 discloses a conductive grid covered with a black matrix. The control line is formed on the common substrate as shown in claim 9 of patent document 1.
- control lines for carrying touch sensor signals are provided on a substrate on which a pixel array is formed, as shown in FIGS. 10, 39, paragraphs [0031] and [0032].
- the display control signal is carried on the line 640, and the sensor drive signal is also carried. Time division multiplexing has been proposed for pixel driving.
- the line 640 is presumed to be the control line, it is not specified in Patent Document 1.
- the common substrate described in claim 9 in Patent Document 1 is not clearly described in the specification as specifying “the common substrate”.
- paragraph [0036] of Patent Document 1 describes that the touch sensor line is formed of a metal such as copper or gold.
- copper group elements such as copper, silver and gold do not have practical adhesion to glass substrates and plastic films, and in Patent Document 1, adhesion to metals such as copper, silver and gold to substrates No practical technology has been proposed to improve the quality.
- Patent Document 2 relates to a liquid crystal display device in which a touch sensor and a display device are integrated.
- Patent Document 2 discloses a technique for forming a touch screen on an array substrate using a bypass tunnel or the like.
- signal lines gate lines and source lines
- pixel electrodes connected to polysilicon transistors but also sense regions related to touch sensing, drive-sense ground regions, bypass tunnels, etc. are arranged on the same array substrate. It is necessary to arrange on top. For this reason, in Patent Document 3, the array structure is extremely complicated, the parasitic capacitance is likely to be increased, and the load in the manufacturing process of the array substrate is large.
- Patent Document 3 discloses a technique for forming an electrode used in a display device such as an organic EL device. In paragraph [0008] of Patent Document 3, it is described that the adhesion of a pure Ag film or an Ag alloy film is insufficient and the practicability is lacking.
- Patent Document 4 discloses that an aluminum-containing metal layer is used as a lower electrode of an organic EL element.
- Patent Document 5 discloses a black substrate provided with a touch sensing wiring having a configuration in which a copper-containing layer is sandwiched between indium-containing layers on a black layer, and a method of manufacturing the black substrate.
- Patent Document 5 does not consider a display device having a light emitting layer such as an organic EL or an LED, and does not disclose a technical problem in a display device to which an array substrate having a light emitting layer is applied.
- the structure which performs touch sensing by two sets of black wiring is not disclosed in the black board
- Patent Document 6 discloses a touch panel in which a black layer and a metal layer are stacked as a wiring structure.
- a display device provided with a light emitting layer and an active element made of an oxide semiconductor is not disclosed.
- a configuration in which a copper alloy or a silver alloy is sandwiched by conductive metal oxides is not disclosed.
- aluminum or an aluminum alloy is often used as a material of a reflective electrode (hereinafter sometimes referred to as a lower electrode).
- a reflective electrode hereinafter sometimes referred to as a lower electrode.
- aluminum or an aluminum alloy as a material of an electrode or wiring which constitutes a thin film transistor for driving a light emitting layer such as a light emitting diode or a material of a touch sensing wiring.
- aluminum and aluminum alloys have inferior conductivity as compared to silver and silver alloys, and copper and copper alloys.
- silver or an alloy is excellent in light reflectivity.
- silver and silver alloys, and copper and copper alloys have poor adhesion to substrates and the like.
- silver has the disadvantage that the migration and diffusion adversely affect the electrical properties of the component materials located around the silver component.
- the present invention has been made in view of the above problems, and silver or a silver alloy, copper or a copper alloy is used for an electrode or a wiring which constitutes a display device using an organic EL or a light emitting diode.
- a display device and a display device substrate that realize a good touch sensing function and high image quality.
- an electrode having a configuration in which a silver or silver alloy layer is sandwiched by a conductive metal oxide layer, a light emitting layer emitting light at a drive voltage applied from the electrode, and a gate
- An array substrate having a channel layer in contact with an insulating layer and made of an oxide semiconductor and driving the light emitting layer, a first surface facing the array substrate, and a first surface
- a transparent substrate having a second surface on the opposite side, and a configuration in which a first black layer and a first conductive layer are sequentially stacked in the observation direction from the second surface to the first surface, and It has a configuration in which a plurality of first touch sensing wires extending parallel to one another on two planes so as to be aligned in the first direction, and a second black layer and a second conductive layer are sequentially stacked in the observation direction
- the plurality of first touch sensors A plurality of second touch sensing wires, which are disposed between the single wires and the array substrate
- the first touch sensing wiring and the second touch sensing wiring are formed on the second surface, and the first touch sensing wiring and the second touch sensing An insulating layer may be provided between the wiring and the first touch sensing wiring and the second touch sensing wiring may be electrically insulated from each other.
- the first touch sensing wiring may be formed on the second surface, and the second touch sensing wiring may be formed on the first surface. Good.
- the first touch sensing wiring and the second touch sensing wiring are sequentially formed on the first surface in the observation direction, and the first touch sensing An insulating layer may be provided between the wiring and the second touch sensing wiring, and the first touch sensing wiring and the second touch sensing wiring may be electrically isolated from each other.
- the oxide semiconductor contains at least one metal selected from the group consisting of gallium, indium, zinc, tin, aluminum, germanium, and cerium. And a metal oxide containing at least one of antimony and bismuth.
- the gate insulating layer may be formed of a composite oxide containing cerium oxide.
- At least the gate wiring of the plurality of wirings electrically linked to the active element is composed of a silver layer, a silver alloy layer, a copper layer, and a copper alloy layer.
- the layer selected from the above group may have a three-layer structure sandwiched by the conductive metal oxide layer.
- the light emitting layer may include a light emitting diode layer.
- the light emitting layer may include an organic electroluminescent layer.
- a display device substrate according to a second aspect of the present invention is a display device substrate used in a display device according to the first aspect of the present invention, wherein the first conductive layer and the second conductive layer are a silver layer, silver A layer selected from the group consisting of an alloy layer, a copper layer, and a copper alloy layer has a three-layer structure in which a conductive metal oxide layer is sandwiched.
- the conductive metal oxide layer is selected from the group consisting of indium oxide, zinc oxide, antimony oxide, tin oxide, gallium oxide, and bismuth oxide. You may form by the complex oxide containing 2 or more types of metal oxides.
- the conductive metal oxide layer is formed of a composite oxide containing indium oxide, zinc oxide, and tin oxide, and indium contained in the composite oxide (
- the atomic ratio represented by In / (In + Zn + Sn) of In), zinc (Zn) and tin (Sn) may be larger than 0.8, and the atomic ratio of Zn / Sn may be larger than 1.
- the plurality of pixels may include a color filter.
- silver or a silver alloy having high conductivity, or copper or a copper alloy is used for an electrode or a wiring that constitutes a display device using an organic EL It can be used to realize even better touch sensing function and high image quality.
- a control part a picture signal control part, a system control part, and a touch sensing control part
- a display which constitute a display concerning a 1st embodiment of the present invention.
- FIG. 3 is a view showing a first touch sensing wiring, an insulating layer, and a second touch sensing wiring provided on the counter substrate according to the first embodiment of the present invention, and is an enlarged view showing a portion indicated by reference symbol W1 in FIG. FIG.
- touch drive wires touch detection wires
- touch wires touch wires
- touch electrodes touch signals
- touch sensing wiring A voltage applied to the touch sensing wiring in order to perform touch sensing drive is referred to as a touch drive voltage.
- the first black layer and the second black layer may be simply referred to as a black layer, and the first conductive layer and the second conductive layer may simply be referred to as a conductive layer.
- a voltage applied between an upper electrode and a lower electrode (hereinafter, the lower electrode may be referred to as a pixel electrode or a reflective electrode) to drive a light emitting layer (organic EL or LED) is referred to as a pixel drive voltage.
- the driving of the light emitting layer may be simply referred to as pixel driving.
- FIG. 1 is a block diagram showing a control unit and a display unit constituting a display device DSP1 according to a first embodiment of the present invention.
- the control unit 120 has a known configuration, and includes a video signal control unit 121 (first control unit), a touch sensing control unit 122 (second control unit), and a system control unit 123 (third control unit). Have.
- the video signal control unit 121 controls image display on the display unit 110. Specifically, the video signal control unit 121 is held by the upper electrode and the lower electrode by controlling a voltage (pixel drive voltage) supplied between the upper electrode and the lower electrode provided on the array substrate 200. The light emission (pixel drive) of the light emitting layer 92 is controlled. Such pixel driving is performed in each of the plurality of light emitting layers 92 provided in an array on the array substrate 200, and an image is displayed on the display unit 110.
- the touch sensing control unit 122 applies, for example, a touch sensing drive voltage to the second touch sensing wiring 2, and changes in capacitance generated between the first touch sensing wiring 1 and the second touch sensing wiring 2 described later. Detect and perform touch sensing.
- the system control unit 123 controls the video signal control unit 121 and the touch sensing control unit 122, and alternately performs pixel driving and detection of a change in capacitance due to touch driving. That is, the system control unit 123 can perform image display (pixel drive) and touch sensing drive in the display unit 110 by time division drive.
- the system control unit 123 may have the function of performing the above drive by making the frequencies of the pixel drive and the touch sensing drive different from one another, or make the drive voltages of the pixel drive and the touch sensing drive different from one another.
- the system control unit 123 has the function of In the system control unit 123 having such a function, for example, the frequency of noise from the external environment picked up by the display device DSP1 is detected, and a touch sensing drive frequency different from the noise frequency is selected. This can reduce the influence of noise. Further, such a system control unit 123 can also select a touch sensing drive frequency in accordance with the scanning speed of a pointer such as a finger or a pen.
- the display device DSP1 provided with the control unit 120 described above is a display device integrated with a touch sensing function, which has a touch sensing function and an image display function.
- the display device DSP1 is a capacitive touch sensing technology using two wiring groups arranged via an insulating layer, that is, a plurality of first touch sensing wires 1 and a plurality of second touch sensing wires 2.
- a pointer such as a finger contacts or approaches an opposing substrate (described later)
- a change in capacitance generated at the intersection of the first touch sensing wiring 1 and the second touch sensing wiring 2 is detected.
- the position of the pointer is detected.
- FIG. 2 is a view partially showing the display device DSP1 according to the first embodiment of the present invention, and a cross-sectional view taken along the line AA 'in FIG.
- the display device DSP1 according to the present embodiment includes a display device substrate according to an embodiment to be described later. Further, the “plan view” described below means a plane viewed from the direction in which the observer observes the display surface of the display device DSP1 (the plane of the display device substrate).
- the shape of the display unit of the display device according to the embodiment of the present invention, or the shape of the pixel opening defining the pixels, and the number of pixels constituting the display device are not limited.
- the direction along the short side of the display unit is defined as the X direction (first direction), and the direction along the long side of the display unit is defined as the Y direction (second direction).
- the thickness direction of the transparent substrate is defined as the Z direction, and the display device will be described.
- the X direction and the Y direction defined as described above are switched, that is, the X direction is defined as the second direction and the Y direction is defined as the first direction, and the display device is configured. You may
- the display device DSP 1 includes an opposing substrate 100 (display device substrate) and an array substrate 200 bonded so as to face the opposing substrate 100.
- an optical film having various optical functions, a cover glass for protecting the opposite substrate 100, and the like are omitted.
- the counter substrate 100 includes a transparent substrate 40 having a first surface F and a second surface S opposite to the first surface F.
- the first surface F is a surface facing the array substrate 200.
- the second surface S is a surface facing the observer.
- a substrate that can be used for the transparent substrate 40 may be any substrate that is transparent in the visible range, and a glass substrate, a ceramic substrate, a quartz substrate, a sapphire substrate, a plastic substrate, or the like can be used.
- a plurality of first touch sensing wires 1 and a plurality of second touch sensing wires 2 are provided above the second surface S of the transparent substrate 40.
- An insulating layer I (touch wiring insulating layer) is provided between the plurality of first touch sensing wirings 1 and the plurality of second touch sensing wirings 2, and the first touch sensing wiring 1 and the second touch sensing wiring are provided. 2 are electrically isolated from each other by the insulating layer I.
- FIG. 3 is a view showing the counter substrate 100 provided in the display device DSP1 according to the first embodiment of the present invention, and is a plan view of the display device DSP1 viewed from the viewer side P.
- FIG. 4 is a plan view showing a pattern of a first conductive layer constituting the first touch sensing wiring 1 provided on the counter substrate 100 according to the first embodiment of the present invention.
- FIG. 5 is a plan view showing a pattern of a second conductive layer constituting the second touch sensing wiring 2 provided on the counter substrate 100 according to the first embodiment of the present invention.
- the plurality of first touch sensing wires 1 are located above the second surface S, arranged in the X direction, and extend in the Y direction in parallel with each other.
- a first terminal TM1 is provided at an end of the first touch sensing wiring 1 in the Y direction.
- the plurality of first touch sensing wires 1 form a first wiring pattern.
- the plurality of second touch sensing wires 2 (second wiring patterns) are located between the plurality of first touch sensing wires 1 and the array substrate 200, and are located above the second surface S in the present embodiment. ing.
- the second touch sensing wiring 2 includes a sense wiring 2A and a lead wiring 2B.
- the sense wires 2A are arranged in the Y direction, and extend in the X direction in parallel with each other.
- the sense wire 2A is connected to the lead wire 2B outside the display unit 110.
- the lead wirings 2B are arranged in the X direction, and extend in the Y direction in parallel with each other.
- a second terminal TM2 is provided at the end of the lead-out wiring 2B in the Y direction.
- the plurality of second touch sensing wires 2 form a second wiring pattern.
- Each of the plurality of first touch sensing wires 1 and each of the plurality of second touch sensing wires 2 are electrically independent.
- the first touch sensing wiring 1 and the sense wiring 2A are orthogonal to each other in a plan view viewed from the observer side P.
- An area partitioned by the plurality of first touch sensing wires 1 and the plurality of sense wires 2A is a pixel PX.
- the plurality of pixels PX are arranged in a matrix in the display unit 110.
- the shape of the opening in the pixel PX may be a square pattern, a rectangular pattern, a parallelogram pattern, or the like.
- the arrangement of the openings in the pixel PX may be an arrangement with a countermeasure against moiré, or a zigzag arrangement.
- the plurality of first terminals TM1 and the plurality of second terminals TM2 are connected to the touch sensing control unit 122.
- the touch sensing control unit 122 is electrically connected to the first touch sensing wiring 1 and the second touch sensing wiring 2 through the first terminal TM1 and the second terminal TM2.
- the first touch sensing wiring 1 can be used as a touch detection electrode
- the second touch sensing wiring 2 can be used as a touch drive electrode.
- the touch sensing control unit 122 detects a change in the capacitance C1 generated between the first touch sensing wiring 1 and the second touch sensing wiring 2 as a touch signal.
- the role of the first touch sensing wiring 1 and the role of the second touch sensing wiring 2 may be interchanged.
- the first touch sensing wiring 1 may be used as a touch drive electrode
- the second touch sensing wiring 2 may be used as a touch detection electrode.
- the interconnections not used for touch sensing may be thinned except for the interconnections used for touch sensing. That is, thinning drive may be performed.
- the first touch sensing wiring 1 is driven to be thinned out.
- all the first touch sensing wires 1 are divided into a plurality of groups.
- the number of groups is less than the number of all first touch sensing wires 1. It is assumed that the number of wires forming one group is, for example, six.
- the number of wirings is six
- two wirings are selected (the number less than the number of all the wirings, two ⁇ six).
- touch sensing is performed using two selected wires, and the potentials of the remaining four wires are set to floating potentials. Since the display device DSP1 has a plurality of groups, it is possible to perform touch sensing for each group in which the wiring function is defined as described above. Similarly, the thinning drive may be performed in the second touch sensing wiring 2 as well.
- the pointer used for the touch is a finger and when it is a pen, the area and capacity of the touch or proximity pointer are different.
- the size of the pointer can adjust the number of wires to be thinned out.
- a pointer with a thin tip such as a pen or a needle tip, it is possible to use a matrix of high-density touch sensing wiring by reducing the number of wiring thinning.
- a matrix of high density touch sensing wiring can be used also at the time of fingerprint authentication.
- the number of wirings used for scanning or detection is reduced, so that the touch sensing speed can be increased.
- the number of wires forming one group is six, but for example, one wire is formed of 10 or more wires, and two wires selected in one group are selected. Touch sensing may be performed using this. That is, the number of wirings to be thinned (the number of wirings to be a floating potential) is increased, thereby decreasing the density of selected wirings used for touch sensing (the density of selected wirings with respect to the total number of wirings).
- the detection contributes to the reduction of power consumption and the improvement of touch detection accuracy.
- by reducing the number of wirings to be thinned out increasing the density of selection wirings used for touch sensing, and performing scanning or detection by the selection wirings, it can be used for, for example, fingerprint authentication or input by a touch pen.
- the thinned wiring (wiring not used for touch sensing) is in an electrically floating state, that is, the potential is in a floating state.
- the potential of the first touch sensing wiring 1 or the second touch sensing wiring 2 can also be floated in order to obtain a close distance between the surface of the display device DSP1 (the surface facing the viewer) and the pointer such as a finger. .
- one of the first touch sensing wiring 1 and the second touch sensing wiring 2 may be grounded and reset in order to improve the accuracy of the next detection signal (potential To 0V).
- a voltage that alternately inverts the phase of the touch drive voltage may be employed.
- Such means for improving the accuracy of the touch detection signal is also effective when the pointer is an active pointer (for example, a pointer in which an instruction signal for detection is generated from a pen-shaped pointer).
- high definition touch sensing may be performed by switching the detection electrode and the drive electrode by driving the switching element.
- the floating pattern in the above-described thinning drive can be switched so as to be electrically connected to the ground (ground to the housing).
- the signal wiring of an active element such as a TFT (thin film transistor) may be temporarily grounded to a ground (such as a housing).
- a touch wiring requiring a relatively long time to reset the capacitance detected by touch sensing control that is, a touch wiring having a large time constant (product of capacitance and resistance value) in touch sensing is used. is there.
- the wirings in the odd rows and the wirings in the even rows may be alternately used for touch sensing, and driving may be performed with the time constant adjusted.
- driving and detection may be performed by grouping a plurality of touch wirings.
- a drive method of batch detection which is also referred to as a self detection method in group units, may be adopted without adopting line sequential drive.
- parallel drive may be performed in group units.
- a difference detection method may be adopted in which the difference between detection signals of touch wires adjacent or adjacent to each other is taken.
- the touch sensing wiring located in the area near the frame portion (the area outside the display section 110, the area where image display is not performed) tends to have lower sensitivity of touch sensing than the touch sensing wiring located in the center of the display section 110. There is. Therefore, the sensitivity difference may be reduced by adjusting the width and shape of the touch sensing wiring.
- the touch sensing control unit 122 and the video signal control unit 121 can also control touch drive and pixel drive by time division drive.
- the frequency of touch drive may be adjusted according to the speed of touch input required.
- the touch drive frequency may be higher than the pixel drive frequency. It is desirable that the touch drive frequency be high because the touch timing by the pointer such as the finger is irregular and is short.
- a black display is inserted between a plurality of continuous white displays (when there is an output of a video signal) to display a video, and touch sensing is performed in a period of the black display to It is possible to perform touch sensing that is not affected by the noise involved.
- various touch drive frequencies can be selected arbitrarily.
- FIG. 6 is a view showing the first touch sensing wiring 1, the insulating layer I, and the second touch sensing wiring 2 provided on the counter substrate 100 according to the first embodiment of the present invention, and the reference symbol W1 in FIG. FIG. 8 is an enlarged cross-sectional view showing a portion indicated by the symbol.
- the direction in which the observer P observes the display device DSP1 that is, the direction from the second surface S of the transparent substrate 40 toward the first surface F is the observation direction OB (the Z direction shown in FIG. It is called the opposite direction).
- the plurality of first touch sensing wires 1 have a configuration in which the first black layer 16 and the first conductive layer 15 are sequentially stacked in the observation direction OB.
- the plurality of second touch sensing wires 2 have a configuration in which the second black layer 26 and the second conductive layer 25 are sequentially stacked in the observation direction OB.
- the second black layer 26 has the same configuration as the first black layer 16.
- the second conductive layer 25 has the same configuration as the first conductive layer 15. That is, the first touch sensing wiring 1 and the second touch sensing wiring 2 have the same layer structure.
- the insulating layer I is provided above the second surface S, and is disposed between the first touch sensing wiring 1 and the second touch sensing wiring 2.
- each of the first touch sensing wiring 1 and the second touch sensing wiring 2 includes a black layer
- the first touch sensing wiring 1 and the second touch sensing wiring 2 orthogonal to each other in a lattice form function as a black matrix, Improve display contrast.
- each of the 1st touch sensing wiring 1 and the 2nd touch sensing wiring 2 has a 2 layer laminated structure comprised by the black layer and the conductive layer, this invention limits this structure. do not do.
- Each of the first touch sensing wiring 1 and the second touch sensing wiring 2 may be formed in a stacked structure having the number of layers greater than two.
- a three-layer laminated structure in which a conductive layer is sandwiched between two black layers may be employed.
- the first conductive layer 15 can have, for example, a three-layer structure in which a copper alloy layer, which is a metal layer 20, is sandwiched between the first conductive metal oxide layer 21 and the second conductive metal oxide layer 22.
- the line widths of the black layer and the conductive layer that constitute each of the first touch sensing wiring 1 and the second touch sensing wiring 2 can be made substantially the same.
- dry etching is performed using the patterned conductive layer as a mask to obtain a line width in a cross-sectional view of the black layer and the conductive layer.
- the touch sensing interconnections can be formed such that is substantially the same.
- the technology described in JP-A-2015-004710 can be applied.
- the metal layer 20 constituting at least a part of the first conductive layer 15 and the second conductive layer 25 can be sandwiched between the conductive metal oxide layers 21 and 22.
- a three-layer structure formed of the first conductive metal oxide layer 21, the metal layer 20, and the second conductive metal oxide layer 22 Can be adopted.
- Metals different from copper or alloy layers of these metals may be further inserted.
- the first conductive metal oxide layer 21 and the second conductive metal oxide layer 22 for example, indium oxide, zinc oxide, antimony oxide, tin oxide, gallium oxide, and bismuth oxide are used.
- Complex oxides containing two or more metal oxides selected from the group consisting of By adjusting the composition of these metal oxides, it is possible to adjust the value of the work function, and it is possible to adjust the carrier release property when the organic EL is adopted as the light emitting layer.
- the amount of indium (In) contained in the first conductive metal oxide layer 21 and the second conductive metal oxide layer 22 needs to be more than 80 at%. That is, the conductive metal oxide layer is formed of a composite oxide containing indium oxide, zinc oxide, and tin oxide, and indium (In), zinc (Zn), and tin (Sn) In contained in the composite oxide.
- the atomic ratio represented by / (In + Zn + Sn) is greater than 0.8, and the atomic ratio of Zn / Sn is greater than 1.
- the amount of indium (In) is preferably greater than 80 at%. More preferably, the amount of indium (In) is greater than 90 at%.
- the amount of indium (In) is less than 80 at%, the specific resistance of the conductive metal oxide layer to be formed is undesirably increased.
- the amount of zinc (Zn) exceeds 20 at%, the alkali resistance of the conductive metal oxide (mixed oxide) is unfavorably lowered.
- atomic percent of metal elements in the mixed oxide count only of metal elements not counting oxygen elements
- Antimony oxide or bismuth oxide can be added to the conductive metal oxide layer because antimony metal or bismuth metal does not easily form a solid solution region with copper and suppresses the diffusion of copper in the laminated structure.
- the amount of zinc (Zn) needs to be larger than the amount of tin (Sn) .
- the content of tin exceeds the content of zinc, problems occur in the wet etching in the later step.
- the metal layer which is copper or copper alloy is more easily etched than the conductive metal oxide layer, and the first conductive metal oxide layer 21 and the metal layer 20, and the second conductive metal oxide layer 22 The width of the metal layer 20 easily becomes different.
- the first conductive metal oxide layer 21 and the second conductive metal oxide layer 22 contain tin oxide and zinc oxide
- the first conductive metal oxide layer 21 and the second conductive metal oxide layer 22 may be used.
- the amount of tin (Sn) contained is preferably in the range of 0.5 at% or more and 6 at% or less.
- the specific resistance of the ternary mixed oxide film becomes too large because the addition of zinc to the conductive metal oxide layer is also accompanied.
- the specific resistance is approximately 3 ⁇ 10 ⁇ 4 ⁇ cm or more as the specific resistance of the single layer film of the mixed oxide film. It can be contained within a small range of 5 ⁇ 10 -4 ⁇ cm or less.
- a small amount of other elements such as titanium, zirconium, magnesium, aluminum and germanium can also be added to the above mixed oxide.
- the specific resistance of the mixed oxide is not limited to the above range.
- the first conductive layer 15 and the second conductive layer 25 can be formed of a conductive material such as the metal layer 20.
- the metal layer 20 may be, for example, a copper layer, a copper alloy layer, a silver layer or a silver alloy layer, an aluminum alloy layer containing aluminum (aluminum-containing layer), gold, titanium, molybdenum, or an alloy of these. Can be adopted. Since nickel is a ferromagnetic material, although the deposition rate is lowered, it can be formed by vacuum deposition such as sputtering. Chromium has the disadvantage of environmental pollution and a large resistance value, but can be used as the material of the metal layer according to the present embodiment.
- the 1st conductive layer 15 which constitutes each of the 1st touch sensing wiring 1 and the 2nd touch sensing wiring 2, and the 2nd conductive layer 25
- 1.5 at% of calcium was added to silver Silver alloys can be used.
- the first conductive layer 15 and the second conductive layer 25 it is possible to use a three-layer structure in which the silver alloy layer is sandwiched by a composite oxide layer containing indium oxide, zinc oxide and tin oxide.
- magnesium or calcium added to copper or silver is selectively oxidized during heat treatment, for example, at the interface between the conductive metal oxide and the metal layer. It is easy to precipitate out.
- magnesium oxide or calcium oxide tends to precipitate on the surface or cross section of the copper alloy or silver alloy by oxidation. Such selective oxidation or precipitation can suppress migration of copper and silver, and as a result, the reliability of the three-layer laminated structure can be improved.
- the amount of the metal element added to the metal layer 20 is preferably 4 at% or less because the resistance value of the copper alloy or silver alloy is not greatly increased.
- a vacuum film formation method such as sputtering can be used as a vacuum film formation method such as sputtering can be used.
- the metal layer 20 When a copper alloy thin film, a silver alloy thin film, or an aluminum alloy thin film is employed as the metal layer 20, when the film thickness is 100 nm or more or 150 nm or more, visible light hardly transmits. Therefore, if the metal layer 20 according to the present embodiment has a film thickness of, for example, 100 nm to 300 nm, sufficient light shielding properties can be obtained. The film thickness of the metal layer 20 may exceed 300 nm. Note that, as described later, the material of the conductive layer can also be applied to wirings and electrodes provided on an array substrate described later.
- a structure of the wiring electrically linked to the active element for example, a laminated structure in which the metal layer is sandwiched by the conductive metal oxide layer is adopted as the structure of the gate electrode or the gate wiring. be able to.
- the metal layer 20 is a copper layer, a copper alloy layer, a silver layer or a silver alloy
- the above-mentioned conductive metal oxide layer is selected from indium oxide, zinc oxide, antimony oxide, gallium oxide, bismuth oxide and tin oxide It is desirable that it is a complex oxide containing two or more kinds of metal oxides.
- a copper layer, a copper alloy layer, or a silver layer or a silver alloy has low adhesion to a transparent resin layer or a glass substrate (transparent substrate) constituting a color filter. Therefore, when a copper layer, a copper alloy layer, or a silver layer or a silver alloy copper layer is applied as it is to a display device substrate, it is difficult to realize a practical display device substrate.
- the above-mentioned composite oxide has sufficient adhesion to color filters (colored patterns of multiple colors), black matrix BM (black layer), glass substrate (transparent substrate), etc., and copper layer
- the adhesion to copper and copper alloy layers is also sufficient. For this reason, when a copper alloy layer or a silver alloy layer is applied to a display device substrate using a composite oxide, it is possible to realize a practical display device substrate.
- a silver alloy in which 1.5 at% of calcium is added to silver can be used as the metal layer 20 used for the gate electrode and the gate wiring that constitute the thin film transistor.
- a three-layer structure in which the silver alloy layer is sandwiched by a composite oxide layer containing indium oxide, zinc oxide, and tin oxide can be used.
- Copper, copper alloys, silver, silver alloys, or oxides or nitrides of these generally do not have sufficient adhesion to a transparent substrate such as glass or a black matrix. Therefore, when the conductive metal oxide layer is not provided, peeling may occur at the interface between the touch sensing wiring and the transparent substrate such as glass or at the interface between the touch sensing wiring and the black layer.
- the electrostatic breakdown in the first touch sensing wiring 1 and the second touch sensing wiring 2 is a post-process such as laminating a color filter, a black matrix, etc. on a transparent substrate, and a process of bonding the display device substrate and the array substrate Static electricity is accumulated in the wiring pattern by the cleaning process or the like, and this is a phenomenon in which pattern breakage, disconnection or the like occurs due to electrostatic breakdown.
- Copper and copper alloys or silver and silver alloys have high conductivity and are preferable as wiring materials.
- a non-conductive copper oxide may be formed over time on the surface of the copper alloy, which may make electrical contact difficult.
- Silver and silver alloys tend to form sulfides and oxides.
- a stable ohmic contact can be realized by covering the copper alloy layer or the silver alloy layer with a composite oxide layer such as indium oxide, zinc oxide, antimony oxide, or tin oxide, and such a composite oxide In the case of using a layer, electrical mounting such as transfer in the third embodiment described later can be easily performed.
- Examples of the layer structure composed of the first conductive metal oxide layer 21, the metal layer 20, and the second conductive metal oxide layer 22 applicable to the embodiment of the present invention include the following modifications.
- ITO Indium Tin Oxide
- IZTO Indium Zinc Tin Oxide, where Z is zinc oxide
- conductive on a metal layer such as a copper alloy layer
- stacking these metal oxides are mentioned.
- the three-layer structure in which the metal layer is sandwiched by the conductive metal oxide layer has an advantage that continuous film formation can be performed by a vacuum film formation apparatus such as a sputtering apparatus.
- a composite oxide containing zinc oxide or gallium oxide can be used for the conductive metal oxide layer sandwiching the silver alloy.
- Such a laminated structure of a silver alloy layer and a conductive metal oxide layer can be patterned by etching once with an etchant of one solution by a known photolithography method.
- a composite oxide of indium oxide, gallium oxide, and antimony oxide can be applied as a conductive metal oxide layer as a light reflective pixel electrode of the organic EL described later.
- a composite oxide of indium oxide, gallium oxide and antimony oxide has a high work function.
- a laminated structure of a composite oxide of indium oxide, gallium oxide and antimony oxide and a silver alloy layer as an anode of an organic EL display device is suitable for a pixel electrode.
- the first conductive metal oxide layer 21 and the second conductive metal oxide layer 22 have a barrier property to copper and silver.
- a barrier property to copper and silver In a structure in which a copper wiring or a silver wiring is held by a conductive metal oxide, deterioration of the active element due to migration of copper or silver can be suppressed, which is preferable as a high conductive wiring for the active element.
- the first black layer 16 and the second black layer 26 function as a black matrix of the display device DSP1.
- the black layer is made of, for example, a colored resin in which a black coloring material is dispersed. It is difficult to obtain sufficient blackness or low reflectance of copper oxide or copper alloy oxide. For example, when the black layer is formed of a metal oxide, it has a light reflectance in the visible range of approximately 10% to 30%, and it appears that it is difficult to obtain a flat reflectance in the visible range and is colored. The reflectance of visible light at the interface between the black layer and the substrate such as glass and the transparent resin layer according to this embodiment is suppressed to about 3% or less, and high visibility can be obtained.
- the transparent resin includes an adhesive layer for affixing protective glass to a display device.
- carbon As the black coloring material, carbon, carbon nanotubes, carbon nanohorns, carbon nanobrush, or a mixture of a plurality of organic pigments can be applied.
- carbon is used as a main coloring material at a ratio of 51% by mass or more based on the total amount of the black coloring material.
- an organic pigment such as blue or red can be added to the black colorant and used. For example, it is possible to improve the reproducibility of the black layer in the photolithography process by adjusting the concentration of carbon contained in the photosensitive black coating solution as the starting material (reducing the carbon concentration).
- the range of the carbon concentration in this embodiment is set in the range of 4 to 50% by mass with respect to the total solid content including the resin, the curing agent and the pigment.
- the carbon concentration may exceed 50% by mass, but when the carbon concentration exceeds 50% by mass with respect to the total solid content, the coating film suitability tends to decrease.
- the carbon concentration is set to less than 4% by mass, sufficient black color can not be obtained, and the reflected light generated in the underlying metal layer located under the black layer is largely recognized and the visibility is reduced. is there.
- a black layer may be formed by using a mixture of a plurality of organic pigments for black color adjustment. Considering the refractive index (about 1.5) of the substrate such as glass and transparent resin, the reflectance of the black layer is 3% or less so that the reflectance at the interface between the black layer and those substrates is 3% or less It is set. In this case, it is desirable to adjust the content and type of the black colorant, the resin used for the colorant, and the film thickness.
- the reflectance at the interface between the substrate such as glass having a refractive index of about 1.5 and the black layer should be 3% or less in the visible light wavelength range. It is possible to realize low reflectance. For example, the reflected light resulting from the light emitted from the light emitting layer can be prevented from entering the active element and malfunctioning.
- the active element included in the array substrate has sensitivity in the visible light range, light reflected from the back surface of the conductive layer may be incident on the active element, which may cause the active element to malfunction.
- the black layer together on the opposite side (the back surface of the conductive layer) close to the display functional layer it is possible to prevent the malfunction of the active element due to the incident of the reflected light.
- the reflectance of the black layer be 3% or less.
- the refractive index of an acrylic resin and a liquid crystal material used for a color filter is in the range of approximately 1.5 to 1.7.
- a color filter having a plurality of red, green and blue colored pixels may be disposed on the counter substrate.
- the structure of the array substrate 200 constituting the display device DSP1 will be described. It is not necessary to use a transparent substrate as the substrate 45 of the array substrate 200.
- a transparent substrate for example, as a substrate applicable to the array substrate 200, a glass substrate, a ceramic substrate, a quartz substrate, a sapphire substrate, silicon, silicon carbide, silicon germanium, etc. A semiconductor substrate, a plastic substrate, etc. are mentioned.
- a planarization layer 96 formed on the layer 12 is sequentially stacked on the substrate 45.
- a contact hole 93 is formed in the planarization layer 96 at a position corresponding to the drain electrode 56 of the active element 68.
- banks 94 are formed on the planarization layer 96 at positions corresponding to the channel layers 58. In the region between the banks 94 adjacent to each other in the cross sectional view, that is, in the region surrounded by the bank 94 in the plan view, the upper surface of the planarizing layer 96, the inside of the contact hole 93 and the drain electrode 56 are covered.
- the lower electrode 88 (pixel electrode) is formed on the The lower electrode 88 may not be formed on the top surface of the bank 94.
- a hole injection layer 91 is formed to cover the lower electrode 88, the bank 94, and the planarization layer 96.
- the lower electrode 88 has a configuration in which a silver or silver alloy layer is sandwiched between conductive metal oxide layers, as described later.
- reference numeral 29 denotes a light emitting region formed of the lower electrode 88, the hole injection layer 91, the light emitting layer 92, and the upper electrode 87.
- the upper electrode 87 is, for example, a transparent conductive film in which a silver alloy layer with a film thickness of 11 nm is sandwiched by a composite oxide with a film thickness of 40 nm.
- the lower electrode 88 has a configuration in which a silver alloy layer with a film thickness of 250 nm is sandwiched by a composite oxide with a film thickness of 30 nm.
- the above-mentioned composite oxide layer is applied to the conductive metal oxide layer, the film thickness of the silver alloy layer is set, for example, in the range of 9 nm to 15 nm, and the silver alloy layer is held by the conductive metal oxide layer. It is preferable to use a three-layer laminated structure.
- a transparent conductive film with high transmittance can be realized.
- the above composite oxide layer is applied to the conductive metal oxide layer, and the film thickness of the silver alloy layer is set, for example, in the range of 100 nm to 250 nm or 300 nm or more.
- a three-layer laminated structure in which the silver alloy layer is held by the object layer may be adopted.
- a reflective electrode having high reflectance to visible light can be realized.
- an organic resin such as an acrylic resin, a polyimide resin, and a novolac phenol resin can be used.
- the bank 94 may further be laminated with an inorganic material such as silicon oxide or silicon oxynitride.
- an acrylic resin, a polyimide resin, a benzocyclobutene resin, a polyamide resin, or the like may be used.
- Low dielectric constant materials low-k materials can also be used. Note that in order to improve the visibility, any of the planarization layer 96, the sealing layer 109, and the substrate 45 may have a light scattering function. Alternatively, the light scattering layer may be formed above the substrate 45.
- FIG. 7 is an enlarged view partially showing the display device DSP1 according to the first embodiment of the present invention, and is a cross-sectional view taken along the line BB 'of FIG.
- FIG. 7 shows an example of the structure of a thin film transistor (TFT) having a top gate structure used as an active element 68 connected to the pixel electrode. Note that in FIG. 7, the opposite substrate 100 and the sealing layer 109 are omitted.
- TFT thin film transistor
- the active element 68 includes a channel layer 58, a drain electrode 56 connected to one end (first end, the left end of the channel layer 58 in FIG. 7) of the channel layer 58, and the other end (second end, FIG. 7 and the gate electrode 95 disposed opposite to the channel layer 58 with the third insulating layer 13 interposed therebetween.
- the channel layer 58 is in contact with the gate insulating layer, and is made of an oxide semiconductor.
- the active element 68 drives the light emitting layer.
- FIG. 7 shows a structure in which the channel layer 58, the drain electrode 56, and the source electrode 54 constituting the active element 68 are formed on the fourth insulating layer 14, the present invention limits such a structure. do not do.
- the active element 68 may be formed directly on the substrate 45 without providing the fourth insulating layer 14. Alternatively, a bottom gate thin film transistor may be applied.
- the source electrode 54 and the drain electrode 56 shown in FIG. 7 are simultaneously formed in the same process.
- the source electrode 54 and the drain electrode 56 have conductive layers of the same configuration.
- a three-layer structure of titanium / aluminum alloy / titanium, molybdenum / aluminum alloy / molybdenum, etc. can be adopted as the structure of the source electrode 54 and the drain electrode 56.
- the aluminum alloy is an aluminum-neodymium alloy.
- the third insulating layer 13 located below the gate electrode 95 may be an insulating layer having the same width as the gate electrode 95.
- dry etching using the gate electrode 95 as a mask is performed to remove the third insulating layer 13 around the gate electrode 95.
- an insulating layer having the same width as the gate electrode 95 can be formed.
- a technique for processing the insulating layer by dry etching using the gate electrode 95 as a mask is generally referred to as self alignment.
- Driving of the organic EL or LED by a thin film transistor including a channel layer formed of an oxide semiconductor is preferable to driving of a thin film transistor including a channel layer formed of a polysilicon semiconductor.
- an oxide semiconductor called IGZO is collectively formed by vacuum deposition such as sputtering. After the oxide semiconductor film is formed, heat treatment after pattern formation of a TFT or the like is performed collectively. Therefore, the variation in electrical characteristics (eg, Vth) related to the channel layer is extremely small. In order to suppress the variation of the luminance of the organic EL and the LED, it is necessary to suppress the variation of the Vth of the thin film transistor to a small range.
- the thin film transistor used in the display device provided with the organic EL and the LED is preferably a thin film transistor provided with a channel layer formed of an oxide semiconductor.
- a thin film transistor including a channel layer formed of an oxide semiconductor has extremely low leak current, the stability after inputting a scan signal or a video signal is high.
- a thin film transistor having a channel layer formed of a polysilicon semiconductor has a leakage current larger by two digits or more than a transistor of an oxide semiconductor. The low leakage current is preferable because it leads to highly accurate touch sensing.
- an oxide semiconductor called IGZO can be used as a material of the channel layer 58.
- IGZO an oxide semiconductor called IGZO
- a metal oxide containing at least one selected from the group consisting of gallium, indium, zinc, tin, aluminum, germanium, and cerium, at least antimony, and A material containing a metal oxide containing any of bismuth can be used.
- an oxide semiconductor containing indium oxide, gallium oxide, and zinc oxide is used.
- the material of the channel layer 58 formed of an oxide semiconductor may be single crystal, polycrystal, microcrystalline, a mixture of microcrystalline and amorphous, or amorphous.
- the thickness of the oxide semiconductor can be in the range of 2 nm to 50 nm.
- the channel layer 58 may be formed of polysilicon semiconductor.
- a structure in which two thin film transistors are stacked may be employed.
- a thin film transistor including a channel layer formed of a polysilicon semiconductor is used as the thin film transistor located in the lower layer.
- a thin film transistor including a channel layer formed of an oxide semiconductor is used as the thin film transistor located in the upper layer.
- the thin film transistors are arranged in a matrix in plan view. In this structure, high mobility can be obtained by the polysilicon semiconductor, and low leakage current can be realized by the oxide semiconductor. That is, both of the merit of the polysilicon semiconductor and the merit of the oxide semiconductor can be utilized together.
- An oxide semiconductor or a polysilicon semiconductor can be used, for example, in the configuration of a complementary transistor having ap / n junction, or can be used in the configuration of a single channel transistor having only an n-type junction.
- a stacked structure of the oxide semiconductor for example, a stacked structure in which an n-type oxide semiconductor and an n-type oxide semiconductor having different electrical characteristics from the n-type oxide semiconductor may be stacked may be employed.
- the stacked n-type oxide semiconductor may be composed of a plurality of layers. In the stacked n-type oxide semiconductor, the band gap of the base n-type semiconductor can be made different from the band gap of the n-type semiconductor located in the upper layer.
- the top surface of the channel layer may have, for example, a configuration covered with different oxide semiconductors.
- a stacked structure in which a microcrystalline (near-amorphous) oxide semiconductor is stacked over a crystalline n-type oxide semiconductor may be employed.
- microcrystalline refers to, for example, a microcrystalline oxide semiconductor film in which an amorphous oxide semiconductor film formed by a sputtering device is heat-treated in a range of 180 ° C. to 450 ° C.
- it refers to a microcrystalline oxide semiconductor film which is formed in a state where the substrate temperature at the time of film formation is set to about 200 ° C.
- the microcrystalline oxide semiconductor film is an oxide semiconductor film in which crystal grains of at least 1 nm to about 3 nm or larger than 3 nm can be observed by an observation method such as TEM.
- the melting point of indium oxide or gallium oxide as an oxide is high.
- the melting point of antimony oxide or bismuth oxide is 1000 ° C. or less, and the melting point of the oxide is low.
- the crystallization temperature of the composite oxide can be lowered by the effect of antimony oxide having a low melting point.
- an oxide semiconductor which can be easily crystallized from an amorphous state to a microcrystalline state can be provided.
- An oxide semiconductor can improve carrier mobility and reliability by enhancing its crystallinity.
- zinc oxide, gallium oxide, or a composite oxide rich in antimony oxide can be used because solubility is required in wet etching in a later step.
- Zn can be replaced with, for example, Sb (antimony) or Bi (bismuth).
- Sb antimony
- Bi bismuth
- the composition of the composite oxide is not limited to the above composition.
- Sn may be further added to the above complex oxide.
- a composite oxide including a quaternary composition including In 2 O 3 , Ga 2 O 3 , Sb 2 O 3 , and SnO 2 is obtained, or In 2 O 3 , Sb 2 O 3 , and A composite oxide containing a ternary composition containing SnO 2 is obtained, and the carrier concentration can be adjusted.
- In 2 O 3, Ga 2 O 3, Sb 2 O 3, Bi 2 O 3 and a different valence SnO 2 serves as carrier dopant.
- sputtering deposition is performed using a target obtained by adding tin oxide to a ternary metal oxide containing indium oxide, gallium oxide, and antimony oxide.
- a composite oxide with an improved carrier concentration can be formed into a film.
- a complex oxide in which the carrier concentration is improved by sputtering film formation using a target obtained by adding tin oxide to a ternary metal oxide of indium oxide, gallium oxide, and bismuth oxide A film can be formed.
- the film forming conditions of the above complex oxide oxygen gas used for introduced gas, substrate temperature, film forming rate, etc.
- annealing conditions after film formation and composition of complex oxide Desired carrier concentration and carrier mobility can be obtained by adjusting the like.
- increasing the composition ratio of indium oxide tends to improve the carrier mobility.
- crystallization of the composite oxide can be promoted by an annealing step of performing heat treatment at a temperature condition of 250 ° C. to 700 ° C., and carrier mobility of the composite oxide can be improved.
- one thin film transistor (active element) having a channel layer formed of an n-type oxide semiconductor (active element) and one thin film transistor having a channel layer formed of an n-type silicon semiconductor (active element) are provided in the same pixel.
- a light emitting layer such as an LED or an organic EL (OLED) can also be driven to take advantage of the characteristics of each channel layer of the thin film transistor.
- an LED or organic EL (OLED) is used as a light emitting layer
- an n-type polysilicon thin film transistor is adopted as a drive transistor for applying a voltage (current) to the light emitting layer, and an n type is used as a switching transistor for sending a signal to this polysilicon thin film transistor.
- An oxide semiconductor thin film transistor can be employed.
- the drain electrode 56 and the source electrode 54 can adopt the same structure.
- multiple conductive layers can be used for the drain electrode 56 and the source electrode 54.
- an electrode structure in which aluminum, copper, or an alloy layer thereof is sandwiched by molybdenum, titanium, tantalum, tungsten, a conductive metal oxide layer, or the like can be employed.
- the drain electrode 56 and the source electrode 54 may be formed first on the fourth insulating layer 14, and the channel layer 58 may be formed so as to be stacked on these two electrodes.
- the structure of the transistor may be a multi-gate structure such as a double gate structure.
- the mobility and the electron concentration of the semiconductor layer or the channel layer may be adjusted in the thickness direction.
- the semiconductor layer or the channel layer may have a stacked structure in which different oxide semiconductors are stacked.
- the channel length of the transistor determined by the minimum distance between the source electrode and the drain electrode can be 10 nm to 10 ⁇ m, for example, 20 nm to 0.5 ⁇ m.
- the third insulating layer 13 functions as a gate insulating layer.
- an insulating layer material hafnium silicate (HfSiOx), silicon oxide, aluminum oxide, silicon nitride, silicon oxynitride, aluminum oxynitride, aluminum oxynitride, zirconium oxide, gallium oxide, zinc oxide, hafnium oxide, cerium oxide, lanthanum oxide, Alternatively, an insulating layer or the like obtained by mixing these materials is employed.
- Cerium oxide has a high dielectric constant and a strong bond between cerium and oxygen atoms. Therefore, it is preferable to use a composite oxide containing cerium oxide as the gate insulating layer.
- Cerium oxide has oxidizing power. Cerium oxide is capable of storing and releasing oxygen. Therefore, oxygen can be supplied from the cerium oxide to the oxide semiconductor in a structure in which the oxide semiconductor and the cerium oxide are in contact with each other, oxygen vacancies in the oxide semiconductor can be avoided, and a stable oxide semiconductor (channel layer) can be obtained. It can be realized. In the configuration in which nitride is used for the gate insulating layer, the above-described effects do not appear.
- the material of the gate insulating layer may contain a lanthanoid metal silicate represented by cerium silicate (CeSiOx).
- CeSiOx cerium silicate
- it may contain lanthanum cerium composite oxide, and further, lanthanum cerium silicate.
- the structure of the third insulating layer 13 may be a single layer film, a mixed film, or a multilayer film.
- a mixed film or a multilayer film can be formed of a material selected from the above insulating layer materials.
- the film thickness of the third insulating layer 13 is, for example, a film thickness which can be selected from the range of 2 nm or more and 300 nm or less.
- the interface of the third insulating layer 13 in contact with the channel layer 58 can be formed in a state where a large amount of oxygen is contained (film formation atmosphere).
- a gate insulating layer containing cerium oxide can be formed in an introduced gas containing oxygen.
- the surface of the oxide semiconductor located below the gate insulating layer can be oxidized, and the degree of oxidation of the surface can be adjusted.
- the step of forming the gate insulating layer is performed before the step of the oxide semiconductor; therefore, it is difficult to control the degree of oxidation of the surface of the oxide semiconductor.
- oxidation of the surface of the oxide semiconductor can be promoted more than in the case of the bottom gate structure, and oxygen vacancies in the oxide semiconductor are less likely to occur.
- the plurality of insulating layers including the planarization layer 96, the second insulating layer 12, the third insulating layer 13, and the insulating layer (the fourth insulating layer 14) under the oxide semiconductor are formed using an inorganic insulating material or an organic insulating material Can be formed.
- an inorganic insulating material or an organic insulating material can be formed.
- silicon oxide, silicon oxynitride, or aluminum oxide can be used.
- As a structure of the insulating layer a single layer or a plurality of layers containing the above material can be used. A configuration in which a plurality of layers formed of different insulating materials are stacked may be employed.
- an acrylic resin, a polyimide resin, a benzocyclobutene resin, a polyamide resin, or the like may be used for part of the insulating layer.
- Low dielectric constant materials low-k materials
- a gate electrode 95 is disposed on the channel layer 58 via the third insulating layer 13.
- the gate electrode 95 may be formed to have the same layer structure by using the same material as the drain electrode 56 and the source electrode 54 described above.
- a structure of the gate electrode 95 a configuration in which a copper layer or a copper alloy layer is sandwiched between conductive metal oxides, or a configuration in which silver or a silver alloy is sandwiched between conductive metal oxides can be employed.
- FIG. 9 is an enlarged view partially showing an example of the gate electrode 95 constituting the display device DSP1 according to the first embodiment of the present invention.
- the metal layer 20 constituting the gate electrode 95 is formed of a copper layer, a copper alloy layer, or silver or a silver alloy.
- the metal layer 20 is sandwiched between conductive metal oxide layers 97 and 98.
- the conductive metal oxide constituting the conductive metal oxide layers 21 and 22 described in the first embodiment can be used.
- the surface of the metal layer 20 exposed at the end of the gate electrode 95 can also be covered with a complex oxide containing indium.
- the entire gate electrode 95 may be covered so as to include the end (cross section) of the gate electrode 95 with a nitride such as silicon nitride or molybdenum nitride.
- a nitride such as silicon nitride or molybdenum nitride.
- an insulating film having the same composition as the above-described gate insulating layer may be stacked with a thickness greater than 50 nm.
- the gate electrode 95 As a method of forming the gate electrode 95, dry etching or the like is performed only on the third insulating layer 13 located immediately above the channel layer 58 of the active element 68 prior to the formation of the gate electrode 95. Can be made thinner. At the interface of the gate electrode 95 in contact with the third insulating layer 13, an oxide semiconductor having different electrical properties may be further inserted.
- the third insulating layer 13 may be formed of an insulating metal oxide layer containing cerium oxide or gallium oxide.
- a metal element or a metalloid element within the range of 0.1 at% or more and 4 at% or less can be added to copper.
- an element which can be arranged at a lattice position of copper by substituting a part of the copper atom in the crystal (grain) of the copper layer, and movement of the copper atom near the grain of copper precipitated in grain boundaries of the copper layer. It is preferable to add to the copper together with an element that suppresses.
- an element heavier than copper atoms having a large atomic weight
- an additive element in which the conductivity of copper does not easily decrease with an addition amount in the range of 0.1 at% to 4 at% with respect to copper.
- an element having a deposition rate such as sputtering close to copper is preferable.
- the technique of adding an element to copper can also be applied to the case where copper is replaced with silver or aluminum. In other words, a silver alloy or an aluminum alloy may be used instead of the copper alloy.
- Adding an element to copper that can be placed at a lattice position of copper in place of part of copper atoms in crystals (grains) of the copper layer means, in other words, metals and metalloids that form a solid solution with copper at around normal temperature. It is to add to copper.
- Metals that easily form a solid solution with copper include manganese, nickel, zinc, palladium, gallium, gold (Au) and the like.
- Adding an element to copper that precipitates in the grain boundaries of the copper layer and suppresses the movement of copper atoms in the vicinity of the grains of the copper is, in other words, adding a metal or semimetal which does not form a solid solution with copper near room temperature. It is.
- metals and metalloids do not form a solid solution with copper or do not form a solid solution with copper.
- examples thereof include refractory metals such as titanium, zirconium, molybdenum and tungsten, and elements called semimetals such as silicon, germanium, antimony and bismuth.
- the alloying element can be used as an additive element added to a silver alloy.
- Copper and silver have problems with reliability in terms of migration.
- the reliability can be supplemented by adding the above metal or metalloid to copper.
- the effect of suppressing migration can be obtained by adding 0.1 at% or more of the above metal or metalloid to copper or silver.
- the conductivity of copper or silver significantly deteriorates, and the merit of selecting a copper alloy or a silver alloy is obtained. Absent.
- the array substrate 200 includes a light emitting layer 92 (organic EL layer) which is a display function layer.
- a light emitting layer 92 organic EL layer
- the light emitting layer 92 when an electric field is applied between a pair of electrodes, holes injected from the anode (eg, upper electrode) recombine with electrons injected from the cathode (eg, lower electrode, pixel electrode) It is a display function layer which is excited by the light emission and emits light.
- the light emitting layer 92 contains at least a material having a property of light emission (light emitting material), and preferably, a material having an electron transporting property.
- the light emitting layer 92 is a layer formed between the anode and the cathode, and when the hole injection layer 91 is formed on the lower electrode 88 (anode), the hole injection layer 91 and the upper electrode 87 (cathode) And a light emitting layer 92 is formed therebetween. When the hole transport layer is formed on the anode, the light emitting layer 92 is formed between the hole transport layer and the cathode.
- the roles of the upper electrode 87 and the lower electrode 88 can be interchanged.
- the film thickness of the light emitting layer 92 is optional as long as the effects of the present invention are not significantly impaired, but the film thickness is preferably large in that defects are less likely to occur in the film. On the other hand, when the film thickness is small, the drive voltage is low, which is preferable. Therefore, the film thickness of the light emitting layer 92 is preferably 3 nm or more, more preferably 5 nm or more, and, on the other hand, usually 200 nm or less, and further preferably 100 nm or less.
- the material of the light emitting layer 92 emits light at a desired light emission wavelength, and is not particularly limited as long as the effects of the present invention are not impaired, and known light emitting materials can be applied.
- the light emitting material may be a fluorescent light emitting material or a phosphorescent light emitting material, but a material having a good light emitting efficiency is preferable, and a phosphorescent light emitting material is preferable from the viewpoint of the internal quantum efficiency.
- Examples of light-emitting materials which give blue light emission include naphthalene, perylene, pyrene, anthracene, coumarin, chrysene, p-bis (2-phenylethenyl) benzene and derivatives thereof.
- a light emitting material which gives green light emission for example, quinacridone derivatives, coumarin derivatives, aluminum complexes such as Al (C 9 H 6 NO) 3 and the like can be mentioned.
- a light emitting material which gives red light emission for example, a compound of DCM (4- (dicyanomethylene) -2-methyl-6- (p-dimethylaminostyryl) -4H-pyran), a benzopyran derivative, a rhodamine derivative, a benzothioxanthene derivative, an aza Benzothioxanthene and the like can be mentioned.
- the configuration of the organic EL layer constituting the light emitting layer 92, the light emitting material, and the like are not limited to the above materials.
- the light emitting layer 92 is formed on the hole injection layer 91, and is driven by a drive voltage applied between the upper electrode 87 and the lower electrode 88.
- the lower electrode 88 has a structure in which a reflective layer 89 and conductive metal oxide layers 97 and 98 are stacked.
- an electron injecting layer, an electron transporting layer, a hole transporting layer, and the like may be inserted between the upper electrode 87 and the lower electrode 88.
- a refractory metal oxide such as tungsten oxide or molybdenum oxide can be used.
- a silver alloy, an aluminum alloy, or the like having high light reflectance can be used.
- electroconductive metal oxides such as ITO
- electroconductive metal oxides have bad adhesiveness with aluminum.
- an interface such as an electrode or a contact hole is likely to cause an electrical connection failure.
- Silver and silver alloys have good adhesion to conductive metal oxides such as ITO, and conductive metal oxides such as ITO tend to obtain ohmic contacts.
- FIG. 8 is a view partially showing the lower electrode 88 (pixel electrode) constituting the display device DSP1 according to the first embodiment of the present invention, and showing an enlarged cross section showing a portion indicated by reference symbol W2 in FIG. FIG.
- the lower electrode 88 has a silver or silver alloy layer (reflection layer 89) sandwiched between conductive metal oxide layers 97 and 98 in order to suppress migration of silver. It has a layered structure.
- the conductive metal oxide layers 97 and 98 the conductive metal oxide constituting the conductive metal oxide layers 21 and 22 described in the first embodiment can be used.
- the film thickness of the silver alloy layer can be selected, for example, from the range of 100 nm to 500 nm. If necessary, the film thickness may be formed to be thicker than 500 nm.
- the silver alloy layer can be used for the light transmitting upper electrode or the counter electrode.
- the silver alloy layer is formed of a pixel electrode (lower electrode) by setting the film thickness of the silver alloy layer to 100 nm to 500 nm. And a reflective liquid crystal display device can be realized.
- a composite oxide of indium oxide, gallium oxide and antimony oxide was used as the conductive metal oxide.
- a silver alloy which functions as a conductive layer can be applied.
- an additive element to be added to silver one or more metals selected from the group consisting of magnesium, calcium, titanium, molybdenum, indium, tin, zinc phthalocyanine green pigment, neodymium, nickel, antimony, bismuth, copper and the like Elements can be used.
- the silver alloy layer of the present embodiment uses a silver alloy to which 1.5 at% calcium is added to silver. Calcium is selectively oxidized by heat treatment or the like in a later step in a configuration in which a silver alloy is held by the conductive metal oxide.
- Such an oxide can improve the reliability of the structure in which the silver alloy layer is sandwiched by the conductive metal oxide layer. Furthermore, the reliability can be further improved by covering the structure in which the silver alloy layer is sandwiched by the conductive metal oxide layer with a nitride such as silicon nitride or molybdenum nitride.
- a nitride such as silicon nitride or molybdenum nitride.
- the opposing substrate 100 and the array substrate 200 described above are bonded together via the first transparent resin layer 108 as shown in FIG.
- the seal portion (not shown) where the opposing substrate 100 and the array substrate 200 are bonded to each other, it is also possible to perform the transfer (transfer) of conduction from the opposing substrate 100 to the array substrate 200 in the thickness direction of the sealing portion. is there.
- the counter substrate 100 and the array substrate 200 can be electrically connected by disposing a conductor selected from an anisotropic conductive film, a minute metal sphere, a resin sphere covered with a metal film, or the like in the seal portion.
- the light emitting layer 92 may be an inorganic light emitting diode layer.
- the light emitting layer 92 may have a structure in which inorganic LED chips are arranged in a matrix. In this case, minute LED chips for red light emission, green light emission and blue light emission may be mounted on the array substrate 200. As a method of mounting the LED chips on the array substrate 200, mounting may be performed by face-down.
- the light emitting layer 92 is formed of an inorganic LED
- a blue light emitting diode or a blue violet light emitting diode is disposed as the light emitting layer 92 on the array substrate 200 (substrate 45).
- a green phosphor is stacked on the green pixel, and a red phosphor is stacked on the pixel emitting red light.
- the inorganic LED can be easily formed on the array substrate 200.
- green light emission and red light emission can be obtained from each of the green phosphor and the red phosphor by excitation with blue light generated from a blue-violet light emitting diode.
- an ultraviolet light emitting diode may be provided as the light emitting layer 92 on the array substrate 200 (substrate 45).
- the blue phosphor is stacked on the blue pixel
- the green phosphor is stacked on the green pixel
- the red phosphor is stacked on the red pixel.
- the inorganic LED can be easily formed on the array substrate 200.
- a green pixel, a red pixel or a blue pixel can be formed by a simple method such as a printing method. It is desirable to adjust the size of these pixels from the viewpoint of luminous efficiency and color balance of each color.
- the first touch sensing wiring 1 and the second touch sensing wiring 2 are disposed above the second surface S.
- the present invention does not limit this structure.
- one of the first touch sensing wiring 1 and the second touch sensing wiring 2 may be disposed on the second surface S, and the other wiring may be disposed on the first surface F.
- the first touch sensing wiring 1 and the second touch sensing wiring 2 may be disposed on the first surface F. Such a structure is described below.
- FIG. 10 is a cross-sectional view partially showing a display device DSP2 according to a second embodiment of the present invention.
- an organic EL is used as a display function layer (light emitting layer).
- the counter substrate 300 constituting the display device DSP2 of the second embodiment includes a transparent substrate 42 having a first surface F and a second surface S opposite to the first surface F.
- a transparent substrate 42 having a first surface F and a second surface S opposite to the first surface F.
- On the second surface S a plurality of first touch sensing wires 1 are provided.
- On the first surface F a plurality of second touch sensing wires 2 are provided. That is, the second touch sensing wiring 2 is located between the first touch sensing wiring 1 and the array substrate 400.
- the plurality of second touch sensing wires 2 and the first surface F are covered with a second transparent resin layer 105. In the structure shown in FIG. 10, the first transparent resin layer 108 and the second transparent resin layer 105 are bonded.
- a change in capacitance C2 is detected at an intersection point where the first touch sensing wiring 1 and the second touch sensing wiring 2 are orthogonal to each other.
- Each of the plurality of first touch sensing wires 1 and the plurality of second touch sensing wires 2 is electrically independent.
- the first touch sensing wiring 1 and the second touch sensing wiring 2 are orthogonal to each other in plan view.
- the first touch sensing wiring 1 can be used as a touch detection electrode
- the second touch sensing wiring 2 can be used as a touch drive electrode.
- the touch sensing control unit 122 detects a change in the capacitance C2 generated between the first touch sensing wiring 1 and the second touch sensing wiring 2 as a touch signal.
- the role of the first touch sensing wiring 1 and the role of the second touch sensing wiring 2 may be interchanged.
- the first touch sensing wiring 1 may be used as a touch drive electrode
- the second touch sensing wiring 2 may be used as a touch detection electrode.
- the first touch sensing wiring 1 has a configuration in which a first black layer 16 and a first conductive layer 15 are sequentially stacked.
- a structure of the first conductive layer 15 for example, a three-layer structure in which a copper alloy layer or a silver alloy layer which is the metal layer 20 is sandwiched between the first conductive metal oxide layer 21 and the second conductive metal oxide layer 22 It can be structured.
- the first touch sensing wiring 1 and the second touch sensing wiring 2 orthogonal to each other in a lattice shape also serve as a black matrix that improves the display contrast.
- the active device 68 has the same top gate structure as the first embodiment.
- the channel layer of the second embodiment is also formed of an oxide semiconductor as in the first embodiment.
- it is composed of a first layer composed of an active matrix comprising a channel layer composed of a polysilicon semiconductor, and an active matrix composed of a channel layer composed of an oxide semiconductor It is preferable to adopt a structure in which the second layer is stacked.
- the active element (first layer) including the channel layer formed of a polysilicon semiconductor is used as a carrier (in the organic EL layer which is the light emitting layer 92).
- an active element (second layer) including a channel layer formed of an oxide semiconductor is used as a switching element for selecting an active element including a channel layer formed of a polysilicon semiconductor.
- a silver alloy layer or a copper alloy layer sandwiched by conductive metal oxide layers can be used as a power supply line for emitting light from the organic EL layer electrically connected to the drive element.
- a wiring structure shown in FIG. 9 is used. It is preferable to apply a silver alloy or copper alloy having a good conductivity to a wire linked to an active element such as a power supply line.
- the metal layer 20 which is a copper alloy is used for the gate electrode 95.
- the metal layer 20 constituting the gate electrode 95 is sandwiched between the first conductive metal oxide layer 97 and the second conductive metal oxide layer 98.
- the material used for the gate insulating layer which is the third insulating layer 13 is the same as that of the first embodiment.
- FIG. 11 is a cross-sectional view partially showing a display device DSP3 according to a third embodiment of the present invention.
- the opposing substrate 500 that constitutes the display device DSP3 of the third embodiment includes a transparent substrate 44 having a first surface F and a second surface S opposite to the first surface F.
- the second surface S is not provided with a touch sensing wiring.
- On the first surface F a plurality of first touch sensing wires 1 and a plurality of second touch sensing wires 2 are formed in order in the observation direction OB (see FIG. 6, opposite to the Z direction). . That is, the second touch sensing wiring 2 is located between the first touch sensing wiring 1 and the array substrate 600.
- the plurality of second touch sensing wires 2 and the first surface F are covered with a second transparent resin layer 105.
- An insulating layer I (touch wiring insulating layer) is provided between the plurality of first touch sensing wirings 1 and the plurality of second touch sensing wirings 2, and the first touch sensing wiring 1 and the second touch sensing wiring are provided. 2 are electrically isolated from each other by the insulating layer I.
- the first transparent resin layer 108 and the second transparent resin layer 105 are bonded.
- FIG. 12 is a diagram showing the second touch sensing wiring 2 constituting the display device DSP3 according to the third embodiment of the present invention, and is an enlarged cross sectional view showing a portion indicated by reference symbol W3 in FIG.
- the second touch sensing wiring 2 has a configuration in which a second black layer 76 and a second conductive layer 75 are sequentially stacked in the observation direction OB.
- the second black layer 76 has the same configuration as the second black layer 26 of the first embodiment.
- the second conductive layer 75 has the same configuration as the second conductive layer 25 of the first embodiment.
- a change in capacitance C3 is detected at an intersection where the first touch sensing wiring 1 and the second touch sensing wiring 2 are orthogonal to each other.
- Each of the plurality of first touch sensing wires 1 and the plurality of second touch sensing wires 2 is electrically independent.
- the first touch sensing wiring 1 and the second touch sensing wiring 2 are orthogonal to each other in plan view.
- the first touch sensing wiring 1 can be used as a touch detection electrode
- the second touch sensing wiring 2 can be used as a touch drive electrode.
- the touch sensing control unit 122 detects a change in the capacitance C3 generated between the first touch sensing wiring 1 and the second touch sensing wiring 2 as a touch signal.
- the role of the first touch sensing wiring 1 and the role of the second touch sensing wiring 2 may be interchanged.
- the first touch sensing wiring 1 may be used as a touch drive electrode
- the second touch sensing wiring 2 may be used as a touch detection electrode.
- the active element 68 according to the third embodiment includes a channel layer of an oxide semiconductor as in the first and second embodiments, and the gate insulating layer of the active element 68 is formed of a composite oxide containing cerium oxide. It is done.
- FIG. 13 is a cross-sectional view partially showing a display device DSP4 according to a fourth embodiment of the present invention.
- a color filter CF is provided on the first surface F of the transparent substrate 40.
- the red coloring layer R, the green coloring layer G, and the blue coloring layer B that constitute the color filter CF face the light emitting layer 92.
- each of the plurality of pixels PX includes a color filter.
- the boundary between the red coloring layer R and the green coloring layer G, the boundary between the green coloring layer G and the blue coloring layer B, and the boundary between the blue coloring layer B and the red coloring layer R have a first touch in plan view. It overlaps with the sensing wire 1 and the second touch sensing wire 2.
- the boundary portion overlaps the black matrix. For this reason, generation of color mixing of the red coloring layer R, the green coloring layer G, and the blue coloring layer B is prevented from the viewpoint of the observer.
- the first transparent resin layer 108 is disposed to cover the color filter CF.
- the counter substrate 700 and the array substrate 200 are bonded to each other via the first transparent resin layer 108. According to the fourth embodiment, full color display can be realized along with light emission of the light emitting layer 92.
- the display device can have various applications.
- an electronic apparatus to which the display device according to the above-described embodiment can be applied a mobile phone, a portable game device, a portable information terminal, a personal computer, an electronic book, a video camera, a digital still camera, a head mounted display, a navigation system, sound
- reproduction apparatuses car audios, digital audio players, etc.
- copying machines facsimiles, printers, printer multifunction machines, vending machines, automatic teller machines (ATMs), personal identification machines, optical communication machines and the like.
- ATMs automatic teller machines
- first touch sensing wiring 2 ... second touch sensing wiring 2A ... sense wiring (second touch sensing wiring 2) 2B ⁇ ⁇ ⁇ ⁇ lead wiring (second touch sensing wiring 2) 15 first conductive layer 16 first black layer 12 second insulating layer 13 third insulating layer 14 fourth insulating layer 20 metal layer 21, 97 ⁇ ⁇ ⁇ First conductive metal oxide layer 22, 98 ⁇ ⁇ ⁇ second conductive metal oxide layer 25, 75 ⁇ ⁇ ⁇ second conductive layer 26, 76 ⁇ ⁇ ⁇ second black layer 40 ⁇ ⁇ ⁇ transparent substrate 42: Transparent substrate 44: Transparent substrate 45: Substrate 54: Source electrode 56: Drain electrode 58: Channel layer 68: Active element 87: Upper electrode 88 ⁇ Lower electrode (pixel electrode) 89: reflective layer 91: hole injection layer 92: light emitting layer 93: contact hole 94: bank 95: gate electrode 96: planarization layer 100, 300, 500, 700 ...
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Abstract
Description
特許文献3においては、ポリシリコントランジスタに接続される信号線(ゲート線とソース線)や画素電極だけでなく、タッチセンシングに関わるセンス領域とドライブ-センス接地領域及びバイパストンネル等を同一のアレイ基板上に配設することが必要である。このため、特許文献3においては、アレイ構造が極めて複雑であり、寄生容量の増加を招き易く、かつ、アレイ基板の製造工程における負荷が大きい。特許文献3には、有機EL装置等の表示装置に用いられる電極を形成する技術が開示されている。特許文献3の段落[0008]には、純Ag膜やAg合金膜の密着性が不十分であり、実用性に欠けることが記載されている。
特許文献5においては、黒色層上に、銅含有層がインジウム含有層で挟持された構成を有するタッチセンシング配線を備えた黒色基板と、黒色基板の製造方法が開示されている。しかしながら、特許文献5においては、有機ELやLED等の発光層を備える表示装置は考慮されておらず、発光層を具備するアレイ基板が適用された表示装置における技術課題は開示されていない。また、その黒色基板において、2組の黒色配線でタッチセンシングを行う構成も開示されていない。
また、画素電極(以下、反射電極と称することがある)の材料としては、光反射性の点で、銀や合金が優れている。
また、上述したように、銀や銀合金、また、銅や銅合金は、基板等に対する密着性が劣る。更に、銀は、マイグレーションや拡散によって、銀で構成される部材の周辺に位置する構成材料に対して電気特性に悪影響を与える欠点がある。
以下の説明において、同一又は実質的に同一の機能及び構成要素には、同一の符号を付し、その説明を省略又は簡略化し、或いは、必要な場合のみ説明を行う。各図においては、各構成要素を図面上で認識し得る程度の大きさとするため、各構成要素の寸法及び比率を実際のものとは適宜に異ならせてある。また、必要に応じて、図示が難しい要素、例えば、半導体のチャネル層を形成する複数層の構成、また、導電層を形成する複数層の構成等の図示や一部の図示が省略されている。
以下の記載において、タッチセンシングに関わる配線、電極、及び信号を、単に、タッチ駆動配線、タッチ検出配線、タッチ配線、タッチ電極、及びタッチ信号と称することがある。また、第1タッチセンシング配線及び第2タッチセンシング配線を単にタッチセンシング配線と称することがある。タッチセンシング駆動を行うためにタッチセンシング配線に印加される電圧をタッチ駆動電圧と呼ぶ。
第1黒色層及び第2黒色層を単に黒色層と称することがあり、また、第1導電層及び第2導電層を単に導電層と称することがある。
発光層(有機ELやLED)を駆動するために上部電極と下部電極(以下、下部電極を画素電極あるいは反射電極と称することがある)間に印加される電圧を画素駆動電圧と称する。発光層の駆動を単に画素駆動と言うことがある。
(表示装置DSP1の機能構成)
以下、本発明の第1実施形態に係る表示装置DSP1を、図1から図9を参照しながら説明する。
図1は、本発明の第1実施形態に係る表示装置DSP1を構成する制御部及び表示部を示すブロック図である。
制御部120は、公知の構成を有し、映像信号制御部121(第一制御部)と、タッチセンシング制御部122(第二制御部)と、システム制御部123(第三制御部)とを備えている。
図2は、本発明の第1実施形態に係る表示装置DSP1を部分的に示す図であって、図3のA-A’線に沿う断面図である。
本実施形態に係る表示装置DSP1は、後述する実施形態に係る表示装置基板を具備する。また、以下に記載する「平面視」とは、観察者が表示装置DSP1の表示面(表示装置基板の平面)を観察する方向から見た平面を意味する。本発明の実施形態に係る表示装置の表示部の形状、又は画素を規定する画素開口部の形状、表示装置を構成する画素数は限定されない。
なお、以下の実施形態において、上記のように規定されたX方向とY方向を切り換えて、即ち、X方向を第2方向と定義しかつY方向を第1方向と定義し、表示装置を構成してもよい。
図2に示すように、対向基板100は、第1面Fと、第1面Fとは反対側の第2面Sとを有する透明基板40を備える。第1面Fは、アレイ基板200に対向する面である。第2面Sは、観察者に対向する面である。
透明基板40に用いることの可能な基板は、可視域において透明な基板であればよく、ガラス基板、セラミック基板、石英基板、サファイア基板、プラスチック基板等を用いることができる。
透明基板40の第2面Sの上方には、複数の第1タッチセンシング配線1と、複数の第2タッチセンシング配線2とが設けられている。複数の第1タッチセンシング配線1と複数の第2タッチセンシング配線2との間には、絶縁層I(タッチ配線絶縁層)が設けられており、第1タッチセンシング配線1と第2タッチセンシング配線2とは、絶縁層Iによって互いに電気的に絶縁されている。
図4は、本発明の第1実施形態に係る対向基板100に設けられた第1タッチセンシング配線1を構成する第1導電層のパターンを示す平面図である。
図5は、本発明の第1実施形態に係る対向基板100に設けられた第2タッチセンシング配線2を構成する第2導電層のパターンを示す平面図である。
複数の第1タッチセンシング配線1は、第2面Sの上方に位置し、X方向に並んでおり、互いに平行にY方向に延在している。Y方向における第1タッチセンシング配線1の端部には、第1端子TM1が設けられている。複数の第1タッチセンシング配線1は、第1配線パターンを形成している。
複数の第2タッチセンシング配線2(第2配線パターン)は、複数の第1タッチセンシング配線1とアレイ基板200との間に位置しており、本実施形態では第2面Sの上方に位置している。第2タッチセンシング配線2は、センス配線2Aと、引き出し配線2Bとを有している。センス配線2Aは、Y方向に並んでおり、互いに平行にX方向に延在している。センス配線2Aは、表示部110の外側において、引き出し配線2Bと接続されている。引き出し配線2Bは、X方向に並んでおり、互いに平行にY方向に延在している。Y方向における引き出し配線2Bの端部には、第2端子TM2が設けられている。複数の第2タッチセンシング配線2は、第2配線パターンを形成している。
複数の第1タッチセンシング配線1の各々と、複数の第2タッチセンシング配線2の各々は、電気的に独立している。第1タッチセンシング配線1とセンス配線2Aは、観察者側Pから見た平面視において直交している。複数の第1タッチセンシング配線1と複数のセンス配線2Aとによって区画されている領域は、画素PXである。複数の画素PXは、表示部110においてマトリクス状に配置されている。画素PXにおける開口部の形状は、正方形パターン、長方形パターン、平行四辺形パターン等であってもよい。更に、画素PXにおける開口部の配列が、モアレ対策を施した配列、ジグザク状の配列であってもよい。
例えば、第1タッチセンシング配線1をタッチ検出電極として用い、第2タッチセンシング配線2をタッチ駆動電極として用いることができる。タッチセンシング制御部122は、タッチ信号として、第1タッチセンシング配線1と第2タッチセンシング配線2との間に生じる静電容量C1の変化を検出する。
また、第1タッチセンシング配線1の役割と第2タッチセンシング配線2の役割とを入れ替えてもよい。具体的に、第1タッチセンシング配線1をタッチ駆動電極として用い、第2タッチセンシング配線2をタッチ検出電極として用いてもよい。
また、上述した間引き駆動におけるフローティングパターンは、グランド(筐体に接地)と電気的に接続するように切り替えることもできる。タッチセンシングのS/N比を改善させるため、タッチセンシングの信号が検出された際に、TFT(薄膜トランジスタ)等アクティブ素子の信号配線を、一時、グランド(筐体等)に接地してもよい。
図6は、本発明の第1実施形態に係る対向基板100に設けられた第1タッチセンシング配線1、絶縁層I、及び第2タッチセンシング配線2を示す図であって、図2における符号W1で示された部分を示す拡大断面図である。
本実施形態では、観察者Pが表示装置DSP1を観察する方向、即ち、透明基板40の第2面Sから第1面Fに向けた方向を、観察方向OB(図2に示すZ方向とは反対方向)と称している。
複数の第1タッチセンシング配線1は、観察方向OBにおいて第1黒色層16と第1導電層15とが順に積層された構成を有している。複数の第2タッチセンシング配線2は、観察方向OBにおいて第2黒色層26と第2導電層25とが順に積層された構成を有している。第2黒色層26は、第1黒色層16と同じ構成を有する。第2導電層25は、第1導電層15と同じ構成を有する。即ち、第1タッチセンシング配線1及び第2タッチセンシング配線2は同じ層構造を有する。
絶縁層Iは、第2面Sの上方に設けられており、第1タッチセンシング配線1と第2タッチセンシング配線2との間に配置されている。
図6においては、第1タッチセンシング配線1及び第2タッチセンシング配線2の各々が黒色層と導電層とで構成された2層積層構造を有しているが、本発明は、この構造を限定しない。第1タッチセンシング配線1及び第2タッチセンシング配線2の各々が2層よりも多い層数を有する積層構造で形成されてもよい。また、2つの黒色層によって導電層が挟持された3層積層構造が採用されてもよい。
断面視において、第1タッチセンシング配線1と第2タッチセンシング配線2の各々を構成する黒色層及び導電層の線幅を略同じにすることができる。具体的に、公知のフォトリソグラフィの手法を用いて、導電層を形成した後、パターニングされた導電層をマスクとして用いたドライエッチングを行うことで、黒色層と導電層との断面視における線幅が略同じとなるように、タッチセンシング配線を形成することができる。例えば、特開2015-004710号公報に記載の技術を適用できる。
第1導電層15及び第2導電層25の少なくとも一部を構成する金属層20を、導電性金属酸化物層21、22で挟持することができる。換言すれば、第1導電層15や第2導電層25の構造として、第1導電性金属酸化物層21、金属層20、及び第2導電性金属酸化物層22で構成された3層構造を採用することができる。第1導電性金属酸化物層21と金属層20との界面、又は、第2導電性金属酸化物層22と金属層20との界面に、ニッケル、亜鉛、インジウム、チタン、モリブデン、タングステン等、銅と異なる金属やこれら金属の合金層を更に挿入してもよい。
具体的に、第1導電性金属酸化物層21及び第2導電性金属酸化物層22の材料としては、例えば、酸化インジウム、酸化亜鉛、酸化アンチモン、酸化錫、酸化ガリウム、及び酸化ビスマスから構成される群より選択される2種以上の金属酸化物を含む複合酸化物を採用することができる。これら金属酸化物の組成を調整することで、仕事関数の値を調整することができ、発光層として有機ELを採用した場合のキャリア放出性を調整することができる。
即ち、導電性金属酸化物層は、酸化インジウム、酸化亜鉛、及び酸化錫を含む複合酸化物で形成され、複合酸化物に含まれるインジウム(In)と亜鉛(Zn)と錫(Sn)のIn/(In+Zn+Sn)で示される原子比は、0.8より大きく、かつ、Zn/Snの原子比が1より大きい。
インジウム(In)の量は、80at%より多いことが好ましい。インジウム(In)の量は、90at%より多いことが更に好ましい。インジウム(In)の量が80at%より少ない場合、形成される導電性金属酸化物層の比抵抗が大きくなり、好ましくない。亜鉛(Zn)の量が20at%を超えると、導電性金属酸化物(混合酸化物)の耐アルカリ性が低下するので好ましくない。上記の第1導電性金属酸化物層21及び第2導電性金属酸化物層22においては、いずれも、混合酸化物中の金属元素でのアトミックパーセント(酸素元素をカウントしない金属元素のみのカウント)である。酸化アンチモンや酸化ビスマスは、金属アンチモンや金属ビスマスが銅との固溶域を形成しにくく、積層構造での銅の拡散を抑制するため、上記導電性金属酸化物層に加えることができる。
第1導電層15及び第2導電層25は、金属層20等の導電材料で形成できる。金属層20としては、例えば、銅層や銅合金層、銀層や銀合金層、或いは、アルミニウムを含有するアルミニウム合金層(アルミニウム含有層)、更には、金、チタン、モリブデン、或いはこれらの合金を採用することができる。ニッケルは強磁性体であるため、成膜レートが落ちるものの、スパッタリング等の真空成膜で形成することができる。クロムは、環境汚染の問題や抵抗値が大きいというデメリットを有するが、本実施形態に係る金属層の材料として用いることができる。透明基板40や透明樹脂層に対する導電層の密着性を得るために、銅や銀、あるいはアルミニウムに、マグネシウム、カルシウム、チタン、モリブデン、インジウム、錫、亜鉛、ネオジウム、ニッケル、アルミニウム、アンチモンから構成される群より選択される1以上の金属元素が添加された合金を採用することが好ましい。
第1黒色層16及び第2黒色層26は、表示装置DSP1のブラックマトリクスとして機能する。黒色層は、例えば、黒色の色材を分散させた着色樹脂で構成されている。銅の酸化物や銅合金の酸化物は、十分な黒色や低い反射率を得にくい。例えば、黒色層を金属酸化物で形成する場合、おおよそ10%から30%の可視域の光反射率であり、かつ、可視域においてフラットな反射率を得にくく着色して見える。本実施形態に係る黒色層とガラス等の基板や、透明樹脂層との間の界面における可視光の反射率は略3%以下に抑えられ、高い視認性が得られる。前記透明樹脂は、表示装置への保護ガラス貼り付けのための接着層を含む。
また、観察者の視認性の向上を配慮して、黒色層の反射率は、3%以下とすることが望ましい。なお、通常、カラーフィルタに用いられるアクリル樹脂、また、液晶材料の屈折率は、おおよそ1.5以上1.7以下の範囲である。なお、赤色、緑色、青色の各々複数着色画素を具備するカラーフィルタを、対向基板上に配設してもよい。
次に、表示装置DSP1を構成するアレイ基板200の構造について説明する。
アレイ基板200の基板45としては、透明基板を用いる必要はなく、例えば、アレイ基板200に適用可能な基板として、ガラス基板、セラミック基板、石英基板、サファイア基板、シリコン、炭化シリコンやシリコンゲルマニウムなどの半導体基板、あるいはプラスチック基板等が挙げられる。
アレイ基板200においては、第4絶縁層14、第4絶縁層14上に形成されたアクティブ素子68、第4絶縁層14及びアクティブ素子68を覆うように形成された第3絶縁層13、アクティブ素子68のチャネル層58に対向するように第3絶縁層13上に形成されたゲート電極95、第3絶縁層13及びゲート電極95を覆うように形成された第2絶縁層12、及び第2絶縁層12上に形成された平坦化層96が、基板45上に、順に積層されている。
更に、下部電極88、バンク94、及び平坦化層96を覆うようにホール注入層91が形成されている。ホール注入層91上には、順に、発光層92、上部電極87、及び封止層109が積層されている。
下部電極88は、後述するように、銀あるいは銀合金層が導電性金属酸化物層によって挟持された構成を有する。
なお、図2において、符号29は、下部電極88、ホール注入層91、発光層92、及び上部電極87で構成された発光領域を示している。
また、上記複合酸化物層を導電性金属酸化物層に適用し、銀合金層の膜厚を、例えば、100nmから250nmの範囲内、あるいは、300nm以上の膜厚に設定し、導電性金属酸化物層によって銀合金層が挟持された3層積層構造を採用してもよい。この場合、可視光に対して高い反射率を有する反射電極を実現することができる。
平坦化層96の材料としては、アクリル樹脂、ポリイミド樹脂、ベンゾシクロブテン樹脂、ポリアミド樹脂等を用いてもよい。低誘電率材料(low-k材料)を用いることもできる。
なお、視認性向上のため、平坦化層96や封止層109、あるいは、基板45のいずれかが、光散乱の機能を有してもよい。あるいは、基板45の上方に光散乱層を形成してもよい。
図7は、本発明の第1実施形態に係る表示装置DSP1を部分的に示す拡大図であり、図3のB-B’線に沿う断面図である。また、図7は、画素電極に接続されているアクティブ素子68として用いられるトップゲート構造を有する薄膜トランジスタ(TFT)の構造の一例を示している。なお、図7においては、対向基板100と封止層109を省略している。
例えば、IGZOと称される酸化物半導体は、スパッタリングなどの真空成膜で一括して形成される。酸化物半導体が成膜された後においては、TFT等のパターン形成後の熱処理も一括して行われる。このため、チャネル層に関わる電気的特性(例えば、Vth)のばらつきが極めて少ない。有機ELやLEDの駆動はその輝度のばらつきを抑えるため、前記薄膜トランジスタのVthのばらつきを小さい範囲に抑える必要がある。
チャネル層の上面が、例えば、異なる酸化物半導体で覆われた構成を採用してもよい。
あるいは、例えば、結晶性のn型酸化物半導体上に、微結晶の(非晶質に近い)酸化物半導体が積層された積層構造を採用してもよい。ここで微結晶とは、例えば、スパッタリング装置にて成膜された非晶質の酸化物半導体を、180℃以上450℃以下の範囲で熱処理した微結晶状の酸化物半導体膜を言う。あるいは、成膜時の基板温度を200℃前後に設定した状態で成膜された微結晶状の酸化物半導体膜を言う。微結晶状の酸化物半導体膜は、TEMなどの観察方法により、少なくとも1nmから3nm前後、或いは、3nmより大きい結晶粒を観察することができる酸化物半導体膜である。
酸化物半導体は、非晶質から結晶質に変化させることで、キャリア移動度の改善や信頼性の向上を実現することができる。酸化インジウムや酸化ガリウムの酸化物としての融点は高い。酸化アンチモンや酸化ビスマスの融点はいずれも1000℃以下で、酸化物の融点が低い。例えば、酸化インジウムと酸化ガリウムと酸化アンチモンの3元系複合酸化物を採用した場合、融点の低い酸化アンチモンの効果で、この複合酸化物の結晶化温度を低くすることができる。換言すれば、非晶質状態から、微結晶状態などに結晶化させ易い酸化物半導体を提供できる。酸化物半導体は、その結晶性を高めることで、キャリア移動度や信頼性を向上させ得る。
例えば、In:Sb=1:1の原子比で、酸化インジウム及び酸化アンチモンの2元系複合酸化物としてもよい。例えば、In:Bi=1:1の原子比で、酸化インジウム及び酸化ビスマスの2元系複合酸化物としてもよい。
また、上記原子比においては、Inの含有量を更に増やしてもよい。
なお、複合酸化物の組成は、上記組成に限定されない。
例えば、酸化インジウム、酸化ガリウム、及び酸化アンチモンを含む3元系金属酸化物に酸化錫を加えて得られたターゲットを用いてスパッタリング成膜を行う。これにより、キャリア濃度が向上した複合酸化物を成膜することができる。同様に、例えば、酸化インジウム、酸化ガリウム、酸化ビスマスの3元系金属酸化物に酸化錫を加えて得られたターゲットを用いてスパッタリング成膜を行うことで、キャリア濃度が向上した複合酸化物を成膜することができる。
図9に示す構造において、ゲート電極95を構成する金属層20は、銅層或いは銅合金層、または、銀或いは銀合金で形成されている。ゲート電極95においては、金属層20は、導電性金属酸化物層97、98で挟持されている。導電性金属酸化物層97、98の材料としては、第1実施形態で説明した導電性金属酸化物層21、22を構成する導電性金属酸化物を用いることができる。
第3絶縁層13と接触するゲート電極95の界面に、電気的性質の異なる酸化物半導体を更に挿入してもよい。あるいは、第3絶縁層13を酸化セリウムや酸化ガリウムを含む絶縁性の金属酸化物層で形成してもよい。
銅層の結晶(グレイン)内で銅原子の一部と置き換わって銅の格子位置に配置できる元素を銅に添加することは、言い換えると、常温付近で銅と固溶体を形成する金属や半金属を銅に添加することである。銅と固溶体を形成し易い金属は、マンガン、ニッケル、亜鉛、パラジウム、ガリウム、金(Au)等が挙げられる。銅層の結晶粒界に析出して銅のグレイン近傍の銅原子の動きを抑制する元素を銅に添加することは、言い換えると、常温付近で銅と固溶体を形成しない金属や半金属を添加することである。銅と固溶体を形成しない或いは銅と固溶体を形成しにくい金属や半金属には種々の材料が挙げられる。例えば、チタン、ジルコニウム、モリブデン、タングステン等の高融点金属、シリコン、ゲルマニウム、アンチモン、ビスマス等の半金属と称される元素等を挙げることができる。上記合金元素は、銀合金に添加される添加元素として用いることができる。
図7に示すように、アレイ基板200は、表示機能層である発光層92(有機EL層)を含む。発光層92は、一対の電極間に電界が与えられた時に、陽極(例えば、上部電極)から注入されるホールと、陰極(例えば、下部電極、画素電極)から注入される電子が再結合することにより励起され、発光する表示機能層である。
発光層92は、少なくとも、発光の性質を有する材料(発光材料)を含有するとともに、好ましくは、電子輸送性を有する材料とを含有する。発光層92は、陽極と陰極の間に形成される層であり、下部電極88(陽極)の上にホール注入層91が形成されている場合は、ホール注入層91と上部電極87(陰極)との間に発光層92が形成される。また、陽極の上にホール輸送層が形成されている場合は、ホール輸送層と陰極との間に発光層92が形成される。上部電極87と下部電極88の役割は入れ替えることができる。
青色発光を与える発光材料としては、例えば、ナフタレン、ペリレン、ピレン、アントラセン、クマリン、クリセン、p-ビス(2-フェニルエテニル)ベンゼン及びそれらの誘導体等が挙げられる。緑色発光を与える発光材料としては、例えば、キナクリドン誘導体、クマリン誘導体、Al(C9H6NO)3等のアルミニウム錯体等が挙げられる。
赤色発光を与える発光材料としては、例えば、DCM(4-(dicyanomethylene)-2-methyl-6-(p-dimethylaminostyryl)-4H-pyran)系化合物、ベンゾピラン誘導体、ローダミン誘導体、ベンゾチオキサンテン誘導体、アザベンゾチオキサンテン等が挙げられる。
上記の発光層92を構成する有機EL層の構成や発光材料等は、上記材料に限られない。
下部電極88は、反射層89と導電性金属酸化物層97、98とが積層された構造を有する。なお、上部電極87と下部電極88の間に、発光層92のほかに電子注入層、電子輸送層、ホール輸送層などを挿入してもよい。
ホール注入層91には、酸化タングステンや酸化モリブデン等の高融点金属酸化物を用いることができる。反射層89には、光の反射率が高い銀合金、アルミニウム合金等が適用できる。なお、ITO等の導電性金属酸化物は、アルミニウムとの密着性が良くない。電極やコンタクトホール等の界面が、例えば、ITOとアルミニウム合金の場合は電気的接続不良を生じ易い。銀や銀合金は、ITO等の導電性金属酸化物との密着性が良好で、かつ、ITO等の導電性金属酸化物はオーミックコンタクトを得易い。
図8に示すように、本実施形態では、銀のマイグレーションを抑制するため、下部電極88は、銀あるいは銀合金層(反射層89)が導電性金属酸化物層97、98で挟持された3層構造を有する。導電性金属酸化物層97、98の材料としては、第1実施形態で説明した導電性金属酸化物層21、22を構成する導電性金属酸化物を用いることができる。
また、表示機能層に関し、発光層92(有機EL層)に代えて液晶層を用いる場合、銀合金層の膜厚を100nmから500nm膜厚にすることで、銀合金層を画素電極(下部電極)に用いることができ、反射型の液晶表示装置を実現することができる。
なお、対向基板100とアレイ基板200とが貼り合わされるシール部(不図示)において、対向基板100からアレイ基板200への導通の転移(トランスファ)を、シール部の厚み方向に行うことも可能である。異方性導電膜、微小な金属球、或いは金属膜で覆った樹脂球等から選ばれる導体をシール部に配置することで、対向基板100とアレイ基板200とを導通することができる。
なお、上記実施形態では、発光層92として有機エレクトロルミネセンス層(有機EL)を採用した構造を説明した。発光層92は、無機の発光ダイオード層であってもよい。また、発光層92は、無機のLEDチップがマトリクス状に配列された構造を有してもよい。この場合、赤色発光、緑色発光、青色発光の各々微小なLEDチップをアレイ基板200上にマウントしてもよい。LEDチップをアレイ基板200に実装する方法としては、フェースダウンによる実装を行ってもよい。
以下、図面を参照しながら本発明の第2実施形態について説明する。
第2実施形態においては、第1実施形態と同一部材には同一符号を付して、その説明は省略または簡略化する。
図10は、本発明の第2実施形態に係る表示装置DSP2を部分的に示す断面図である。表示装置DSP2においては、有機ELを表示機能層(発光層)として用いている。
また、第1タッチセンシング配線1の役割と第2タッチセンシング配線2の役割とを入れ替えてもよい。具体的に、第1タッチセンシング配線1をタッチ駆動電極として用い、第2タッチセンシング配線2をタッチ検出電極として用いてもよい。
以下、図面を参照しながら本発明の第3実施形態について説明する。
第3実施形態においては、第1実施形態及び第2実施形態と同一部材には同一符号を付して、その説明は省略または簡略化する。
図11は、本発明の第3実施形態に係る表示装置DSP3を部分的に示す断面図である。
複数の第1タッチセンシング配線1と複数の第2タッチセンシング配線2との間には、絶縁層I(タッチ配線絶縁層)が設けられており、第1タッチセンシング配線1と第2タッチセンシング配線2とは、絶縁層Iによって互いに電気的に絶縁されている。
図11に示す構造では、第1透明樹脂層108と第2透明樹脂層105とが貼り合わされている。
図12に示すように、第2タッチセンシング配線2は、観察方向OBにおいて第2黒色層76と第2導電層75とが順に積層された構成を有している。第2黒色層76は、第1実施形態の第2黒色層26と同じ構成を有する。第2導電層75は、第1実施形態の第2導電層25と同じ構成を有する。
また、第1タッチセンシング配線1の役割と第2タッチセンシング配線2の役割とを入れ替えてもよい。具体的に、第1タッチセンシング配線1をタッチ駆動電極として用い、第2タッチセンシング配線2をタッチ検出電極として用いてもよい。
以下、図面を参照しながら本発明の第4実施形態について説明する。
第4実施形態においては、第1実施形態と同一部材には同一符号を付して、その説明は省略または簡略化する。
図13は、本発明の第4実施形態に係る表示装置DSP4を部分的に示す断面図である。
第4実施形態によれば、発光層92の発光に伴って、フルカラー表示を実現することができる。
2・・・第2タッチセンシング配線
2A・・・センス配線(第2タッチセンシング配線2)
2B・・・引き出し配線(第2タッチセンシング配線2)
15・・・第1導電層
16・・・第1黒色層
12・・・第2絶縁層
13・・・第3絶縁層
14・・・第4絶縁層
20・・・金属層
21、97・・・第1導電性金属酸化物層
22、98・・・第2導電性金属酸化物層
25、75・・・第2導電層
26、76・・・第2黒色層
40・・・透明基板
42・・・透明基板
44・・・透明基板
45・・・基板
54・・・ソース電極
56・・・ドレイン電極
58・・・チャネル層
68・・・アクティブ素子
87・・・上部電極
88・・・下部電極(画素電極)
89・・・反射層
91・・・ホール注入層
92・・・発光層
93・・・コンタクトホール
94・・・バンク
95・・・ゲート電極
96・・・平坦化層
100、300、500、700・・・対向基板(表示装置基板)
105・・・第2透明樹脂層
108・・・第1透明樹脂層
109・・・封止層
110・・・表示部
120・・・制御部
121・・・映像信号制御部
122・・・タッチセンシング制御部
123・・・システム制御部
200、400、600・・・アレイ基板
F・・・第1面
S・・・第2面
I・・・絶縁層
P・・・観察者
R・・・赤着色層(カラーフィルタ)
G・・・緑着色層(カラーフィルタ)
B・・・青着色層(カラーフィルタ)
OB・・・観察方向
BM・・・ブラックマトリクス
PX・・・画素
TFT・・・薄膜トランジスタ
TM1・・・第1端子
TM2・・・第2端子
C1、C2、C3・・・静電容量
CF・・・カラーフィルタ
DSP1、DSP2、DSP3、DSP4・・・表示装置
Claims (13)
- 表示装置であって、
銀あるいは銀合金層が導電性金属酸化物層によって挟持された構成を有する電極と、前記電極から印加される駆動電圧で発光する発光層と、ゲート絶縁層と接触しかつ酸化物半導体で構成されたチャネル層を有するとともに前記発光層を駆動するアクティブ素子と、を備えるアレイ基板と、
前記アレイ基板に対向する第1面と前記第1面とは反対側の第2面とを有する透明基板と、前記第2面から前記第1面に向けた観察方向において第1黒色層と第1導電層とが順に積層された構成を有しかつ前記第2面上にて第1方向に並ぶように互いに平行に延在する複数の第1タッチセンシング配線と、前記観察方向において第2黒色層と第2導電層とが順に積層された構成を有しかつ前記複数の第1タッチセンシング配線と前記アレイ基板との間に位置するとともに平面視にて前記第1方向と直交する第2方向に並ぶように互いに平行に延在する複数の第2タッチセンシング配線と、平面視において前記複数の第1タッチセンシング配線と前記複数の第2タッチセンシング配線とによって区画される複数の画素と、を備える表示装置基板と、
第1タッチセンシング配線と第2タッチセンシング配線との間の静電容量の変化を検知してタッチセンシングを行う制御部と、
を含む表示装置。 - 前記第1タッチセンシング配線及び前記第2タッチセンシング配線は、前記第2面の上に形成され、
前記第1タッチセンシング配線と前記第2タッチセンシング配線との間には絶縁層が設けられ、
前記第1タッチセンシング配線及び前記第2タッチセンシング配線は、互いに電気的に絶縁されている請求項1に記載の表示装置。 - 前記第1タッチセンシング配線は、前記第2面の上に形成され、
前記第2タッチセンシング配線は、前記第1面の上に形成されている請求項1に記載の表示装置。 - 前記第1面の上に、前記観察方向において、順に、前記第1タッチセンシング配線及び前記第2タッチセンシング配線が形成され、
前記第1タッチセンシング配線と前記第2タッチセンシング配線との間には絶縁層が設けられ、
前記第1タッチセンシング配線及び前記第2タッチセンシング配線は、互いに電気的に絶縁されている請求項1に記載の表示装置。 - 前記酸化物半導体は、
ガリウム、インジウム、亜鉛、錫、アルミニウム、ゲルマニウム、及びセリウムから構成される群より選択される1種以上を含有する金属酸化物と、
少なくとも、アンチモン、ビスマスのうちいずれかを含有する金属酸化物と、
を含む請求項1に記載の表示装置。 - 前記ゲート絶縁層は、酸化セリウムを含む複合酸化物で形成されている請求項1に記載の表示装置。
- 前記アクティブ素子に電気的に連携された複数の配線のうち、少なくともゲート配線は、銀層、銀合金層、銅層、及び銅合金層から構成される群より選択される層が導電性金属酸化物層によって挟持された3層構造を有する請求項1に記載の表示装置。
- 前記発光層が、発光ダイオード層を含む請求項1に記載の表示装置。
- 前記発光層が、有機エレクトロルミネセンス層を含む請求項1に記載の表示装置。
- 請求項1に記載の表示装置に用いられる表示装置基板であって、
前記第1導電層及び前記第2導電層は、銀層、銀合金層、銅層、及び銅合金層から構成される群より選択される層が導電性金属酸化物層によって挟持された3層構造を有する表示装置基板。 - 前記導電性金属酸化物層は、
酸化インジウム、酸化亜鉛、酸化アンチモン、酸化錫、酸化ガリウム、及び酸化ビスマスから構成される群より選択される2種以上の金属酸化物を含む複合酸化物で形成されている請求項10に記載の表示装置基板。 - 前記導電性金属酸化物層は、酸化インジウム、酸化亜鉛、及び酸化錫を含む複合酸化物で形成され、
前記複合酸化物に含まれるインジウム(In)と亜鉛(Zn)と錫(Sn)のIn/(In+Zn+Sn)で示される原子比は、0.8より大きく、かつ、Zn/Snの原子比が1より大きい請求項10に記載の表示装置基板。 - 前記複数の画素は、カラーフィルタを備える請求項10に記載の表示装置基板。
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Also Published As
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CN109478110B (zh) | 2022-04-15 |
CN109478110A (zh) | 2019-03-15 |
KR20190028759A (ko) | 2019-03-19 |
JPWO2018051487A1 (ja) | 2018-09-13 |
JP6477910B2 (ja) | 2019-03-06 |
KR102207053B1 (ko) | 2021-01-25 |
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