WO2016117320A1 - 配線基板およびその設計方法 - Google Patents
配線基板およびその設計方法 Download PDFInfo
- Publication number
- WO2016117320A1 WO2016117320A1 PCT/JP2016/000205 JP2016000205W WO2016117320A1 WO 2016117320 A1 WO2016117320 A1 WO 2016117320A1 JP 2016000205 W JP2016000205 W JP 2016000205W WO 2016117320 A1 WO2016117320 A1 WO 2016117320A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- signal
- wiring
- insulating layer
- signal wiring
- interval
- Prior art date
Links
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0237—High frequency adaptations
- H05K1/024—Dielectric details, e.g. changing the dielectric material around a transmission line
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0296—Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
- H05K1/0298—Multilayer circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0237—High frequency adaptations
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0237—High frequency adaptations
- H05K1/0245—Lay-out of balanced signal pairs, e.g. differential lines or twisted lines
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0237—High frequency adaptations
- H05K1/0248—Skew reduction or using delay lines
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0313—Organic insulating material
- H05K1/0353—Organic insulating material consisting of two or more materials, e.g. two or more polymers, polymer + filler, + reinforcement
- H05K1/0366—Organic insulating material consisting of two or more materials, e.g. two or more polymers, polymer + filler, + reinforcement reinforced, e.g. by fibres, fabrics
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
- H05K3/061—Etching masks
- H05K3/064—Photoresists
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/01—Dielectrics
- H05K2201/0183—Dielectric layers
- H05K2201/0187—Dielectric layers with regions of different dielectrics in the same layer, e.g. in a printed capacitor for locally changing the dielectric properties
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/01—Dielectrics
- H05K2201/0183—Dielectric layers
- H05K2201/0195—Dielectric or adhesive layers comprising a plurality of layers, e.g. in a multilayer structure
Definitions
- the present invention relates to a wiring board that transmits a high-frequency signal, and particularly to a wiring board that transmits a differential signal in a high-frequency band.
- the signal transmission speed exceeds 10 Gbps (Giga bit per second), the speed increases in the giga region such as 28 Gbps and 56 Gbps, and differential signal wiring is the mainstream in signal wiring on wiring boards such as printed boards. .
- the differential signal is transmitted as a signal having an opposite phase through two signal wirings.
- it is necessary to suppress the difference in delay time between two signals having opposite phases as much as possible.
- the output side will deviate from the opposite phase and the output side semiconductor device will The signal may not be detected. Therefore, in a wiring board such as a printed board that transmits a high-speed differential signal, the difference in delay between the two signals needs to be suppressed.
- the dielectric constant of the insulating material forming the wiring board is reduced.
- a glass cloth may be used as a structural material in order to maintain the mechanical strength of the board.
- the glass fiber of glass cloth has a higher dielectric constant than an insulating layer having a low dielectric constant.
- a glass cloth used for a printed circuit board is formed by plain weaving glass fibers in a bundle of several fibers in the vertical and horizontal directions. In the glass cloth, an interval is generated between fiber bundles arranged in the vertical direction and the horizontal direction. Therefore, the signal transmitted through the signal wiring formed on the printed circuit board passes through the portion where the glass cloth exists and the portion containing only the insulating resin. Since the glass cloth glass fiber and the insulating layer resin have different relative dielectric constants, there is a difference in signal delay and loss when passing through the glass fiber portion and passing through the resin-only portion. Therefore, a difference occurs in the delay amount between signals transmitted through two differential signal wirings that pass through different positions.
- Patent Document 1 relates to a wiring board provided with differential signal wiring in which signal wirings for positive signals and negative signals are formed in two different wiring layers.
- differential signal wirings are formed in two different wiring layers, respectively.
- two wires as one pair as differential signal wires are formed in two different wiring layers so as not to overlap each other.
- predetermined parameters calculated based on the amount of horizontal deviation of two signal wires in one pair, the width of the signal wires, and the thickness of the insulating layer between the signal wires are within a certain range. Each design value is set so that Patent Document 1 states that transmission loss of differential signals can be suppressed by designing such that a predetermined parameter satisfies a condition.
- Patent Document 2 discloses an optimal via arrangement method in a wiring board.
- vias are arranged at each point of the grid, and it is determined whether the vias are properly arranged based on the presence / absence of vias at each point of the grid and wiring characteristics.
- Japanese Patent Application Laid-Open No. 2004-228561 describes that an evaluation with a via disposed at each point of a lattice can prevent an excessive or too small number of vias.
- Patent Document 3 discloses a technique for suppressing a difference in delay amount between differential signal wirings by appropriately setting a signal wiring width.
- Patent Document 3 relates to a wiring board including a differential signal wiring formed on an insulating layer having a glass cloth inside.
- the signal wiring width is set to be 75% to 95% with respect to the crease of the glass cloth, that is, the distance between the glass fibers.
- Patent Document 3 states that the change in the transmission time difference can be suppressed by setting the wiring width within a certain range with respect to the crease interval of the glass cloth.
- Patent Document 1 is not sufficient in the following points.
- the technique of Patent Document 1 takes into consideration the average characteristics of the insulating layer that enters between two signal wirings formed in different layers, but the characteristics of the glass cloth and the resin in the part where the wiring actually passes. The difference is not considered. Therefore, in Patent Document 1, when the electrical characteristics of the insulating layer vary in the horizontal direction depending on the location, if two signal wirings are formed on the insulating layer having different electrical characteristics, a difference in signal loss and delay amount may occur. .
- the technique of patent document 2 is for performing the horizontal arrangement
- Patent Document 1 in two signal wirings used as differential signal wirings, a signal loss or a delay difference due to a difference in electrical characteristics of the insulating layer may occur. For this reason, the techniques of Patent Document 1 and Patent Document 2 are not sufficient as a technique for suppressing a difference in delay between two signal wirings constituting a differential signal wiring.
- the wiring width is set within a predetermined range with respect to the distance between the glass cloths in the insulating layer. Therefore, in Patent Document 3, the wiring width is largely restricted by the distance between the glass cloths.
- signal wiring used as a transmission path for high-frequency signals there is a great restriction on the electrical characteristics of the signal wiring for transmission while suppressing attenuation of high-frequency signals. For this reason, if the wiring width is restricted within a predetermined range, the electrical characteristics must be maintained by parameters such as the film thickness of the wiring, which is greatly restricted in design, or an operable wiring board cannot be designed. There is a fear.
- Patent Document 3 since the technique of Patent Document 3 does not define the position where the wiring is formed, depending on the position of each of the two differential signal wirings, a difference in delay amount due to a difference in electrical characteristics of the insulating layer occurs. obtain. Therefore, the technique of Patent Document 3 is not sufficient as a technique for suppressing a difference in delay between two signal wirings constituting a differential signal wiring while maintaining a degree of design freedom.
- An object of the present invention is to obtain a wiring board capable of suppressing a difference in delay amount between two signal wirings constituting a differential signal wiring while ensuring a degree of design freedom.
- the wiring board of the present invention includes a first insulating layer, a first signal wiring, and a second signal wiring.
- the first insulating layer includes a fiber having a long axis in the first direction and arranged substantially in parallel at a first interval, and an insulating material filled to fill between the fibers in the first direction. Yes.
- the first signal wiring is formed on the first insulating layer substantially in parallel with the first direction.
- the second signal wiring is formed in parallel with the first signal wiring so that the distance between the second signal wiring and the first signal wiring is substantially an integral multiple of the first distance, and is transmitted through the first signal wiring.
- the differential signal is transmitted.
- the first substrate is filled so as to satisfy a space between fibers having a major axis in the first direction and arranged substantially parallel at a first interval, and fibers in the first direction.
- a first signal wiring and a second signal wiring are formed on a first insulating layer including the insulating material.
- the first signal wiring is formed substantially in parallel with the first direction.
- the second signal wiring is formed in parallel with the first signal wiring so that the distance between the second signal wiring and the first signal wiring is approximately an integral multiple of the first distance.
- the second glass cloth arranged substantially in parallel with the third fiber interval is set so that the first fiber interval and the third fiber interval coincide with each other. select.
- the first signal wiring and the differential signal of the signal transmitted through the first signal wiring are transmitted between the first insulating layer and the second insulating layer. 2 signal wirings are arranged.
- the first signal wiring and the second signal wiring are parallel to the first direction, and the distance between the first signal wiring and the second signal wiring is the first fiber spacing. It arrange
- the present invention it is possible to suppress the difference in delay amount between the two signal wirings constituting the differential signal wiring while ensuring the degree of freedom of design.
- FIG. 1 shows an outline of the configuration of the wiring board of the present embodiment.
- the wiring board of this embodiment includes a first insulating layer 1, a first signal wiring 2, and a second signal wiring 3.
- the first insulating layer 1 is an insulating material filled so as to satisfy the space between the fibers 4 having a major axis in the first direction and arranged substantially in parallel at a first interval, and the fibers 4 in the first direction. 5 is provided.
- the first signal wiring 2 is formed on the first insulating layer 1 substantially parallel to the first direction.
- the second signal wiring 3 is formed in parallel with the first signal wiring 2 so that the distance between the second signal wiring 3 and the first signal wiring 2 is approximately an integral multiple of the first distance. Transmit the differential signal of the transmitted signal.
- the first signal is arranged on the first insulating layer 1 so as to be substantially parallel to the fibers 4 having the long axis in the first direction and arranged in parallel at the first interval.
- a wiring 2 is formed.
- the second signal wiring 3 that transmits the differential signal of the signal transmitted through the first signal wiring 2 is parallel to the first signal wiring 2 and the distance from the first signal wiring 2 is the first. It is formed so as to be approximately an integral multiple of the interval.
- the interval between the first signal line 2 and the second signal line 3 By setting the interval between the first signal line 2 and the second signal line 3 to be an integral multiple of the first interval between the fibers 4 of the first insulating layer 1, the first signal line 2 and the second signal line 3 The area ratio of the fiber 4 and the insulating material 5 in the part through which the signal wiring 3 passes is almost equal. Therefore, the influences of the signals transmitted through the first signal wiring 2 and the second signal wiring 3 from the electrical characteristics of the first insulating layer 1 are almost equal. Therefore, the difference in the delay amount of the differential signal transmitted through the first signal wiring 2 and the second signal wiring 3 can be suppressed.
- the interval between the first signal wiring 2 and the second signal wiring 3 can be selected as an integral multiple of the first interval between the fibers 4 of the first insulating layer 1, the degree of freedom in wiring design is reduced. Can be suppressed. As described above, in the wiring board of the present embodiment, it is possible to suppress the difference in delay amount between the two signal wirings constituting the differential signal wiring while ensuring the degree of freedom of design.
- FIG. 2 shows an outline of the configuration of the wiring board of the present embodiment.
- the wiring board of this embodiment includes a first insulating layer 11, a second insulating layer 12, a first signal wiring 13, a second signal wiring 14, a first electrode 15, and a second electrode.
- An electrode 16 is provided.
- a third insulating layer 17 is stacked on the second insulating layer 12 with the second electrode 16 interposed therebetween.
- the wiring board of the present embodiment is a printed board having a multilayer wiring structure.
- the first insulating layer 11 and the third insulating layer 17 function as a core material.
- the second insulating layer 12 is a prepreg material used when a laminated multilayer wiring board is formed by pressure contact.
- the first signal wiring 13 and the second signal wiring 14 are signal wirings for transmitting a differential signal in a high frequency band. In the present embodiment, a positive signal is transmitted through the first signal wiring 13 and a negative signal is transmitted through the second signal wiring 14.
- FIG. 3 shows the portions of the first insulating layer 11, the first signal wiring 13 and the second signal wiring 14 in the wiring substrate shown in FIG.
- the upper part of FIG. 3 is a plan view of the wiring board.
- the lower part of FIG. 3 is a cross-sectional view of the wiring board shown in the same manner as FIG. 2, and shows a cross-sectional view of the first insulating layer 11, the first signal wiring 13, and the second signal wiring 14. .
- the first insulating layer 11 includes a glass cloth 21 and a resin 22.
- the first insulating layer 11 has a function of maintaining the structure and mechanical strength of the wiring board as a core material of the wiring board.
- the glass cloth 21 functions as a structural material for the first insulating layer 11.
- the glass cloth 21 is woven in a plain weave so that glass fibers in two directions are orthogonal to each other as shown in the upper part of FIG.
- the direction of the glass fiber means a direction parallel to the long axis of the glass fiber.
- the two directions are referred to as a first direction and a second direction, respectively.
- FIG. 4 is a diagram showing only the glass cloth 21 portion.
- a bundle of glass fibers having a long axis in the first direction are arranged in parallel at substantially equal intervals.
- the interval between the glass fibers having the major axis in the first direction is Pg (x).
- glass fiber bundles having a long axis in a second direction orthogonal to the first direction are arranged substantially in parallel.
- the bundle of glass fibers being parallel means that bundles of fibers in the same direction are aligned in the major axis direction without intersecting each other, and can be regarded as substantially parallel.
- the interval between the glass fibers having the major axis in the second direction is Pg (y).
- the glass fiber intervals Pg (x) and Pg (y) are the distances between the centers of the glass fibers forming a single bundle.
- the glass cloth 21 of the present embodiment is woven in a plain weave so that the bundle of fibers in the first direction and the bundle of fibers in the second direction are orthogonal to each other.
- a bundle of fibers in the first direction passes alternately up and down for each bundle of fibers in the second direction when orthogonal to the bundle of fibers in the second direction.
- Resin 22 has an insulating property and is filled to fill the space between the glass fibers of the glass cloth 21.
- an epoxy resin can be used as the resin 22.
- the first insulating layer 11 of the present embodiment corresponds to the first insulating layer 1 of the first embodiment.
- the resin 22 of the present embodiment corresponds to the insulating material 5.
- the glass fiber of the glass cloth 21 of the present embodiment corresponds to the fiber 4 of the first embodiment.
- the second insulating layer 12 includes a glass cloth 23 and a resin 24.
- the materials of the glass cloth 23 and the resin 24 are the same as those of the glass cloth 21 and the resin 22 of the first insulating layer 11, respectively.
- the distance between the glass fibers of the glass cloth 23 used for the second insulating layer 12 of the present embodiment is the same as the distance between the fibers of the glass cloth 21 of the first insulating layer 11.
- the first signal wiring 13 and the second signal wiring 14 are provided as wiring for transmitting a high-frequency differential signal.
- the first signal wiring 13 and the second signal wiring 14 transmit signals having opposite phases to each other.
- the first signal wiring 13 and the second signal wiring 14 are formed to be parallel to each other. Further, the first signal wiring 13 and the second signal wiring 14 are formed so that a straight line portion of the signal wiring is parallel to the first direction or the second direction.
- Parallel to the first direction means that the first direction and the straight line portion of the signal wiring can be regarded as substantially parallel.
- “parallel to the second direction” means that the second direction and the straight line portion of the signal wiring can be regarded as substantially parallel.
- first signal wiring 13 parallel to the first direction does not intersect a bundle of a plurality of glass fibers having a long axis in the first direction, it can be regarded as parallel.
- the distance between the first signal wiring 13 and the second signal wiring 14 is set to be a positive integer multiple of the distance between the glass fibers having major axes in the direction parallel to the direction of the signal wiring.
- the first signal wiring 13 of the present embodiment corresponds to the first signal wiring 2 of the first embodiment. Further, the second signal wiring 14 of the present embodiment corresponds to the second signal wiring 3 of the first embodiment.
- Nx is a natural number.
- the value of the wiring interval Pdx calculated from the glass cloth interval Pg (x) is preferably accurate to the second decimal place in millimeters in consideration of manufacturing errors. Therefore, the value of Nx that defines an integer multiple does not need to be strictly an integer. If the deviation from a certain integer is a deviation of the second decimal place or less, that is, a deviation of less than 0.10, an integer Can be considered. Therefore, in the following, it will be referred to as an integer multiple, including a substantially integer multiple state where the deviation is less than 0.10 from the integer.
- Ny is a natural number.
- the value of the wiring interval Pdy calculated from the glass cloth interval Pg (y) is preferably accurate to the second decimal place in millimeters. Therefore, the value of Ny that defines an integer multiple does not have to be strictly an integer. If the deviation from a certain integer is a deviation that is less than or equal to the second decimal place, that is, less than 0.10, an integer Can be considered.
- Nx and Ny may be different values.
- Pdx and Pdy are set to be equal.
- the configuration in which the signal wiring is parallel to the glass fiber direction and is a positive integer multiple of the glass fiber interval may not be applied to the entire surface of the substrate. For example, it may not be applied to a large-scale wiring such as a common power supply wiring or a ground wiring or a wiring for transmitting a low-speed signal. If the structure of this embodiment is applied to differential signal wiring that transmits a high-speed signal of a giga band between semiconductor devices and electronic components mounted on a wiring board, the effect of suppressing the delay amount can be obtained. Further, a particularly great effect can be obtained by using the wiring board in a region where the wiring pitch is narrow. This is because the influence of the electrical characteristics of the insulating layer on the signal delay increases as the wiring becomes finer.
- the wiring width and thickness of the first signal wiring 13 and the second signal wiring 14 are set so as to have a characteristic impedance according to the design of the wiring board.
- the first signal wiring 13 and the second signal wiring 14 of the present embodiment are formed using copper.
- the 1st signal wiring 13 and the 2nd signal wiring 14 may be formed with other metals, and may be formed as an alloy of a plurality of metals.
- the first electrode 15 is provided on the opposite side of the first signal wiring 13 and the second signal wiring 14 via the first insulating layer 11.
- the first electrode 15 is formed using copper.
- the first electrode 15 may be formed of another metal or may be formed as an alloy of a plurality of metals.
- the first electrode 15 of this embodiment forms a strip line with the first signal wiring 13 and the second signal wiring 14.
- a GND voltage is applied to the first electrode 15.
- the signal wiring is configured as a strip line, but may be configured as a microstrip line.
- the second electrode 16 is provided on the opposite side of the first signal wiring 13 and the second signal wiring 14 via the second insulating layer 12.
- the material of the second electrode 16 is the same as that of the first electrode 15.
- a GND voltage is applied to the second electrode 16 of the present embodiment.
- a voltage of a power supply may be applied to the first electrode 15 and the second electrode 16.
- the third insulating layer 17 has the same configuration as that of the first insulating layer 11.
- FIG. 5 shows a structure of a portion corresponding to the first insulating layer 11 and the second insulating layer 12 in the wiring board shown in FIG.
- three sets of differential signal wirings 25 are formed between the first insulating layer 11 and the second insulating layer 12.
- the differential signal wiring 25 is formed by a combination of the first signal wiring 13 and the second signal wiring 14.
- the distance Pg between the glass cloths of the first insulating layer 11 and the second insulating layer 12 is equal to the wiring distance Pd. Is formed.
- the left signal wiring is a positive signal wiring and the right signal wiring is a negative signal wiring.
- the shift width between the positive signal wiring and the glass fiber of the glass cloth 21 of the first insulating layer 11 is ⁇ Dpc
- the shift width between the negative signal wiring and the glass fiber of the first insulating layer 11 is ⁇ Dnc.
- the deviation width between the positive signal wiring and the glass fiber of the glass cloth 23 of the second insulating layer 12 is ⁇ Dpp
- the deviation width between the negative signal wiring and the glass fiber of the second insulating layer 12 is ⁇ Dnp.
- ⁇ Dpp ⁇ Dnp
- the overlapping width of the glass fiber of the second insulating layer 12 and the signal wiring of the positive signal is equal to the overlapping width of the glass fiber of the second insulating layer 12 and the signal wiring of the negative signal. Therefore, the influence of the electrical characteristics that the positive signal and the negative signal receive from the second insulating layer 12 are substantially equal.
- the influence of the electrical characteristics that the positive signal and the negative signal receive from the first insulating layer 11 and the second insulating layer 12 are substantially equal, and the delay amounts of the positive signal and the negative signal are equal.
- the glass cloth 21 of the first insulating layer 11 and the glass cloth 23 of the second insulating layer 12 are equal in distance to each other and the long axis direction is parallel.
- the difference in delay amount is equal. That is, even if the glass fiber of the glass cloth 21 of the first insulating layer 11 and the glass fiber of the glass cloth 23 of the second insulating layer 12 do not coincide with each other when viewed from the substrate vertical direction, the positive signal and the negative signal Are equally affected.
- the wiring board of the present embodiment is easy to manufacture because it is sufficient to align only the glass fiber direction of the glass cloth when the first insulating layer 11 and the second insulating layer 12 are overlapped.
- the signal wiring interval is twice as large as the glass fiber interval. Even in such a case, the amount of shift between the glass fiber of the first insulating layer 11 and the two signal wires is equal, and the overlapping width of the two signal wires and the glass fiber is also equal. Similarly, the two signal wirings have the same overlap width with respect to the glass fiber of the second insulating layer 12. Therefore, the influence of the electrical characteristics that the positive signal and the negative signal receive from the first insulating layer 11 and the second insulating layer 12 are substantially equal.
- the influence of the electrical characteristics that the positive signal and the negative signal receive from the first insulating layer 11 and the second insulating layer 12 are almost equal, and the difference in delay amount between the positive signal and the negative signal is equal.
- the interval between the differential signal wirings is a positive integer multiple of 3 or more with respect to the interval between the glass fibers.
- FIG. 6 schematically shows a portion of the first insulating layer 11 and the differential signal wiring 25 of the wiring board shown in FIGS.
- the width in which the two signal wires overlap the glass fibers of the glass cloth of the first insulating layer 11 is equal.
- the widths of the two signal wires overlapping the resin-only region of the first insulating layer 11 are equal.
- the distance between the signal wires is a positive integer multiple of the distance between the glass fibers of the glass cloth, the relationship in which the overlapping widths of the glass fibers and the resin are equal holds.
- the relationship in which the overlapping widths of the glass fibers and the resin of the two signal wirings are equal to the glass fiber and the resin of the second insulating layer 12 is the same. It holds. Therefore, the influence of the electrical characteristics that the positive signal and the negative signal receive from the first insulating layer 11 and the second insulating layer 12 are substantially equal, and the difference in the delay amount between the positive signal and the negative signal can be suppressed.
- the effect of suppressing the difference in the delay amount between the positive signal and the negative signal is obtained even if the position of the glass fiber of the first insulating layer 11 and the position of the glass fiber of the second insulating layer 12 do not coincide with each other. be able to. That is, by setting the wiring interval to a positive integer multiple of the glass fiber interval, the influence of the shift amount in the direction orthogonal to the major axis direction on the difference in the signal delay amount is small.
- the wiring board of this embodiment when the core material and the glass fiber are overlapped at the time of manufacture, it is not necessary to strictly manage the shift amount of the glass fiber in the direction orthogonal to the major axis direction of the glass fiber and the signal wiring. It is possible to prevent the manufacturing process from becoming complicated.
- a high-frequency positive signal is input to the signal wiring from one input side of the first signal wiring 13, transmitted to the output side, and output.
- a negative signal having the same frequency as that of the positive signal but having the opposite phase is input from one end of the input side of the second signal wiring 14 to the signal wiring, transmitted to the output side, and output.
- the positive signal and the negative signal are transmitted on a strip line constituted by the first signal wiring 13, the second signal wiring 14, and the first electrode 15.
- a positive signal transmitted through the first signal wiring 13 and a negative signal transmitted through the second signal wiring 14 are input as differential signals, and differential signal processing is performed in a semiconductor device or an electronic device connected to the output side. Is done.
- FIG. 7 is a diagram showing an example of signal delay by the differential signal wiring using the phase difference.
- a signal when a differential signal is input to the wiring board is shown on the left side of FIG.
- an example of a signal at the time of output is shown on the right side of FIG.
- the differential signal is input so that the positive signal and the negative signal are in opposite phases when input. That is, the phase difference between the positive signal and the negative signal at the time of input to the wiring board is 180 degrees.
- a delay difference skew
- FIG. 7 shows a case where a delay difference, that is, a difference in phase delay amount occurs by 180 degrees, and the phase difference between the positive signal and the negative signal at the time of output becomes 0 degrees.
- the amplitude difference between the signals is increased by setting the phase to be opposite, so that the signal can be easily detected on the output side. Therefore, when the phase is shifted on the output side, for example, when the phase is the same, the amplitude difference between the signals becomes small, and an abnormality in which the signal cannot be correctly detected on the output side may occur. Therefore, when a differential signal is used, it is necessary to suppress the signal delay difference as much as possible.
- FIG. 8 shows a structure in which, for comparison with the wiring board of the present embodiment, the positive signal wiring is arranged in the region where the glass fiber ratio of the glass cloth is the highest, and the negative signal wiring is arranged in the region where the resin ratio is the highest. It is the figure which showed the delay amount of the signal in.
- FIG. 8 shows the delay time of the positive signal (single (P)) and the negative signal (single (N)) with the horizontal axis set as the signal frequency and the vertical axis set as the delay time (Group Delay). .
- FIG. 9 shows the insertion loss for each frequency of the signal in the same structure as in FIG. 8 as the vertical axis.
- the fact that the phase difference between the positive signal and the negative signal deviates from the opposite phase and the amplitude difference becomes small is one of the causes of the insertion loss.
- the positive signal and the negative signal are in an unbalanced state. That is, the insertion loss of each signal alone is about ⁇ 10 dB, whereas the insertion loss of the differential signal (differential) is about ⁇ 15 dB.
- FIG. 10 is a graph showing the frequency dependence of the delay time in the wiring board of the present embodiment.
- the graph of FIG. 10 shows the delay time of the positive signal and the negative signal with the horizontal axis representing the signal frequency and the vertical axis representing the delay time, as in FIG. Comparing FIG. 8 and FIG. 10, the difference in the delay between the positive signal and the negative signal is smaller in FIG. 10 showing the delay time in the wiring board of the present embodiment.
- FIG. 11 shows the insertion loss for each frequency of the differential signal transmitted through the wiring board of the present embodiment as the vertical axis.
- the insertion loss of the positive signal, the negative signal, and the differential signal is almost equal, and is about ⁇ 10 dB at 20 GHz. Since it was about ⁇ 15 dB in the example of FIG. 9, the insertion loss is reduced by using the wiring board having the configuration of the present embodiment.
- the difference in delay amount is suppressed and the insertion loss of the differential signal is reduced by aligning the ratio of the signal wiring of the positive signal and the negative signal passing through the glass cloth and the resin. Yes.
- FIG. 12 shows an outline of the flow when setting the glass cloth and the wiring interval in the design stage of the wiring board of the present embodiment.
- the wiring board design method of this embodiment is mainly composed of the following four steps.
- Step 1 In selecting the core material and the prepreg material, that is, the structural material of the first insulating layer 11 and the second insulating layer 12, a glass cloth having the same glass cloth number as a glass cloth having common characteristics Select.
- the distance between the glass fibers of the glass cloth 21 of the first insulating layer 11 is equal to the distance between the glass fibers of the glass cloth 23 of the second insulating layer 12. That is, in step 1, a glass cloth having the same glass fiber interval is selected as the glass cloth to be applied to the first insulating layer 11 and the second insulating layer 12.
- Step 2 The glass cloth interval Pg is calculated from the glass cloth density of the selected glass cloth.
- Step 3 The wiring interval Pd of the differential signal wiring is set based on the interval Pg of the glass cloth. That is, the wiring interval Pd between the first signal wiring 13 and the second signal wiring 14 is set to be a positive integer multiple of Pg. When the distance Pg (x) in one direction of the glass cloth is different from the distance Pg (y) in the direction orthogonal thereto, the distance between the wirings is set for each direction.
- the value of the wiring interval Pd calculated from the glass cloth interval Pg is preferably set to the second decimal place in millimeters in consideration of manufacturing errors.
- the wiring width is determined so as to obtain a predetermined impedance.
- the predetermined impedance is determined based on characteristics that affect the electrical characteristics of the wiring, such as a relative dielectric constant, a wiring width, a wiring interval, and an insulating film thickness, in accordance with the required characteristics of the wiring board.
- the wiring pattern formed on the wiring board of the present embodiment is designed.
- FIG. 13 is a table showing an example of calculating the glass cloth interval from the density of the glass cloth.
- IPC in the table of FIG. 13 indicates a glass cloth number defined by IPC (Association / Connecting / Electronics / Industries, former name Institute / for Interconnecting / and Packaging / Electronics / Circuits).
- IPC Association / Connecting / Electronics / Industries, former name Institute / for Interconnecting / and Packaging / Electronics / Circuits.
- the glass cloth density in FIG. 13 indicates the number of glass fibers contained between 25 mm.
- the glass cloth density is shown for the longitudinal direction and the transverse direction of a glass cloth formed of plain weave.
- the vertical direction corresponds to the first direction in the present embodiment
- the horizontal direction corresponds to the second direction in the present embodiment.
- the glass cloth interval indicates values obtained by calculating the glass cloth interval from the glass cloth density in the vertical direction and the horizontal direction, respectively.
- the wiring pattern of the first signal wiring 13 and the second signal wiring 14 and the first electrode 15 are formed in the first insulating layer 11.
- the straight portions of the wiring patterns of the first signal wiring 13 and the second signal wiring 14 are formed along the long axis direction of the glass fiber of the glass cloth.
- the long axis direction of the glass fiber of the glass cloth is arranged to face a predetermined direction when the first insulating layer 11 is formed.
- the wiring board of this embodiment is formed so that the first direction and the second direction of the glass cloth are respectively parallel to the end face of the board when a rectangular or square wiring board is assumed. .
- the case where a rectangular or square wiring board is assumed refers to a case where the outer shape of the board is considered as having no notch when the end face of the board has a notch or the like.
- the bent portion of the signal wiring in the oblique direction is formed so that the first signal wiring 13 and the second signal wiring 14 are kept parallel to each other and the interval is the same as the straight line portion.
- the metal layer used as the first signal wiring 13, the second signal wiring 14, and the first electrode 15 is formed by attaching a copper foil sheet to the first insulating layer 11 on the surface.
- the metal layer may be formed by a sputtering method. In this embodiment, copper is used as the metal layer.
- the wiring patterns of the first signal wiring 13 and the second signal wiring 14 are formed by photolithography after the metal layer is formed.
- an alignment marker formed in advance on the substrate is used to align the long axis direction of the glass fiber with the direction of the signal wiring so that it is parallel to the long axis of the glass fiber.
- Signal wiring can be formed.
- the direction alignment when forming the signal wiring may be performed using the outer shape of the wiring board.
- the prepreg material used as the second insulating layer 12 and the third insulating layer 17 connected via the prepreg material are overlaid. Similar to the first insulating layer 11, wiring patterns and electrodes are formed on the third insulating layer 17.
- the number of insulating layers of the core material to be laminated may be three or more. Further, a wiring board provided with only one layer of the first insulating layer 11 may be used.
- the prepreg materials of the first insulating layer 11 and the second insulating layer 12 are overlapped, they are overlapped so that the axial directions of the glass cloth are aligned.
- the axial direction of the glass cloth refers to the long axis direction of the glass fibers constituting the glass cloth. Also.
- the distance between the glass fibers of the glass cloth constituting the prepreg material of the first insulating layer 11 and the second insulating layer 12 is the same for each axis.
- the glass cloth is designed so that the axial direction of the glass cloth matches by matching with the outer shape.
- each layer is formed as a single wiring board by pressure bonding.
- through holes and outermost wiring patterns are formed as necessary, and the board is cut to complete the wiring board.
- the completed wiring board is used as an electronic circuit for mounting a semiconductor device or an electronic component and transmitting a high-frequency signal.
- the first signal wiring 13 and the second signal wiring 14 are formed as differential signal wirings on the first insulating layer 11 which is a core material of the wiring board.
- the interval between the first signal wiring 13 and the second signal wiring 14 is the first insulating layer 11 having a major axis in the same direction as the long side direction of the first signal wiring 13 and the second signal wiring 14. It is set as a positive integer multiple of the glass fiber spacing.
- the distance between the glass fibers of the prepreg material used as the second insulating layer 12 is the same as that of the glass fiber of the second insulating layer 12.
- a similar effect can be obtained by setting the interval to be a positive integer multiple. For this reason, each of the two signal wirings constituting the differential signal wiring is almost equally affected by the electrical characteristics of the upper and lower insulating layers. By making the influence from the insulating layer almost equal, it is possible to suppress the difference in the delay amount between the positive signal and the negative signal transmitted through the differential signal wiring. By suppressing the difference in the delay amount between the positive signal and the negative signal transmitted through the differential signal wiring, the insertion loss of the differential signal transmitted through the wiring board of this embodiment can be reduced.
- the wiring interval between the first signal wiring 13 and the second signal wiring 14 is an integral multiple of the interval between the glass fibers constituting the first insulating layer 11 and the second insulating layer 12. Therefore, the degree of freedom in installing the signal wiring can be avoided. Therefore, the wiring board according to the present embodiment can ensure a degree of freedom in wiring design. As described above, in the wiring board of the present embodiment, it is possible to suppress the difference in delay amount between the two signal wirings constituting the differential signal wiring while ensuring the degree of freedom of design.
- the wiring board of this embodiment if the major axis directions of the glass fibers constituting the first insulating layer 11 and the second insulating layer 12 are substantially parallel, the positions of the glass fibers in the vertical direction coincide with each other. Even if not, the amount of delay can be suppressed. Therefore, the first insulating layer 11 and the second insulating layer 12 can be easily overlapped. As a result, the wiring board of this embodiment can be easily manufactured.
- the 2nd Embodiment demonstrated the example applied to a wiring board provided with the stripline comprised by the differential signal wiring and the GND electrode formed in the opposite side of the insulating layer with respect to the differential signal wiring.
- a configuration in which the wiring interval of the differential signal wiring is a positive integer multiple of the fiber interval of the glass cloth may be applied to the planar line. That is, in the wiring structure in which the differential signal wiring is formed in parallel with the GND wiring formed in the same phase as the GND wiring or in a different layer, the wiring spacing of the differential wiring is a positive integer multiple of the fiber spacing of the glass cloth. Configuration can be applied.
- FIG. 14 schematically shows the structure of a planar line in which the wiring interval of the differential signal wiring is an integral multiple of the fiber interval of the glass cloth.
- the wiring board having the planar line wiring structure shown in FIG. 14 includes a GND wiring 31, a differential signal wiring 32, a glass cloth 33, a resin 34, and an insulating layer 35.
- the GND wiring 31 corresponds to the first electrode 15 of the wiring board of FIG.
- the differential signal wiring 32 corresponds to the first signal wiring 13 and the second signal wiring 14 of the wiring board of FIG.
- the glass cloth 33 and the resin 34 are the same as the parts having the same names on the wiring board of FIG.
- the insulating layer 35 corresponds to the first insulating layer 11 of the wiring board of FIG.
- two differential signal wirings 32 are formed between the GND wirings 31.
- the wiring interval Pd of the differential signal wiring 32 is set to be N times the interval Pg of the glass fibers of the glass cloth.
- N is a natural number.
- FIG. 14 an example of one direction is shown, but the configuration of FIG. 14 can be further applied to a direction orthogonal to the glass cloth 33 and the differential signal wiring 32, as in the second embodiment. it can. Moreover, the effect of suppressing the delay amount can be obtained by similarly applying the configuration of FIG. 14 relating to the glass cloth and the wiring interval for the other insulating layers.
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Structure Of Printed Boards (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
Description
本発明の第1の実施形態について図を参照して詳細に説明する。図1は、本実施形態の配線基板の構成の概要を示したものである。本実施形態の配線基板は、第1の絶縁層1と、第1の信号配線2と、第2の信号配線3を備えている。第1の絶縁層1は、第1の方向に長軸を有し第1の間隔で略平行に並んだ繊維4と、第1の方向の繊維4の間を満たすように充てんされた絶縁材5を備えている。第1の信号配線2は、第1の絶縁層1上に第1の方向と略平行に形成されている。第2の信号配線3は、第1の信号配線2と平行に、第1の信号配線2との間隔が第1の間隔の略整数倍となるように形成され、第1の信号配線2で伝送される信号の差動信号を伝送する。
本発明の第2の実施形態について図を参照して詳細に説明する。図2は、本実施形態の配線基板の構成の概要を示したものである。
2 第1の信号配線
3 第2の信号配線
4 繊維
5 絶縁材
11 第1の絶縁層
12 第2の絶縁層
13 第1の信号配線
14 第2の信号配線
15 第1の電極
16 第2の電極
17 第3の絶縁層
21 ガラスクロス
22 樹脂
23 ガラスクロス
24 樹脂
25 差動信号配線
31 GND配線
32 差動信号配線
33 ガラスクロス
34 樹脂
35 絶縁層
Claims (10)
- 第1の方向に長軸を有し第1の間隔で略平行に並んだ繊維と、前記第1の方向の前記繊維の間を満たすように充てんされた絶縁材とを備える第1の絶縁層と、
前記第1の絶縁層上に前記第1の方向と略平行に形成された第1の信号配線と、
前記第1の信号配線と平行に、前記第1の信号配線との間隔が前記第1の間隔の略整数倍となるように形成され、前記第1の信号配線で伝送される信号の差動信号を伝送する第2の信号配線と、
を備えることを特徴とする配線基板。 - 前記第1の方向と略平行な第3の方向に長軸を有し前記第1の間隔で略平行に並んだ繊維と、前記第3の方向の前記繊維の間を満たすように充てんされた第2の絶縁材とを備える第2の絶縁層をさらに備え、
前記第1の絶縁層と前記第2の絶縁層が積層構造を形成していることを特徴とする請求項1に記載の配線基板。 - 前記第1の絶縁層は、前記第1の方向とは異なる第2の方向に長軸を有し第2の間隔で略平行に並んだ繊維をさらに備え、前記第1の絶縁材は、前記第2の方向の前記繊維の間をさらに充てんし、
前記第2の絶縁層は、前記第2の方向と略平行な第4の方向に長軸を有し前記第2の間隔で略平行に並んだ繊維をさらに備え、前記第2の絶縁材は、前記第2の方向の前記繊維の間をさらに充てんしていることを特徴とする請求項2に記載の配線基板。 - 前記第2の方向と略平行に形成された第3の信号配線と、
前記第3の信号配線と平行に、前記第3の信号配線との間隔が前記第2の間隔の略整数倍となるように形成され、前記第3の信号配線で伝送される信号の差動信号を伝送する第4の信号配線と、
をさらに備えることを特徴とする請求項3に記載の配線基板。 - 前記第1の信号配線および前記第2の信号配線は、前記第1の絶縁層の表面上に形成され、
前記第1の信号配線と前記第2の信号配線の間が、前記第2の絶縁層で充てんされていることを特徴とする請求項2から4いずれかに記載の配線基板。 - 第1の方向に長軸を有し第1の間隔で略平行に並んだ繊維と、前記第1の方向の前記繊維の間を満たすように充てんされた第1の絶縁材とを備える第1の絶縁層上に、
前記第1の方向と略平行に形成された第1の信号配線と、
前記第1の信号配線と平行に、前記第1の信号配線との間隔が前記第1の間隔の略整数倍となる第2の信号配線と、
を形成することを特徴とする配線基板の製造方法。 - 前記第1の方向と略平行な第3の方向に長軸を有し前記第1の間隔で略平行に並んだ繊維と、前記第3の方向の前記繊維の間に充てんされた第2の絶縁材とを備える第2の絶縁層を、
前記第1の絶縁層と積層構造となるように形成することを特徴とする請求項6に記載の配線基板の製造方法。 - 前記第1の信号配線および前記第2の信号配線を、前記第1の絶縁層の表面上に形成し、
前記第1の信号配線と前記第2の信号配線の間が、前記第2の絶縁層で充てんされるように前記第2の絶縁層を形成することを特徴とする請求項7に記載の配線基板の製造方法。 - 第1の方向に長軸を有する繊維が第1の繊維間隔で略平行に並んだ第1のガラスクロスと、第3の方向に長軸を有する繊維が第3の繊維間隔で略平行に並んだ第2のガラスクロスを、第1の絶縁層と第2の絶縁層に用いるガラスクロスとして前記第1の繊維間隔と前記第3の繊維間隔が一致するように選択し、
前記第1の絶縁層および前記第2の絶縁層の間に、第1の信号配線と、前記第1の信号配線で伝送される信号の差動信号を伝送する第2の信号配線を、前記第1の方向と略平行に、前記第1の信号配線と前記第2の信号配線の間隔が前記第1の繊維間隔の略整数倍となるように配置することを特徴とする配線基板の設計方法。 - 前記第1の絶縁層と前記第2の絶縁層に用いるガラスクロスを選択する際に、
前記第1のガラスクロスの前記第1の方向と直交する繊維の第2の繊維間隔と、前記第2のガラスクロスの前記第3の方向と直交する繊維の第4の繊維間隔とをさらに一致させるように前記ガラスクロスを選択することを特徴とする請求項9に記載の配線基板の設計方法。
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US15/534,626 US20180014402A1 (en) | 2015-01-21 | 2016-01-15 | Wiring board and method for designing same |
CN201680006713.6A CN107211546B (zh) | 2015-01-21 | 2016-01-15 | 布线板及其设计方法 |
JP2016570544A JP6508219B2 (ja) | 2015-01-21 | 2016-01-15 | 配線基板およびその設計方法 |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2015009817 | 2015-01-21 | ||
JP2015-009817 | 2015-01-21 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2016117320A1 true WO2016117320A1 (ja) | 2016-07-28 |
Family
ID=56416874
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP2016/000205 WO2016117320A1 (ja) | 2015-01-21 | 2016-01-15 | 配線基板およびその設計方法 |
Country Status (4)
Country | Link |
---|---|
US (1) | US20180014402A1 (ja) |
JP (1) | JP6508219B2 (ja) |
CN (1) | CN107211546B (ja) |
WO (1) | WO2016117320A1 (ja) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN107315878A (zh) * | 2017-06-29 | 2017-11-03 | 郑州云海信息技术有限公司 | 一种提高信号SI质量的Layout布线结构及布线方法 |
WO2021039299A1 (ja) * | 2019-08-26 | 2021-03-04 | 三菱電機株式会社 | 両面金属張積層板、プリント配線板、プリント配線装置 |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN108254625A (zh) * | 2017-12-29 | 2018-07-06 | 生益电子股份有限公司 | 一种插入损耗测试条 |
JP7006802B2 (ja) * | 2018-09-27 | 2022-01-24 | 株式会社村田製作所 | 樹脂多層基板 |
JP7423294B2 (ja) * | 2019-12-12 | 2024-01-29 | キヤノン株式会社 | 配線基板および電子機器 |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2009164416A (ja) * | 2008-01-08 | 2009-07-23 | Fujitsu Ltd | プリント配線板およびプリント基板ユニット |
JP2011082271A (ja) * | 2009-10-05 | 2011-04-21 | Fujitsu Ltd | 配線基板の製造方法及び配線基板の設計方法 |
Family Cites Families (20)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2004221558A (ja) * | 2002-12-24 | 2004-08-05 | Matsushita Electric Ind Co Ltd | 配線基板およびその製造方法 |
US7043706B2 (en) * | 2003-03-11 | 2006-05-09 | Intel Corporation | Conductor trace design to reduce common mode cross-talk and timing skew |
JP2006100699A (ja) * | 2004-09-30 | 2006-04-13 | Toshiba Corp | プリント配線板、情報処理装置、及びプリント配線板の製造方法 |
ATE381250T1 (de) * | 2005-05-13 | 2007-12-15 | Sefar Ag | Leiterplatte und verfahren zu deren herstellung |
CN101507058B (zh) * | 2006-07-14 | 2013-05-01 | 斯塔布科尔技术公司 | 具有构成电路一部分的核心层的增层印刷线路板衬底 |
JP2008171834A (ja) * | 2007-01-05 | 2008-07-24 | Hitachi Ltd | ガラスクロス配線基板 |
JP2009073946A (ja) * | 2007-09-21 | 2009-04-09 | Hitachi Ltd | 絶縁基材、配線基板及び多層基板 |
JP2009164174A (ja) * | 2007-12-28 | 2009-07-23 | Fujitsu Ltd | プリント配線板およびプリント基板ユニット |
CN101494948B (zh) * | 2008-01-24 | 2012-07-18 | 鸿富锦精密工业(深圳)有限公司 | 电路板及其设计方法 |
JP2009259879A (ja) * | 2008-04-14 | 2009-11-05 | Hitachi Ltd | 配線基板および多層配線基板 |
JP5302635B2 (ja) * | 2008-11-13 | 2013-10-02 | パナソニック株式会社 | 多層配線基板 |
JP5488112B2 (ja) * | 2010-03-29 | 2014-05-14 | 富士通株式会社 | プリント基板製造方法およびプリント基板 |
US8237058B2 (en) * | 2010-05-06 | 2012-08-07 | Oracle America, Inc. | Printed circuit board with low propagation skew between signal traces |
JP5471870B2 (ja) * | 2010-06-17 | 2014-04-16 | 富士通株式会社 | 配線基板 |
JP5589595B2 (ja) * | 2010-06-21 | 2014-09-17 | 富士通株式会社 | 配線基板及びその製造方法 |
JP2012009730A (ja) * | 2010-06-28 | 2012-01-12 | Kyocera Corp | 配線基板及びその実装構造体 |
JP5799237B2 (ja) * | 2011-07-20 | 2015-10-21 | パナソニックIpマネジメント株式会社 | プリント配線板 |
JP6019657B2 (ja) * | 2012-03-26 | 2016-11-02 | 富士通株式会社 | 設計支援プログラム、設計支援方法、設計支援装置および製造方法 |
JP6031943B2 (ja) * | 2012-10-29 | 2016-11-24 | 富士通株式会社 | 回路基板、回路基板の製造方法、電子装置及びガラスクロス |
JP6205721B2 (ja) * | 2012-12-28 | 2017-10-04 | 富士通株式会社 | 多層回路基板及び電子装置 |
-
2016
- 2016-01-15 JP JP2016570544A patent/JP6508219B2/ja not_active Expired - Fee Related
- 2016-01-15 CN CN201680006713.6A patent/CN107211546B/zh not_active Expired - Fee Related
- 2016-01-15 US US15/534,626 patent/US20180014402A1/en not_active Abandoned
- 2016-01-15 WO PCT/JP2016/000205 patent/WO2016117320A1/ja active Application Filing
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2009164416A (ja) * | 2008-01-08 | 2009-07-23 | Fujitsu Ltd | プリント配線板およびプリント基板ユニット |
JP2011082271A (ja) * | 2009-10-05 | 2011-04-21 | Fujitsu Ltd | 配線基板の製造方法及び配線基板の設計方法 |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN107315878A (zh) * | 2017-06-29 | 2017-11-03 | 郑州云海信息技术有限公司 | 一种提高信号SI质量的Layout布线结构及布线方法 |
WO2019000834A1 (zh) * | 2017-06-29 | 2019-01-03 | 郑州云海信息技术有限公司 | 一种提高信号SI质量的Layout布线结构及布线方法 |
US11126777B2 (en) | 2017-06-29 | 2021-09-21 | Zhengzhou Yunhai Information Technology Co., Ltd. | Layout routing structure and layout routing method for improving SI performance of signal |
WO2021039299A1 (ja) * | 2019-08-26 | 2021-03-04 | 三菱電機株式会社 | 両面金属張積層板、プリント配線板、プリント配線装置 |
Also Published As
Publication number | Publication date |
---|---|
CN107211546B (zh) | 2020-03-03 |
CN107211546A (zh) | 2017-09-26 |
JPWO2016117320A1 (ja) | 2017-10-05 |
JP6508219B2 (ja) | 2019-05-08 |
US20180014402A1 (en) | 2018-01-11 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
WO2016117320A1 (ja) | 配線基板およびその設計方法 | |
US20090032285A1 (en) | Multi-layer circuit substrate manufacturing method and multi-layer circuit substrate | |
EP2785155B1 (en) | Circuit board and electronic device | |
JP6031943B2 (ja) | 回路基板、回路基板の製造方法、電子装置及びガラスクロス | |
JP4683381B2 (ja) | 回路基板 | |
JP2009259879A (ja) | 配線基板および多層配線基板 | |
JP2009073946A (ja) | 絶縁基材、配線基板及び多層基板 | |
JP6205721B2 (ja) | 多層回路基板及び電子装置 | |
US8743557B2 (en) | Printed wiring board | |
JP6493557B2 (ja) | 回路基板及び電子装置 | |
US9668362B2 (en) | Multilayer printed circuit board and method of manufacturing the same | |
JP2014154593A (ja) | 高周波パッケージ | |
KR102149793B1 (ko) | 인쇄회로기판 및 인쇄회로기판의 휨 제어방법 | |
CN219979788U (zh) | 多层基板和电子设备 | |
JP4964090B2 (ja) | 差動信号伝送用配線基板 | |
JP5862482B2 (ja) | フラットケーブルの製造方法 | |
JP6565474B2 (ja) | 配線基板、電子機器および配線基板の製造方法 | |
JP7205667B2 (ja) | 信号伝送線路 | |
JP6613991B2 (ja) | 配線基板の製造方法 | |
CN113545172B (zh) | 用于通过电子部件路由电信号的技术以及相关方法 | |
US20190357350A1 (en) | Wiring board and method for manufacturing same | |
JP5375235B2 (ja) | 回路基板 | |
JP2023111364A (ja) | 伝送構造体および伝送構造体を備える配線基板 | |
JP5575730B2 (ja) | 半導体装置用多層配線基板 | |
WO2018211897A1 (ja) | 複合多層基板 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
121 | Ep: the epo has been informed by wipo that ep was designated in this application |
Ref document number: 16739930 Country of ref document: EP Kind code of ref document: A1 |
|
ENP | Entry into the national phase |
Ref document number: 2016570544 Country of ref document: JP Kind code of ref document: A |
|
NENP | Non-entry into the national phase |
Ref country code: DE |
|
WWE | Wipo information: entry into national phase |
Ref document number: 15534626 Country of ref document: US |
|
122 | Ep: pct application non-entry in european phase |
Ref document number: 16739930 Country of ref document: EP Kind code of ref document: A1 |