WO2016000399A1 - 有机薄膜晶体管及其制备方法、阵列基板及其制备方法、显示装置 - Google Patents

有机薄膜晶体管及其制备方法、阵列基板及其制备方法、显示装置 Download PDF

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WO2016000399A1
WO2016000399A1 PCT/CN2014/093052 CN2014093052W WO2016000399A1 WO 2016000399 A1 WO2016000399 A1 WO 2016000399A1 CN 2014093052 W CN2014093052 W CN 2014093052W WO 2016000399 A1 WO2016000399 A1 WO 2016000399A1
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organic
drain
layer
source
semiconductor active
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PCT/CN2014/093052
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English (en)
French (fr)
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方汉铿
谢应涛
欧阳世宏
蔡述澄
石强
刘则
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京东方科技集团股份有限公司
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Priority to US14/764,453 priority Critical patent/US9583722B2/en
Priority to EP14882145.7A priority patent/EP3166156B1/en
Publication of WO2016000399A1 publication Critical patent/WO2016000399A1/zh

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having potential barriers
    • H10K10/80—Constructional details
    • H10K10/88—Passivation; Containers; Encapsulations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having potential barriers
    • H10K10/40—Organic transistors
    • H10K10/46—Field-effect transistors, e.g. organic thin-film transistors [OTFT]
    • H10K10/462—Insulated gate field-effect transistors [IGFETs]
    • H10K10/464—Lateral top-gate IGFETs comprising only a single gate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having potential barriers
    • H10K10/40—Organic transistors
    • H10K10/46—Field-effect transistors, e.g. organic thin-film transistors [OTFT]
    • H10K10/462—Insulated gate field-effect transistors [IGFETs]
    • H10K10/466—Lateral bottom-gate IGFETs comprising only a single gate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having potential barriers
    • H10K10/40—Organic transistors
    • H10K10/46—Field-effect transistors, e.g. organic thin-film transistors [OTFT]
    • H10K10/462—Insulated gate field-effect transistors [IGFETs]
    • H10K10/468—Insulated gate field-effect transistors [IGFETs] characterised by the gate dielectrics
    • H10K10/471—Insulated gate field-effect transistors [IGFETs] characterised by the gate dielectrics the gate dielectric comprising only organic materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having potential barriers
    • H10K10/80—Constructional details
    • H10K10/82—Electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having potential barriers
    • H10K10/80—Constructional details
    • H10K10/82—Electrodes
    • H10K10/84—Ohmic electrodes, e.g. source or drain electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K19/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic element specially adapted for rectifying, amplifying, oscillating or switching, covered by group H10K10/00
    • H10K19/10—Integrated devices, or assemblies of multiple devices, comprising at least one organic element specially adapted for rectifying, amplifying, oscillating or switching, covered by group H10K10/00 comprising field-effect transistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/10—Deposition of organic active material
    • H10K71/12—Deposition of organic active material using liquid deposition, e.g. spin coating
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/20—Changing the shape of the active layer in the devices, e.g. patterning
    • H10K71/231—Changing the shape of the active layer in the devices, e.g. patterning by etching of existing layers
    • H10K71/233—Changing the shape of the active layer in the devices, e.g. patterning by etching of existing layers by photolithographic etching
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/125—Active-matrix OLED [AMOLED] displays including organic TFTs [OTFT]

Definitions

  • At least one embodiment of the present invention relates to an organic thin film transistor and a method of fabricating the same, an array substrate, a method of fabricating the same, and a display device.
  • OFT Organic Thin Film Transistor
  • the core structure of OTFT is an organic semiconductor active layer prepared by using an organic semiconductor material. Since organic semiconductor materials have strong activity and most of them are prepared under low temperature conditions (less than 200 ° C), it is necessary to select a suitable one.
  • the insulating layer material is overlaid on the active layer of the organic semiconductor to ensure good packaging and protection of the organic semiconductor active layer, thereby ensuring stability of various properties of the organic semiconductor active layer is not affected by other preparation processes.
  • At least one embodiment of the present invention provides an organic thin film transistor and a method for fabricating the same, an array substrate, a method for fabricating the same, and a display device, to achieve uniform thickness formation and thin film formation while effectively packaging and protecting the organic semiconductor active layer
  • the organic insulating layer reduces the difficulty of forming the via holes of the organic insulating layer and improves the process reliability.
  • At least one embodiment of the present invention provides a method of fabricating an organic thin film transistor, the method comprising: forming a source/drain metal layer including a source and a drain, and an organic semiconductor active layer; a semiconductor active layer is in contact with the source and the drain; forming an organic insulating film on a substrate on which a source/drain metal layer including the source, the drain, and the organic semiconductor active layer are formed; Thinning the thickness of the organic insulating film by an etching thinning process and curing the thinned organic insulating film by a curing process, or curing the organic insulating film by a curing process and thinning and curing by an etching thinning process The thickness of the organic insulating film to form An organic insulating layer; the method further comprising forming a gate.
  • At least one embodiment of the present invention also provides a method of fabricating an array substrate, the method comprising the steps of: forming an organic thin film transistor, which is prepared by the above preparation method.
  • At least one embodiment of the present invention provides an organic thin film transistor prepared by the above preparation method; the organic thin film transistor includes an organic insulating layer over an organic semiconductor active layer, the organic insulating layer The thickness is from 300 nm to 500 nm.
  • At least one embodiment of the present invention also provides an array substrate including the above-described organic thin film transistor.
  • At least one embodiment of the present invention further provides a display device including the above-described organic thin film transistor or the above array substrate.
  • FIG. 1 is a schematic diagram of a preparation process of an organic thin film transistor according to an embodiment of the present invention
  • FIG. 2(a) is a schematic diagram of a bottom gate bottom contact type structure according to an embodiment of the present invention.
  • FIG. 2(b) is a schematic diagram of a bottom gate top contact type structure according to an embodiment of the present invention.
  • FIG. 3(a) is a schematic diagram of a top gate bottom contact type structure according to an embodiment of the present invention.
  • FIG. 3(b) is a schematic diagram of a top gate top contact type structure according to an embodiment of the present invention.
  • 4(a) and 4(b) are schematic diagrams 1 and 2 for forming an organic semiconductor film and an organic photosensitive film on a substrate on which a source and a drain are formed for a bottom contact type organic thin film transistor;
  • Figure 5 (a) is a schematic view showing the completely retained portion and the completely removed portion of the organic photosensitive film formed on the basis of Figure 4 (a);
  • Figure 5 (b) is a schematic view showing the completely retained portion and the completely removed portion of the organic photosensitive film formed on the basis of Figure 4 (b);
  • Figure 6 (a) is a schematic view showing the formation of an organic semiconductor active layer on the basis of Figure 5 (a);
  • Figure 6 (b) is a schematic view showing the formation of an organic semiconductor active layer on the basis of Figure 5 (b);
  • Figure 7 (a) is a schematic view showing the formation of an organic etch barrier layer on the basis of 6 (a);
  • Figure 7 (b) is a schematic view showing the formation of an organic etch barrier layer on the basis of 6 (b);
  • 8(a) and 8(b) are schematic diagrams 1 and 2 showing the formation of an organic semiconductor film and an organic photosensitive film on a substrate for a top contact type organic thin film transistor;
  • Figure 9 (a) is a schematic view showing the formation of a fully-retained portion, a completely removed portion, and a semi-retained portion of the organic photosensitive film on the basis of Figure 8 (a);
  • Figure 9 (b) is a schematic view showing the formation of a fully-retained portion, a completely removed portion, and a semi-retained portion of the organic photosensitive film on the basis of Figure 8 (b);
  • Figure 10 (a) is a schematic view showing the formation of an organic semiconductor active layer on the basis of Figure 9 (a);
  • Figure 10 (b) is a schematic view showing the formation of an organic semiconductor active layer on the basis of Figure 9 (b);
  • Figure 11 (a) is a schematic view showing the organic semiconductor active layer removed by removing the semi-retained portion of the organic photosensitive film on the basis of Figure 10 (a);
  • Figure 11 (b) is a schematic view showing the organic semiconductor active layer removed by removing the semi-retained portion of the organic photosensitive film on the basis of Figure 10 (b);
  • Figure 12 (a) is a schematic view showing the formation of an organic etch barrier layer on the basis of Figure 11 (a);
  • Figure 12 (b) is a schematic view showing the formation of an organic etch barrier layer on the basis of Figure 11 (b);
  • Figure 13 (a) is a schematic view showing the formation of a source and a drain on the basis of Figure 12 (a);
  • Figure 13 (b) is a schematic view showing the formation of a source and a drain on the basis of Figure 12 (b);
  • Figure 14 (a) is a schematic view showing the formation of an organic insulating film on the basis of Figure 7 (a);
  • Figure 14 (b) is a schematic view showing the formation of an organic insulating film on the basis of Figure 7 (b);
  • Figure 14 (c) is a schematic view showing the formation of an organic insulating film on the basis of Figure 13 (a);
  • Figure 14 (d) is a schematic view showing the formation of an organic insulating film on the basis of Figure 13 (b);
  • Figure 15 (a) is a schematic view showing the thickness of the organic insulating film thinned by the first etching thinning process on the basis of Figure 14 (a);
  • Figure 15 (b) is a schematic view showing the thickness of the organic insulating film thinned by the first etching thinning process on the basis of Figure 14 (b);
  • Figure 15 (c) is a schematic view showing the thickness of the organic insulating film thinned by the first etching thinning process on the basis of Figure 14 (c);
  • Figure 15 (d) is a schematic view showing the thickness of the organic insulating film thinned by the first etching thinning process on the basis of Figure 14 (d);
  • Figure 16 (a) is a schematic view showing the first region of the curing step S34 on the basis of Figure 15 (a);
  • Figure 16 (b) is a schematic view showing the first region of the step S34 of curing completion on the basis of Figure 15 (b);
  • Figure 16 (c) is a schematic view showing the first region of the step S34 of curing completion on the basis of Figure 15 (c);
  • Figure 16 (d) is a schematic view showing the first region of the curing step S34 on the basis of Figure 15 (d);
  • Figure 17 (a) is a schematic view of thinning the second region on the basis of Figure 16 (a);
  • Figure 17 (b) is a schematic view of thinning the second region on the basis of Figure 16 (b);
  • Figure 17 (c) is a schematic view of thinning the second region on the basis of Figure 16 (c);
  • Figure 17 (d) is a schematic view of thinning the second region on the basis of Figure 16 (d);
  • Figure 18 (a) is a schematic view showing the formation of an organic insulating layer on the basis of Figure 17 (a);
  • Figure 18 (b) is a schematic view showing the formation of an organic insulating layer on the basis of Figure 17 (b);
  • Figure 18 (c) is a schematic view showing the formation of an organic insulating layer on the basis of Figure 17 (c);
  • Figure 18 (d) is a schematic view showing the formation of an organic insulating layer on the basis of Figure 17 (d);
  • 19(a), 19(b), 19(c), and 19(d) are a schematic structural diagram 1, a schematic diagram 2, a schematic diagram 3, and a schematic diagram 4 of an array substrate according to an embodiment of the present invention.
  • 01-organic thin film transistor 10-substrate substrate; 11-gate; 12a-source; 12b-drain; 13-organic semiconductor active layer; 130-organic semiconductor film; 14-organic insulating layer; Insulating film; 15-gate insulating layer; 16-organic etching barrier layer; 160-organic photosensitive film; 160a-organic photosensitive film completely retained portion; 160b-organic photosensitive film completely removed portion; 160c-organic photosensitive film semi-retained portion; 02-array substrate; 20-flat layer; 21-via; 22-pixel electrode.
  • the inventors of the present application have noticed that in the preparation process of the OTFT, the insulating layer material is overlaid on the active layer of the organic semiconductor, so that the organic semiconductor active layer is well packaged and protected in the following two ways. difficulty.
  • an insulating layer prepared by using an inorganic material such as silicon nitride (SiN x ) or silicon oxide (SiO x ) generally requires a high preparation temperature (for example, 200 ° C - 400 ° C) in the film formation process, and It is necessary to use a corrosive gas, and high temperature and corrosive gases destroy the activity of the organic semiconductor material; therefore, an insulating layer made of an inorganic material is difficult to apply to an OTFT.
  • an insulating layer prepared by using an organic material such as polyvinyl alcohol (PVA) or polyvinyl pyrrolidone (PVP), the thickness of which is usually on the order of micrometers (1 ⁇ m - 2 ⁇ m);
  • PVA polyvinyl alcohol
  • PVP polyvinyl pyrrolidone
  • a via hole is formed on the insulating layer to electrically connect the drain of the OTFT to the pixel electrode due to the source and drain of the insulating layer relative to the OTFT.
  • the difference in the thickness dimension of the pole is large, which leads to an increase in the difficulty of forming a via hole, and is likely to cause a via fault, thereby reducing the process reliability of the OTFT applied to the array substrate.
  • an insulating layer of a thin organic material is directly formed over the active layer of the organic semiconductor, it is difficult to ensure film formation uniformity and continuity of the insulating layer film. Therefore, the coverage of the insulating layer on the organic semiconductor active layer is reduced or insufficient coverage occurs at the edge of the gap between the source and the drain, which affects the encapsulation and protection efficiency of the insulating layer on the organic semiconductor active layer;
  • the formation of an insulating layer of a thin organic material may also cause problems such as excessive surface roughness of the film, so that the flatness of the insulating layer is lowered, which affects other subsequent film forming processes.
  • At least one embodiment of the present invention provides a method of fabricating an organic thin film transistor 01, the method comprising: forming a source/drain metal layer including a source and a drain, and organically contacting the source and the drain a semiconductor active layer; forming an organic insulating film on a substrate on which a source/drain metal layer including the source, the drain, and the organic semiconductor active layer are formed; and thinning the organic layer by an etching thinning process Thickening the insulating film and curing the thinned organic insulating film by a curing process, or curing the organic insulating film by a curing process and thinning and curing by an etching thinning process The thickness of the latter organic insulating film is formed to form an organic insulating layer.
  • the following embodiments are described by taking an organic insulating layer by thinning the thickness of the organic insulating film by an etching thinning process and curing the thinned organic insulating film by a curing process.
  • the preparation method comprises the following main steps:
  • Step S01 forming a source/drain metal layer including a source electrode 12a and a drain electrode 12b, and an organic semiconductor active layer 13; the organic semiconductor active layer 13 is in contact with the source electrode 12a and the drain electrode 12b, as shown in FIG. 4(a) to Figure 13(b).
  • Step S02 forming an organic insulating film 140 on a substrate on which the source/drain metal layer including the source electrode 12a, the drain electrode 12b, and the organic semiconductor active layer 13 are formed, and thinning by an etching thinning process
  • the thickness of the organic insulating film 140 is cured by a curing process to form the organic insulating film 140, as shown in FIGS. 14(a) to 18(d).
  • the preparation method further includes forming the gate electrode 11.
  • the first organic thin film transistor 01 can be classified into different types according to different division standards.
  • the organic thin film transistor 01 can be classified into a bottom gate type and a top gate type depending on the order in which the source 12a, the drain 12b, and the gate 11 are deposited in the organic thin film transistor 01.
  • the active layer 13 is formed on the base substrate 10 including the gate electrode 11 and the gate insulating layer 15.
  • the active layer 13 is formed on the base substrate 10; in this case, the gate electrode 11 is formed on the substrate including the organic insulating layer 14.
  • the organic thin film transistor 01 can also be classified into a bottom contact type and a top contact type.
  • the source 12a and the drain 12b are located below the organic semiconductor active layer 13 as a bottom contact type as shown in FIGS. 2(a) and 3(a); otherwise, the source 12a and the drain 12b are located in the organic semiconductor.
  • the upper side of the source layer 13 is referred to as a top contact type as shown in Figs. 2(b) and 3(b).
  • the preparation method provided by the embodiments of the present invention can be applied to various types of organic thin film transistors, that is, the bottom gate contact type shown in FIG. 2(a) and the bottom gate top shown in FIG. 2(b).
  • step S01 in the case where the organic thin film transistor 01 is of a bottom contact type, the organic semiconductor active layer 13 and the source are shown with reference to FIGS. 2(a) and 3(a).
  • the electrode 12a and the drain electrode 12b are in contact, a portion of the drain electrode 12b may be exposed, that is, when the organic thin film transistor 01 is applied to the array substrate, the drain electrode 12b is electrically connected to the pixel electrode through a via hole.
  • the via hole penetrating the organic insulating layer 14 it is not necessary to penetrate the organic semiconductor active layer 13, which avoids the destruction of the organic semiconductor active layer 13 by the etching process.
  • the thickness of the organic insulating film 140 is thinned by using an etching thinning process, for example, it may be directly thinned to a corresponding thickness by one thinning, or may be used multiple times.
  • the organic insulating film 140 is finally thinned to a corresponding thickness; the process can be flexibly adjusted according to the thickness and material of the formed organic insulating film 140, which is not limited in the embodiment of the present invention.
  • the etching thinning process may be, for example, a wet etching process or a plasma dry etching process (such as using O 2 plasma); the curing process is for example It may be a thermal curing process by baking or the like, a UV curing process, or a combination curing process of the foregoing two modes; a suitable etching may be selected according to the thickness and material of the formed organic insulating film 140.
  • the thinning process and the curing process are not limited in the embodiment of the present invention.
  • the organic insulating layer 14 is used for encapsulating and protecting the organic semiconductor active layer. 13.
  • the source electrode 12a and the drain electrode 12b simultaneously insulate the gate electrode 11 from the organic semiconductor active layer 13, the source electrode 12a, and the drain electrode 12b. effect.
  • At least one embodiment of the present invention provides a method of fabricating an organic thin film transistor 01, the method comprising: forming a source/drain metal layer including a source 12a, a drain 12b, and an organic semiconductor active layer 13; The organic semiconductor active layer 13 is in contact with the source 12a and the drain 12b; a source/drain metal layer including the source 12a and the drain 12b, and the organic semiconductor active layer 13 are formed.
  • the organic insulating film 140 is formed on the substrate, and the thickness of the organic insulating film 140 is thinned by an etching thinning process and the organic insulating film 140 is cured by a curing process to form the organic insulating layer 14.
  • the preparation method further includes forming the gate electrode 11.
  • the organic insulating film 140 can ensure that the formed organic insulating film 140 has good film formation uniformity and continuity, and the coverage of the organic semiconductor active layer 13 due to the small thickness of the film layer is prevented from falling. Or, an insufficient coverage of the organic insulating film occurs at the gap edge between the source electrode 12a and the drain electrode 12b. Thereafter, the etching thinning process is performed on the organic insulating film 140 which has been deposited, so that the organic insulating layer 14 having a small film thickness can be obtained.
  • the above preparation method overcomes the disadvantage that it is difficult to form a uniform continuous film which is likely to occur when the organic insulating layer having a small thickness of the film layer is directly formed, and the formation of the organic semiconductor active layer 13 is effectively formed and protected.
  • the step S01 before the forming the organic insulating film 140, the step S01 further includes: forming an organic etch barrier layer 16.
  • the organic etch barrier layer 16 is located above the organic semiconductor active layer 13 and the organic etch barrier layer 16 corresponds to a gap between the source 12a and the drain 12b.
  • the organic semiconductor active layer 13 refers to a side of the organic semiconductor active layer 13 away from the base substrate 10, and the organic etch stop layer 16 functions to protect the
  • the organic semiconductor active layer 13 corresponds to a surface at a region of the gap between the source 12a and the drain 12b.
  • the above step S01 may include the following two cases, for example, The two cases are described in detail.
  • the above step S01 may include, for example, the following four sub-steps, which are described one by one below.
  • Step S11 as shown in FIG. 4(a) or FIG. 4(b), an organic semiconductor thin film 130 and an organic photosensitive film are sequentially formed on a substrate on which a source/drain metal layer including the source electrode 12a and the drain electrode 12b is formed. Film 160.
  • the source electrode 12 a and the drain electrode 12 b are formed.
  • the substrate of the source/drain metal layer is a base substrate 10 including a gate electrode 11 and a gate insulating layer 15.
  • the gate insulating layer 15 may be made of a metal oxide, or a metal nitride, or an insulating material such as an organic material, and may have a thickness of, for example, 30 nm to 1000 nm. Referring to FIG.
  • a source/drain metal layer including the source electrode 12a and the drain electrode 12b is formed on a base substrate. 10 on.
  • the case after the gate is formed on the substrate of FIG. 4(b) is as shown in FIG. 3(a), and the gate electrode 11 may be made of, for example, a metal material, or an indium tin oxide (ITO) material, or doped silicon.
  • ITO indium tin oxide
  • the material or the organic conductive material may have a thickness of, for example, 20 nm to 200 nm; and the source 12a and the drain 12b may be made of a metal material (such as Au, Ag, Mo, Al, Cu, etc.), or Made of ITO, the thickness thereof may be, for example, 20 nm to 300 nm.
  • the organic semiconductor thin film 130 may be made of, for example, an organic semiconductor material such as pentacene, or a metal phthalocyanine compound, or a thiophene-based polymer, or a polycyclic aromatic polymer, and the deposition method may be carried out by those skilled in the art. Known techniques are not limited herein.
  • the organic photosensitive film may be made of, for example, a photoresist material, or may be made of other photosensitive polymer materials that undergo photochemical reaction by light (such as photocrosslinking or photodegradation).
  • Step S12 as shown in FIG. 5(a) or FIG. 5(b), after the substrate on which the organic photosensitive film 160 is formed is exposed and developed by using a common mask, the organic photosensitive film completely retained portion 160a and the organic photosensitive film are formed. The film completely removes the portion 160b.
  • the organic photosensitive film completely retains a portion 160a corresponding to the region of the organic semiconductor active layer 13 to be formed, and the organic photosensitive film completely removed portion 160b corresponds to other regions.
  • Step S13 as shown in FIG. 6(a) or FIG. 6(b), the organic semiconductor thin film 130 exposed by the organic photosensitive film completely removed portion 160b (not shown) is removed by an etching process (Fig. The organic semiconductor active layer 13 is formed, not shown in the middle.
  • the organic semiconductor active layer 13 formed exposes a portion of the drain electrode 12b and a portion of the source electrode 12a.
  • Step S14 as shown in FIG. 7(a) or FIG. 7(b), the organic photosensitive film completely retained portion 160a formed on the organic semiconductor active layer 13 is cured by a curing process (not shown in the figure). Out) to form the organic etch stop layer 16.
  • the formation of the organic semiconductor active layer having a certain pattern is usually performed by a patterning process, and the typical patterning process refers to a process of applying a mask, exposing, developing, etching, and removing the photoresist through the photoresist.
  • Organic semiconductor active layer thickness usually 10nm-200nm
  • the order of magnitude is small relative to the thickness of the photoresist (usually 500 nm to 1000 nm), and is removed on the surface of the organic semiconductor active layer by an ashing process (such as dry etching) or flaking (such as wet etching).
  • the remaining photoresist When the remaining photoresist is used, it is possible to peel off the organic semiconductor active layer together, or to correspond to the gap between the source and the drain of the organic semiconductor active layer in the process of removing the photoresist. The surface is damaged, affecting the performance of the organic thin film transistor.
  • the step of removing the remaining photoresist remaining on the surface of the organic semiconductor active layer can be omitted by using the above step S14, and the cured organic etch barrier layer 16 can also protect the organic semiconductor active layer.
  • the surface of 13 is not destroyed.
  • the above step S01 may include, for example, the following six sub-steps, which are described one by one below.
  • Step S21 as shown in FIG. 8(a) or FIG. 8(b), the organic semiconductor film 130 and the organic photosensitive film 160 are sequentially formed.
  • the organic semiconductor film 130 and the organic photosensitive film 160 are sequentially It is formed on a base substrate including the gate electrode 11 and the gate insulating layer 15.
  • the organic semiconductor film 130 and the organic photosensitive film 160 are sequentially formed on the base substrate 10.
  • Step S22 as shown in FIG. 9(a) or FIG. 9(b), after the substrate on which the organic photosensitive film 160 is formed is exposed and developed by using a halftone or gray tone mask, the organic photosensitive film is completely retained. 160a, the organic photosensitive film completely removes the portion 160b, and the organic photosensitive film semi-retained portion 160c.
  • the organic photosensitive film completely retains a portion 160a corresponding to the region of the organic etch barrier layer 16 to be formed, and the organic photosensitive film semi-retaining portion 160c corresponds to the organic semiconductor active layer 13 to be formed.
  • the area covered by the organic etch barrier layer 16 which completely removes the portion 160b corresponding to other regions.
  • Step S23 as shown in FIG. 10(a) or FIG. 10(b), the organic semiconductor film exposed by the completely removed portion 160b (not shown) is removed by an etching process. 130 to form the organic semiconductor active layer 13.
  • Step S24 as shown in FIG. 11(a) or FIG. 11(b), the organic photosensitive film 160 of the organic photosensitive film semi-retaining portion 160c (not shown in the drawing) is removed by an ashing process to expose
  • the organic semiconductor active layer 13 corresponds to a region of the organic photosensitive film semi-retaining portion 160c.
  • Step S25 as shown in FIG. 12(a) or FIG. 12(b), the organic photosensitive film completely remaining portion 160a formed on the organic semiconductor active layer 13 is cured by a curing process (not shown in the figure). Out) to form the organic etch stop layer 16.
  • Step S26 as shown in FIG. 13(a) or FIG. 13(b), forming a source including a source 12a and a drain on a substrate on which the organic semiconductor active layer 13 and the organic etch barrier layer 16 are formed. 12b source and drain metal layer.
  • the above steps S14 and S25 can each include the following two sub-steps, that is, first, the organic photosensitive film completely retained portion 160a formed on the organic semiconductor active layer 13 is cured by a curing process; Next, the thickness of the organic photosensitive film completely cured by the etching thinning process is completely preserved to form the organic etch barrier layer 16.
  • the above step S14 and step S25 may include: thinning the organic photosensitive film by an etching thinning process before curing the completely remaining portion of the organic photosensitive film formed on the organic semiconductor active layer by a curing process. The film completely retains a portion of the thickness to form the organic etch barrier.
  • the thickness of the organic etch stop layer 16 formed is reduced by the above etching thinning process, which can provide a flatter substrate for the subsequent film formation process, thereby avoiding film formation unevenness.
  • the etching thinning process is preferably a plasma etching process, such as oxygen plasma etching, to further To precisely control the rate of etching.
  • the organic photosensitive film completely remaining portion 160a formed on the organic semiconductor active layer 13 may be cured, for example, by baking.
  • the above-described organic semiconductor active layer 13 is formed.
  • the organic photosensitive film completely remaining portion 160a may have a thickness of 500 nm to 1000 nm. After that, in at least one embodiment, the thickness of the organic photosensitive film fully-retained portion 160a after being thinned by the etching thinning process may be 300 nm to 500 nm.
  • the liquid organic photosensitive material has a stronger surface covering ability, it can be better contacted with the organic semiconductor film 130.
  • the organic photosensitive film 160 Both can be formed by a solution coating method.
  • the solution coating method refers to a technique of depositing a thin film on a surface of a substrate by a chemical method such as a chemical reaction or an electrochemical reaction in a solution.
  • the solution plating method may be an electroless plating method, a sol-gel method, a plating method, a coating method, a ruthenium film method, and a Langmuir-Blodgett (LB) method.
  • the solution coating method does not require vacuum conditions, and the equipment is simple, and can form a film on various substrate surfaces, and the raw materials are easily available, and the application prospect is wider.
  • step S02 may include, for example, the following seven sub-steps, which are introduced one by one below.
  • a source/drain including the source electrode 12a and the drain electrode 12b is formed.
  • An organic insulating film 140 is formed on the metal layer, the organic semiconductor active layer 13, and the substrate of the organic etch barrier layer 16.
  • the organic insulating film 140 may be, for example, a photosensitive polymer compound (such as UV curable adhesive), or polyvinyl chloride (PVC), or polyethylene terephthalate (PET), or polyethylene naphthalate. (PEN), or polyimide (PI), or polyvinyl chloride (PVC), or polytetrafluoroethylene (PTFE).
  • a photosensitive polymer compound such as UV curable adhesive
  • PVC polyvinyl chloride
  • PET polyethylene terephthalate
  • PEN polyethylene naphthalate.
  • PI polyimide
  • PVC polyvinyl chloride
  • PTFE polytetrafluoroethylene
  • the first temperature may be from 110 °C to 150 °C.
  • the second temperature may be from 150 °C to 200 °C.
  • the first region S 1 is located above the source electrode 12a, above the drain electrode 12b, and the source electrode 12a and the drain electrode 12b in the organic insulating film 140. The rest of the area above the gap.
  • the second region S 2 is located above the source electrode 12a, above the drain electrode 12b, and between the source electrode 12a and the drain electrode 12b in the organic insulating film 140. The area above the gap.
  • the process parameters of the thinning can be more flexibly controlled, and the organic material can be directly cured by thinning, and the organic material is heated too fast to cause deformation cracking. .
  • the thickness of the organic insulating film 140 formed may be 500 nm to 1000 nm. In at least one embodiment, the thickness of the thinned organic insulating layer 14 may be from 300 nm to 500 nm.
  • the formed side of the organic semiconductor active layer 13 perpendicular to the substrate 10 can be better protected, in at least one embodiment.
  • the organic insulating film 140 is formed by a solution plating method.
  • the above step S35 may include, for example, the following steps: a photocuring process to remove ultraviolet light from the base substrate 10 away from the source 12a, the drain 12b, and the gate 11 or away from the source 12a, the drain 12b, and the organic semiconductor side of the active layer 13, i.e., the back surface of the base substrate 10 is irradiated to the completion of the pre-bake treatment temperature of the second organic insulating film in the first region 140 S 1, so that the organic The first region S 1 in the insulating film 140 is cured.
  • the source electrode 12a, the drain electrode 12b, and the gate electrode 11 or the organic semiconductor active layer 13 are used as a structure for blocking ultraviolet light, the process of using a mask is omitted, and the simplification is further simplified. The above preparation process.
  • the above step S37 may include, for example, the following steps: a photocuring process to bring ultraviolet light from the base substrate 10 to the source 12a, the drain 12b, and the gate 11 or to the source 12a, the drain 12b, and the organic semiconductor
  • a photocuring process to bring ultraviolet light from the base substrate 10 to the source 12a, the drain 12b, and the gate 11 or to the source 12a, the drain 12b, and the organic semiconductor
  • One side of the active layer 13, that is, the front surface of the substrate substrate 10 on which the respective film layers are deposited is irradiated to the second region S 2 in the organic insulating film 140 that completes the second etching thinning process,
  • the second region S 2 in the organic insulating film 140 is cured to form the organic insulating layer 14.
  • the etching thinning process is, for example, a plasma etching process.
  • At least one embodiment of the present invention provides the organic thin film transistor 01 prepared by the above-described preparation method, the organic thin film transistor 01 including an organic insulating layer 14 over the organic semiconductor active layer 13;
  • the organic insulating layer 14 is thin and uniform in film formation, and has a thickness ranging from 300 nm to 500 nm.
  • the above the organic semiconductor active layer 13 refers to a side of the organic semiconductor active layer 13 remote from the substrate 10 .
  • At least one embodiment of the present invention also provides a method of fabricating the array substrate 02 as shown in FIG. 19(a), FIG. 19(b), FIG. 19(c), or FIG. 19(d).
  • the preparation method includes the following steps S41 to S43, which are described one by one below.
  • the via hole 21 also penetrates through the organic semiconductor active layer to expose the drain electrode 12b.
  • the flat layer 20 may be made of, for example, a photoresist material or a PI (polyimide) material, and may have a thickness of, for example, 500 nm to 2000 nm.
  • a pixel electrode 22 is formed on the flat layer 20, and the pixel electrode 22 is electrically connected to the drain electrode 12b through the via hole 21.
  • the type of the organic thin film transistor described in FIG. 19(a) is a bottom gate bottom contact type
  • the type of the organic thin film transistor described in FIG. 19(b) is a top gate bottom contact type
  • FIG. 19(c) The type of the organic thin film transistor is a bottom gate top contact type
  • the type of the organic thin film transistor described in FIG. 19(d) is a top gate top contact type.
  • the thickness of the film of the organic insulating layer 14 between the pixel electrode 22 and the drain electrode 12b is small, the process difficulty of forming via holes on the organic insulating layer 14 is reduced, and the process reliability is improved. Has important practical application value.
  • the method for preparing the array substrate 02 may further include forming a common electrode.
  • the present invention provides an array substrate 02 prepared by the above-described preparation method, and the array substrate 02 includes the organic thin film transistor 01 described above.
  • the array substrate further includes a planar layer 20 on the organic insulating layer 14 of the organic thin film transistor, and a pixel electrode 22 on the planar layer 20; the pixel electrode 22 passes at least The via 21 penetrating the flat layer 20 and the organic insulating layer 14 is electrically connected to the drain electrode 12b.
  • At least one embodiment of the present invention further provides a display device including the above-described organic thin film transistor 01 or the above array substrate 02.
  • the display device may be, for example, a display device such as a liquid crystal panel, a liquid crystal display, a liquid crystal television, an organic electroluminescence display OLED panel, an OLED display, an OLED television, or an electronic paper.
  • a display device such as a liquid crystal panel, a liquid crystal display, a liquid crystal television, an organic electroluminescence display OLED panel, an OLED display, an OLED television, or an electronic paper.

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Abstract

一种有机薄膜晶体管、阵列基板及其制备方法以及显示装置，有机薄膜晶体管的制备方法包括：形成包括源极（12a）、漏极（12b）的源漏金属层以及与源极（12a）、漏极（12b）接触的有机半导体有源层（13）；以及在形成有包括源漏金属层以及有机半导体有源层（13）的基板（10）上形成有机绝缘薄膜（140），减薄有机绝缘薄膜（140）的厚度并固化减薄后的有机绝缘薄膜（140），或者固化有机绝缘薄膜（140）并减薄固化后的有机绝缘薄膜（140）的厚度，以形成有机绝缘层（14）。该方法可形成厚度较薄成膜均匀的有机绝缘层，降低形成过孔的工艺难度。

Description

有机薄膜晶体管及其制备方法、阵列基板及其制备方法、显示装置 技术领域
本发明的至少一个实施例涉及一种有机薄膜晶体管及其制备方法、阵列基板及其制备方法、显示装置。
背景技术
有机薄膜晶体管(Organic Thin Film Transistor，简称为OTFT)自20世纪80年代中期出现后，因其具有质轻、价廉、柔韧性好的优点，在各种显示装置以及存储器，尤其是电子纸、柔性显示领域显示了优异的应用前景，因此受到了研究人员的重视，并得以迅速发展。
OTFT的核心结构为采用有机半导体材料制备而成的有机半导体有源层，由于有机半导体材料活性较强，且绝大多数是在低温条件下(小于200℃)制备而成，因此，需要选择合适的绝缘层材料覆盖在有机半导体有源层的上方，以使有机半导体有源层得到良好的封装和保护，从而保证有机半导体有源层各项性能的稳定性不受其他制备工艺的影响。
发明内容
本发明的至少一个实施例提供一种有机薄膜晶体管及其制备方法、阵列基板及其制备方法、显示装置，以实现在有效封装和保护有机半导体有源层的同时，形成厚度较薄成膜均匀的有机绝缘层，降低形成有机绝缘层过孔的工艺难度，提高工艺可靠性。
一方面，本发明的至少一个实施例提供了一种有机薄膜晶体管的制备方法，所述制备方法包括：形成包括源极、漏极的源漏金属层，以及有机半导体有源层；所述有机半导体有源层与所述源极、所述漏极接触；在形成有包括所述源极、所述漏极的源漏金属层以及所述有机半导体有源层的基板上形成有机绝缘薄膜；采用刻蚀减薄工艺减薄所述有机绝缘薄膜的厚度并采用固化工艺固化减薄后的所述有机绝缘薄膜，或者采用固化工艺固化所述有机绝缘薄膜并采用刻蚀减薄工艺减薄固化后的所述有机绝缘薄膜的厚度，以形成 有机绝缘层；所述方法还包括形成栅极。
另一方面，本发明的至少一个实施例还提供了一种阵列基板的制备方法，所述制备方法包括，形成有机薄膜晶体管，所述有机薄膜晶体管采用上述制备方法制备。
再一方面，本发明的至少一个实施例还提供了一种采用上述制备方法制备的有机薄膜晶体管；所述有机薄膜晶体管包括位于有机半导体有源层上方的有机绝缘层，所述有机绝缘层的厚度为300nm-500nm。
再一方面，本发明的至少一个实施例还提供了一种阵列基板，该阵列基板包括上述的有机薄膜晶体管。
再一方面，本发明的至少一个实施例又提供了一种显示装置，所述显示装置包括上述的有机薄膜晶体管或上述的阵列基板。
附图说明
为了更清楚地说明本发明实施例的技术方案，下面将对实施例的附图作简单地介绍，显而易见地，下面描述中的附图仅仅涉及本发明的一些实施例，而非对本发明的限制。
图1为本发明实施例提供的一种有机薄膜晶体管的制备流程示意图；
图2(a)为本发明实施例提供的底栅底接触型结构示意图；
图2(b)为本发明实施例提供的底栅顶接触型结构示意图；
图3(a)为本发明实施例提供的顶栅底接触型结构示意图；
图3(b)为本发明实施例提供的顶栅顶接触型结构示意图；
图4(a)和图4(b)依次为对于底接触型有机薄膜晶体管在形成有源极和漏极的基板上形成有机半导体薄膜和有机光敏薄膜的示意图一和示意图二；
图5(a)为在图4(a)基础上形成有机光敏薄膜完全保留部分、完全去除部分的示意图；
图5(b)为在图4(b)基础上形成有机光敏薄膜完全保留部分、完全去除部分的示意图；
图6(a)为在图5(a)基础上形成有机半导体有源层的示意图；
图6(b)为在图5(b)基础上形成有机半导体有源层的示意图；
图7(a)为在6(a)基础上形成有机刻蚀阻挡层的示意图；
图7(b)为在6(b)基础上形成有机刻蚀阻挡层的示意图；
图8(a)和图8(b)依次为对于顶接触型有机薄膜晶体管在基板上形成有机半导体薄膜和有机光敏薄膜的示意图一和示意图二；
图9(a)为在图8(a)基础上形成有机光敏薄膜完全保留部分、完全去除部分、以及半保留部分的示意图；
图9(b)为在图8(b)基础上形成有机光敏薄膜完全保留部分、完全去除部分、以及半保留部分的示意图；
图10(a)为在图9(a)基础上形成有机半导体有源层的示意图；
图10(b)为在图9(b)基础上形成有机半导体有源层的示意图；
图11(a)为在图10(a)基础上去除有机光敏薄膜半保留部分，露出有机半导体有源层的示意图；
图11(b)为在图10(b)基础上去除有机光敏薄膜半保留部分，露出有机半导体有源层的示意图；
图12(a)为在图11(a)基础上形成有机刻蚀阻挡层的示意图；
图12(b)为在图11(b)基础上形成有机刻蚀阻挡层的示意图；
图13(a)为在图12(a)基础上形成源极和漏极的示意图；
图13(b)为在图12(b)基础上形成源极和漏极的示意图；
图14(a)为在图7(a)基础上形成有机绝缘薄膜的示意图；
图14(b)为在图7(b)基础上形成有机绝缘薄膜的示意图；
图14(c)为在图13(a)基础上形成有机绝缘薄膜的示意图；
图14(d)为在图13(b)基础上形成有机绝缘薄膜的示意图；
图15(a)为在图14(a)基础上采用第一刻蚀减薄工艺减薄有机绝缘薄膜的厚度示意图；
图15(b)为在图14(b)基础上采用第一刻蚀减薄工艺减薄有机绝缘薄膜的厚度示意图；
图15(c)为在图14(c)基础上采用第一刻蚀减薄工艺减薄有机绝缘薄膜的厚度示意图；
图15(d)为在图14(d)基础上采用第一刻蚀减薄工艺减薄有机绝缘薄膜的厚度示意图；
图16(a)为在图15(a)基础上固化完成步骤S34的第一区域的示意图；
图16(b)为在图15(b)基础上固化完成步骤S34的第一区域的示意图；
图16(c)为在图15(c)基础上固化完成步骤S34的第一区域的示意图；
图16(d)为在图15(d)基础上固化完成步骤S34的第一区域的示意图；
图17(a)为在图16(a)基础上减薄第二区域的示意图；
图17(b)为在图16(b)基础上减薄第二区域的示意图；
图17(c)为在图16(c)基础上减薄第二区域的示意图；
图17(d)为在图16(d)基础上减薄第二区域的示意图；
图18(a)为在图17(a)基础上形成有机绝缘层的示意图；
图18(b)为在图17(b)基础上形成有机绝缘层的示意图；
图18(c)为在图17(c)基础上形成有机绝缘层的示意图；
图18(d)为在图17(d)基础上形成有机绝缘层的示意图；
图19(a)、图19(b)、图19(c)以及图19(d)依次为本发明实施例提供的一种阵列基板的结构示意图一、示意图二、示意图三、以及示意图四。
附图标记：
01-有机薄膜晶体管；10-衬底基板；11-栅极；12a-源极；12b-漏极；13-有机半导体有源层；130-有机半导体薄膜；14-有机绝缘层；140-有机绝缘薄膜；15-栅绝缘层；16-有机刻蚀阻挡层；160-有机光敏薄膜；160a-有机光敏薄膜完全保留部分；160b-有机光敏薄膜完全去除部分；160c-有机光敏薄膜半保留部分；02-阵列基板；20-平坦层；21-过孔；22-像素电极。
具体实施方式
为使本发明实施例的目的、技术方案和优点更加清楚，下面将结合本发明实施例的附图，对本发明实施例的技术方案进行清楚、完整地描述。显然，所描述的实施例是本发明的一部分实施例，而不是全部的实施例。基于所描述的本发明的实施例，本领域普通技术人员在无需创造性劳动的前提下所获得的所有其他实施例，都属于本发明保护的范围。
本申请的发明人注意到，在实现OTFT的制备过程中，采用绝缘层材料覆盖在有机半导体有源层的上方，以使有机半导体有源层得到良好的封装和保护的方式主要面临以下两个难点。
其一，采用氮化硅(SiNx)、氧化硅(SiOx)等无机材料制备而成的绝缘层，在成膜过程中通常需要较高的制备温度(如200℃-400℃)，且需要使用到具有腐蚀性的气体，高温和腐蚀性的气体均会破坏有机半导体材料的活性；因此，由无机材料制备而成的绝缘层难以适用于OTFT。
其二，采用聚乙烯醇(Polyvinyl alcohol，简称为PVA)或聚乙烯吡咯烷酮(Polyvinyl pyrrolidone，简称为PVP)等有机材料制备而成的绝缘层，其厚度通常为微米级别(1μm-2μm)；而通过绝缘层对有机半导体有源层进行封装后，在OTFT应用于阵列基板时，需要在绝缘层上形成过孔以使OTFT的漏极与像素电极电连接，由于绝缘层相对于OTFT的源漏极的厚度尺寸级别相差较大，导致形成过孔的工艺难度增加，容易产生过孔断层，从而降低了OTFT应用于阵列基板时的工艺可靠性。
针对上述第二个问题，本申请的发明人发现，如果在有机半导体有源层的上方直接形成厚度较薄的有机材料的绝缘层，将难以保证绝缘层薄膜的成膜均匀性与连续性，从而导致绝缘层对有机半导体有源层的覆盖性下降或者在源极与漏极之间的间隙边缘出现覆盖不足现象，影响绝缘层对有机半导体有源层的封装和保护效率；此外，如果直接形成厚度较薄的有机材料的绝缘层，还会出现诸如薄膜表面粗糙度过大的问题，使得绝缘层的平坦性下降，影响后续的其他成膜工艺。
因此，如何解决有效封装和保护有机半导体有源层的同时，形成厚度较薄成膜均匀的有机绝缘层，从而降低形成有机绝缘层过孔的工艺难度，成为了本领域人员亟待解决的问题。
本发明的至少一个实施例提供了一种有机薄膜晶体管01的制备方法，该方法包括：形成包括源极、漏极的源漏金属层，以及与所述源极、所述漏极接触的有机半导体有源层；在形成有包括所述源极、所述漏极的源漏金属层以及所述有机半导体有源层的基板上形成有机绝缘薄膜；采用刻蚀减薄工艺减薄所述有机绝缘薄膜的厚度并采用固化工艺固化减薄后的所述有机绝缘薄膜，或者采用固化工艺固化所述有机绝缘薄膜并采用刻蚀减薄工艺减薄固化 后的所述有机绝缘薄膜的厚度，以形成有机绝缘层。以下实施例以采用刻蚀减薄工艺减薄有机绝缘薄膜的厚度并采用固化工艺固化减薄后的有机绝缘薄膜的方式形成有机绝缘层为例进行说明。
如图1所示，所述制备方法包括以下主要步骤：
步骤S01、形成包括源极12a、漏极12b的源漏金属层，以及有机半导体有源层13；所述有机半导体有源层13与所述源极12a、所述漏极12b接触，如图4(a)至图13(b)所示。
步骤S02、在形成有包括所述源极12a、所述漏极12b的源漏金属层，以及所述有机半导体有源层13的基板上形成有机绝缘薄膜140，采用刻蚀减薄工艺减薄所述有机绝缘薄膜140的厚度，并采用固化工艺，固化减薄后的所述有机绝缘薄膜140，形成有机绝缘层14，如图14(a)至图18(d)所示。
在上述实施例中，所述制备方法还包括形成栅极11。
需要说明的是，第一、有机薄膜晶体管01根据划分标准的不同，可分为不同的类型。例如，根据有机薄膜晶体管01中源极12a、漏极12b与栅极11的沉积顺序的不同，可将有机薄膜晶体管01分为底栅型和顶栅型。
例如，如图2(a)和图2(b)所示，针对待形成的有机薄膜晶体管01为底栅型的情况，所述包括源极12a、漏极12b的源漏金属层以及有机半导体有源层13形成于包括有栅极11和栅绝缘层15的衬底基板10上。
例如，如图3(a)和图3(b)所示，针对待形成的有机薄膜晶体管01为顶栅型的情况，所述包括源极12a、漏极12b的源漏金属层以及有机半导体有源层13形成于衬底基板10上；在此情况下，栅极11形成于包括有所述有机绝缘层14的基板上。
此外，根据有机薄膜晶体管01中源极12a、漏极12b与有机半导体有源层13的沉积顺序的不同，也可将有机薄膜晶体管01分为底接触型和顶接触型。源极12a和漏极12b位于有机半导体有源层13的下方称为底接触型，如图2(a)和图3(a)所示；反之，源极12a和漏极12b位于有机半导体有源层13的上方称为顶接触型，如图2(b)和图3(b)所示。
本发明实施例提供的所述制备方法可适用于多种类型的有机薄膜晶体管，即：参考图2(a)所示的底栅底接触型、参考图2(b)所示的底栅顶接触型、参考图3(a)所示的顶栅底接触型、以及参考图3(b)所示的顶栅顶 接触型。
第二、在上述步骤S01中，针对所述有机薄膜晶体管01为底接触型的情况，参考图2(a)和图3(a)所示，所述有机半导体有源层13与所述源极12a、所述漏极12b接触时，可露出所述漏极12b的一部分，即当所述有机薄膜晶体管01应用于阵列基板时，所述漏极12b通过过孔与所述像素电极电连接时，在形成贯通所述有机绝缘层14的过孔时，无需贯通所述有机半导体有源层13，这避免了刻蚀工艺对所述有机半导体有源层13的破坏。
第三、在上述步骤S02中，所述采用刻蚀减薄工艺，减薄所述有机绝缘薄膜140的厚度，例如可以采用一次减薄的方式直接减薄至相应的厚度，也可以采用多次逐级减薄的方式，最终将所述有机绝缘薄膜140减薄至相应的厚度；可根据形成的所述有机绝缘薄膜140的厚度和材料灵活调整工艺，本发明实施例对此不作限定。
第四、同样在上述步骤S02中，所述刻蚀减薄工艺例如可以为湿法刻蚀工艺，也可为等离子体干法刻蚀工艺(如采用O2等离子体)；所述固化工艺例如可以为通过烘烤等方式的热固化工艺，也可以为紫外光固化工艺，或者为前述两种方式的组合固化工艺；可根据形成的所述有机绝缘薄膜140的厚度和材料选择合适的刻蚀减薄工艺和固化工艺，本发明实施例对此均不作限定。
第五、参考图3(a)和图3(b)所示，针对所述有机薄膜晶体管01为顶栅型的情况，所述有机绝缘层14用于封装和保护所述有机半导体有源层13、所述源极12a以及所述漏极12b的同时，还起到将所述栅极11与所述有机半导体有源层13、所述源极12a、以及所述漏极12b相绝缘的作用。
本发明的至少一个实施例提供了一种有机薄膜晶体管01的制备方法，所述制备方法包括：形成包括源极12a、漏极12b的源漏金属层，以及有机半导体有源层13；所述有机半导体有源层13与所述源极12a、所述漏极12b接触；在形成有包括所述源极12a、所述漏极12b的源漏金属层，以及所述有机半导体有源层13的基板上形成有机绝缘薄膜140，采用刻蚀减薄工艺减薄所述有机绝缘薄膜140的厚度并采用固化工艺固化所述有机绝缘薄膜140，以形成有机绝缘层14。在本发明实施例中，所述制备方法还包括形成栅极11。
采用本发明实施例提供的所述制备方法，由于首先形成膜层厚度较大的 有机绝缘薄膜140，可以保证形成的所述有机绝缘薄膜140具有良好的成膜均匀性与连续性，避免出现由于膜层厚度较小而产生的对所述有机半导体有源层13的覆盖性下降或者在所述源极12a与所述漏极12b的间隙边缘出现有机绝缘薄膜覆盖不足的现象。之后，对已经沉积完成的所述有机绝缘薄膜140进行所述刻蚀减薄工艺，因此可以得到膜层厚度较小的所述有机绝缘层14。
基于此，上述制备方法克服了直接形成膜层厚度较小的有机绝缘层时容易出现的难以形成均匀连续薄膜的缺点，实现了在有效封装和保护所述有机半导体有源层13的同时，形成厚度较薄且成膜均匀的有机绝缘层14；当所述有机薄膜晶体管01应用于阵列基板时，由于像素电极与所述有机薄膜晶体管01的所述漏极12b电连接，而位于像素电极与所述漏极12b之间的有机绝缘层14的膜层厚度较小，故降低了在所述有机绝缘层14上形成过孔的工艺难度，提高了工艺可靠性，具有重要的实际应用价值。
在一个实施例中，在形成所述有机绝缘薄膜140之前，上述步骤S01还包括：形成有机刻蚀阻挡层16。，所述有机刻蚀阻挡层16位于所述有机半导体有源层13的上方、且所述有机刻蚀阻挡层16与所述源极12a和所述漏极12b之间的间隙相对应。
此处，所述有机半导体有源层13的上方是指所述有机半导体有源层13远离所述衬底基板10的一侧，所述有机刻蚀阻挡层16的作用是用于保护所述有机半导体有源层13对应于所述源极12a和所述漏极12b之间的间隙的区域处的表面。
在此基础上，根据有机薄膜晶体管中所述源极12a、所述漏极12b与所述有机半导体有源层13沉积顺序的不同，上述步骤S01例如可以包括以下两种情况，下面对这两种情况进行详细介绍。
上述步骤S01包括的第一种情况、对于底接触型有机薄膜晶体管，上述步骤S01例如可包括以下4个子步骤，下面逐一介绍这些子步骤。
步骤S11、如图4(a)或图4(b)所示，在形成有包括所述源极12a、所述漏极12b的源漏金属层的基板上依次形成有机半导体薄膜130和有机光敏薄膜160。
需要说明的是，第一、参考图4(a)所示，针对待形成的所述有机薄膜晶体管01为底栅底接触型的情况，形成有包括所述源极12a、所述漏极12b 的源漏金属层的基板为包括有栅极11和栅绝缘层15的衬底基板10。所述栅绝缘层15可以采用金属氧化物、或金属氮化物、或有机材料等绝缘材料制成，其厚度例如可以为30nm-1000nm。参考图4(b)所示，针对待形成的所述有机薄膜晶体管01为顶栅底接触型的情况，包括所述源极12a、所述漏极12b的源漏金属层形成于衬底基板10上。在图4(b)的基板上形成栅极之后的情形如图3(a)所示，此时所述栅极11例如可以采用金属材料、或氧化铟锡(ITO)材料、或掺杂硅材料、或有机导电物材料制成，其厚度例如可以为20nm-200nm；所述源极12a、所述漏极12b例如可以采用金属材料(如Au、Ag、Mo、Al、Cu等)、或ITO制成，其厚度例如可以为20nm-300nm。
第二、所述有机半导体薄膜130例如可以由并五苯、或金属酞菁类化合物、或噻吩基聚合物、或多环芳香聚合物等有机半导体材料制成，沉积方式可沿用本领域技术人员所知的技术，在此不作限定。
第三、所述有机光敏薄膜例如可以由光刻胶材料制成，也可是由其他受到光照发生光化学反应(如光交联或光降解)的光敏高分子材料制成。
步骤S12、如图5(a)或图5(b)所示，采用普通掩模板对形成有所述有机光敏薄膜160的基板进行曝光、显影后，形成有机光敏薄膜完全保留部分160a和有机光敏薄膜完全去除部分160b。
在该步骤中，所述有机光敏薄膜完全保留部分160a对应待形成的有机半导体有源层13的区域，所述有机光敏薄膜完全去除部分160b对应其他区域。
步骤S13、如图6(a)或图6(b)所示，采用刻蚀工艺去除所述有机光敏薄膜完全去除部分160b(图中均未标示出)露出的所述有机半导体薄膜130(图中均未标示出)，形成所述有机半导体有源层13。
在该步骤中，形成的所述有机半导体有源层13露出所述漏极12b的一部分和所述源极12a的一部分。
步骤S14、如图7(a)或图7(b)所示，采用固化工艺固化形成于所述有机半导体有源层13之上的所述有机光敏薄膜完全保留部分160a(图中均未标示出)，以形成所述有机刻蚀阻挡层16。
需要说明的是，形成具有一定图案的有机半导体有源层通常通过构图工艺，典型的构图工艺是指应用一次掩模板，通过光刻胶曝光、显影、刻蚀以及去除光刻胶的工艺，由于有机半导体有源层厚度(通常为10nm-200nm) 的数量级相对于光刻胶厚度(通常为500nm-1000nm)的数量级较小，在通过灰化工艺(如干法刻蚀)或剥落(如湿法刻蚀)去除残留在有机半导体有源层表面的剩余光刻胶时，有可能使有机半导体有源层一起被剥离掉，或者在去除光刻胶的过程中会对有机半导体有源层的与源极、漏极之间的间隙处对应的表面产生破坏，影响有机薄膜晶体管的性能。
因此，利用上述步骤S14不但可以省去去除残留在有机半导体有源层表面的剩余光刻胶的步骤，而且，固化后的所述有机刻蚀阻挡层16还能保护所述有机半导体有源层13的表面不被破坏。
上述步骤S01包括的第二种情况、对于顶接触型有机薄膜晶体管，上述步骤S01例如可包括以下6个子步骤，下面逐一介绍这些子步骤。
步骤S21、如图8(a)或图8(b)所示，依次形成有机半导体薄膜130和有机光敏薄膜160。
需要说明的是，第一、参考图8(a)所示，针对待形成的所述有机薄膜晶体管01为底栅顶接触型的情况，所述有机半导体薄膜130和所述有机光敏薄膜160依次形成于包括有栅极11和栅绝缘层15的衬底基板上。参考图8(b)所示，针对待形成的所述有机薄膜晶体管01为顶栅顶接触型的情况，所述有机半导体薄膜130和所述有机光敏薄膜160依次形成于衬底基板10上。
第二、所述有机半导体薄膜130和所述有机光敏薄膜160的材料可参见上述步骤S11，在此不再赘述。
步骤S22、如图9(a)或图9(b)所示，采用半色调或灰色调掩模板对形成有所述有机光敏薄膜160的基板进行曝光、显影后，形成有机光敏薄膜完全保留部分160a、有机光敏薄膜完全去除部分160b、以及有机光敏薄膜半保留部分160c。
在该步骤中，所述有机光敏薄膜完全保留部分160a对应待形成的有机刻蚀阻挡层16的区域，所述有机光敏薄膜半保留部分160c对应待形成的有机半导体有源层13的没有被所述有机刻蚀阻挡层16覆盖的区域，所述有机光敏薄膜完全去除部分160b对应其他区域。
步骤S23、如图10(a)或图10(b)所示，采用刻蚀工艺去除所述有机光敏薄膜完全去除部分160b(图中均未标示出)露出的所述有机半导体薄膜 130，以形成所述有机半导体有源层13。
步骤S24、如图11(a)或图11(b)所示，采用灰化工艺去除所述有机光敏薄膜半保留部分160c(图中均未标示出)的所述有机光敏薄膜160，以露出所述有机半导体有源层13对应于所述有机光敏薄膜半保留部分160c的区域。
步骤S25、如图12(a)或图12(b)所示，采用固化工艺固化形成于所述有机半导体有源层13之上的所述有机光敏薄膜完全保留部分160a(图中均未标示出)，以形成所述有机刻蚀阻挡层16。
步骤S26、如图13(a)或图13(b)所示，在形成有包括所述有机半导体有源层13和所述有机刻蚀阻挡层16的基板上形成包括源极12a、漏极12b的源漏金属层。
在上述基础上，上述步骤S14和步骤S25均可包括以下2个子步骤，即：首先，采用固化工艺固化形成于所述有机半导体有源层13之上的所述有机光敏薄膜完全保留部分160a；其次，采用刻蚀减薄工艺减薄固化的所述有机光敏薄膜完全保留部分160a的厚度，以形成所述有机刻蚀阻挡层16。或者，上述步骤S14和步骤S25可包括：在采用固化工艺固化形成于所述有机半导体有源层之上的所述有机光敏薄膜完全保留部分之前，采用刻蚀减薄工艺减薄所述有机光敏薄膜完全保留部分的厚度，以形成所述有机刻蚀阻挡层。
通过上述刻蚀减薄工艺降低了形成的所述有机刻蚀阻挡层16的厚度，可为后续的成膜工艺提供更为平坦的衬底，避免出现成膜不均现象。
这里，考虑到湿法刻蚀工艺对形成具有较小特征尺寸的图案的控制较差，因此，所述刻蚀减薄工艺优选为等离子体刻蚀工艺，如采用氧气等离子体刻蚀，以便更为精确地控制刻蚀的速率。
此处，例如可以采用烘烤的方式固化形成于所述有机半导体有源层13之上的所述有机光敏薄膜完全保留部分160a。
这里，综合考虑有机光敏薄膜的制备成本以及最终形成的所述有机刻蚀阻挡层16应具有合适的厚度，在至少一个实施例中，形成于所述有机半导体有源层13之上的所述有机光敏薄膜完全保留部分160a的厚度可以为500nm-1000nm。在此之后，在至少一个实施例中，采用刻蚀减薄工艺减薄之后的所述有机光敏薄膜完全保留部分160a的厚度可以为300nm-500nm。
考虑到液态的有机光敏材料具有更强的表面覆盖能力，可更好地与所述有机半导体薄膜130相接触，在至少一个实施例中，上述步骤S11和步骤S21中，所述有机光敏薄膜160均可以采用溶液镀膜法形成。
这里，所述溶液镀膜法是指在溶液中利用化学反应或电化学反应等化学方法在基片表面沉积薄膜的技术。例如溶液镀膜法可以为化学镀膜法、溶胶-凝胶法、电镀法、涂覆法、甩膜法、以及Langmuir-Blodgett(LB)法等。溶液镀膜法不需要真空条件，设备仪器简单，可在各种基体表面成膜，原料易得，应用前景更为广泛。
在上述基础上，上述步骤S02例如可包括以下7个子步骤，下面逐一介绍这些子步骤。
S31、如图14(a)、或图14(b)、或图14(c)、或图14(d)所示，在形成有包括所述源极12a、所述漏极12b的源漏金属层，所述有机半导体有源层13、以及有机刻蚀阻挡层16的基板上形成有机绝缘薄膜140。
所述有机绝缘薄膜140例如可以为光敏高分子化合物(如UV固化胶)、或聚氯乙烯(PVC)、或聚对苯二甲酸乙二酯(PET)、或聚萘二甲酸乙二醇酯(PEN)、或聚酰亚胺(PI)、或聚氯乙烯(PVC)、或聚四氟乙烯(PTFE)等。
S32、对形成的所述有机绝缘薄膜140进行第一温度的预烘烤处理。例如，所述第一温度可以为110℃-150℃。
S33、如图15(a)、或图15(b)、或图15(c)、或图15(d)所示，采用第一刻蚀减薄工艺，减薄完成所述第一温度的预烘烤处理的所述有机绝缘薄膜140的厚度。
S34、对减薄后的所述有机绝缘薄膜140进行第二温度的预烘烤处理。例如，所述第二温度可以为150℃-200℃。
S35、如图16(a)、或图16(b)、或图16(c)、或图16(d)所示，采用第一固化工艺，固化完成所述第二温度的预烘烤处理的所述有机绝缘薄膜140中的第一区域(图中均标记为S1)。
在该步骤中，所述第一区域S1为所述有机绝缘薄膜140中除位于所述源极12a的上方、所述漏极12b的上方、以及所述源极12a和所述漏极12b之间的间隙的上方其余的区域。
S36、如图17(a)、或图17(b)、或图17(c)、或图17(d)所示，采用第二刻蚀减薄工艺，减薄完成所述第一固化工艺的所述有机绝缘薄膜140中的第二区域(图中均标记为S2)。
在该步骤中，所述第二区域S2为所述有机绝缘薄膜140中位于所述源极12a的上方、所述漏极12b的上方、以及所述源极12a和所述漏极12b之间的间隙的上方的区域。
S37、如图18(a)、或图18(b)、或图18(c)、再或图18(d)所示，采用第二固化工艺，固化完成所述第二刻蚀减薄工艺的所述有机绝缘薄膜140中的第二区域S2，形成有机绝缘层14。
通过上述步骤S32-S37的逐级固化和逐级减薄，能更灵活地控制减薄的工艺参数，还可避免由于减薄后直接固化有机材料，使有机材料受热过快而产生变形开裂现象。
这里，综合考虑有机绝缘薄膜的制备成本以及最终形成的所述有机绝缘层14应具有合适的厚度，在至少一个实施例中，形成的所述有机绝缘薄膜140的厚度可以为500nm-1000nm。在至少一个实施例中，减薄后的所述有机绝缘层14的厚度可以为300nm-500nm。
在上述基础上，考虑到液态的有机绝缘材料具有更强的表面覆盖能力，可更好地保护形成的所述有机半导体有源层13的垂直于衬底基板10的侧面，在至少一个实施例中，所述有机绝缘薄膜140采用溶液镀膜法形成。
在至少一个实施例中，参考图16(a)、或图16(b)、或图16(c)、或图16(d)所示，上述步骤S35例如可包括以下步骤，即：采用紫外光固化工艺，使紫外光从所述衬底基板10远离所述源极12a、所述漏极12b以及所述栅极11或远离所述源极12a、所述漏极12b以及所述有机半导体有源层13的一侧，即所述衬底基板10的背面照射到完成所述第二温度的预烘烤处理的所述有机绝缘薄膜140中的第一区域S1，以使所述有机绝缘薄膜140中的所述第一区域S1固化。
这里，由于利用了所述源极12a、所述漏极12b、以及所述栅极11或所述有机半导体有源层13作为遮挡紫外光的结构，省去了采用掩模板的工序，进一步简化了上述制备过程。
在至少一个实施例中，参考图18(a)、或图18(b)、或图18(c)、 或图18(d)所示，上述步骤S37例如可包括以下步骤，即：采用紫外光固化工艺，使紫外光从所述衬底基板10靠近所述源极12a、所述漏极12b以及所述栅极11或靠近所述源极12a、所述漏极12b以及所述有机半导体有源层13的一侧，即所述衬底基板10沉积有各膜层的正面照射到完成所述第二刻蚀减薄工艺的所述有机绝缘薄膜140中的第二区域S2，以使所述有机绝缘薄膜140中的所述第二区域S2固化，形成所述有机绝缘层14。
在上述基础上，所述刻蚀减薄工艺例如为等离子体刻蚀工艺。
基于此，本发明的至少一个实施例提供了一种采用上述制备方法制备的所述有机薄膜晶体管01，所述有机薄膜晶体管01包括位于有机半导体有源层13上方的有机绝缘层14；所述有机绝缘层14的厚度较薄且成膜均匀，其厚度范围为300nm-500nm。所述位于有机半导体有源层13上方指的是位于有机半导体有源层13的远离衬底基板10的一侧。
本发明的至少一个实施例还提供了一种如图19(a)、或图19(b)、或图19(c)、或图19(d)所示的阵列基板02的制备方法，所述制备方法包括以下步骤S41至S43，下面逐一介绍这些步骤。
S41、形成有机薄膜晶体管，所述有机薄膜晶体管01采用上述制备方法进行制备。
S42、在所述有机薄膜晶体管的有机绝缘层14上形成平坦层20，并至少形成贯通所述平坦层20和所述有机绝缘层14的过孔21，所述过孔21露出所述有机薄膜晶体管的漏极12b。
当所述有机薄膜晶体管的有机半导体有源层13覆盖住所述漏极12b时，所述过孔21还贯穿于所述有机半导体有源层，以使所述漏极12b露出。
这里，所述平坦层20例如可以采用光刻胶材料、PI(聚酰亚胺)材料制成，其厚度例如可以为500nm-2000nm。
S43、在所述平坦层20上形成像素电极22，所述像素电极22通过所述过孔21与所述漏极12b电连接。
在该步骤中，图19(a)中所述有机薄膜晶体管的类型为底栅底接触型、图19(b)中所述有机薄膜晶体管的类型为顶栅底接触型、图19(c)中所述有机薄膜晶体管的类型为底栅顶接触型、图19(d)中所述有机薄膜晶体管的类型为顶栅顶接触型。
由于所述像素电极22与所述漏极12b之间的有机绝缘层14的膜层厚度较小，故降低了在所述有机绝缘层14上形成过孔的工艺难度，提高了工艺可靠性，具有重要的实际应用价值。
在上述基础上，所述阵列基板02的制备方法还可以包括形成公共电极。
基于此，本发明的至少一个实施例提供了一种采用上述制备方法制备的阵列基板02，所述阵列基板02包括上述的所述有机薄膜晶体管01。在至少一个实施例中，所述阵列基板还包括位于所述有机薄膜晶体管的有机绝缘层14上的平坦层20、以及位于所述平坦层20上的像素电极22；所述像素电极22至少通过贯通所述平坦层20和所述有机绝缘层14的过孔21与漏极12b电连接。
本发明的至少一个实施例又提供了一种显示装置，所述显示装置包括上述的有机薄膜晶体管01或上述的阵列基板02。
上述显示装置例如可以为液晶面板、液晶显示器、液晶电视、有机电致发光显示OLED面板、OLED显示器、OLED电视或电子纸等显示装置。
需要说明的是，本发明所有附图是上述有机薄膜晶体管及阵列基板的简略的示意图，只为清楚描述本方案体现了与发明点相关的结构，对于其他的与发明点无关的结构是现有结构，在附图中并未体现或只体现部分。
以上所述仅是本发明的示范性实施方式，而非用于限制本发明的保护范围，本发明的保护范围由所附的权利要求确定。
本申请要求于2014年7月4日递交的中国专利申请第201410319179.7号的优先权，在此全文引用上述中国专利申请公开的内容以作为本申请的一部分。

Claims (20)

  1. 一种有机薄膜晶体管的制备方法，包括：
    形成包括源极、漏极的源漏金属层，以及有机半导体有源层，其中，所述有机半导体有源层与所述源极、所述漏极接触；
    在形成有包括所述源极、所述漏极的源漏金属层以及所述有机半导体有源层的基板上形成有机绝缘薄膜；
    采用刻蚀减薄工艺减薄所述有机绝缘薄膜的厚度并采用固化工艺固化减薄后的所述有机绝缘薄膜，或者采用固化工艺固化所述有机绝缘薄膜并采用刻蚀减薄工艺减薄固化后的所述有机绝缘薄膜的厚度，以形成有机绝缘层；
    其中，所述制备方法还包括形成栅极。
  2. 根据权利要求1所述的制备方法，在形成所述有机绝缘薄膜之前，还包括：形成有机刻蚀阻挡层；
    其中，所述有机刻蚀阻挡层位于所述有机半导体有源层的上方、且所述有机刻蚀阻挡层与所述源极、所述漏极之间的间隙相对应。
  3. 根据权利要求2所述的制备方法，其中，形成包括源极、漏极的源漏金属层，有机半导体有源层以及有机刻蚀阻挡层，包括：
    在形成有包括所述源极、所述漏极的源漏金属层的基板上依次形成有机半导体薄膜和有机光敏薄膜；
    采用普通掩模板对形成有所述有机光敏薄膜的基板进行曝光、显影后，形成有机光敏薄膜完全保留部分和有机光敏薄膜完全去除部分；其中，所述有机光敏薄膜完全保留部分对应待形成的有机半导体有源层的区域，所述有机光敏薄膜完全去除部分对应其他区域；
    采用刻蚀工艺去除所述有机光敏薄膜完全去除部分露出的所述有机半导体薄膜，以形成所述有机半导体有源层；其中，形成的所述有机半导体有源层露出所述漏极的一部分和所述源极的一部分；
    采用固化工艺固化形成于所述有机半导体有源层之上的所述有机光敏薄膜完全保留部分，以形成所述有机刻蚀阻挡层。
  4. 根据权利要求2所述的制备方法，其中，形成包括源极、漏极的源漏金属层，有机半导体有源层以及有机刻蚀阻挡层，包括：
    依次形成有机半导体薄膜和有机光敏薄膜；
    采用半色调或灰色调掩模板对形成有所述有机光敏薄膜的基板进行曝光、显影后，形成有机光敏薄膜完全保留部分、有机光敏薄膜完全去除部分、以及有机光敏薄膜半保留部分；其中，所述有机光敏薄膜完全保留部分对应待形成的有机刻蚀阻挡层的区域，所述有机光敏薄膜半保留部分对应待形成的有机半导体有源层没有被所述有机刻蚀阻挡层覆盖的区域，所述有机光敏薄膜完全去除部分对应其他区域；
    采用刻蚀工艺去除所述有机光敏薄膜完全去除部分露出的所述有机半导体薄膜，以形成所述有机半导体有源层；
    采用灰化工艺去除所述有机光敏薄膜半保留部分的所述有机光敏薄膜，露出所述有机半导体有源层对应于所述有机光敏薄膜半保留部分的区域；
    采用固化工艺固化形成于所述有机半导体有源层之上的所述有机光敏薄膜完全保留部分，以形成所述有机刻蚀阻挡层；
    在形成有包括所述有机半导体有源层和所述有机刻蚀阻挡层的基板上形成包括源极、漏极的源漏金属层。
  5. 根据权利要求3或4所述的制备方法，其中，
    在采用固化工艺固化形成于所述有机半导体有源层之上的所述有机光敏薄膜完全保留部分之后，采用刻蚀减薄工艺减薄固化的所述有机光敏薄膜完全保留部分的厚度，以形成所述有机刻蚀阻挡层；或者
    在采用固化工艺固化形成于所述有机半导体有源层之上的所述有机光敏薄膜完全保留部分之前，采用刻蚀减薄工艺减薄所述有机光敏薄膜完全保留部分的厚度，以形成所述有机刻蚀阻挡层。
  6. 根据权利要求5所述的制备方法，其中，采用刻蚀减薄工艺减薄之后的所述有机光敏薄膜完全保留部分的厚度为300nm-500nm。
  7. 根据权利要求3-6任一所述的制备方法，其中，形成于所述有机半导体有源层之上的所述有机光敏薄膜完全保留部分的厚度为500nm-1000nm。
  8. 根据权利要求3-7任一所述的制备方法，其中，所述有机光敏薄膜采用溶液镀膜法形成。
  9. 根据权利要求1-8任一所述的制备方法，其中，所述形成有机绝缘层包括：
    在形成有包括所述源极、所述漏极的源漏金属层以及所述有机半导体有源层的基板上形成有机绝缘薄膜；
    对形成的所述有机绝缘薄膜进行第一温度的预烘烤处理；
    采用第一刻蚀减薄工艺，减薄完成所述第一温度的预烘烤处理的所述有机绝缘薄膜的厚度；
    对减薄后的所述有机绝缘薄膜进行第二温度的预烘烤处理；
    采用第一固化工艺，固化完成所述第二温度的预烘烤处理的所述有机绝缘薄膜中的第一区域；其中，所述第一区域为所述有机绝缘薄膜中除位于所述源极的上方、所述漏极的上方、以及所述源极和所述漏极之间的间隙的上方之外的其余的区域；
    采用第二刻蚀减薄工艺，减薄完成所述第一固化工艺的所述有机绝缘薄膜中的第二区域；其中，所述第二区域为所述有机绝缘薄膜中位于所述源极的上方、所述漏极的上方、以及所述源极和所述漏极之间的间隙的上方的区域；
    采用第二固化工艺，固化完成所述第二刻蚀减薄工艺的所述有机绝缘薄膜中的第二区域，以形成有机绝缘层。
  10. 根据权利要求9所述的制备方法，其中，所述第一温度为110℃-150℃。
  11. 根据权利要求9或10所述的制备方法，其中，所述第二温度为150℃-200℃。
  12. 根据权利要求1-11任一所述的制备方法，其中，形成的所述有机绝缘薄膜的厚度为500nm-1000nm。
  13. 根据权利要求1-12任一所述的制备方法，其中，形成的所述有机绝缘层的厚度为300nm-500nm。
  14. 根据权利要求1-13任一所述的制备方法，其中，所述有机绝缘薄膜采用溶液镀膜法形成。
  15. 一种阵列基板的制备方法，包括，
    形成有机薄膜晶体管，其中，所述有机薄膜晶体管采用上述权利要求1-14任一项所述的制备方法制备。
  16. 根据权利要求15所述的制备方法，还包括：
    在所述有机薄膜晶体管的有机绝缘层上形成平坦层，并至少形成贯通所述平坦层和所述有机绝缘层的过孔，其中，所述过孔露出所述有机薄膜晶体管的漏极；
    在所述平坦层上形成像素电极，其中，所述像素电极通过所述过孔与所述漏极电连接。
  17. 一种有机薄膜晶体管，其中，所述有机薄膜晶体管采用上述权利要求1-14任一项所述的制备方法制备；
    其中，所述有机薄膜晶体管包括位于有机半导体有源层上方的有机绝缘层，所述有机绝缘层的厚度为300nm-500nm。
  18. 一种阵列基板，包括权利要求17所述的有机薄膜晶体管。
  19. 根据权利要求18所述的阵列基板，还包括：位于所述有机薄膜晶体管的有机绝缘层上的平坦层、以及位于所述平坦层上的像素电极；
    其中，所述像素电极至少通过贯通所述平坦层和所述有机绝缘层的过孔与漏极电连接。
  20. 一种显示装置，包括如权利要求17所述的有机薄膜晶体管，或如权利要求18或19所述的阵列基板。
PCT/CN2014/093052 2014-07-04 2014-12-04 有机薄膜晶体管及其制备方法、阵列基板及其制备方法、显示装置 WO2016000399A1 (zh)

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