WO2015076373A1 - Substrat de support à couche de formation de circuit, substrat de support à couches de formation de circuit sur les deux faces, plaque stratifiée multicouche, procédé de fabrication de carte de câblage imprimé multicouche, et carte de câblage imprimé multicouche - Google Patents

Substrat de support à couche de formation de circuit, substrat de support à couches de formation de circuit sur les deux faces, plaque stratifiée multicouche, procédé de fabrication de carte de câblage imprimé multicouche, et carte de câblage imprimé multicouche Download PDF

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Publication number
WO2015076373A1
WO2015076373A1 PCT/JP2014/080919 JP2014080919W WO2015076373A1 WO 2015076373 A1 WO2015076373 A1 WO 2015076373A1 JP 2014080919 W JP2014080919 W JP 2014080919W WO 2015076373 A1 WO2015076373 A1 WO 2015076373A1
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WIPO (PCT)
Prior art keywords
layer
copper foil
support substrate
carrier
build
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Application number
PCT/JP2014/080919
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English (en)
Japanese (ja)
Inventor
敏文 松島
歩 立岡
慎哉 平岡
Original Assignee
三井金属鉱業株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by 三井金属鉱業株式会社 filed Critical 三井金属鉱業株式会社
Priority to JP2015515312A priority Critical patent/JP6678029B2/ja
Priority to CN201480063354.9A priority patent/CN105746004B/zh
Priority to KR1020167013103A priority patent/KR102191918B1/ko
Publication of WO2015076373A1 publication Critical patent/WO2015076373A1/fr

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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4682—Manufacture of core-less build-up multilayer circuits on a temporary carrier or on a metal foil
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/007—Manufacture or processing of a substrate for a printed circuit board supported by a temporary or sacrificial carrier
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0097—Processing two or more printed circuits simultaneously, e.g. made from a common substrate, or temporarily stacked circuit boards
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/15—Position of the PCB during processing
    • H05K2203/1536—Temporarily stacked PCBs

Definitions

  • the present invention relates to a support substrate with a circuit formation layer, a support substrate with a double-sided circuit formation layer, a method for producing a multilayer printed wiring board, and a multilayer printed wiring board.
  • it does not leave a core substrate as a support during the build-up layer formation, the support substrate with a circuit-forming layer that can be suitably used when producing a build-up multilayer printed wiring board, a support substrate with a double-sided circuit-forming layer
  • the present invention relates to a method for manufacturing a multilayer printed wiring board using the support substrate with a circuit forming layer, and a multilayer printed wiring board.
  • a manufacturing method of a coreless buildup multilayer printed wiring board that does not leave a core substrate as a support for forming a so-called buildup layer at the time of manufacturing due to a demand for a thinner buildup multilayer printed wiring board. has been adopted.
  • Patent Document 1 describes a method of manufacturing a multilayer printed wiring board by a coreless build-up method using a metal foil with a carrier that can be peeled off at an interface between an adhesive and a metal foil.
  • a synthetic resin plate carrier and a metal foil with a carrier made of a metal foil mechanically peelably adhered to at least one surface of the carrier are used.
  • a method is disclosed in which a buildup layer is laminated on both sides of a metal foil with a carrier to which a copper foil is bonded, and then the metal foil on both sides is peeled from the metal foil with a carrier.
  • Patent Document 1 uses a resin or prepreg as the synthetic resinous plate-like carrier, and has a thickness of 50 to 900 ⁇ m so that the position of the circuit caused by the difference in thermal expansion between the metal foil and the synthetic resin. It is disclosed to prevent deviation and reduce bending.
  • the inventors of the present invention have come up with a method for manufacturing a multilayer printed wiring board by a coreless buildup method using a support substrate with a circuit forming layer shown below.
  • the support substrate with a circuit formation layer has a layer configuration of copper foil layer / peeling layer / carrier layer / resin layer, and the maximum unevenness on the surface of the carrier layer on the resin layer side.
  • the copper foil layer having a height difference (PV) of 3 ⁇ m to 12 ⁇ m and a thickness of the resin layer of 1.5 ⁇ m to 15 ⁇ m is used as a circuit forming layer. is there.
  • a manufacturing method of a multilayer printed wiring board according to the present application is a method of manufacturing a multilayer printed wiring board by the coreless buildup method using the support substrate with a circuit forming layer, and includes the following steps: It is characterized by.
  • Build-up wiring layer forming step A build-up wiring layer is formed on the surface of the copper foil layer of the circuit-forming layer-attached substrate to obtain a support substrate with a build-up wiring layer.
  • Step of separating support substrate with buildup wiring layer A multilayer in which the support substrate with buildup wiring layer is separated by the release layer of the support substrate with circuit forming layer, and a buildup layer is formed on the copper foil layer A laminate is obtained.
  • Multilayer printed wiring board forming step Necessary processing is performed on the multilayer laminated board to obtain a multilayer printed wiring board.
  • first manufacturing method In the method for manufacturing a multilayer printed wiring board according to the present application, by applying the above basic manufacturing method, the following “first manufacturing method”, “second manufacturing method”, and “third manufacturing method” are used. It is also preferable to manufacture.
  • This first manufacturing method includes the following steps. Each step will be described in detail in the following description of the embodiment of the invention.
  • Manufacturing process of support substrate with double-sided circuit forming layer Using two copper foils with a carrier having a layer structure of resin layer / carrier layer / peeling layer / copper foil layer, these resin layers are directly bonded together, or a core material A support substrate with a double-sided circuit forming layer having a layer structure of copper foil layer / peeling layer / carrier layer / center resin layer / carrier layer / peeling layer / copper foil layer is obtained by laminating on both sides .
  • Build-up wiring layer forming step A build-up wiring layer is formed on the surface of each copper foil layer of the substrate with a double-sided circuit forming layer to obtain a support substrate with a build-up wiring layer.
  • Support substrate separation step with build-up wiring layer A multilayer laminate having a build-up layer formed on a copper foil layer is obtained by separation with a release layer of the support substrate with a double-sided circuit formation layer.
  • This second manufacturing method includes the following steps.
  • Manufacturing process of support substrate with double-sided circuit forming layer First copper foil with carrier having layer structure of carrier layer / peeling layer / copper foil layer and layer structure of resin layer / carrier layer / peeling layer / copper foil layer
  • the carrier of the first carrier-attached copper foil and the resin layer of the second carrier-attached copper foil are directly attached to each other, or are attached to both surfaces of the core material, thereby providing a copper foil layer.
  • a support substrate with a double-sided circuit forming layer having a layer structure of: / peeling layer / carrier layer / central resin layer / carrier layer / peeling layer / copper foil layer is obtained.
  • Build-up wiring layer forming step A build-up wiring layer is formed on the surface of each copper foil layer of the double-sided circuit forming layer-supported substrate to obtain a build-up wiring layer-supported substrate.
  • Support substrate separation step with build-up wiring layer A multilayer laminate having a build-up layer formed on a copper foil layer is obtained by separation with a release layer of the support substrate with a double-sided circuit formation layer.
  • This third manufacturing method includes the following steps.
  • each carrier layer of each copper foil with a carrier is made of a resin core material Are bonded together to obtain a support substrate with a double-sided circuit forming layer having a layer structure of copper foil layer / peeling layer / carrier layer / central resin layer / carrier layer / peeling layer / copper foil layer.
  • Build-up wiring layer forming step A build-up wiring layer is formed on the surface of each copper foil layer of the double-sided circuit forming layer-supported substrate to obtain a build-up wiring layer-supported substrate.
  • Support substrate separation step with build-up wiring layer A multilayer laminate having a build-up layer formed on a copper foil layer is obtained by separation with a release layer of the support substrate with a double-sided circuit formation layer.
  • the support substrate with a circuit forming layer according to the present invention can be used when a multilayer printed wiring board is manufactured by a coreless buildup method, and has a layer configuration of copper foil layer / peeling layer / carrier layer / resin layer as a basic configuration. Prepare.
  • This support substrate with a circuit-forming layer is excellent in the adhesion between the resin layer and the carrier, and can be excellent in the smoothness of the circuit formed on the copper foil layer.
  • the support substrate with circuit forming layer is a support substrate that can be used when a multilayer printed wiring board is manufactured by a coreless buildup method, and a copper foil layer / peeling layer It is a support substrate with a circuit formation layer having a layer configuration of / carrier layer / resin layer, and a basic configuration in which a copper foil layer is used as a circuit formation layer.
  • the carrier layer 2 / the release layer 3 / the copper foil layer 4 are sequentially formed on both surfaces of the resin layer (center resin layer 8) from the resin layer side.
  • a support substrate 1 with a double-sided circuit formation layer having a layer structure As a support substrate 1 with a double-sided circuit formation layer having a layer structure, a build-up layer is laminated on a copper foil layer, and then the carrier layer / resin layer side is separated in the release layer of the support substrate, thereby coreless build-up It is also preferable to obtain a multilayer printed wiring board.
  • each layer which comprises the said support substrate with a circuit formation layer is demonstrated in order.
  • the resin layer of the support substrate with a circuit forming layer preferably has a thickness of 1.5 ⁇ m to 15 ⁇ m.
  • the thickness of the resin layer is used to prevent peeling from the end face of the substrate when the support substrate with a circuit formation layer is formed and a buildup layer is formed. Is preferably 1.5 ⁇ m or more.
  • the thickness of the resin layer is preferably 15 ⁇ m or less from the viewpoint that surface smoothness when forming a circuit on the copper foil layer can be ensured.
  • the thickness of the resin layer is more preferably 2 ⁇ m to 10 ⁇ m, and further preferably 2 ⁇ m to 8 ⁇ m.
  • the thickness of the central resin layer of the support substrate with the double-sided circuit layer is preferably 3 ⁇ m to 30 ⁇ m, and the thickness of the central resin layer is 4 ⁇ m to More preferably, it is 20 ⁇ m, and more preferably 4 ⁇ m to 16 ⁇ m.
  • the resin constituting the resin layer is a resin generally used for printed circuit board production such as epoxy resin, polyimide resin, polyamide resin, polyamideimide resin, phenol resin, etc. Is preferred.
  • the resin layer is also preferably composed of a prepreg or the like in which these resins are impregnated in a skeletal material such as glass cloth or glass nonwoven fabric.
  • Carrier layer Here, the reason for the carrier layer (carrier) is described.
  • the support substrate with a circuit formation layer according to the present application is provided with the layer configuration (copper foil layer 4 / peeling layer 3 / carrier layer 2 / resin layer) of the above basic configuration, As long as the layer structure of copper foil layer 4 / peeling layer 3 / carrier layer 2 / central resin layer 8 / carrier layer 2 / peeling layer 3 / copper foil layer 4 is provided, there is no particular limitation on the manufacturing method. However, it is preferable to manufacture using the copper foil 10 with a carrier provided with the layer structure of copper foil layer 4 / peeling layer 3 / carrier layer 2 as shown in FIG. 2 (A), for example. As shown in FIG. 2A, the carrier-attached copper foil 10 may include a roughening treatment layer 5 and a roughening treatment layer 6 on the outer layers of the copper foil layer 4 and the carrier layer 2, respectively. It is not limited.
  • the carrier layer constituting the support substrate with a circuit forming layer is generally a resin film having a thickness of 12 ⁇ m to 70 ⁇ m, or an electrolytic copper foil or a rolled copper foil. From the viewpoint of reducing waste and handling properties. In view of the above, those of 12 ⁇ m to 35 ⁇ m are preferable. In addition, from the viewpoint of maintaining rigidity against a high temperature heat load when forming the buildup layer on the support substrate with a circuit forming layer, the carrier layer is subjected to a heat treatment at 250 ° C. for 60 minutes, and then 40 kgf / More preferably, it is made of a copper foil having a tensile strength of mm 2 or more.
  • the bonding surface of the carrier layer with the resin layer is a rough surface capable of appropriately maintaining the adhesive strength with the resin layer.
  • the maximum peak height of the sample surface and the maximum valley depth measured directly using a three-dimensional surface structure analysis microscope is used as an index. Use.
  • the value of the “maximum height difference (PV)” of the surface of the carrier layer is that the adhesion between the carrier layer and the resin layer can be secured, and the smoothness of the circuit formed on the copper foil layer is maintained. From the point (in other words, the reduction of unevenness on the surface of the copper foil layer after pressing based on the uneven shape of the carrier layer), the thickness is preferably 3 ⁇ m to 12 ⁇ m, more preferably 4 ⁇ m to 10 ⁇ m.
  • the measurement of the “maximum height difference (PV) of unevenness” uses ZygogNew View 5032 (manufactured by Zygo) as measurement equipment, and “Metro Pro Ver. 8.0.2” as analysis software, and the low frequency filter is 11 ⁇ m. Measured with setting. Specifically, the measurement was performed by the following procedures a) to c).
  • the release layer is an organic release layer, it preferably contains at least one compound selected from the group consisting of nitrogen-containing compounds, sulfur-containing compounds and carboxylic acids.
  • the nitrogen-containing organic compound mentioned here includes a nitrogen-containing organic compound having a substituent.
  • examples of the nitrogen-containing organic compound include 1,2,3-benzotriazole, carboxybenzotriazole, N ′, N′-bis (benzotriazolylmethyl) urea, which are triazole compounds having a substituent, and 1H. It is preferable to use -1,2,4-triazole, 3-amino-1H-1,2,4-triazole and the like.
  • the sulfur-containing organic compound it is preferable to use mercaptobenzothiazole, thiocyanuric acid, 2-benzimidazolethiol, or the like.
  • the carboxylic acid it is particularly preferable to use a monocarboxylic acid, and it is particularly preferable to use oleic acid, linoleic acid, linolenic acid, or the like. This is because these organic components are excellent in heat resistance at high temperatures, and it is easy to form a bonding interface layer having a thickness of 5 nm to 60 nm on the surface of the carrier.
  • the inorganic component is selected from the group consisting of Ni, Mo, Co, Cr, Fe, Ti, W, P, carbon, or an alloy or compound containing these as a main component. It is preferable to use at least one of the above.
  • these inorganic bonding interface layers they can be formed using a known method such as an electrodeposition method, an electroless method, or a physical vapor deposition method.
  • the copper foil layer is formed by a physical vapor deposition method such as sputtering, a chemical vapor reaction method, an electroless plating method, an electrolytic plating method, a composite plating method using both electroless plating and electrolytic plating, or the like.
  • a physical vapor deposition method such as sputtering, a chemical vapor reaction method, an electroless plating method, an electrolytic plating method, a composite plating method using both electroless plating and electrolytic plating, or the like.
  • the thickness of the copper foil is preferably 1 ⁇ m to 10 ⁇ m from the viewpoint of preventing the occurrence of pinhole defects and securing the etching factor when forming the fine circuit.
  • the copper foil layer is also used as a circuit forming layer of a multilayer printed wiring board.
  • an embedded circuit forming layer or an outer layer circuit forming layer is used. It is used as.
  • the timing at which circuit formation is performed on the copper foil layer is not particularly limited. Before the buildup layer is laminated on the copper foil layer, circuit formation may be performed using the copper foil layer as an embedded circuit formation layer.
  • a buildup layer is laminated on the copper foil layer, and after a multilayer laminated board is obtained in a support substrate separating process with a buildup wiring layer described later, circuit formation is performed using the copper foil layer as an outer circuit forming layer. It may be broken.
  • a conventionally known circuit forming method can be appropriately employed.
  • MSAP Mode Semi-Additive Process
  • the subtractive method in which an unnecessary portion is removed from the copper foil layer and the pattern is formed. Etc. are preferably employed.
  • a multilayer printed wiring board can be manufactured by the following coreless buildup method using the support substrate with a circuit forming layer according to the present application described above.
  • the manufacturing method of the multilayer printed wiring board according to the present application can be applied to the following three manufacturing methods based on the following basic manufacturing method.
  • the description will be divided into “basic manufacturing method”, “first manufacturing method”, “second manufacturing method”, and “third manufacturing method”.
  • the build-up wiring layer forming step, the build-up wiring layer-attached support substrate separating step, and the multilayer printed wiring board forming step, which are referred to as the basic manufacturing method, are common to all manufacturing methods.
  • each manufacturing method will be described.
  • the basic manufacturing method is a method of manufacturing a multilayer printed wiring board by the coreless buildup method using the support substrate with a circuit forming layer having the above basic configuration, and includes the following steps.
  • Build-up wiring layer forming step A build-up wiring layer is formed on the surface of the copper foil layer of the circuit-forming layer-attached substrate to obtain a support substrate with a build-up wiring layer.
  • Step of separating support substrate with buildup wiring layer A multilayer in which the support substrate with buildup wiring layer is separated by the release layer of the support substrate with circuit forming layer, and a buildup layer is formed on the copper foil layer A laminate is obtained.
  • Multilayer printed wiring board forming step Necessary processing is performed on the multilayer laminated board to obtain a multilayer printed wiring board.
  • the first manufacturing method includes the following steps. Hereinafter, it demonstrates for every process.
  • FIG. 3 (C-1) 2 copper foils 20 with a carrier having a resin layer 7 having a layer structure of resin layer 7 / carrier layer 2 / peeling layer 3 / copper foil layer 4 are prepared.
  • the resin layers 7 are directly attached to each other using a sheet.
  • FIG. 3 (D) “copper foil layer 4 / peeling layer 3 / carrier layer 2 / central resin layer 8 / carrier layer 2 / peeling including a copper foil layer 4 as a circuit forming layer on both surfaces.
  • the support substrate 1 with a double-sided circuit forming layer having a layer configuration of “layer 3 / copper foil layer 4” can be obtained.
  • the copper foil layer of the carrier-attached copper foil 20 and the copper foil layer as the circuit formation layer (outer layer circuit formation layer) of the double-sided circuit formation layer-attached support substrate 1 mean the same place. , Shown as the same reference numeral 4.
  • Build-up wiring layer forming step In this step, the build-up wiring layer Bu is formed on the surfaces of the copper foil layers 4 on both surfaces of the support substrate 1 with the double-sided circuit forming layer.
  • the support substrate with a double-sided circuit formation layer 1 on which the build-up wiring layer Bu is formed is referred to as the support substrate with a build-up wiring layer 40 as described above.
  • the specific method for forming the buildup wiring layer Bu is not particularly limited. As long as it is a method included in a so-called build-up method, a desired multilayer and inner layer circuit may be formed by any method. As an example, in FIG.
  • the build-up wiring layer Bu is “a first build-up wiring layer 30 including a first circuit layer 31 including a via hole 28 and a first circuit 23 including a plating layer 24. ”,“ A second build-up wiring layer 32 including the via hole 28 and the second circuit layer 33 including the second circuit 25 including the plating layer 24 ”“ a wiring layer 34 composed of a copper foil or the like and an interlayer insulating resin layer 35. A third build-up layer 36 "and so on.
  • Support substrate separation step with build-up wiring layer In this step, as shown in FIG. 5 (F), the support substrate with build-up wiring layer 40 is separated by the release layer 3 of the support substrate with circuit formation layer 1. Thus, two multilayer laminates 50 having the build-up layer Bu formed on the copper foil layer 4 are obtained. At this time, by separating the support substrate 40 with the build-up wiring layer simultaneously with the release layer 3 of the support substrate 1 with the double-sided circuit formation layer, the two multilayer laminates 50 can be obtained at the same time.
  • Multilayer printed wiring board forming step In this step, the multilayer laminated board 50 can be processed to obtain a multilayer printed wiring board. Since there is no special limitation regarding this process, illustration is abbreviate
  • the resin layers 7 are bonded together, but a core material may be interposed between the resin layers 7.
  • a core material may be interposed between the resin layers 7.
  • a resin-made core material can be used, and a semi-cured (B stage) resin film or a resin film having a semi-cured resin layer is preferably used as the core material.
  • the core material By interposing the core material, the rigidity of the support substrate can be ensured even when the thickness of the resin layer of the copper foil with carrier 20 is thin.
  • the thickness of the central resin layer 8 is preferably within the above-described range.
  • bonding the said resin film with the resin layer 7 it can carry out by hot press molding etc. similarly to the case where the resin layers 7 are bonded together.
  • This second manufacturing method includes the following steps. Since the difference from the first manufacturing method is only the manufacturing process of the support substrate with a circuit forming layer, in the description of the embodiment of the invention below, the description with the first manufacturing method is omitted, and therefore, with a double-sided circuit forming layer. Only the manufacturing process of the support substrate will be described in detail.
  • FIG. 7D and FIG. 3D of the first manufacturing method have the same form. Therefore, the following steps of the second manufacturing method, the “build-up wiring layer forming step”, the “support substrate separating step with build-up wiring layer”, and the “multilayer printed wiring board forming step” are the same as those in the first manufacturing method. is there. Therefore, the duplicate description here is omitted.
  • the carrier foil surface of the first carrier-attached copper foil 10 and the surface of the resin layer 7 of the second carrier-attached copper foil 20 are directly bonded.
  • a core material may be interposed between the carrier surface and the resin layer 7.
  • the core material the same material as described in the first manufacturing method can be used, and the same method as described above can be adopted for the bonding method and the like.
  • This third manufacturing method includes the following steps. Since the difference from the first manufacturing method is only the manufacturing process of the support substrate with a double-sided circuit forming layer, in the following description of the embodiment of the invention, the double-sided circuit forming layer is omitted in order to avoid duplication with the first manufacturing method. Only the manufacturing process of the attached support substrate will be described.
  • the copper foil layer 4 which contains the copper foil layer 4 as a double-sided circuit formation copper foil layer on both surfaces / peeling layer 3 / carrier layer 2 / center resin layer 8 / carrier layer 2 / peeling layer 3 / copper foil layer 4 A support substrate 1 with a double-sided circuit forming layer having the layer structure is obtained.
  • FIG. 7D and FIG. 3D of the first manufacturing method have the same form. Therefore, the following steps of the third manufacturing method, the “build-up wiring layer forming step”, the “support substrate separating step with build-up wiring layer”, and the “multilayer printed wiring board forming step” are the same as the first manufacturing step. is there. Therefore, the duplicate description here is omitted.
  • the film-like resin F corresponds to the core material described in the first manufacturing method or the second manufacturing method.
  • Example 1 In Example 1, a multilayer printed wiring board was manufactured by the first manufacturing method described above. Specifically, a multilayer printed wiring board was manufactured by the following steps.
  • Resin layer / carrier layer / peeling in which the maximum height difference (PV) of unevenness on the surface of the resin layer side of the resin layer (thickness 2.5 ⁇ m) and the carrier layer (thickness 18 ⁇ m) is 3.8 ⁇ m as the copper foil with carrier
  • PV maximum height difference
  • the resin layer component was blended as follows, and the varnish adjusted so that the total solid content was 20% by weight was coated on the carrier layer using an applicator.
  • the support substrate with a buildup wiring layer is separated at each release layer of the support substrate with a double-sided circuit formation layer by a support substrate separation process with a buildup wiring layer.
  • Two multilayer laminates hereinafter referred to as laminate A) having a build-up layer formed on a copper foil layer were obtained.
  • Example 2 to Example 4 are the same as Example 1 except that the maximum height difference (PV) of the unevenness on the surface of the carrier layer on the resin layer side and the resin layer thickness are as shown in Table 1, respectively.
  • a support substrate (a) and a laminate (i) were produced.
  • Comparative Examples 1 to 5 the same method as in Example 1 except that the maximum height difference (PV) of the unevenness on the surface of the carrier layer on the resin layer side and the resin layer thickness are as shown in Table 1, respectively.
  • the support substrate (a) and the laminated board (i) were manufactured.
  • Evaluation method 1-1 Adhesion between the central resin layer and the carrier layer
  • Adhesion between the central resin layer and the carrier layer was evaluated as follows. After the support substrate was cut into a width of 1 cm, the carrier layer on one side of the carrier layers arranged on both sides of the resin layer was pulled up at an angle of 90 ° and a speed of 50 mm / min, and the peel strength was measured. At that time, a pass / fail judgment was made based on the following criteria.
  • the substrate smoothness was evaluated by the following method for Examples 1 to 3 and Comparative Example 2 in which the evaluation result was “ ⁇ ” in the above-described adhesion evaluation.
  • the 10-point average roughness Rz hereinafter referred to as “Rz 0 ”
  • the Rz 0 measurement sample was obtained by laminating a carrier-attached copper foil having a layer structure of resin layer / carrier layer / release layer / copper foil layer to a smooth glass plate, and then peeling the carrier to expose the copper foil layer surface. It was.
  • Adhesion evaluation is ⁇
  • circuit formability is ⁇
  • Adhesion evaluation is x or circuit formability is x
  • Table 1 shows the evaluation results regarding the adhesion between the central resin layer and the carrier layer in Examples and Comparative Examples. As shown in Table 1, it was confirmed that all the support substrates with a double-sided circuit forming layer produced in Examples 1 to 4 had good adhesion between the central resin layer and the carrier layer. About an Example, it was confirmed that the one where the value of the maximum height difference (PV) of the unevenness
  • PV maximum height difference
  • the thickness of the resin layer is 20 ⁇ m (the thickness of the central resin layer is 40 ⁇ m), and the maximum height difference (PV) of the unevenness on the surface of the carrier layer on the resin layer is within the scope of the present invention.
  • the adhesion between the central resin layer and the carrier layer was good, but for the other comparative examples, the adhesion between the central resin layer and the carrier layer was not good, and the buildup layer was formed. In the process, it was peeled off from the end of the substrate, and the substrate smoothness of the laminated plate i could not be evaluated.
  • Circuit formability (substrate smoothness) Table 1 shows the evaluation results regarding circuit formability in Examples and Comparative Examples. As shown in Table 1, it was confirmed that each of the support substrates with double-sided circuit forming layers produced in Examples 1 to 4 had good circuit formability. In particular, when the thickness of the resin layer is within the above-described preferable range (1.5 ⁇ m to 15 ⁇ m), it was confirmed that better circuit forming properties are exhibited.
  • multilayer prints with excellent circuit formation stability in the build-up layer formation process by providing a support substrate with excellent adhesion and circuit smoothness A wiring board can be obtained.
  • Support substrate with circuit forming layer 2 Carrier layer (carrier) 3 peeling layer 4 copper foil layer 7 resin layer 8 central resin layer 10 copper foil with carrier 20 electrolytic copper foil with carrier provided with resin layer 23 first circuit 25 second circuit 24 plating layer 28 via hole 30 first buildup wiring layer 30 31 1st circuit layer 32 2nd buildup wiring layer 33 2nd circuit layer 34 wiring layer 35 interlayer insulation resin layer 36 3rd buildup layer 40 support substrate 50 with buildup wiring layer multilayer laminated board Bu buildup wiring layer F film Resin

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Laminated Bodies (AREA)

Abstract

La présente invention a pour objet de pourvoir à un substrat de support qui soit excellent en termes d'adhérence et de régularité de circuit d'une carte de câblage imprimé multicouche sans noyau, et analogues. Un substrat de support à couche de formation de circuit est décrit, qui est caractérisé en ce qu'il possède une structure en couches composée d'une couche de feuille de cuivre, d'une couche de décollement, d'une couche porteuse et d'une couche de résine, et en ce que la différence maximale (PV) de hauteur entre des saillies et des creux sur la surface côté couche de résine de la couche porteuse est de 3-12 μm, l'épaisseur de la couche de résine est de 1,5-15 μm, et la couche de feuille de cuivre est utilisée comme couche de formation de circuit.
PCT/JP2014/080919 2013-11-22 2014-11-21 Substrat de support à couche de formation de circuit, substrat de support à couches de formation de circuit sur les deux faces, plaque stratifiée multicouche, procédé de fabrication de carte de câblage imprimé multicouche, et carte de câblage imprimé multicouche WO2015076373A1 (fr)

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CN201480063354.9A CN105746004B (zh) 2013-11-22 2014-11-21 带有电路形成层的支持基板、两面带有电路形成层的支持基板、多层层压板、多层印刷线路板的制造方法及多层印刷线路板
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CN114641126B (zh) * 2021-02-09 2024-03-08 广州方邦电子股份有限公司 电磁屏蔽膜及线路板

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JP6678029B2 (ja) 2020-04-08
CN105746004B (zh) 2019-06-07
KR102191918B1 (ko) 2020-12-17
KR20160089365A (ko) 2016-07-27
CN105746004A (zh) 2016-07-06
JPWO2015076373A1 (ja) 2017-03-16
TW201536120A (zh) 2015-09-16

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