WO2014112560A1 - アクティブマトリクス基板、及び表示装置 - Google Patents
アクティブマトリクス基板、及び表示装置 Download PDFInfo
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- WO2014112560A1 WO2014112560A1 PCT/JP2014/050696 JP2014050696W WO2014112560A1 WO 2014112560 A1 WO2014112560 A1 WO 2014112560A1 JP 2014050696 W JP2014050696 W JP 2014050696W WO 2014112560 A1 WO2014112560 A1 WO 2014112560A1
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3648—Control of matrices with row and column drivers using an active matrix
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1345—Conductors connecting electrodes to cell terminals
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1345—Conductors connecting electrodes to cell terminals
- G02F1/13452—Conductors connecting driver circuitry and terminals of panels
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0202—Addressing of scan or signal lines
Definitions
- the present invention relates to an active matrix substrate provided with a plurality of data lines and a plurality of scanning lines in a matrix, and a display device using the same.
- liquid crystal display devices have become flat panel displays (display cells) that are thinner and lighter than conventional cathode ray tubes, and are used in electrical devices such as liquid crystal televisions, monitors, mobile phones, digital cameras, and information terminals. Widely used.
- a liquid crystal display device a plurality of data lines (source lines) and a plurality of gate lines (scanning lines) are wired in a matrix, and a thin film transistor (TFT: Thin) is provided in the vicinity of the intersection of the data lines and the scanning lines.
- TFT Thin
- An active matrix substrate in which a switching element such as a film-transistor) and pixels having pixel electrodes connected to the switching element are arranged in a matrix is used for a liquid crystal panel as a display panel.
- a matrix region in which a plurality of data lines and a plurality of scanning lines are arranged in a matrix that is, a plurality of pixels are arranged in a matrix form. It is desired that a large number of wirings routed from one side of the pixel array to the terminal are stored in a predetermined region. That is, it is desired to reduce a portion called a frame that is around the display cell and is not involved in display.
- a scanning signal driving circuit (gate driver) monolithically made of low-temperature polycrystalline silicon as a base material is simultaneously formed on the substrate in order to meet the demand for narrowing the frame in the display cell as described above. By forming, reduction of the frame other than the terminal side provided with the terminal is realized.
- the frame of the terminal side that contains the wiring related to the wiring called the video signal line connected to the data wiring has much more wiring than the circuit elements that can be made monolithic, and its reduction is difficult. It was. Therefore, in the conventional active matrix substrate, proposals have been made mainly to devise the wiring width, wiring pitch and wiring structure of the video signal lines.
- the wiring pitch is set to be smaller in the direction from the matrix area to the terminal area between the matrix area and the terminal area where the plurality of terminals are installed. It is also shown that a plurality of video signal lines are wired to a wiring region (that is, a wiring region drawn so as to be narrowed down in a fan shape).
- a wiring region that is, a wiring region drawn so as to be narrowed down in a fan shape.
- the FPC and data driver (driver IC) connected to the terminals in the terminal region can be reduced. It has been said that the member cost of these FPCs and driver ICs can be reduced.
- the change in resistance between two adjacent video signal lines may increase.
- this conventional active matrix substrate for example, when used in a liquid crystal display device, there is a possibility that display unevenness due to the resistance change is visually recognized.
- this conventional active matrix substrate in order to efficiently wire video signal lines to the wiring region set so as to reduce the wiring pitch, two adjacent signal lines are arranged.
- One and the other of the video signal lines are configured using a lower metal film and an upper metal film (first and second conductive layers) having different sheet resistances.
- the resistance change between two adjacent video signal lines may become large depending on the size of each sheet resistance, the length of the video signal line, and the like.
- the present invention provides a resistance between two adjacent signal lines even when two conductive layers having different sheet resistances are used in a plurality of signal lines wired so as to reduce the wiring pitch. It is an object of the present invention to provide an active matrix substrate with little change and a display device using the same.
- an active matrix substrate includes a plurality of data lines and a plurality of scan lines arranged in a matrix, and each intersection of the plurality of data lines and the plurality of scan lines.
- An active matrix substrate comprising a pixel having a switching element provided corresponding to a portion and a pixel electrode connected to the switching element, A plurality of terminals for inputting external signals to the plurality of data lines or the plurality of scanning lines; A wiring pitch is formed in a direction from the matrix area to the terminal area between the matrix area arranged in a matrix of the plurality of data lines and the plurality of scanning lines and a terminal area where the plurality of terminals are installed.
- Each of the plurality of signal lines includes first and second wiring portions provided on the matrix region side and the terminal region side, respectively, and a connection portion that connects the first and second wiring portions,
- the first and second wiring portions of one of the two adjacent signal lines are respectively configured by different first and second conductive layers, and the other signal line
- the first and second wiring portions are constituted by the second and first conductive layers;
- the position of the connection portion of the signal line is determined according to the wiring position of the signal line in the wiring region.
- Each of the signal lines has first and second wiring portions provided on the matrix region side and the terminal region side, respectively, and a connection portion that connects the first and second wiring portions.
- the first and second wiring portions of one of the two adjacent signal lines are respectively configured by different first and second conductive layers, and the first signal line of the other signal line
- the first and second wiring portions are constituted by the second and first conductive layers, respectively.
- the position of the connecting portion of the signal line is determined according to the wiring position in the wiring region of the signal line.
- the position of the connection portion is determined so that the lengths of the first and second wiring portions are equal to each other in the plurality of signal lines.
- the plurality of signal lines may be connected to any one of the first, second, and third wiring groups in which the wiring length in the wiring area becomes shorter in the wiring area. Wired to belong, In the first wiring group, the plurality of connection portions are arranged so as to be parallel to one side of the matrix region, In the second wiring group, the plurality of connection portions are arranged at a predetermined angle with respect to one side of the matrix region so as to gradually approach the matrix region, In the third wiring group, the plurality of connection portions may be arranged at a predetermined angle with respect to one side of the matrix region so as to be gradually separated from the matrix region.
- connection portion in each of the first to third wiring groups, the connection portion can be provided so that the wiring lengths of the first and second wiring portions are the same, and the two signal lines adjacent to each other can be provided. The difference in resistance can be minimized.
- an arrangement interval at the end on the matrix region side is Pa
- an arrangement interval of the connection portions is Pai
- the arrangement interval at the end on the matrix region side is Pb
- the arrangement interval of the connection portions is Pbi
- the arrangement interval of the connection portion is Pci
- the direction in which each signal line is drawn out from the matrix region side can be aligned, and the signal lines can be easily wired so that they are parallel to each other.
- an angle of the first wiring portion with respect to one side of the matrix region is ⁇ a1, and an angle of the second wiring portion with respect to one side of the matrix region is ⁇ a2.
- an angle of the first wiring portion with respect to one side of the matrix region is ⁇ b1
- an angle of the second wiring portion with respect to one side of the matrix region is ⁇ b2
- the signal lines can be wired in parallel to each other, and the layout efficiency can be easily improved.
- an arrangement interval at an end portion on the matrix region side at a boundary between the first wiring group and the second wiring group is Pab, and
- the position adjustment of the connecting portion can be performed independently of each other, and the degree of freedom in routing the signal line can be ensured.
- the position of the connecting portion can be adjusted independently of each other, and the degree of freedom in routing the signal line can be ensured.
- an outer wiring constituted by one conductive layer of the first and second conductive layers is provided between the second wiring portion and the terminal.
- the second wiring portion and the outer wiring are connected via an outer connection portion.
- the plurality of outer connection portions may be arranged so as to be parallel to one side of the matrix region.
- the plurality of outer connecting portions are arranged in a straight line, even when a sealing material is provided on the plurality of outer connecting portions, for example, the sealing material can be easily provided.
- the signal lines can be aligned in the drawing direction from the matrix region side, and the signal lines are parallel to each other. Can be easily wired. Therefore, a thin film material that is not preferably exposed to the outside of the sealing material can be used as the first and second conductive layers.
- each of the plurality of signal lines may be a video signal line connected to the data line.
- the first wiring portion is formed of the same conductive layer as one of the data wiring and the scanning wiring, It is preferable that the second wiring portion is formed of the same conductive layer as the other of the data wiring and the scanning wiring.
- the display device of the present invention is characterized by using any of the active matrix substrates described above.
- the display device configured as described above, even when two conductive layers having different sheet resistances are used in a plurality of signal lines wired so as to reduce the wiring pitch, the two signal lines adjacent to each other are used. Since an active matrix substrate having a small resistance change is used, a compact display device having excellent display quality can be easily configured.
- the active change in resistance between the two adjacent signal lines is small. It is possible to provide a matrix substrate and a display device using the same.
- FIG. 1 is a perspective view showing a liquid crystal display device using an active matrix substrate according to the first embodiment of the present invention.
- FIG. 2 is a diagram for explaining a main part of the liquid crystal display device.
- FIG. 3 is an enlarged cross-sectional view for explaining the thin film transistor shown in FIG.
- FIG. 4 is a diagram for explaining a main configuration of the active matrix substrate shown in FIG.
- FIG. 5 is a diagram for explaining the configuration of the video signal line shown in FIG.
- FIG. 6 is an enlarged plan view showing a specific essential configuration of the active matrix substrate.
- FIG. 7 is a cross-sectional view illustrating two adjacent video signal lines.
- FIG. 8 is a cross-sectional view illustrating two other video signal lines adjacent to each other.
- FIG. 9 is a diagram for explaining video signal lines in the first wiring group shown in FIG. 10A is a cross-sectional view taken along line Xa-Xa in FIG. 9,
- FIG. 10B is a cross-sectional view taken along line Xb-Xb in FIG. 9, and
- FIG. 10C is a cross-sectional view taken along line Xc-- in FIG. It is Xc sectional view.
- FIG. 11 is a diagram for explaining video signal lines in the second wiring group shown in FIG. 12A is a cross-sectional view taken along line XIIa-XIIa in FIG. 11,
- FIG. 12B is a cross-sectional view taken along line XIIb-XIIb in FIG. 11, and
- FIG. 11 is a diagram for explaining video signal lines in the second wiring group shown in FIG. 12A is a cross-sectional view taken along line XIIa-XIIa in FIG. 11
- FIG. 12B is a cross-sectional view taken along
- FIG. 12C is a cross-sectional view taken along line XIIc-- in FIG. It is a XIIc line sectional view.
- FIG. 13 is a diagram for explaining video signal lines in the third wiring group shown in FIG. 14A is a cross-sectional view taken along line XIVa-XIVa of FIG. 13,
- FIG. 14B is a cross-sectional view taken along line XIVb-XIVb of FIG. 13, and
- FIG. 14C is a cross-sectional view taken along line XIVc-- of FIG. It is a XIVc line sectional view.
- FIG. 15 is a diagram for explaining video signal lines in the fourth wiring group shown in FIG.
- FIG. 16A is a cross-sectional view taken along the line XVIa-XVIa of FIG. 15,
- FIG. 16B is a cross-sectional view taken along the line XVIb-XVIb of FIG. 15, and FIG. It is a XVIc line sectional view.
- FIG. 17 is a diagram for explaining video signal lines in the fifth wiring group shown in FIG. 18A is a cross-sectional view taken along line XVIIIa-XVIIIa in FIG. 17,
- FIG. 18B is a cross-sectional view taken along line XVIIIb-XVIIIb in FIG. 17, and
- FIG. 18C is a cross-sectional view taken along line XVIIIc- It is a XVIIIc line sectional view.
- FIG. 18A is a cross-sectional view taken along the line XVIa-XVIa of FIG. 15
- FIG. 16B is a cross-sectional view taken along the line XVIb-XVIb of FIG. 15, and
- FIG. 19 is a plan view for explaining the arrangement and wiring structure of video signal lines on the active matrix substrate.
- FIG. 20 is a plan view for explaining a variation 1 of the arrangement of the video signal lines and the wiring structure on the active matrix substrate.
- FIG. 21 is a plan view for explaining a variation 2 of the arrangement of the video signal lines and the wiring structure on the active matrix substrate.
- FIG. 22 is a plan view for explaining a variation 3 of the arrangement of the video signal lines and the wiring structure on the active matrix substrate.
- FIG. 23 is a plan view for explaining a variation 4 of the arrangement of the video signal lines and the wiring structure on the active matrix substrate.
- FIG. 1 is a perspective view showing a liquid crystal display device using an active matrix substrate according to the first embodiment of the present invention.
- a liquid crystal display device 1 of the present embodiment includes an active matrix substrate (TFT substrate) 2 of the present invention and a counter substrate (color filter substrate) bonded to the active matrix substrate 2 through a sealing material described later. 3).
- the sealing material is provided in a frame shape, and the liquid crystal material is held inside the sealing material to form a liquid crystal layer 18 (see FIG. 7 or FIG. 8). Yes.
- a matrix region H in which a plurality of data wirings (source wirings) and a plurality of scanning wirings (gate wirings) are arranged in a matrix is provided.
- the region H functions as an effective display region of the liquid crystal display device 1.
- the data wiring is connected to drive, and a wiring DH including a video signal line, which will be described later, is drawn from the matrix region H and formed on the base material of the active matrix substrate 2.
- a wiring DH including a video signal line which will be described later, is drawn from the matrix region H and formed on the base material of the active matrix substrate 2.
- a plurality of terminals T are provided on the base material of the active matrix substrate 2, and a data driver to be described later constituted by a driver IC 100 is connected to the plurality of terminals T as shown in FIG. It is like that.
- FIG. 2 is a diagram for explaining a main part of the liquid crystal display device.
- FIG. 3 is an enlarged cross-sectional view for explaining the thin film transistor shown in FIG.
- the liquid crystal display device 1 operates based on a panel control unit 4 that controls driving of a display unit (liquid crystal panel) that displays information such as characters and images, and an instruction signal from the panel control unit 4.
- a data driver (source driver) 5 and a gate driver 6 are provided.
- the panel control unit 4 is adapted to receive a video signal from the outside of the liquid crystal display device 1. Further, the panel control unit 4 performs predetermined image processing on the input video signal to generate each instruction signal to the data driver 5 and the gate driver 6, and the input video signal.
- a frame buffer 4b capable of storing display data for one frame included. The panel control unit 4 performs drive control of the data driver 5 and the gate driver 6 in accordance with the input video signal, so that information corresponding to the video signal is displayed on the display unit.
- the data driver 5 is constituted by the external driver IC 100 as described above.
- the gate driver 6 is divided into two members on the left and right sides, and is formed monolithically on the base material of the active matrix substrate 2 based on, for example, polycrystalline silicon.
- the data driver 5 and the gate driver 6 are drive circuits that drive a plurality of pixels P provided on the liquid crystal panel side by pixel, and function as a column control circuit and a row control circuit, respectively. . That is, the data driver 5 and the gate driver 6 include a plurality of data wirings (column control lines) D1 to DM (M is an integer of 2 or more, hereinafter collectively referred to as “D”) and a plurality of gate wirings ( Row control lines G1 to GN (N is an integer of 2 or more, hereinafter collectively referred to as “G”) are connected to each other.
- D1 to DM M is an integer of 2 or more, hereinafter collectively referred to as “D”
- Row control lines G1 to GN N is an integer of 2 or more, hereinafter collectively referred to as “G”
- These data lines D and gate lines G are arranged in a matrix so as to cross each other on the transparent glass material or the transparent synthetic resin base material included in the active matrix substrate 2. That is, the data wiring D is provided on the base material so as to be parallel to the matrix-like column direction (vertical direction of the liquid crystal panel), and the gate wiring G is arranged in the matrix-like row direction (lateral direction of the liquid crystal panel). It is provided on the base material so as to be parallel to the substrate.
- the pixel P having the thin film transistor 7 as a switching element and the pixel electrode 8 connected to the thin film transistor 7 is provided.
- the counter electrode 9 is configured to face the pixel electrode 8 with the liquid crystal layer interposed therebetween. That is, in the active matrix substrate 2, the thin film transistor 7 and the pixel electrode 8 are provided for each pixel. Further, in the matrix region H, a plurality of pixels P are provided in a matrix form, and a pixel array is configured.
- the thin film transistor 7 is, for example, a top gate electrode type. Specifically, as shown in FIG. 3, the thin film transistor 7 is connected to the semiconductor layer 7h formed on the base film 10, the gate electrode 7g provided above the semiconductor layer 7h, and the semiconductor layer 7h. A source electrode 7s and a drain electrode 7d are provided.
- the base film 10 is provided so as to cover the surface of the base material 2 a of the active matrix substrate 2.
- a gate insulating film 11 is provided so as to cover the semiconductor layer 7 h and the base film 10, and a gate electrode integrally formed with the gate wiring G is formed on the gate insulating film 11.
- 7g is provided.
- An interlayer film 12 is provided so as to cover the gate electrode 7g and the gate insulating film 11, and a source electrode 7s and a drain electrode 7d are provided on the interlayer film 12.
- a protective film 13 is provided so as to cover the source electrode 7 s, the drain electrode 7 d, and the interlayer film 12, and the pixel electrode 8 is provided on the protective film 13.
- the gate electrode 7g and the gate wiring G are composed of a first conductive layer (lower metal film) described later. Further, the source electrode 7s is configured integrally with the data wiring D. The drain electrode 7d is connected to the pixel electrode 8 through a contact hole (not shown). The source electrode 7s, the data line D, and the drain electrode 7d are configured by a second conductive layer (upper layer metal film) described later.
- a plurality of pixel P regions are formed in each region partitioned in a matrix by the data lines D and the gate lines G.
- the plurality of pixels P include red (R), green (G), and blue (B) pixels. These RGB pixels are sequentially arranged in this order, for example, in parallel with the gate wirings G1 to GN. Further, these RGB pixels can display a corresponding color by a color filter layer provided on the counter substrate 3 side.
- the gate driver 6 scans the gate electrodes G of the corresponding thin film transistors 7 with respect to the gate wirings G 1 to GN based on the instruction signal from the image processing unit 4 a ( The gate signal is output sequentially. Further, the data driver 5 sends a data signal (voltage signal (gradation voltage)) corresponding to the luminance (gradation) of the display image to the corresponding data wirings D1 to DM based on the instruction signal from the image processing unit 4a. Output.
- a data signal voltage signal (gradation voltage)
- FIG. 4 is a diagram for explaining a main configuration of the active matrix substrate shown in FIG.
- a matrix area (effective display area) H In the active matrix substrate 2 of the present embodiment, as shown in FIG. 4, at the end where the driver IC 100 (FIG. 1) is installed, a matrix area (effective display area) H, a column control circuit area Da, a video signal line A region Sa and a terminal region Ta are sequentially provided.
- a plurality of gate wirings (row control lines) G are formed so as to cross the pixel array formed inside the matrix region H, and a plurality of data wirings (column control lines) are formed.
- D is formed to traverse the pixel array.
- the pixels P including the thin film transistors 7 are provided in a matrix, and a predetermined voltage is applied to each pixel P using the thin film transistors 7.
- the left and right sides of the matrix region H that is, the left and right frame portions of the liquid crystal display device 1, and the region of the active matrix substrate 2 including immediately below the sealing material S, are divided into two.
- Separated gate drivers (row control circuits) 6a and 6b are formed monolithically. Further, these gate drivers 6a and 6b are provided with adjoining circuits 6a1 and 6b1 such as a buffer circuit and a protection circuit, respectively.
- an RGB switch circuit 14 connected to the data wiring D and an inspection and protection circuit 15 connected to the RGB switch circuit 14 via the connection wiring 16 are provided.
- the inspection and protection circuit 15 is connected to the data driver 5 (FIG. 2) via a video signal line 17 as a signal line.
- the RGB switch circuit 14 and the inspection and protection circuit 15 together with the data driver 5 constitute a column control circuit.
- the RGB switch circuit 14 has a function of distributing a signal given from one video signal line 17 to one set of RGB, that is, three data lines D. With such a configuration, the number of video signal lines 17 can be reduced, and typically 3 ⁇ n columns of pixels P can be driven by n video signal lines. Since such an RGB switch circuit 14 can be realized by a circuit having a relatively simple configuration, it has been favorably used in recent years.
- the inspection and protection circuit 15 is an integrated configuration of an inspection circuit and a protection circuit.
- the inspection circuit is a circuit for enabling the non-defective product inspection by simply lighting and displaying the liquid crystal panel in a state where the driver IC 100 is not mounted with a simple input signal.
- the protection circuit is a circuit for suppressing destruction of the column control circuit and the pixel P due to static electricity, and includes a protection transistor, a capacitor, a resistance material, a diode, and the like.
- the inspection circuit and the protection circuit are not necessarily the same as the area width of the pixel array.
- the horizontal dimension of the inspection circuit and the protection circuit may be slightly reduced as compared with the RGB switch circuit 14.
- the RGB switch circuit 14 is connected to the inspection circuit and the protection circuit via the connection wiring 16 that is routed obliquely.
- an empty area can be created between the inspection circuit and the protection circuit and the gate drivers 6a and 6b, and wiring necessary for driving the RGB switch circuit 14 can be passed using this area.
- the RGB switch circuit 14 and the inspection and protection circuit 15 are arranged in the column control circuit area Da.
- the active matrix substrate 2 of the present embodiment is not limited to this.
- the video signal line 17 is directly connected to the data wiring D in the matrix area H to check and protect the RGB switch circuit 14.
- a configuration in which the installation of the column control circuit area Da including the circuit 15 is omitted may be employed.
- the column control circuit area Da in which at least one of the RGB switch circuit 14, the inspection circuit, and the protection circuit is installed may be provided. In any configuration, the video signal line 17 is drawn in a fan shape toward the terminal T (FIG. 1) installed in the terminal area Ta.
- a first wiring group A, a second wiring group B, a third wiring group C, a fourth wiring group D, and a fifth wiring group E are provided.
- the sixth wiring group Ey, the seventh wiring group Dy, the eighth wiring group Cy, as viewed in plan from the side where the wiring length of the video signal line 17 is short, A ninth wiring group By and a tenth wiring group Ay are provided. That is, in the video signal line region Sa, the video signal line 17 is wired so as to belong to any one of the first to tenth wiring groups.
- the first and tenth wiring groups A and Ay mean that the wiring groups are symmetrical to each other with respect to the paper surface of FIG.
- each of them has a symmetrical positional relationship with the Y axis O.
- FIG. 5 is a diagram for explaining the configuration of the video signal line shown in FIG.
- the video signal line region Sa is separated from the sealing material S by the inner wiring region Ia on the column control circuit region Da side and the outer wiring region Oa on the terminal region Ta side. It is divided into and. Further, in the inner wiring region Ia, the first wiring part 17a connected to the inspection and protection circuit 15 and the first wiring part 17a connected to the first wiring part 17a by the contact hole H1 of the inner connection part 17c as a connection part. Two wiring portions 17b are provided. Further, an outer connection portion 17d or a dummy outer connection portion 17dd is provided at a boundary portion between the inner wiring region Ia and the outer wiring region Oa.
- an outer wiring 17e is provided in the outer wiring area Oa, and the outer wiring 17e is connected to the second wiring part 17b by a contact hole H2 of the outer connection part 17d. Further, in the dummy outer connection portion 17dd, the second wiring portion 17b is extended as the outer wiring 17e (details will be described later).
- the inner wiring region Ia is located inside the sealing material S, it becomes easy to prevent the wiring (that is, the first and second wiring portions 17a and 17b) from being corroded or scratched. Therefore, for example, an arbitrary metal film can be used as the wiring material of the inner wiring region Ia regardless of the ease of corrosion.
- the wiring formed by any one of the different lower layer metal film and upper layer metal film can be used as the first and second wiring portions 17a and 17b. As shown in FIG. 3, these first and second conductive layers are not in direct contact with each other via the interlayer film 12, and thereby, the first and second wiring portions 17a and 17b are not contacted with each other. Can arrange wiring with a narrow arrangement interval.
- the first conductive layer (lower metal film) covered with the interlayer film 12 is used as the outer wiring 17e in the outer wiring region Oa.
- the material in the wiring direction (vertical direction on the paper surface) and the arrangement direction
- the wirings are arranged by repeating the materials in the (horizontal direction in the drawing) and replacing each other.
- the inner connection portion 17c when the inner connection portion 17c is provided at a position that equally divides the wiring length of the inner wiring region Ia, a sheet is formed by the first conductive layer and the second conductive layer. Even if the resistances are different, the wiring resistances of the adjacent first and second wiring parts 17a and 17b can be made the same. Further, even in the arrangement of the video signal lines 17 in which the wiring length is gradually increased (shortened), the resistances of the first and second wiring portions 17a and 17b adjacent to the inner wiring region Ia greatly change. Can be avoided.
- the video signal line 17 has a fan-like appearance instead of a simple set of parallel lines. Therefore, although it is expected that the arrangement form of the inner connection portion 17c for switching the wiring route and the wiring material of the video signal line 17 will be complicated, the configuration has not been disclosed.
- the present invention discloses the configuration and will be described in detail below.
- FIG. 6 is an enlarged plan view showing a specific main configuration of the active matrix substrate.
- the video signal line area Sa is composed of two wiring sections, that is, an inner wiring area Ia as a wiring area located closer to the matrix area H and an outer wiring area Oa located closer to the terminal area Ta. ing. Further, in the inner wiring area Ia, a first wiring portion 17a, an inner connection portion 17c, and a second wiring portion 17b are provided.
- the outer wiring region Oa is provided with an outer wiring 17e and is electrically connected to the second wiring portion 17b via the outer connection portion 17d.
- a first wiring part area h1 in which the first wiring part 17a is provided and a second wiring part area h2 in which the second wiring part 17b is provided are set.
- the first and second wiring part regions h1 and h2 have different sizes depending on the first to fifth wiring groups A to E, respectively.
- the outer wiring region Oa is provided with a third wiring portion region h3 where the outer wiring 17e is provided.
- the third wiring portion area h3 has the same size in the first to fifth wiring groups A to E, and also has the same size as the outer wiring area Oa.
- a portion 17b is provided in the inner wiring region Ia of the g-th video signal line 17.
- the inner wiring region Ia of the (g + 1) th video signal line 17 has a first wiring part 17a made of the second conductive layer and a second wiring part 17b made of the first conductive layer.
- the first wiring portion 17a and the second wiring portion 17b are maintained in electrical connection after the wiring material is switched by the inner connection portion 17c.
- the video signal line 17 having the structure indicated by the gth video signal line 17 and the video signal line 17 having the structure indicated by the (g + 1) th video signal line 17 are alternately arranged.
- the first to tenth wiring groups A to Ay are configured.
- FIG. 7 is a cross-sectional view illustrating two adjacent video signal lines.
- the liquid crystal display device 1 of the present embodiment uses thin film transistors 7 (FIG. 3) and 15Tr based on polycrystalline silicon, and a circuit formed on the active matrix substrate 2.
- the layer structure is such that when the active matrix substrate 2 is viewed from the lower layer, the base film 10, the semiconductor layer 15h, the gate insulating film 11, the gate electrode 15g, the interlayer film 12, the source electrode 15s and the drain electrode 15d, the protective film 13, and the pixel Electrode 8 is formed.
- a thin film transistor 15Tr is a thin film transistor included in the protection circuit of the inspection and protection circuit 15.
- the gate electrode 15g is constituted by the first conductive layer (lower metal film), similarly to the gate electrode 7g and the gate wiring G.
- the first conductive layer is a refractory metal thin film such as tungsten or tantalum. Such a metal film has a large sheet resistance, but has an advantage that it is easy to maintain reliability because it is located in the lower layer.
- the source electrode 15s and the drain electrode 15d are configured by the second conductive layer (upper metal film), like the source electrode 7s, the drain electrode 7d, and the data wiring D.
- This second conductive layer is a metal thin film having a low sheet resistance, such as aluminum or chromium. Such a metal film has a drawback of being easily corroded.
- the second conductive layer is used under the condition that it is covered with the protective film 13 or further limited to the inner wiring region Ia including the region directly under the sealing material S, the second Corrosion and disconnection can be suppressed by isolating and protecting the conductive layer from outside air. Therefore, the second conductive layer can be used as a wiring in a sufficiently practical range.
- the g-th video signal line 17 passes through the first wiring portion 17a, the inner connection portion 17c, the second wiring portion 17b, the outer connection portion 17d, and the outer wiring 17e located near the matrix region H. It has a route to the terminal T.
- the first wiring portion 17a starts from immediately after passing through the contact hole from the drain electrode 15d and reaches the inner connection portion 17c, and is made of the first conductive layer.
- the inner connection portion 17c includes a first conductive layer, an interlayer film 12, and a second conductive layer.
- the first and second conductive layers are electrically connected by a contact hole H1 opened in the interlayer film 12. Yes.
- the second wiring part 17b is a wiring that starts from the inner connection part 17c and reaches the outer connection part 17d, and is made of a second conductive layer.
- the outer connecting portion 17d is composed of a first conductive layer, an interlayer film 12, and a second conductive layer, and the first and second conductive layers are electrically connected by a contact hole H2 opened in the interlayer film 12. Yes.
- the outer wiring 17e is a wiring made of the first conductive layer and starting from the outer connecting portion 17e to the terminal T.
- the terminal T has a structure in which a first conductive layer, an interlayer film 12 provided with an opening, and an electrode portion T1 including a second conductive layer are stacked in this order, and a transparent electrode T2 is formed on the surface. Thus, it is configured to carry out electrical connection with the driver IC 100.
- the transparent electrode T2 may be the same material as the transparent electrode material that constitutes the pixel electrode 8.
- FIG. 8 is a cross-sectional view illustrating the other two adjacent video signal lines.
- the (g + 1) -th video signal line 17 includes a first wiring portion 17a, an inner connection portion 17c, a second wiring portion 17b, and a dummy outer connection portion 17dd that are located closer to the matrix region H. And a route to the terminal T via the outer wiring 17e.
- the first wiring portion 17a is composed of a wiring extending from the drain electrode 15d toward the inner connection portion 17c as it is, and is made of a second conductive layer upper layer metal film.
- the inner connection portion 17c includes a first conductive layer, an interlayer film 12, and a second conductive layer.
- the first and second conductive layers are electrically connected by a contact hole H1 opened in the interlayer film 12. Yes.
- the second wiring part 17b is a wiring that starts from the inner connection part 17c and reaches the outer connection part 17dd, and is made of the first conductive layer.
- the outer connection portion 17dd is composed of a first conductive layer, an interlayer film 12, and a second conductive layer.
- the first and second conductive layers are electrically connected by a contact hole H2 opened in the interlayer film 12. Yes.
- the outer connecting portion 17dd is a dummy connecting portion.
- Such a dummy outer connection portion 17dd may be arranged for use as a reference position for drawing in the mask layout, or may not be arranged if those skilled in the art consider unnecessary. I do not care. In consideration of the fact that the outer connection portion 17dd is located immediately below the sealing material S, the dummy outer connection portion 17dd may be arranged for the purpose of making the cell gap near the terminal region Ta of the liquid crystal display device 1 uniform. .
- the outer wiring 17e is a wiring made of the first conductive layer and starting from the outer connection portion 17dd to the terminal T.
- the terminal T has a structure in which a first conductive layer, an interlayer film 12 provided with an opening, and an electrode portion T1 including a second conductive layer are stacked in this order, and a transparent electrode T2 is formed on the surface. Thus, it is configured to carry out electrical connection with the driver IC 100.
- the transparent electrode T2 may be the same material as the transparent electrode material that constitutes the pixel electrode 8.
- the ratio of the section occupied by the first conductive layer and the section occupied by the second conductive layer is the same.
- the wiring resistances of the g-th video signal line 17 and the (g + 1) -th video signal line 17 can be regarded as substantially the same. It is possible to avoid that the wiring resistance largely changes at least in the adjacent video signal line 17, and in the liquid crystal display device 1, display uniformity without display unevenness can be maintained.
- the inner connecting portion 17c divides the wiring length of the inner wiring region Ia into two equal parts (that is, the first and second wiring portions 17a and 17b have the same wiring length). Position). Therefore, the ratio of the section occupied by the first conductive layer and the section occupied by the second conductive layer can be the same in the g-th video signal line 17 and the (g + 1) -th video signal line 17.
- Such a video signal line 17 has a possibility of a short circuit due to a foreign substance or the like because the metal films of the two adjacent video signal lines 17 in the inner wiring region Ia are different through the interlayer film.
- the video signal lines 17 can be arranged with a small pitch while suppressing. Therefore, the fan-shaped video signal line 17 can be routed at a narrowing angle, and as a result, the liquid crystal display device 1 having a small frame on the terminal side (that is, one side where the terminal T is provided in the liquid crystal display device 1) can be realized.
- the video signal lines 17 are divided and configured appropriately for the first to fifth wiring groups A to E and the sixth to tenth wiring groups Ey to Ay.
- the inventors of the present invention completed the present invention.
- This will be described subsequently.
- 4 shows a configuration in which there are a total of ten wiring groups, ie, the first to fifth wiring groups A to E and the sixth to tenth wiring groups Ey to Ay, but the present invention is not limited to this.
- the present invention is not limited to this.
- FIG. 9 is a diagram for explaining video signal lines in the first wiring group shown in FIG. 10A is a cross-sectional view taken along line Xa-Xa in FIG. 9,
- FIG. 10B is a cross-sectional view taken along line Xb-Xb in FIG. 9, and
- FIG. 10C is a cross-sectional view taken along line Xc-- in FIG. It is Xc sectional view.
- the video signal lines 17 other than the video signal lines 17 of the first wiring group A are not shown for simplification of the drawing.
- the video signal lines 17 are wired in the direction from the upper left to the lower right of the drawing.
- the video signal line area Sa is composed of an inner wiring area Ia located near the matrix area H and a outer wiring area Oa located near the terminal area Ta with the seal material S as a boundary.
- a first wiring portion 17a, an inner connection portion 17c, and a second wiring portion 17b are provided in order from the matrix region H side.
- the second wiring portion 17b in the inner wiring region Ia and the outer wiring 17e in the outer wiring region Oa are electrically connected by an outer connection portion 17d.
- each of the video signal lines 17 of the first wiring group A is viewed from the matrix region H side, and the first wiring portion 17a, the inner connection portion 17c, the second wiring portion 17b, the outer connection portion 17d, and the outer side.
- the wiring 17e and the path of the terminal T are provided.
- the first wiring portion 17a is on the inspection and protection circuit 15 side, and is directed to the terminal region Ta at a predetermined pitch (arrangement interval) Pa in parallel along one side (horizontal direction in the drawing) of the matrix region H. And a predetermined angle ⁇ a1 with respect to one side of the matrix region H.
- the first wiring portion 17a has a structure in which the wiring portion of the second conductive layer and the wiring portion of the first conductive layer are alternately repeated at a pitch of Pa1. That is, the A (h) -th first wiring portion 17a and the A (h + 2) -th first wiring portion 17a are configured by the second conductive layer, and the A (h + 1) -th first wiring portion 17a
- the A (h + 3) -th first wiring portion 17a is composed of a first conductive layer.
- the pitch between the adjacent A (h) th first wiring portion 17a and the A (h + 1) th first wiring portion 17a is Pa1.
- the pitch of the first wiring part 17a formed in the same layer, for example, the A (h) th first wiring part 17a and the A (h + 2) th first wiring part 17a is 2 ⁇ Pa1, and
- a The pitch between the (h + 1) th first wiring portion 17a and the A (h + 3) th first wiring portion 17a is 2 ⁇ Pa1.
- the inner connection portion 17c is arranged in parallel at a predetermined interval Pai along the one side of the matrix region H at the connection position of the first wiring portion 17a and the second wiring portion 17b. Further, in order to make the wiring resistance of two adjacent video signal lines 17 in the inner wiring region Ia uniform, an inner connection portion 17c is arranged at a position that divides the wiring length into two equal parts. That is, the wiring length of the first wiring portion 17a and the wiring length of the second wiring portion 17b are the same.
- the second wiring portion 17b is drawn from the inner connection portion 17c toward the terminal region Ta, and is drawn at a predetermined angle ⁇ a2 with respect to the arrangement direction of the inner connection portion 17c, in other words, one side of the matrix region H.
- the second wiring portion 17b has a structure in which the wiring portion of the second conductive layer and the wiring portion of the first conductive layer are alternately repeated at a pitch of Pa2.
- the first wiring portion 17a and the second wiring portion 17b on the same video signal line 17 have different wiring materials.
- the A (h) -th second wiring portion 17b and the A (h + 2) -th second wiring portion 17b are formed of the first conductive layer, and the A (h + 1) -th second wiring portion 17b
- the A (h + 3) -th second wiring portion 17b is composed of a second conductive layer.
- the pitch between the adjacent A (h) th second wiring portion 17b and the A (h + 1) th second wiring portion 17b is Pa2.
- the pitch of the second wiring part 17b in the same layer, for example, the A (h) th second wiring part 17b and the A (h + 2) th second wiring part 17b is 2 ⁇ Pa2, and the A (h + 1) th
- the pitch of the second wiring portion 17b and the A (h + 3) th second wiring portion 17b is 2 ⁇ Pa2.
- the outer connection portion 17d is arranged in parallel at a predetermined interval Pao along the one side of the matrix region H at the connection position of the second wiring portion 17b and the outer wiring 17e.
- two types of outer connection portions 17d are arranged. That is, when the wiring materials of the second wiring portion 17b and the outer wiring 17e are different, the outer connection portion 17d functions as a wiring switching portion, and the second wiring portion 17b and the outer wiring 17e are the same wiring material. Becomes a dummy outer connection portion 17dd.
- the dummy outer connecting portion 17dd need not be provided in an extreme case.
- the regular outer connecting portion 17d and the dummy outer connecting portion 17dd are not distinguished from each other. However, based on the configurations of the second wiring portion 17b and the outer wiring 17e, the outer connecting portion at the corresponding location is not distinguished. It goes without saying that it is natural or dummy.
- the outer wiring 17e is drawn from the outer connecting portion 17d in the arrangement direction of the terminals T, in other words, toward the terminal area Ta at a predetermined angle ⁇ a3 with respect to one side of the matrix area H.
- the outer wiring 17e has a structure in which the first conductive layer is repeated at a pitch of Pa3. That is, the A (h) -th, A (h + 1) -th, A (h + 2) -th, and A (h + 3) -th outer wirings 17e are all composed of the first conductive layer.
- the outer wiring 17e is bent in the middle of the route and extended in the direction of the terminal T, and the wiring pitch of the outer connection 17e is changed so that it can be connected to the terminals T arranged at a predetermined pitch Pic. Connected to terminal T. That is, in the first wiring group A, position adjustment for connecting the video signal line 17 to the terminal T is performed by bending the outer wiring 17e.
- the first wiring group A is characterized in that the inner connection portions 17c are arranged in parallel along one side of the matrix region H, and the reason and effect will be described below.
- the inner wiring area Ia when the wiring of the first conductive layer and the wiring of the second conductive layer having different sheet resistances are repeated as one set, the resistance between the two adjacent video signal lines 17 In order to prevent the video signal line 17 from changing significantly, it is necessary to dispose the inner connection portion 17c at a position where the video signal line 17 is equally divided and to switch the wiring material there.
- the first wiring portion 17a and the second wiring portion 17b can be made into a substantially straight line parallel wiring group. That is, since the video signal line 17 in the inner wiring area Ia can be regarded as one wiring, it is possible to easily find a position to divide it into two geometrically. Therefore, the inner side connection part 17c can be arrange
- ⁇ a1 ⁇ a2 with respect to the angle ⁇ a1 that is the extending direction of the first wiring portion 17a and the angle ⁇ a2 that is the extending direction of the second wiring portion 17b.
- the first wiring portion 17a and the second wiring portion 17b can be handled as one substantially non-bent straight line, and the position where the video signal line 17 in the inner wiring region Ia is divided into two equal parts can be easily obtained. You can search.
- the angle ⁇ a1 which is the extending direction of the first wiring portion 17a, is determined by the wiring pitch Pa1 and the drawing pitch Pa.
- the angle ⁇ a2 that is the extending direction of the second wiring portion 17b is determined by the wiring pitch Pa2 and the drawing pitch Pai. Since the cross-sectional structure and the wiring material of the first wiring portion 17a and the second wiring portion 17b can be regarded as the same, the wiring pitch Pa1 of the first wiring portion 17a and the wiring pitch Pa2 of the second wiring portion 17b are the same.
- FIG. 11 is a diagram for explaining video signal lines in the second wiring group shown in FIG. 12A is a cross-sectional view taken along line XIIa-XIIa in FIG. 11,
- FIG. 12B is a cross-sectional view taken along line XIIb-XIIb in FIG. 11, and
- FIG. 12C is a cross-sectional view taken along line XIIc-- in FIG. It is a XIIc line sectional view.
- FIG. 11 for simplification of the drawing, the video signal lines 17 other than the single video signal line 17 of the first wiring group A adjacent to the video signal line 17 of the second wiring group B are shown. The illustration is omitted.
- the video signal lines 17 are wired in the direction from the upper left to the lower right of the drawing.
- the video signal line area Sa is composed of an inner wiring area Ia located near the matrix area H and a outer wiring area Oa located near the terminal area Ta with the seal material S as a boundary.
- a first wiring portion 17a, an inner connection portion 17c, and a second wiring portion 17b are provided in order from the matrix region H side.
- the second wiring portion 17b in the inner wiring region Ia and the outer wiring 17e in the outer wiring region Oa are electrically connected by an outer connection portion 17d.
- each of the video signal lines 17 of the second wiring group B is viewed from the matrix region H side, and the first wiring portion 17a, the inner connection portion 17c, the second wiring portion 17b, the outer connection portion 17d, and the outer side.
- the wiring 17e and the path of the terminal T are provided.
- the first wiring portion 17a is on the inspection and protection circuit 15 side, and is parallel to one side (horizontal direction in the drawing) of the matrix region H so as to go to the terminal region Ta at a predetermined pitch (arrangement interval) Pb. And with respect to one side of the matrix region H at a predetermined angle ⁇ b1.
- the first wiring portion 17a has a structure in which the wiring portion of the second conductive layer and the wiring portion of the first conductive layer are alternately repeated at a pitch of Pb1. That is, the B (i) -th first wiring portion 17a and the B (i + 2) -th first wiring portion 17a are configured by the second conductive layer, and the B (i + 1) -th first wiring portion 17a
- the B (i + 3) th first wiring portion 17a is composed of a first conductive layer.
- the pitch between the adjacent B (i) th first wiring portion 17a and the B (i + 1) th first wiring portion 17a is Pb1.
- the pitch of the first wiring part 17a formed in the same layer, for example, the B (i) th first wiring part 17a and the B (i + 2) th first wiring part 17a is 2 ⁇ Pb1, and B
- the pitch between the (i + 1) th first wiring portion 17a and the B (i + 3) th first wiring portion 17a is 2 ⁇ Pb1.
- the inner connection portion 17c is a connection position of the first wiring portion 17a and the second wiring portion 17b and is disposed so as to gradually approach one side of the matrix region H.
- the arrangement pitch along one side of the matrix region H of the inner connection portion 17c is Pbi.
- an inner connection portion 17c is arranged at a position that divides the wiring length into two equal parts. That is, the wiring length of the first wiring portion 17a and the wiring length of the second wiring portion 17b are the same.
- the second wiring portion 17b is drawn from the inner connection portion 17c toward the terminal region Ta, and is drawn at a predetermined angle ⁇ b2 with respect to one side of the matrix region H. As shown in FIG. 12B, the second wiring portion 17b has a structure in which the wiring portion of the second conductive layer and the wiring portion of the first conductive layer are alternately repeated at a pitch of Pb2. The first wiring portion 17a and the second wiring portion 17b on the same video signal line 17 have different wiring materials.
- the B (i) -th second wiring portion 17b and the B (i + 2) -th second wiring portion 17b are formed of the first conductive layer, and the B (i + 1) -th second wiring portion 17b
- the B (i + 3) -th second wiring portion 17b is composed of a second conductive layer.
- the pitch between the adjacent B (i) th second wiring portion 17b and the B (i + 1) th second wiring portion 17b is Pb2.
- the pitch of the second wiring part 17b in the same layer, for example, the B (i) th second wiring part 17b and the B (i + 2) th second wiring part 17b is 2 ⁇ Pb2, and the B (i + 1) th
- the pitch between the second wiring portion 17b and the B (i + 3) th second wiring portion 17b is 2 ⁇ Pb2.
- the outer connection portion 17d is arranged at a predetermined interval Pbo in parallel along the one side of the matrix region H at the connection position of the second wiring portion 17b and the outer wiring 17e.
- two types of outer connection portions 17d are arranged. That is, when the wiring materials of the second wiring portion 17b and the outer wiring 17e are different, the outer connection portion 17d functions as a wiring switching portion, and the second wiring portion 17b and the outer wiring 17e are the same wiring material. Becomes a dummy outer connection portion 17dd.
- the dummy outer connecting portion 17dd need not be provided in an extreme case.
- the regular outer connecting portion 17d and the dummy outer connecting portion 17dd are not distinguished from each other. However, based on the configurations of the second wiring portion 17b and the outer wiring 17e, the outer connecting portion at the corresponding location is not distinguished. It goes without saying that it is natural or dummy.
- the outer wiring 17e extends from the outer connection portion 17d in the arrangement direction of the terminals T, in other words, an angle perpendicular to one side of the matrix region H (angle ⁇ b3, not shown), that is, toward the terminal region Ta without bending. Has been drawn to.
- the outer wiring 17e has a structure in which the first conductive layer is repeated at a pitch of Pb3. That is, the B (i) th, B (i + 1) th, B (i + 2) th, and B (i + 3) th outer wirings 17e are all formed of the first conductive layer.
- the second wiring group B is characterized in that the inner connection portions 17c are arranged so as to gradually approach one side of the matrix region H, and the reason and effect thereof will be described below.
- the inner wiring area Ia when the wiring of the first conductive layer and the wiring of the second conductive layer having different sheet resistances are repeated as one set, the resistance between the two adjacent video signal lines 17 In order to prevent the video signal line 17 from changing significantly, it is necessary to dispose the inner connection portion 17c at a position where the video signal line 17 is equally divided and to switch the wiring material there.
- the position adjustment of the video signal line 17 and the terminal T is performed by the bent second wiring portion 17b, and the wiring distance of the inner wiring region Ia is gradually shortened. Therefore, it is necessary to devise the arrangement position of the inner connecting portion 17c. In other words, the arrangement of the inner connection portion 17c is not suitable for a monotonous configuration and needs to be positively adjusted.
- the arrangement pitch Pbi along one side of the matrix region H of the inner connection portion 17c is set to Pbi ⁇ with respect to the pitch Pb of one end of the video signal line 17 in the inner wiring region Ia. It was set to be Pb.
- the inner connecting portions 17c are arranged on a diagonal line in the upper right direction of the paper so as to gradually approach one side of the matrix region H by ⁇ b per pitch. In this way, the inner connection portion 17c can be arranged in the vicinity of a position that bisects the wiring length of the inner wiring region Ia, and the first wiring portion 17a and the second wiring portion 17a can be arranged when the conditions are suitably adjusted.
- the wiring part 17b can be made equal length.
- the angle ⁇ b1 that is the extending direction of the first wiring portion 17a is determined by the wiring pitch Pb1 and the lead-out pitch Pb.
- the angle ⁇ b2 that is the extending direction of the second wiring portion 17b is determined by the wiring pitch Pb2 and the lead-out pitches Pbi and ⁇ b. Since the cross-sectional structure and the wiring material of the first wiring portion 17a and the second wiring portion 17b can be regarded as the same, the wiring pitch Pb1 of the first wiring portion 17a and the wiring pitch Pb2 of the second wiring portion 17b are the same.
- FIG. 13 is a diagram for explaining video signal lines in the third wiring group shown in FIG. 14A is a cross-sectional view taken along line XIVa-XIVa of FIG. 13,
- FIG. 14B is a cross-sectional view taken along line XIVb-XIVb of FIG. 13
- FIG. 14C is a cross-sectional view taken along line XIVc-- of FIG. It is a XIVc line sectional view.
- FIG. 13 for simplification of the drawing, the video signal lines 17 other than one video signal line 17 in the second wiring group B adjacent to the video signal line 17 in the third wiring group C are shown. The illustration is omitted.
- the video signal lines 17 are wired in the direction from the upper left to the lower right of the drawing.
- the video signal line area Sa is composed of an inner wiring area Ia located near the matrix area H and a outer wiring area Oa located near the terminal area Ta with the seal material S as a boundary.
- a first wiring portion 17a, an inner connection portion 17c, and a second wiring portion 17b are provided in order from the matrix region H side.
- the second wiring portion 17b in the inner wiring region Ia and the outer wiring 17e in the outer wiring region Oa are electrically connected by an outer connection portion 17d.
- each of the video signal lines 17 of the third wiring group C is viewed from the matrix region H side, and the first wiring portion 17a, the inner connection portion 17c, the second wiring portion 17b, the outer connection portion 17d, and the outer side.
- the wiring 17e and the path of the terminal T are provided.
- the first wiring portion 17a is on the inspection and protection circuit 15 side, and extends toward the terminal region Ta at a predetermined pitch (arrangement interval) Pc in parallel along one side of the matrix region H (horizontal direction in the drawing). And with respect to one side of the matrix region H at a predetermined angle ⁇ c1. Further, after being drawn out, the first wiring portion 17a is bent before being connected to the second wiring portion 17b, and is extended toward the terminal region Ta while changing the extending direction. That is, in the third wiring group C, the position adjustment for connecting the video signal line 17 to the terminal T is performed by bending the first wiring portion 17a, not the outer wiring 17e or the second wiring portion 17b. Is responsible for.
- the first wiring portion 17a has a structure in which the wiring portion of the second conductive layer and the wiring portion of the first conductive layer are alternately repeated at a pitch of Pc1. That is, the C (j) -th first wiring portion 17a and the C (j + 2) -th first wiring portion 17a are formed of the second conductive layer, and the C (j + 1) -th first wiring portion 17a The C (j + 3) -th first wiring portion 17a is composed of a first conductive layer.
- the pitch between the adjacent C (j) th first wiring part 17a and the C (j + 1) th first wiring part 17a is Pc1. Further, the pitch of the first wiring portion 17a formed in the same layer, for example, the C (j) th first wiring portion 17a and the C (j + 2) th first wiring portion 17a is 2 ⁇ Pc1, and C The pitch between the (j + 1) th first wiring portion 17a and the C (j + 3) th first wiring portion 17a is 2 ⁇ Pc1.
- the inner connection portion 17c is a connection position of the first wiring portion 17a and the second wiring portion 17b, and is arranged so as to be gradually separated from one side of the matrix region H.
- the arrangement pitch along one side of the matrix region H of the inner connection portion 17c is Pci.
- an inner connection portion 17c is arranged at a position that divides the wiring length into two equal parts. That is, the wiring length of the first wiring portion 17a and the wiring length of the second wiring portion 17b are the same.
- the second wiring portion 17b is pulled out from the inner connection portion 17c toward the terminal region Ta, and is pulled out at a predetermined angle ⁇ c2 with respect to one side of the matrix region H.
- the first wiring portion 17a is bent in front of the inner connection portion 17c and extends to the terminal region Ta in a direction of 90 ° with respect to one side of the matrix region H.
- the angle ⁇ c2 that is the extending direction of the second wiring portion 17b drawn from the inner connection portion 17c is perpendicular to one side of the matrix region H, that is, an angle of 90 °.
- the second wiring portion 17b has a structure in which the wiring portion of the second conductive layer and the wiring portion of the first conductive layer are alternately repeated at a pitch of Pc2.
- the first wiring portion 17a and the second wiring portion 17b on the same video signal line 17 have different wiring materials. That is, the C (j) -th second wiring portion 17b and the C (j + 2) -th second wiring portion 17b are formed of the first conductive layer, and the C (j + 1) -th second wiring portion 17b
- the C (j + 3) -th second wiring portion 17b is composed of a second conductive layer.
- the pitch between the adjacent C (j) th second wiring part 17b and the C (j + 1) th second wiring part 17b is Pc2.
- the pitch of the second wiring portion 17b in the same layer, for example, the C (j) th second wiring portion 17b and the C (j + 2) th second wiring portion 17b is 2 ⁇ Pc2, and the C (j + 1) th
- the pitch between the second wiring portion 17b and the C (j + 3) th second wiring portion 17b is 2 ⁇ Pc2.
- the outer connecting portion 17d is arranged at a predetermined interval Pco in parallel along the one side of the matrix region H at the connection position of the second wiring portion 17b and the outer wiring 17e.
- two types of outer connection portions 17d are arranged. That is, when the wiring materials of the second wiring portion 17b and the outer wiring 17e are different, the outer connection portion 17d functions as a wiring switching portion, and the second wiring portion 17b and the outer wiring 17e are the same wiring material. Becomes a dummy outer connection portion 17dd.
- the dummy outer connecting portion 17dd need not be provided in an extreme case.
- the regular outer connecting portion 17d and the dummy outer connecting portion 17dd are not distinguished from each other. However, based on the configurations of the second wiring portion 17b and the outer wiring 17e, the outer connecting portion at the corresponding location is not distinguished. It goes without saying that it is natural or dummy.
- the outer wiring 17e extends from the outer connection portion 17d in the arrangement direction of the terminals T, in other words, an angle perpendicular to one side of the matrix region H (angle ⁇ c3, not shown), that is, toward the terminal region Ta without bending.
- the outer wiring 17e has a structure in which the first conductive layer is repeated at a pitch of Pc3. That is, the C (j) th, C (j + 1) th, C (j + 2) th, and C (j + 3) th outer wirings 17e are all formed of the first conductive layer.
- the third wiring group C is characterized in that the inner connection portions 17c are arranged so as to be gradually separated from one side of the matrix region H, and the reason and effect will be described below.
- the inner wiring area Ia when the wiring of the first conductive layer and the wiring of the second conductive layer having different sheet resistances are repeated as one set, the resistance between the two adjacent video signal lines 17 In order to prevent the video signal line 17 from changing significantly, it is necessary to dispose the inner connection portion 17c at a position where the video signal line 17 is equally divided and to switch the wiring material there.
- the position adjustment of the video signal line 17 and the terminal T is performed by the bent first wiring portion 17a, and the matrix occupies the wiring distance of the inner wiring region Ia. Since the proportion of the wiring at an angle of 90 ° with respect to one side of the region H increases, it is necessary to devise the arrangement position of the inner connection portion 17c. In other words, the arrangement of the inner connection portion 17c is not appropriate for a monotonous configuration and needs to be positively adjusted.
- the arrangement pitch Pci along one side of the matrix region H of the inner connection portion 17c is set to Pci ⁇ with respect to the pitch Pc of one end of the video signal line 17 in the inner wiring region Ia.
- the inner connecting portions 17c are arranged on a diagonal line in the lower right direction on the paper surface so as to be gradually separated from one side of the matrix region H by ⁇ c per pitch. In this way, the inner connection portion 17c can be arranged in the vicinity of a position that bisects the wiring length of the inner wiring region Ia, and the first wiring portion 17a and the second wiring portion 17a can be arranged when the conditions are suitably adjusted.
- the wiring part 17b can be made equal length.
- the relationship between the angle ⁇ c1 that is the extending direction of the first wiring portion 17a and the angle ⁇ b1 that is the extending direction of the first wiring portion 17a of the second wiring group B is ⁇ b1.
- ⁇ c1 is preferable.
- the extension direction of the video signal line 17 of the third wiring group C does not interfere with the video signal line 17 of the second wiring group B adjacent thereto.
- Video signal line 17 of the fourth wiring group D Next, the video signal line 17 of the fourth wiring group D will be specifically described with reference to FIGS.
- FIG. 15 is a diagram for explaining video signal lines in the fourth wiring group shown in FIG. 16A is a cross-sectional view taken along the line XVIa-XVIa of FIG. 15,
- FIG. 16B is a cross-sectional view taken along the line XVIb-XVIb of FIG. 15, and
- FIG. It is a XVIc line sectional view.
- FIG. 15 for simplification of the drawing, video signal lines 17 other than one video signal line 17 of the third wiring group C adjacent to the video signal line 17 of the fourth wiring group D are shown. The illustration is omitted.
- the video signal lines 17 are wired from the upper right to the lower left of the page.
- the video signal line area Sa is composed of an inner wiring area Ia located near the matrix area H and a outer wiring area Oa located near the terminal area Ta with the seal material S as a boundary.
- a first wiring portion 17a, an inner connection portion 17c, and a second wiring portion 17b are provided in order from the matrix region H side.
- the second wiring portion 17b in the inner wiring region Ia and the outer wiring 17e in the outer wiring region Oa are electrically connected by an outer connection portion 17d.
- each of the video signal lines 17 of the fourth wiring group D is viewed from the matrix region H side, and the first wiring portion 17a, the inner connection portion 17c, the second wiring portion 17b, the outer connection portion 17d, and the outer side.
- the wiring 17e and the path of the terminal T are provided.
- the first wiring portion 17a is on the inspection and protection circuit 15 side, and is parallel to one side (horizontal direction in the drawing) of the matrix region H so as to be directed to the terminal region Ta at a predetermined pitch (arrangement interval) Pd. And with respect to one side of the matrix region H at a predetermined angle ⁇ d1. Further, after being drawn out, the first wiring portion 17a is bent before being connected to the second wiring portion 17b, and is extended toward the terminal region Ta while changing the extending direction. That is, in the fourth wiring group D, the position adjustment for connecting the video signal line 17 to the terminal T is performed by bending the first wiring part 17a, not the outer wiring 17e or the second wiring part 17b. Is responsible for.
- the first wiring portion 17a has a structure in which the wiring portion of the second conductive layer and the wiring portion of the first conductive layer are alternately repeated at a pitch of Pd1. That is, the D (k) -th first wiring portion 17a and the D (k + 2) -th first wiring portion 17a are configured by the second conductive layer, and the D (k + 1) -th first wiring portion 17a The D (k + 3) -th first wiring portion 17a is composed of a first conductive layer.
- the pitch between the adjacent D (k) th first wiring portion 17a and the D (k + 1) th first wiring portion 17a is Pd1.
- the pitch of the first wiring part 17a formed in the same layer, for example, the D (k) th first wiring part 17a and the D (k + 2) th first wiring part 17a is 2 ⁇ Pd1, and D
- the pitch between the (k + 1) th first wiring portion 17a and the D (k + 3) th first wiring portion 17a is 2 ⁇ Pd1.
- the inner connection portion 17c is a connection position of the first wiring portion 17a and the second wiring portion 17b and is disposed so as to gradually approach one side of the matrix region H.
- the arrangement pitch along one side of the matrix region H of the inner connection portion 17c is Pdi.
- an inner connection portion 17c is arranged at a position that divides the wiring length into two equal parts. That is, the wiring length of the first wiring portion 17a and the wiring length of the second wiring portion 17b are the same.
- the second wiring portion 17b is drawn from the inner connection portion 17c toward the terminal region Ta, and is drawn at a predetermined angle ⁇ d2 (not shown) with respect to one side of the matrix region H.
- the first wiring portion 17a is bent in front of the inner connection portion 17c and extends to the terminal region Ta in a direction of 90 ° with respect to one side of the matrix region H. Therefore, the angle ⁇ d2 that is the extending direction of the second wiring portion 17b drawn from the inner connection portion 17c is perpendicular to one side of the matrix region H, that is, an angle of 90 °.
- the second wiring portion 17b has a structure in which the wiring portion of the second conductive layer and the wiring portion of the first conductive layer are alternately repeated at a pitch of Pd2.
- the first wiring portion 17a and the second wiring portion 17b on the same video signal line 17 have different wiring materials. That is, the D (k) -th second wiring portion 17b and the D (k + 2) -th second wiring portion 17b are formed of the first conductive layer, and the D (k + 1) -th second wiring portion 17b
- the D (k + 3) -th second wiring portion 17b is composed of a second conductive layer.
- the pitch between the adjacent D (k) -th second wiring part 17b and D (k + 1) -th second wiring part 17b is Pd2.
- the pitch of the second wiring portion 17b in the same layer, for example, the D (k) th second wiring portion 17b and the D (k + 2) th second wiring portion 17b is 2 ⁇ Pd2, and the D (k + 1) th
- the pitch between the second wiring portion 17b and the D (k + 3) th second wiring portion 17b is 2 ⁇ Pd2.
- the outer connecting portion 17d is arranged at a predetermined interval Pdo in parallel along the one side of the matrix region H at the connection position of the second wiring portion 17b and the outer wiring 17e.
- two types of outer connection portions 17d are arranged. That is, when the wiring materials of the second wiring portion 17b and the outer wiring 17e are different, the outer connection portion 17d functions as a wiring switching portion, and the second wiring portion 17b and the outer wiring 17e are the same wiring material. Becomes a dummy outer connection portion 17dd.
- the dummy outer connecting portion 17dd need not be provided in an extreme case.
- the regular outer connecting portion 17d and the dummy outer connecting portion 17dd are not distinguished from each other. However, based on the configurations of the second wiring portion 17b and the outer wiring 17e, the outer connecting portion at the corresponding location is not distinguished. It goes without saying that it is natural or dummy.
- the outer wiring 17e is directed from the outer connection portion 17d toward the terminal region Ta without bending at an angle (angle ⁇ d3, not shown) perpendicular to one side of the matrix region H in the arrangement direction of the terminals T. Has been pulled out.
- the outer wiring 17e has a structure in which the first conductive layer is repeated at a pitch of Pd3. That is, the D (k) -th, D (k + 1) -th, D (k + 2) -th, and D (k + 3) -th outer wirings 17e are all composed of the first conductive layer.
- the fourth wiring group D is characterized in that the inner connection portions 17c are arranged so as to gradually approach one side of the matrix region H, and the reason and effect will be described below.
- the inner wiring area Ia when the wiring of the first conductive layer and the wiring of the second conductive layer having different sheet resistances are repeated as one set, the resistance between the two adjacent video signal lines 17 In order to prevent the video signal line 17 from changing significantly, it is necessary to dispose the inner connection portion 17c at a position where the video signal line 17 is equally divided and to switch the wiring material there.
- the position adjustment of the video signal line 17 and the terminal T is performed by the bent first wiring part 17a, and the matrix occupies the wiring distance of the inner wiring region Ia. Since the proportion of the wiring at an angle of 90 ° with respect to one side of the region H is reduced, it is necessary to devise the arrangement position of the inner connecting portion 17c. In other words, the arrangement of the inner connection portion 17c is not appropriate for a monotonous configuration and needs to be positively adjusted.
- the arrangement pitch Pdi along one side of the matrix region H of the inner connection portion 17c is set to Pdi ⁇ with respect to the pitch Pd at one end of the video signal line 17 in the inner wiring region Ia.
- the inner connecting portions 17c are arranged on an oblique line in the upper right direction of the paper so as to gradually approach one side of the matrix region H by ⁇ d per pitch. In this way, the inner connection portion 17c can be arranged in the vicinity of a position that bisects the wiring length of the inner wiring region Ia, and the first wiring portion 17a and the second wiring portion 17a can be arranged when the conditions are suitably adjusted.
- the wiring part 17b can be made equal length.
- FIG. 17 is a diagram for explaining video signal lines in the fifth wiring group shown in FIG. 18A is a cross-sectional view taken along line XVIIIa-XVIIIa in FIG. 17,
- FIG. 18B is a cross-sectional view taken along line XVIIIb-XVIIIb in FIG. 17, and
- FIG. 18C is a cross-sectional view taken along line XVIIIc- It is a XVIIIc line sectional view.
- FIG. 17 for simplification of the drawing, video signal lines 17 other than one video signal line 17 of the fourth wiring group D adjacent to the video signal line 17 of the fifth wiring group E are shown. The illustration is omitted.
- the video signal line 17 is wired from the upper right to the lower left of the page.
- the video signal line area Sa is composed of an inner wiring area Ia located near the matrix area H and a outer wiring area Oa located near the terminal area Ta with the seal material S as a boundary.
- a first wiring portion 17a, an inner connection portion 17c, and a second wiring portion 17b are provided in order from the matrix region H side.
- the second wiring portion 17b in the inner wiring region Ia and the outer wiring 17e in the outer wiring region Oa are electrically connected by an outer connection portion 17d.
- each of the video signal lines 17 of the fifth wiring group E is viewed from the matrix region H side, and the first wiring portion 17a, the inner connection portion 17c, the second wiring portion 17b, the outer connection portion 17d, and the outer side.
- the wiring 17e and the path of the terminal T are provided.
- the first wiring portion 17a is on the inspection and protection circuit 15 side, and is parallel to one side (horizontal direction of the paper surface) of the matrix region H so as to face the terminal region Ta at a predetermined pitch (arrangement interval) Pe. And a predetermined angle ⁇ e1 with respect to one side of the matrix region H.
- the first wiring portion 17a has a structure in which the wiring portion of the second conductive layer and the wiring portion of the first conductive layer are alternately repeated at a pitch of Pe1. That is, the E (p) -th first wiring portion 17a and the E (p + 2) -th first wiring portion 17a are formed of the second conductive layer, and the E (p + 1) -th first wiring portion 17a The E (p + 3) -th first wiring portion 17a is composed of a first conductive layer.
- the pitch between the adjacent E (p) th first wiring part 17a and the E (p + 1) th first wiring part 17a is Pe1. Further, the pitch of the first wiring part 17a formed in the same layer, for example, the E (p) th first wiring part 17a and the E (p + 2) th first wiring part 17a is 2 ⁇ Pe1, and E The pitch between the (p + 1) th first wiring portion 17a and the E (p + 3) th first wiring portion 17a is 2 ⁇ Pe1.
- the inner connection portion 17c is a connection position of the first wiring portion 17a and the second wiring portion 17b, and is arranged so as to be gradually separated from one side of the matrix region H.
- the arrangement pitch along one side of the matrix region H of the inner connection portion 17c is Pei.
- an inner connection portion 17c is arranged at a position that divides the wiring length into two equal parts. That is, the wiring length of the first wiring portion 17a and the wiring length of the second wiring portion 17b are the same.
- the second wiring portion 17b is pulled out from the inner connection portion 17c toward the terminal region Ta, and is pulled out by a predetermined angle ⁇ e2 with respect to one side of the matrix region H.
- the second wiring portion 17b has a structure in which the wiring portion of the second conductive layer and the wiring portion of the first conductive layer are alternately repeated at a pitch of Pe2.
- the first wiring portion 17a and the second wiring portion 17b on the same video signal line 17 have different wiring materials.
- the E (p) -th second wiring portion 17b and the E (p + 2) -th second wiring portion 17b are formed of the first conductive layer, and the E (p + 1) -th second wiring portion 17b
- the E (p + 3) -th second wiring portion 17b is composed of a second conductive layer.
- the pitch between the adjacent E (p) th second wiring portion 17b and the E (p + 1) th second wiring portion 17b is Pe2.
- the pitch of the second wiring portion 17b in the same layer, for example, the E (p) th second wiring portion 17b and the E (p + 2) th second wiring portion 17b is 2 ⁇ Pe2, and the E (p + 1) th
- the pitch between the second wiring portion 17b and the E (p + 3) th second wiring portion 17b is 2 ⁇ Pe2.
- the outer connection portion 17d is arranged at a predetermined interval Peo in parallel along the one side of the matrix region H at the connection position of the second wiring portion 17b and the outer wiring 17e.
- two types of outer connection portions 17d are arranged. That is, when the wiring materials of the second wiring portion 17b and the outer wiring 17e are different, the outer connection portion 17d functions as a wiring switching portion, and the second wiring portion 17b and the outer wiring 17e are the same wiring material. Becomes a dummy outer connection portion 17dd.
- the dummy outer connecting portion 17dd need not be provided in an extreme case.
- the regular outer connecting portion 17d and the dummy outer connecting portion 17dd are not distinguished from each other. However, based on the configurations of the second wiring portion 17b and the outer wiring 17e, the outer connecting portion at the corresponding location is not distinguished. It goes without saying that it is natural or dummy.
- the outer wiring 17e extends from the outer connection portion 17d toward the terminal region Ta without bending at an angle (angle ⁇ e3, not shown) perpendicular to one side of the matrix region H in the arrangement direction of the terminals T. Has been pulled out.
- the outer wiring 17e has a structure in which the first conductive layer is repeated at a pitch of Pe3. That is, the E (p) -th, E (p + 1) -th, E (p + 2) -th, and E (p + 3) -th outer wirings 17e are all composed of the first conductive layer.
- the fifth wiring group E is characterized in that the inner connection portions 17c are arranged so as to be gradually separated from one side of the matrix region H. The reason and effect will be described below.
- the inner wiring area Ia when the wiring of the first conductive layer and the wiring of the second conductive layer having different sheet resistances are repeated as one set, the resistance between the two adjacent video signal lines 17 In order to prevent the video signal line 17 from changing significantly, it is necessary to dispose the inner connection portion 17c at a position where the video signal line 17 is equally divided and to switch the wiring material there.
- the position adjustment of the video signal line 17 and the terminal T is performed by the bent second wiring portion 17b, and the wiring distance of the inner wiring region Ia is gradually increased. Therefore, it is necessary to devise the arrangement position of the inner connecting portion 17c. In other words, the arrangement of the inner connection portion 17c is not appropriate for a monotonous configuration and needs to be positively adjusted.
- the arrangement pitch Pei along one side of the matrix region H of the inner connection portion 17c is set to Pe ⁇ with respect to the pitch Pe of one end of the video signal line 17 in the inner wiring region Ia. It was set to be Pe. Further, the inner connecting portions 17c are arranged on a diagonal line in the lower right direction of the paper so as to be gradually separated from one side of the matrix region H by ⁇ e per pitch. In this way, the inner connection portion 17c can be arranged in the vicinity of a position that bisects the wiring length of the inner wiring region Ia, and the first wiring portion 17a and the second wiring portion 17a can be arranged when the conditions are suitably adjusted.
- the wiring part 17b can be made equal length.
- an angle ⁇ e1 between the angle ⁇ e1 that is the extending direction of the first wiring portion 17a and the angle ⁇ d1 that is the extending direction of the first wiring portion 17a of the fourth wiring group D is ⁇ e1.
- ⁇ d1 is preferable.
- the angle ⁇ e1 that is the extending direction of the first wiring portion 17a is determined by the wiring pitch Pe1 and the lead-out pitch Pe.
- the video signal lines 17 of the first to fifth wiring groups A to E have been described. However, the video signal lines 17 of the first to fifth wiring groups A to E gather to form a fan-shaped video signal. Since it forms half of the line 17, it needs to be optimized based on the fact that it becomes an aggregate. Optimization is realized by the following items (1), (2), (3), (4), (5) and (6). A suitable example of the outer wiring 17e is realized by item (7).
- the video signal line adjacent to the video signal line 17 having an arbitrary number of the total resistance of the resistance of the first wiring portion 17a and the resistance of the second wiring portion 17b.
- the inner wiring region Ia having a narrow pitch and not having a large difference with the inner wiring region 17, it is necessary to appropriately arrange the inner connecting portion 17c.
- the inner connection portions 17 c are arranged so as to be parallel to one side of the matrix region H.
- the inner connection portions 17c are arranged at a predetermined angle with respect to one side of the matrix region H so as to gradually approach the matrix region H.
- the inner connection portions 17c are arranged at a predetermined angle with respect to one side of the matrix region H so as to be gradually separated from the matrix region H.
- the inner connection portions 17c are arranged at a predetermined angle with respect to one side of the matrix region H so as to gradually approach the matrix region H.
- the inner connection portions 17c are arranged at a predetermined angle with respect to one side of the matrix region H so as to be gradually separated from the matrix region H.
- the inner connection portion 17c is located at a position that divides the wiring length of the inner wiring region Ia into two equal parts. Can be arranged.
- the video signal line 17 in the inner wiring area Ia includes a first wiring portion 17a, an inner connection portion, and a second wiring portion 17b. Therefore, in order to obtain the shortest and efficient wiring, first, in any video signal line 17 in the first to third wiring groups A to C, the extending direction of the first wiring portion 17a and the second wiring.
- the extending direction of the portion 17b is the same in the vicinity of the inner connecting portion 17c, and the extending direction of the first wiring portion 17a and the second extending direction are the same in the video signal lines 17 of the fourth and fifth wiring groups D and E.
- the extending direction of the wiring portion 17b is preferably the same in the vicinity of the inner connecting portion 17c.
- the arrangement interval of one ends of the video signal lines 17 arranged in parallel to one side of the matrix region H is Pa, and the inner side arranged in parallel to one side of the matrix region H.
- the arrangement interval of one ends of the video signal lines 17 arranged in parallel with one side of the matrix region H is Pb, and the inner side arranged in parallel with one side of the matrix region H.
- the arrangement interval of the connecting portions 17c is Pbi, Pb> Pbi.
- the arrangement interval of one ends of the video signal lines 17 arranged in parallel to one side of the matrix region H is Pc, and the inner side arranged in parallel to one side of the matrix region H.
- Pc> Pci Pic when the arrangement interval of the connecting portions 17c is Pci and the arrangement interval of the terminals T arranged in parallel to one side of the matrix region H in the terminal region Ta is Pic.
- the arrangement interval of one ends of the video signal lines 17 arranged in parallel to one side of the matrix region H is Pd, and the inner side arranged in parallel to one side of the matrix region H.
- Pd> Pdi Pic when the arrangement interval of the connecting portions 17c is Pdi and the arrangement interval of the terminals T arranged in parallel to one side of the matrix region H in the terminal region Ta is Pic.
- the arrangement interval of one ends of the video signal lines 17 arranged in parallel to one side of the matrix region H is Pe, and the inner side of the fifth wiring group E is arranged in parallel to one side of the matrix region H.
- the arrangement interval of the connecting portions 17c is Pei, Pe> Pei.
- any of the video signal lines 17 of the first to third wiring groups A to C is led out in parallel in the same direction from the inspection and protection circuit 15, and the fourth and fifth wiring groups D are drawn.
- the video signal lines 17 are preferably drawn in parallel in the same direction from the inspection and protection circuit 15.
- the first wirings of the first to third wiring groups A to C are further provided. More preferably, the extending directions of the portions 17a are aligned, and the extending directions of the first wiring portions 17a of the fourth and fifth wiring groups D and E are aligned.
- an angle in the extending direction of the first wiring portion 17a of the video signal line 17 with respect to one side of the matrix region H is ⁇ a1
- the video signal line 17 with respect to one side of the matrix region H is The angle which is the extending direction of the second wiring portion 17b is defined as ⁇ a2.
- an angle in the extending direction of the first wiring portion 17a of the video signal line 17 with respect to one side of the matrix region H is ⁇ b1
- the video signal line 17 with respect to one side of the matrix region H is The angle which is the extending direction of the second wiring portion 17b is defined as ⁇ b2.
- the angle ⁇ c1 that is the extending direction of the first wiring portion 17a of the video signal line 17 with respect to one side of the matrix region H is set, and the second of the video signal line 17 with respect to one side of the matrix region H is set.
- the angle that is the extending direction of the wiring portion 17b is ⁇ c2
- the following equations (5) and (6) may be satisfied.
- ⁇ c2 90 ° ⁇ (6)
- the video signal lines 17 in the inner wiring area Ia of the first to third wiring groups A to C can be extended in parallel to each other, so that the layout efficiency can be easily improved.
- the angle that is the extending direction of the first wiring portion 17a of the video signal line 17 with respect to one side of the matrix region H is ⁇ d1
- the video signal line 17 with respect to one side of the matrix region H is The angle which is the extending direction of the second wiring portion 17b is defined as ⁇ d2.
- an angle in the extending direction of the first wiring portion 17a of the video signal line 17 with respect to one side of the matrix region H is ⁇ e1
- the video signal line 17 with respect to one side of the matrix region H is
- the following equations (d) and (e) may be satisfied.
- ⁇ d2 90 ° ⁇ (E)
- the video signal lines 17 in the inner wiring area Ia of the fourth and fifth wiring groups D and E can be extended in parallel to each other, so that the layout efficiency can be easily improved.
- the arrangement interval of one end of the video signal lines 17 arranged in parallel to one side of the matrix region H at the boundary between the first wiring group A and the second wiring group B is Pab.
- Pabi of an independent dimension is intentionally provided as a relationship of Pai ⁇ Pabi ⁇ Pbi.
- Pai> Pabi> Pbi By doing so, there is an effect that a degree of freedom in routing can be secured.
- Pbi> Pbci> Pci Pci.
- Pdei having an independent dimension is intentionally provided as a relationship of Pdi ⁇ Pdei ⁇ Pei.
- Pdi ⁇ Pdei ⁇ Pei Pdi ⁇ Pei.
- one video signal line 17 having an inner wiring portion having first and second wiring portions 17a and 17b and an outer wiring portion having an outer wiring 17e and one video signal line
- the outer connecting portion 17d is parallel to one side of the active matrix substrate 2 on which the terminal T is formed in any of the first to third wiring groups A to C. It is good to arrange like this. By doing so, the sealing material S formed on the upper portion of the outer connecting portion 17d can be a simple straight line, and therefore the sealing material S can be easily formed.
- one video signal line The other video signal line 17 that extends adjacent to 17 and includes an inner connecting portion having first and second wiring portions 17a and 17b, an outer connecting portion 17d, and an outer wiring portion having an outer wiring 17e.
- the outer connection portion 17d is parallel to one side of the active matrix substrate 2 on which the terminal T is formed in any of the fourth and fifth wiring groups D and E. It is good to arrange like this. By doing so, the sealing material S formed on the upper portion of the outer connecting portion 17d can be a simple straight line, and therefore the sealing material S can be easily formed.
- the outer connection portions 17d related to the first to fifth wiring groups A to E are arranged so as to be parallel to one side of the active matrix substrate 2 on which the terminals T are formed. good.
- the sealing material S formed on the upper portion of the outer connecting portion 17d can be a simple straight line over almost one side of the liquid crystal display device 1, and therefore the sealing material S can be formed most easily.
- FIG. 19 is a plan view for explaining the arrangement and wiring structure of video signal lines on the active matrix substrate.
- a second wiring group B and a ninth wiring group By, a third wiring group C and an eighth wiring group Cy, a fourth wiring group D and a seventh wiring group Dy, and a fifth wiring group E; The same applies to all of the sixth wiring groups Ey.
- these first to tenth wiring groups A to Ay are viewed from the left side of the page, the first wiring group A, the second wiring group B, the third wiring group C, the fourth wiring group D, The fifth wiring group E, the sixth wiring group Ey, the seventh wiring group Dy, the eighth wiring group Cy, the ninth wiring group By, and the tenth wiring group Ay are arranged in this order.
- the wiring material of the first wiring part 17a and the second wiring part 17b in the inner wiring region Ia is formed of a predetermined conductive layer (metal film).
- the second conductive layer (upper metal film) is abstracted with the symbol “U”
- the first conductive layer (lower metal film) is abstracted with the symbol “L”.
- the first wiring portion 17a is formed of the second conductive layer as viewed from the matrix region H (inspection and protection circuit 15) side
- the second wiring portion Reference numeral 17b indicates that the first conductive layer is formed.
- the first wiring portion 17a is formed of the first conductive layer as viewed from the matrix region H (inspection and protection circuit 15) side
- the second wiring portion indicates that the second conductive layer is formed.
- the mth video signal line 17 and the (m + 1) th video signal line 17 are both “LU” in structure. That is, both the first wiring portions 17a are first conductive layers, and the second wiring portions 17b are both second conductive layers.
- the reason why the same wiring section may be the same material even in the inner wiring area Ia is that the m-th video signal line 17 and the (m + 1) -th video signal line 17 are not parallel and are not extended. This is because the distance between the wirings is large, and there is not always a concern about short-circuiting between the wirings due to foreign matters.
- a plurality of video signal lines (signal lines) 17 are directed from the matrix region H to the terminal region Ta between the matrix region H and the terminal region Ta. Are wired in the inner wiring area (wiring area) Ia set so as to reduce the wiring pitch.
- the plurality of video signal lines 17 include first and second wiring portions 17a and 17b and first and second wiring portions 17a and 17b provided on the matrix region H side and the terminal region Ta side, respectively. It has the inner connection part (connection part) 17c to connect.
- the first and second wiring portions 17a and 17b of the two adjacent ones of the video signal lines 17 are respectively constituted by different first and second conductive layers, and The first and second wiring portions 17a and 17b of the other video signal line 17 are constituted by the second and first conductive layers, respectively.
- the position of the inner connection portion 17 c of the video signal line 17 is determined according to the wiring position in the wiring area of the video signal line 17.
- the frame of the active matrix substrate 2 can be reduced, and for example, an active matrix substrate that can be cut out from the mother substrate.
- the manufacturing cost of the active matrix substrate 2 and thus the liquid crystal display device 1 can be reduced.
- a display device or an electronic device using such a liquid crystal display device 1 can be reduced in size or weight.
- the active matrix substrate 2 of the present embodiment it is possible to form a tighter fan-shaped lead with respect to the frame of the same size, so that, for example, a small driver IC is applied to the inspection and protection circuit 15. Can do. Therefore, a cheaper driver IC can be used. As a result, the costs of the active matrix substrate 2 and the liquid crystal display device 1 can be reduced.
- the present embodiment even when two first and second conductive layers having different sheet resistances are used in the plurality of video signal lines 17 wired so as to reduce the wiring pitch, two adjacent two signal layers are used. Since the active matrix substrate 2 having a small resistance change in the video signal line 17 is used, a compact liquid crystal display device (display device) 1 having excellent display quality can be easily configured.
- FIG. 20 is a plan view for explaining a variation 1 of the arrangement of the video signal lines and the wiring structure on the active matrix substrate.
- the main difference between the first modification and the first embodiment is that the first to fifth wiring groups symmetric with respect to the Y axis are the first and second wiring groups.
- the conductive layers constituting the second wiring portion are different from each other.
- symbol is attached
- the first wiring group A, the second wiring group B, the third wiring group C, and the fourth wiring group D are viewed from the left side of the drawing.
- the wiring has a symmetrical positional relationship with respect to the Y axis O. 2nd wiring group B and 9th wiring group B'y, 3rd wiring group C and 8th wiring group C'y, 4th wiring group D and 7th wiring group D'y, and The same applies to the fifth wiring group E and the sixth wiring group E′y.
- the first wiring portion 17a of the inner wiring region Ia is formed of the second conductive layer and the second wiring portion 17b is formed of the first conductive layer
- Y In the tenth wiring group A′y that is symmetrical with respect to the axis O, the first wiring portion 17a of the inner wiring region Ia is formed of the first conductive layer, and the second wiring portion 17b is the second wiring portion 17b. It is formed of a conductive layer.
- the wiring structure of the m-th video signal line 17 and the (m + 1) -th video signal line 17 extends in parallel with the same material in the inner wiring region Ia. Not. Therefore, even if the fifth wiring group E and the sixth wiring group E′y are close to each other, a short circuit between the wirings due to the foreign matter can be suppressed.
- the first modification can achieve the same operations and effects as those of the first embodiment.
- FIG. 21 is a plan view for explaining a variation 2 of the arrangement of the video signal lines and the wiring structure on the active matrix substrate.
- the main difference between the second modification and the first embodiment is that the installation of the fourth and fifth wiring groups is omitted, and a pair of first to third symmetrical with respect to the Y axis is provided.
- the wiring group is provided.
- symbol is attached
- the first wiring group A, the second wiring group B, the third wiring group C, and the eighth wiring group C are viewed from the left side of the drawing.
- 'y, ninth wiring group B'y, and tenth wiring group A'y are arranged in this order.
- the wiring has a symmetrical positional relationship with respect to the Y axis O.
- the first wiring portion 17a of the inner wiring region Ia is formed of the second conductive layer and the second wiring portion 17b is formed of the first conductive layer
- Y In the tenth wiring group A′y that is symmetrical with respect to the axis O, the first wiring portion 17a of the inner wiring region Ia is formed of the first conductive layer, and the second wiring portion 17b is the second wiring portion 17b. It is formed of a conductive layer.
- the second modification can exhibit the same operations and effects as those of the first embodiment.
- FIG. 22 is a plan view for explaining a variation 3 of the arrangement of the video signal lines and the wiring structure on the active matrix substrate.
- the main difference between the third modification and the first embodiment is that two data drivers are used.
- symbol is attached
- the wiring group of the video signal lines 17 has two fan-shaped routings as shown in FIG.
- the first wiring group A, the second wiring group B, the third wiring group C, and the eighth wiring group C are viewed from the left side of the drawing.
- 'y, ninth wiring group B'y, and tenth wiring group A'y are arranged between the inspection and protection circuit 15 and the left driver IC 100 in this order.
- the first wiring group A ′, the second wiring group B ′, the third wiring group C ′, the eighth wiring group Cy, the ninth wiring group By, and the tenth wiring group Ay in this order.
- the first wiring portion 17a of the inner wiring region Ia is formed of the second conductive layer and the second wiring portion 17b is formed of the first conductive layer
- Y In the tenth wiring group A′y that is symmetrical with respect to the axis O1
- the first wiring portion 17a of the inner wiring region Ia is formed of the first conductive layer
- the second wiring portion 17b is the second wiring portion 17b. It is formed of a conductive layer.
- the third modification can achieve the same operations and effects as the first embodiment.
- FIG. 23 is a plan view for explaining a variation 4 of the arrangement of the video signal lines and the wiring structure on the active matrix substrate.
- the main difference between the fourth modification and the first embodiment is that the data driver is biased with respect to the inspection and protection circuit.
- symbol is attached
- the position of the driver IC 100 is largely biased to the right side of the drawing with respect to the inspection and protection circuit 15. Further, as shown in FIG. 23, in the active matrix substrate 2 of the fourth modification, the first wiring group A, the second wiring group B, and the third wiring group C are viewed in this order as viewed from the left side of the drawing. Has been placed.
- the position of the driver IC 100 with respect to the inspection and protection circuit 15 is a design matter of those skilled in the art. However, in the configuration in which a plurality of video signal lines 17 are routed in a fan shape, as shown in FIG. Three types of groups A to C are required.
- the video signal line 17 described in this specification is not limited by the position of the driver IC 100 with respect to the inspection and protection circuit 15. Therefore, in this specification, the plurality of video signal lines 17 have at least the first to third wiring groups A to A in which the wiring length in the inner wiring area Ia becomes shorter in the inner wiring area Ia as the wiring area. Wiring is performed so as to belong to one of the three types of wiring group C.
- the video signal line is composed of only two types of wiring groups, the second wiring group B and the third wiring group C. That is, in FIG. 23, there is no first wiring group A.
- the inner connection part 17c that connects the first wiring part 17a and the second wiring part 17b is not uniformly arranged, but the second wiring group B and the third wiring part 17c are not arranged uniformly.
- the arrangement appropriately according to each of the wiring groups C is the same as that of the embodiment described so far. That is, when the wiring group is viewed in plan from the long wiring side, in the second wiring part B, the inner connection parts 17 c are arranged so as to gradually approach the matrix region H. Further, in the third wiring part C, the inner connection part 17 c is arranged so as to be gradually separated from the matrix region H.
- the second wiring group has a configuration in which the bending point of the wiring of the second wiring group B is away from the driver IC 100.
- An empty area is generated between B and the driver IC 100.
- This vacant area can be used as an area for other purposes such as arrangement of marks and other electrodes. If the object of those skilled in the art can be satisfied, the wiring of the present invention can be applied not to directly reduce the frame of the terminal side, but to create an empty area. Focusing on the fact that a new area for arranging marks or the like is not required, this configuration also has an effect of preventing an increase in the frame size of the terminal side, and indirectly reduces the frame size of the terminal side. Contribute.
- the entire wiring group is reconfigured.
- the first wiring group A, the second wiring group B, and the third wiring group C have three types, that is, the configuration shown in FIG.
- the fourth modification can exhibit the same operations and effects as those of the first embodiment.
- the active matrix substrate of the present invention is not limited to this, and a display region having a plurality of pixels
- the active matrix substrate of the present invention can be applied to any display device having a wiring for transmitting a signal for driving a pixel.
- the present invention can be applied to an EL display, a plasma display, electronic ink paper, a microcapsule-type electrophoresis display device, and other display devices.
- a microcapsule-type electrophoretic display device can be configured to display an image by applying a voltage to each microcapsule layer formed in a display region for each pixel, for example.
- the display device can include, for example, a substrate including a display region wiring connected to a pixel electrode provided for each pixel via a switching element and a lead line connected to the display region wiring.
- this substrate can be configured like the active matrix substrate in the above embodiment.
- the active matrix substrate of the present invention can be applied to various sensor substrates such as a sensor substrate for an X-ray detection device.
- each of the plurality of video signal lines (signal lines) is connected to the second wiring portion via the first and second wiring portions and the inner wiring portion having the inner connection portion and the outer connection portion.
- the structure provided with the outer wiring part which has the outer wiring connected to a terminal while being connected was demonstrated.
- the present invention is not limited to this, and each of the plurality of signal lines has a wiring pitch between the matrix region and the terminal region so that the wiring pitch decreases in the direction from the matrix region to the terminal region.
- Wiring is performed to a set wiring area (that is, a wiring area drawn so as to be narrowed down in a fan shape), and the first and second wiring sections are connected to the first and second wiring sections.
- a set wiring area that is, a wiring area drawn so as to be narrowed down in a fan shape
- the present invention is not limited to this, and it is only necessary that the position of the connection portion of the signal line is determined in accordance with the wiring position in the wiring area of the signal line. That is, even when two conductive layers having different sheet resistances are used in a plurality of signal lines wired so as to reduce the wiring pitch, if the resistance change between two adjacent signal lines is small Well, preferably, when the active matrix substrate of the present invention is applied to, for example, a display device, the resistance change between two adjacent signal lines is small so that display unevenness is not visually recognized. That's fine.
- the plurality of signal lines Is preferable in that the resistances of two adjacent signal lines can be made the same.
- the present invention is not limited to this and is connected to the gate lines (scanning lines). May be a signal line.
- the video signal line as in the above-described embodiment, it is easier to reduce the size of the data driver connected to the video signal line and to reduce the power consumption of the display device using the active matrix substrate. It is preferable in that it can be achieved.
- driver IC driver chip
- a data driver and a gate driver may be used, or each of the data driver and the gate driver may be configured by different driver ICs.
- the first wiring portion is configured by the same conductive layer as one of the data wiring and the scanning wiring
- the second wiring portion is configured by the same conductive layer as the other of the data wiring and the scanning wiring.
- the present invention is not limited to this, and each of the first and second wiring portions may be formed of a conductive layer different from the data wiring or the scanning wiring.
- the first wiring portion is configured by the same conductive layer as one of the data wiring and the scanning wiring
- the second wiring portion is the same conductive as the other of the data wiring and the scanning wiring.
- the case of being composed of layers is preferable in that an increase in the number of manufacturing steps of the active matrix substrate can be prevented.
- the present invention provides an active matrix substrate in which a resistance change between two adjacent signal lines is small even when two conductive layers having different sheet resistances are used in a plurality of signal lines wired so as to reduce the wiring pitch. And a display device using the same.
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Abstract
Description
前記複数のデータ配線または前記複数の走査配線に対し、外部からの信号を入力する複数の端子と、
前記複数のデータ配線及び前記複数の走査配線のマトリクス状に配列されたマトリクス領域と前記複数の端子が設置された端子領域との間で、前記マトリクス領域から前記端子領域に向かう方向で配線ピッチが小さくなるように設定された配線領域に配線された複数の信号線を備え、
前記複数の各信号線では、一方の端部側が前記データ配線または前記走査配線を駆動するように接続されるとともに、他方の端部側が前記端子に接続され、
前記複数の各信号線は、前記マトリクス領域側及び前記端子領域側にそれぞれ設けられた第1及び第2の配線部と、前記第1及び第2の配線部を接続する接続部を有し、
前記複数の信号線では、隣接する2本の一方の信号線の前記第1及び第2の配線部が互いに異なる第1及び第2の導電層によりそれぞれ構成され、かつ、他方の信号線の前記第1及び第2の配線部が前記第2及び第1の導電層により構成され、
前記複数の各信号線では、その信号線の前記配線領域での配線位置に応じて、当該信号線の前記接続部の位置が定められていることを特徴とするものである。
前記第1の配線群では、複数の前記接続部が前記マトリクス領域の一辺と平行となるように配置され、
前記第2の配線群では、複数の前記接続部が前記マトリクス領域に徐々に近づくように当該マトリクス領域の一辺に対して所定の角度で配置され、
前記第3の配線群では、複数の前記接続部が前記マトリクス領域に徐々に離れるように当該マトリクス領域の一辺に対して所定の角度で配置されてもよい。
前記第2の配線群において、前記マトリクス領域側の端部での配置間隔をPbとし、前記接続部の配置間隔をPbiとし、かつ、
前記第3の配線群において、前記マトリクス領域側の端部での配置間隔をPcとし、前記接続部の配置間隔をPciとした場合に、下記(1)式~(4)式
Pa = Pai ―――(1)
Pb > Pbi ―――(2)
Pc > Pci ―――(3)
Pa = Pb = Pc ―――(4)
を満足していることが好ましい。
前記第2の配線群において、前記マトリクス領域の一辺に対する前記第1の配線部の角度をθb1とし、前記マトリクス領域の一辺に対する前記第2の配線部の角度をθb2とし、かつ、
前記第3の配線群において、前記マトリクス領域の一辺に対する前記第1の配線部の角度をθc1とし、前記マトリクス領域の一辺に対する前記第2の配線部の角度をθc2とした場合に、下記(5)式及び(6)式
θa1 = θb1 = θc1 =θa2 =θb2―――(5)
θc2 = 90° ―――(6)
を満足していることが好ましい。
前記第2の配線群と前記第3の配線群との境界において、前記マトリクス領域側の端部での配置間隔をPbcとした場合に、下記(7)式
Pa = Pab = Pb = Pbc = Pc―――(7)
を満足していることが好ましい。
Pai ≠ Pabi ≠ Pbi ―――(8)
を満足していることが好ましい。
Pbi ≠ Pbci ≠ Pci ―――(9)
を満足していることが好ましい。
前記第2の配線部が前記第1及び第2の導電層の他方の導電層により構成されている場合には、当該第2の配線部と前記外側配線とは外側接続部を介して接続され、
複数の前記外側接続部は、前記マトリクス領域の一辺と平行になるように配置されてもよい。
Pci = Pic ―――(10)
を満足していることが好ましい。
前記第2の配線部が、前記データ配線及び前記走査配線の他方と同じ導電層により構成されていることが好ましい。
(液晶表示装置の構成例)
図1は、本発明の第1の実施形態にかかるアクティブマトリクス基板を用いた液晶表示装置を示す斜視図である。図において、本実施形態の液晶表示装置1は、本発明のアクティブマトリクス基板(TFT基板)2と、後述のシール材を介してアクティブマトリクス基板2に向かい合うように貼り合わされた対向基板(カラーフィルタ基板)3とを備えている。また、液晶表示装置1では、上記シール材が枠状に設けられており、このシール材の内側に液晶材が保持されて液晶層18(後掲の図7または図8参照)が構成されている。
次に、図4を参照して、本実施形態のアクティブマトリクス基板2の要部構成に具体的に説明する。
次に、図5を参照して、ビデオ信号線17の基本構成について具体的に説明する。
次に、図6も参照して、ビデオ信号線17の詳細な構成について具体的に説明する。尚、以下の説明では、第1~第5の配線群A~Eに属するビデオ信号線17について主に説明する。
次に、図7を参照して、g番目のビデオ信号線17の断面構成について具体的に説明する。
次に、図8を参照して、(g+1)番目のビデオ信号線17の断面構成について具体的に説明する。
上記に説明したように、g番目のビデオ信号線17と(g+1)番目のビデオ信号線17とは隣接していることから検査及び保護回路15から端子Tに至るまでの配線長は、実質的に同一の配線長とみなすことができる。
上記の説明では、隣接する2本のビデオ信号線17に着目して説明したが、扇状に絞りこまれて多数本が引き回されるビデオ信号線17、つまりマトリクス領域Hと端子領域Taとの間で、マトリクス領域Hから端子領域Taに向かう方向で配線ピッチが小さくなるように設定された配線領域(内側配線領域Ia)に配線された複数のビデオ信号線17に対して適用するためには更なる工夫が必要である。
次に、図9~図10を参照して、第1の配線群Aのビデオ信号線17について具体的に説明する。
次に、図11~図12を参照して、第2の配線群Bのビデオ信号線17について具体的に説明する。
次に、図13~図14を参照して、第3の配線群Cのビデオ信号線17について具体的に説明する。
次に、図15~図16を参照して、第4の配線群Dのビデオ信号線17について具体的に説明する。
次に、図17~図18を参照して、第5の配線群Eのビデオ信号線17について具体的に説明する。
上記のとおり、第1~第5の各配線群A~Eのビデオ信号線17を説明したが、第1~第5の配線群A~Eのビデオ信号線17が集合して扇状のビデオ信号線17の半分をなすので、集合体となることを踏まえた最適化が必要である。最適化は以下の事項(1)、(2)、(3)、(4)、(5)及び(6)により実現される。また外側配線17eの好適例は事項(7)で実現される。
第1の配線部17aと第2の配線部17bに関して、第1の配線部17aの抵抗と第2の配線部17bの抵抗の合計抵抗が任意の番号のビデオ信号線17と隣接するビデオ信号線17とで大きく変わらず、また狭ピッチの内側配線領域Iaを構成するためには、内側接続部17cを適切に配置する必要がある。
内側配線領域Iaのビデオ信号線17は、第1の配線部17aと内側接続部と第2の配線部17bからなる。したがって、最短で効率のよい配線とするためには、まず第1~第3の配線群A~Cのいずれのビデオ信号線17においても、第1の配線部17aの延伸方向と第2の配線部17bの延伸方向が内側接続部17c近傍で同一であり、また第4及び第5の配線群D及びEのいずれのビデオ信号線17においても、第1の配線部17aの延伸方向と第2の配線部17bの延伸方向が内側接続部17c近傍で同一であることが良い。
Pa = Pai ―――(1)
Pb > Pbi ―――(2)
Pc > Pci ―――(3)
Pa = Pb = Pc ―――(4)
Pci = Pic ―――(10)
Pd>Pdi=Pic ―――(イ)
Pe>Pei ―――(ロ)
Pd=Pe ―――(ハ)
内側接続部17Cの近傍にて第1の配線部17aと第2の配線部17bの延伸方向を揃えることができた場合は、さらに第1~第3の配線群A~Cの第1の配線部17aの各延伸方向が各々揃い、第4及び第5の配線群D及びEの第1の配線部17aの各延伸方向が各々揃うとより好ましい。
θa1 = θb1 = θc1 =θa2 =θb2―――(5)
θc2 = 90° ―――(6)
θd1=θe1=θe2 ―――(ニ)
θd2 = 90° ―――(ホ)
上記により、内側配線領域Iaのビデオ信号線17が互いに平行に延伸できることから、第1~第3の配線群A~Cの各間の領域を大きく確保する必要はない。
Pa = Pab = Pb = Pbc = Pc―――(7)
Pd=Pde=Pe ―――(ヘ)
第1の配線群Aと第2の配線群Bの境界において、マトリクス領域Hの一辺に平行に配列している内側接続部17cの配置間隔をPabiとした場合に以下の(8)式を満足すればよい。
Pai≠Pabi≠Pbi ―――(8)
第2の配線群Bと第3の配線群Cの境界において、マトリクス領域Hの一辺に対する内側接続部17cの配置間隔をPbciとした場合に以下の(9)式を満足すればよい。
Pbi≠Pbci≠Pci ―――(9)
Pdi≠Pdei≠Pei ―――(ト)
ビデオ信号線領域Saにおいては、第1及び第2の配線部17a及び17bを有する内側配線部と外側配線17eを有する外側配線部とを備えた一方のビデオ信号線17と、一方のビデオ信号線17に隣接して延伸しており、第1及び第2の配線部17a及び17bを有する内側接続部と外側接続部17dと外側配線17eを有する外側配線部とを備えた他方のビデオ信号線17とが交互に繰り返されており、さらには当該外側接続部17dが第1~第3の配線群A~Cのいずれにおいても、端子Tが形成されているアクティブマトリクス基板2の一辺に平行になるように配列していると良い。こうすることによって外側接続部17dの上部に形成されるシール材Sを単純な直線とすることができ、したがってシール材Sの形成が容易となる。
次に、図19も参照して、第6~第10の配線群Ey~Ayについても具体的に説明する。
図20は、上記アクティブマトリクス基板でのビデオ信号線の並びと配線構造の変形例1を説明するための平面図である。
図21は、上記アクティブマトリクス基板でのビデオ信号線の並びと配線構造の変形例2を説明するための平面図である。
図22は、上記アクティブマトリクス基板でのビデオ信号線の並びと配線構造の変形例3を説明するための平面図である。
図23は、上記アクティブマトリクス基板でのビデオ信号線の並びと配線構造の変形例4を説明するための平面図である。
2 アクティブマトリクス基板
7 薄膜トランジスタ
8 画素電極
17 ビデオ信号線(信号線)
17a 第1の配線部
17b 第2の配線部
17c 内側接続部(接続部)
17d 外側接続部
17dd (ダミーの)外側接続部
17e 外側配線
A、Ay、A’y 第1の配線群
B、By、B’y 第2の配線群
C、Cy、C’y 第3の配線群
D、D1~DM データ配線(ソース配線)
G、G1~GN ゲート配線(走査配線)
P 画素
H マトリクス領域(有効表示領域)
T 端子
Ta 端子領域
Claims (13)
- マトリクス状に配列された複数のデータ配線及び複数の走査配線と、前記複数のデータ配線と前記複数の走査配線との各交差部に対応して設けられたスイッチング素子及び前記スイッチング素子に接続された画素電極を有する画素を備えたアクティブマトリクス基板であって、
前記複数のデータ配線または前記複数の走査配線に対し、外部からの信号を入力する複数の端子と、
前記複数のデータ配線及び前記複数の走査配線のマトリクス状に配列されたマトリクス領域と前記複数の端子が設置された端子領域との間で、前記マトリクス領域から前記端子領域に向かう方向で配線ピッチが小さくなるように設定された配線領域に配線された複数の信号線を備え、
前記複数の各信号線では、一方の端部側が前記データ配線または前記走査配線を駆動するように接続されるとともに、他方の端部側が前記端子に接続され、
前記複数の各信号線は、前記マトリクス領域側及び前記端子領域側にそれぞれ設けられた第1及び第2の配線部と、前記第1及び第2の配線部を接続する接続部を有し、
前記複数の信号線では、隣接する2本の一方の信号線の前記第1及び第2の配線部が互いに異なる第1及び第2の導電層によりそれぞれ構成され、かつ、他方の信号線の前記第1及び第2の配線部が前記第2及び第1の導電層により構成され、
前記複数の各信号線では、その信号線の前記配線領域での配線位置に応じて、当該信号線の前記接続部の位置が定められている、
ことを特徴とするアクティブマトリクス基板。 - 前記複数の各信号線では、前記第1及び第2の配線部の長さが互いに等しくなるように、前記接続部の位置が定められている請求項1に記載のアクティブマトリクス基板。
- 前記複数の信号線は、前記配線領域において、当該配線領域での配線長が順次短くなる第1、第2、及び第3の配線群のいずれかの配線群に属するように配線され、
前記第1の配線群では、複数の前記接続部が前記マトリクス領域の一辺と平行となるように配置され、
前記第2の配線群では、複数の前記接続部が前記マトリクス領域に徐々に近づくように当該マトリクス領域の一辺に対して所定の角度で配置され、
前記第3の配線群では、複数の前記接続部が前記マトリクス領域に徐々に離れるように当該マトリクス領域の一辺に対して所定の角度で配置されている請求項1または2に記載のアクティブマトリクス基板。 - 前記第1の配線群において、前記マトリクス領域側の端部での配置間隔をPaとし、前記接続部の配置間隔をPaiとし、
前記第2の配線群において、前記マトリクス領域側の端部での配置間隔をPbとし、前記接続部の配置間隔をPbiとし、かつ、
前記第3の配線群において、前記マトリクス領域側の端部での配置間隔をPcとし、前記接続部の配置間隔をPciとした場合に、下記(1)式~(4)式
Pa = Pai ―――(1)
Pb > Pbi ―――(2)
Pc > Pci ―――(3)
Pa = Pb = Pc ―――(4)
を満足している請求項3に記載のアクティブマトリクス基板。 - 前記第1の配線群において、前記マトリクス領域の一辺に対する前記第1の配線部の角度をθa1とし、前記マトリクス領域の一辺に対する前記第2の配線部の角度をθa2とし、
前記第2の配線群において、前記マトリクス領域の一辺に対する前記第1の配線部の角度をθb1とし、前記マトリクス領域の一辺に対する前記第2の配線部の角度をθb2とし、かつ、
前記第3の配線群において、前記マトリクス領域の一辺に対する前記第1の配線部の角度をθc1とし、前記マトリクス領域の一辺に対する前記第2の配線部の角度をθc2とした場合に、下記(5)式及び(6)式
θa1 = θb1 = θc1 =θa2 =θb2―――(5)
θc2 = 90° ―――(6)
を満足している請求項4に記載のアクティブマトリクス基板。 - 前記第1の配線群と前記第2の配線群との境界において、前記マトリクス領域側の端部での配置間隔をPabとし、かつ、
前記第2の配線群と前記第3の配線群との境界において、前記マトリクス領域側の端部での配置間隔をPbcとした場合に、下記(7)式
Pa = Pab = Pb = Pbc = Pc―――(7)
を満足している請求項5に記載のアクティブマトリクス基板。 - 前記第1の配線群と前記第2の配線群との境界において、前記接続部の配置間隔をPabiとした場合に、下記(8)式
Pai ≠ Pabi ≠ Pbi ―――(8)
を満足している請求項4~6のいずれか1項に記載のアクティブマトリクス基板。 - 前記第2の配線群と前記第3の配線群との境界において、前記接続部の配置間隔をPbciとした場合に、下記(9)式
Pbi ≠ Pbci ≠ Pci ―――(9)
を満足している請求項4~7のいずれか1項に記載のアクティブマトリクス基板。 - 前記複数の各信号線では、前記第1及び第2の導電層の一方の導電層により構成された外側配線が前記第2の配線部と前記端子との間に設けられるとともに、
前記第2の配線部が前記第1及び第2の導電層の他方の導電層により構成されている場合には、当該第2の配線部と前記外側配線とは外側接続部を介して接続され、
複数の前記外側接続部は、前記マトリクス領域の一辺と平行になるように配置されている請求項1~8のいずれか1項に記載のアクティブマトリクス基板。 - 前記端子の配置間隔をPicとした場合に、下記(10)式
Pci = Pic ―――(10)
を満足している請求項9に記載のアクティブマトリクス基板。 - 前記複数の各信号線は、前記データ配線に接続されるビデオ信号線である請求項1~10のいずれか1項に記載のアクティブマトリクス基板。
- 前記第1の配線部が、前記データ配線及び前記走査配線の一方と同じ導電層により構成され、
前記第2の配線部が、前記データ配線及び前記走査配線の他方と同じ導電層により構成されている請求項1~11のいずれか1項に記載のアクティブマトリクス基板。 - 請求項1~12のいずれか1項に記載のアクティブマトリクス基板を用いたことを特徴とする表示装置。
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Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104810002A (zh) * | 2015-05-19 | 2015-07-29 | 武汉华星光电技术有限公司 | 一种显示装置 |
JP2016200659A (ja) * | 2015-04-08 | 2016-12-01 | 株式会社ジャパンディスプレイ | トランジスタ基板および表示装置 |
JPWO2016080290A1 (ja) * | 2014-11-21 | 2017-08-31 | シャープ株式会社 | 表示装置 |
JP2018112692A (ja) * | 2017-01-13 | 2018-07-19 | 株式会社ジャパンディスプレイ | 表示装置 |
WO2019244603A1 (ja) * | 2018-06-20 | 2019-12-26 | 株式会社ジャパンディスプレイ | 表示装置 |
JP2020003534A (ja) * | 2018-06-25 | 2020-01-09 | 株式会社ジャパンディスプレイ | 表示装置 |
WO2021038664A1 (ja) * | 2019-08-23 | 2021-03-04 | シャープ株式会社 | 表示装置 |
JP2022132364A (ja) * | 2017-04-20 | 2022-09-08 | 株式会社ジャパンディスプレイ | 表示装置 |
Families Citing this family (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR102439308B1 (ko) * | 2015-10-06 | 2022-09-02 | 삼성디스플레이 주식회사 | 표시장치 |
CN109313870B (zh) * | 2016-06-09 | 2021-03-09 | 夏普株式会社 | 有源矩阵基板、显示装置以及附触摸面板的显示装置 |
CN106292111B (zh) * | 2016-10-20 | 2019-08-20 | 深圳市华星光电技术有限公司 | 一种阵列基板及液晶显示面板 |
KR20180051739A (ko) | 2016-11-08 | 2018-05-17 | 삼성디스플레이 주식회사 | 표시 장치 |
KR20180082688A (ko) | 2017-01-10 | 2018-07-19 | 삼성디스플레이 주식회사 | 표시 장치 |
US10847739B2 (en) * | 2017-09-21 | 2020-11-24 | Sharp Kabushiki Kaisha | Display device having larger openings on inner sides of anode electrodes in display region than on inner sides of anode electrodes in peripheral display region |
JP2019152832A (ja) * | 2018-03-06 | 2019-09-12 | シャープ株式会社 | アクティブマトリクス基板及び表示パネル |
TWI674662B (zh) * | 2018-06-19 | 2019-10-11 | 友達光電股份有限公司 | 陣列基板的製造方法 |
KR20200031738A (ko) * | 2018-09-14 | 2020-03-25 | 삼성디스플레이 주식회사 | 표시 장치 |
US11256308B2 (en) * | 2019-03-14 | 2022-02-22 | Sharp Kabushiki Kaisha | Wiring substrate and display panel |
CN111919164B (zh) * | 2019-08-19 | 2024-04-30 | 浙江长兴合利光电科技有限公司 | 具有窄下边框的显示面板及电子设备 |
KR20210027641A (ko) * | 2019-08-30 | 2021-03-11 | 삼성디스플레이 주식회사 | 표시패널 |
CN112433406B (zh) * | 2020-11-27 | 2022-04-19 | 武汉天马微电子有限公司 | 一种显示面板母板、显示面板及显示装置 |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2005091962A (ja) * | 2003-09-19 | 2005-04-07 | Sharp Corp | 電極配線基板および表示装置 |
JP2007086474A (ja) * | 2005-09-22 | 2007-04-05 | Kyocera Corp | 画像表示装置及び配線基板 |
JP2007140378A (ja) * | 2005-11-22 | 2007-06-07 | Toshiba Matsushita Display Technology Co Ltd | 表示装置 |
JP2011002582A (ja) * | 2009-06-17 | 2011-01-06 | Hitachi Displays Ltd | 表示装置 |
WO2011061961A1 (ja) * | 2009-11-18 | 2011-05-26 | シャープ株式会社 | 配線基板及び表示装置 |
Family Cites Families (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3010800B2 (ja) * | 1991-07-16 | 2000-02-21 | 日本電気株式会社 | 液晶表示装置及び液晶表示パネル |
JPH05150263A (ja) * | 1991-11-29 | 1993-06-18 | Toshiba Corp | アクテイブマトリツクス型液晶表示素子 |
JP4907155B2 (ja) * | 2005-11-17 | 2012-03-28 | 株式会社 日立ディスプレイズ | 表示装置の製造方法 |
CN102062975A (zh) * | 2007-03-30 | 2011-05-18 | 夏普株式会社 | 液晶显示装置 |
US8629965B2 (en) * | 2009-06-17 | 2014-01-14 | Hitachi Displays, Ltd. | Display device |
RU2496154C1 (ru) * | 2009-09-02 | 2013-10-20 | Шарп Кабусики Кайся | Подложка устройства |
TWI395007B (zh) * | 2009-09-30 | 2013-05-01 | Au Optronics Corp | 扇出線路以及顯示面板 |
KR20120033622A (ko) * | 2010-09-30 | 2012-04-09 | 삼성전자주식회사 | 표시 패널의 구동 방법 및 이를 수행하기 위한 표시 장치 |
EP2830034A4 (en) * | 2012-03-21 | 2015-03-25 | Sharp Kk | ACTIVE MATRIX SUBSTRATE AND DISPLAY PANEL PROVIDED THEREWITH |
CN104737218B (zh) * | 2012-11-16 | 2017-03-01 | 夏普株式会社 | 驱动模块、显示装置和多显示器装置 |
CN106297623B (zh) * | 2015-06-10 | 2019-11-01 | 群创光电股份有限公司 | 扇出电路及应用其的显示装置 |
US10964284B2 (en) * | 2018-09-05 | 2021-03-30 | Sharp Kabushiki Kaisha | Electronic component board and display panel |
-
2014
- 2014-01-16 CN CN201480004887.XA patent/CN104919514B/zh active Active
- 2014-01-16 JP JP2014557496A patent/JP5952920B2/ja active Active
- 2014-01-16 WO PCT/JP2014/050696 patent/WO2014112560A1/ja active Application Filing
- 2014-01-16 US US14/761,349 patent/US9870744B2/en active Active
-
2017
- 2017-12-06 US US15/832,850 patent/US10083667B2/en active Active
-
2018
- 2018-08-09 US US16/059,080 patent/US10388238B2/en active Active
-
2019
- 2019-06-28 US US16/455,830 patent/US10643560B2/en active Active
-
2020
- 2020-03-27 US US16/831,877 patent/US11049467B2/en active Active
-
2021
- 2021-06-11 US US17/345,020 patent/US11423856B2/en active Active
-
2022
- 2022-07-18 US US17/866,762 patent/US11727893B2/en active Active
-
2023
- 2023-06-22 US US18/212,828 patent/US20230335074A1/en active Pending
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2005091962A (ja) * | 2003-09-19 | 2005-04-07 | Sharp Corp | 電極配線基板および表示装置 |
JP2007086474A (ja) * | 2005-09-22 | 2007-04-05 | Kyocera Corp | 画像表示装置及び配線基板 |
JP2007140378A (ja) * | 2005-11-22 | 2007-06-07 | Toshiba Matsushita Display Technology Co Ltd | 表示装置 |
JP2011002582A (ja) * | 2009-06-17 | 2011-01-06 | Hitachi Displays Ltd | 表示装置 |
WO2011061961A1 (ja) * | 2009-11-18 | 2011-05-26 | シャープ株式会社 | 配線基板及び表示装置 |
Cited By (24)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPWO2016080290A1 (ja) * | 2014-11-21 | 2017-08-31 | シャープ株式会社 | 表示装置 |
US10600822B2 (en) | 2015-04-08 | 2020-03-24 | Japan Display Inc. | Display device |
US10790316B2 (en) | 2015-04-08 | 2020-09-29 | Japan Display Inc. | Display device |
CN110034127B (zh) * | 2015-04-08 | 2022-12-23 | 株式会社日本显示器 | 晶体管基板以及显示装置 |
US10297621B2 (en) | 2015-04-08 | 2019-05-21 | Japan Display Inc. | Transistor substrate and display device |
CN110034127A (zh) * | 2015-04-08 | 2019-07-19 | 株式会社日本显示器 | 晶体管基板以及显示装置 |
US11600641B2 (en) | 2015-04-08 | 2023-03-07 | Japan Display Inc. | Transistor substrate |
JP2016200659A (ja) * | 2015-04-08 | 2016-12-01 | 株式会社ジャパンディスプレイ | トランジスタ基板および表示装置 |
US11205665B2 (en) | 2015-04-08 | 2021-12-21 | Japan Display Inc. | Transistor substrate |
US12074173B2 (en) | 2015-04-08 | 2024-08-27 | Japan Display Inc. | Transistor substrate |
CN104810002A (zh) * | 2015-05-19 | 2015-07-29 | 武汉华星光电技术有限公司 | 一种显示装置 |
US11662637B2 (en) | 2017-01-13 | 2023-05-30 | Japan Display Inc. | Display device |
US10976624B2 (en) | 2017-01-13 | 2021-04-13 | Japan Display Inc. | Display device |
JP2018112692A (ja) * | 2017-01-13 | 2018-07-19 | 株式会社ジャパンディスプレイ | 表示装置 |
JP7267490B2 (ja) | 2017-04-20 | 2023-05-01 | 株式会社ジャパンディスプレイ | 表示装置 |
JP2022132364A (ja) * | 2017-04-20 | 2022-09-08 | 株式会社ジャパンディスプレイ | 表示装置 |
WO2019244603A1 (ja) * | 2018-06-20 | 2019-12-26 | 株式会社ジャパンディスプレイ | 表示装置 |
JP6993507B2 (ja) | 2018-06-20 | 2022-01-13 | 株式会社ジャパンディスプレイ | 表示装置 |
JPWO2019244603A1 (ja) * | 2018-06-20 | 2021-05-13 | 株式会社ジャパンディスプレイ | 表示装置 |
US11640092B2 (en) | 2018-06-20 | 2023-05-02 | Japan Display Inc. | Display device |
US11966136B2 (en) | 2018-06-20 | 2024-04-23 | Japan Display Inc. | Display device |
JP7085915B2 (ja) | 2018-06-25 | 2022-06-17 | 株式会社ジャパンディスプレイ | 表示装置 |
JP2020003534A (ja) * | 2018-06-25 | 2020-01-09 | 株式会社ジャパンディスプレイ | 表示装置 |
WO2021038664A1 (ja) * | 2019-08-23 | 2021-03-04 | シャープ株式会社 | 表示装置 |
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US10083667B2 (en) | 2018-09-25 |
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US11049467B2 (en) | 2021-06-29 |
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US20190318703A1 (en) | 2019-10-17 |
US20150356937A1 (en) | 2015-12-10 |
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US11727893B2 (en) | 2023-08-15 |
US20180350314A1 (en) | 2018-12-06 |
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