WO2014103186A1 - 炭化珪素半導体装置およびその製造方法 - Google Patents
炭化珪素半導体装置およびその製造方法 Download PDFInfo
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- WO2014103186A1 WO2014103186A1 PCT/JP2013/007095 JP2013007095W WO2014103186A1 WO 2014103186 A1 WO2014103186 A1 WO 2014103186A1 JP 2013007095 W JP2013007095 W JP 2013007095W WO 2014103186 A1 WO2014103186 A1 WO 2014103186A1
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Definitions
- the present application relates to a wide band gap semiconductor device using silicon carbide.
- Wide band gap semiconductors are attracting attention as semiconductor materials for power devices and the like because they have a higher withstand voltage than silicon semiconductors and can pass large currents.
- silicon carbide semiconductors using silicon carbide SiC
- MISFET metal-insulator-semiconductor field-effect transistor
- MOSFET Metal-Oxide-Semiconductor Field-Effect Transistor
- SiC-MOSFETs are capable of high-speed operation, and are attracting attention as semiconductor devices that are key to realizing miniaturization and low loss of power units.
- the SiC-MOSFET has a problem that the channel mobility is significantly lower than the theoretical limit.
- the reason why the channel mobility is low in the SiC-MOSFET is considered to be that there are many defects such as interface states at the interface between the silicon carbide semiconductor and the silicon oxide film (SiO 2 film). .
- it is considered to perform nitriding after forming the oxide film by thermal oxidation or chemical vapor deposition (CVD).
- CVD chemical vapor deposition
- doping the high-concentration nitrogen at the interface between the oxide film and the silicon carbide semiconductor can reduce the interface state density and improve the channel mobility.
- heat treatment is performed at 1175 ° C. for 2 hours in a nitrogen atmosphere, and nitrogen having an area concentration of, for example, 2 ⁇ 10 14 cm ⁇ 2 or more is applied to the interface between the silicon oxide film and the silicon carbide semiconductor. It is disclosed to introduce.
- Patent Document 1 discloses that when a negative bias is applied to the gate electrode when the SiC-MOSFET is off, a phenomenon occurs in which the threshold voltage (Vth) fluctuates with time (shifts to the negative side). Yes. Patent Document 1 describes that the above phenomenon can occur when hole traps exist at high density near the interface between a silicon oxide film and a silicon carbide semiconductor, and positive charge holes are gradually trapped. Has been. In order to suppress this variation, it has been proposed to suppress the nitrogen atom concentration at the interface between the silicon carbide semiconductor and the silicon oxide film to be smaller than that of Non-Patent Document 1 (less than 1.6 ⁇ 10 14 cm ⁇ 2 ). ing.
- NBTI Negative Bias Temperature Instability
- the present inventor has found that the threshold voltage may vary even when a positive bias is applied to the gate electrode in the SiC-MOSFET.
- the amount of variation in threshold voltage that occurs when a positive bias is applied may be extremely large (eg, several tens of mV to several V).
- One embodiment of the present invention has been made in view of the above circumstances, and provides a silicon carbide semiconductor device in which threshold fluctuations caused by applying a positive bias to a gate electrode are suppressed.
- a silicon carbide semiconductor device includes a silicon carbide semiconductor layer, a gate insulating layer disposed on the silicon carbide semiconductor layer and including a silicon oxide film, and a gate electrode disposed on the gate insulating layer. And a carbon transition layer located between the silicon carbide semiconductor layer and the silicon oxide film and having a carbon atom concentration of 10% to 90% with respect to the carbon atom concentration in the silicon carbide semiconductor layer, In the transition layer, in the region closer to the silicon oxide film than the position where the nitrogen atom concentration is maximum, the ratio of the integrated value of the nitrogen atom concentration to the integrated value of the carbon atom concentration is 0.11 or more.
- a method for manufacturing a silicon carbide semiconductor device includes a step (a) of preparing a silicon carbide semiconductor layer and a step of forming a gate insulating layer including a silicon oxide film on the surface of the silicon carbide semiconductor layer. And a step of forming a carbon transition layer having a carbon atom concentration of 10% or more and 90% or less with respect to the carbon atom concentration in the silicon carbide semiconductor layer between the silicon carbide semiconductor layer and the silicon oxide film ( b) and a step of introducing nitrogen atoms into at least the carbon transition layer, whereby carbon atoms in a region of the carbon transition layer that is closer to the silicon oxide film than a position where the nitrogen atom peaks. And a step (c) in which the ratio of the integrated value of the nitrogen atom concentration to the integrated value of the concentration is 0.11 or more.
- threshold fluctuation caused by applying a positive bias to the gate electrode can be suppressed.
- (A) is a fragmentary sectional view showing MOS structure of a silicon carbide semiconductor device concerning one embodiment of the present invention, and (b) illustrates a silicon carbide semiconductor device (vertical MOSFET) concerning one embodiment. It is sectional drawing.
- (A) and (b) is a schematic diagram for explaining the carbon transition layer of SiO 2 / SiC interface area. It is a figure which illustrates the measurement result of the profile of the thickness direction of carbon atom concentration and nitrogen atom concentration.
- shaft represents the threshold variation
- the ratio R of the integral value of the nitrogen concentration to carbon atom concentration which is a diagram for explaining the correlation between the threshold variation [Delta] Vth s due to the positive bias of 300 seconds. It is sectional drawing which illustrates the silicon carbide semiconductor device (horizontal MOSFET) which concerns on other embodiment of this invention.
- threshold fluctuation when a positive bias is applied to the gate electrode refers to the threshold value Vth1 before the positive bias is applied to the gate electrode, after the positive bias is applied to the gate electrode. This means that the threshold value Vth2 varies. Further, a difference (Vth2 ⁇ Vth1) between these threshold voltages is defined as a threshold voltage fluctuation amount ⁇ Vth (V).
- a gate oxide film may be formed by thermally oxidizing the surface of the SiC semiconductor layer.
- silicon atoms in the SiC semiconductor layer are combined with oxygen to become SiO 2 (Si + O 2 ⁇ SiO 2 ), and carbon atoms are combined with oxygen to be sublimated to COn (C + nO ⁇ CO n ).
- some of the carbon atoms are not sublimated and remain near the interface between the SiC semiconductor layer and the gate oxide film (SiC / SiO 2 interface).
- the remaining carbon atoms are, for example, 1.0 ⁇ 10 19 cm ⁇ 3 or more over a region having a thickness of several nm including the SiC / SiO 2 interface. It was inferred that the threshold voltage fluctuates greatly due to the presence of defect levels (or traps) in this region due to the residual carbon. Further, it has been found that the threshold fluctuation due to residual carbon mainly occurs during a short period of time (for example, within 300 seconds) immediately after the application of the positive bias to the gate electrode is started. In this specification, the threshold fluctuation that occurs when the cumulative voltage application time to the gate electrode is relatively short is abbreviated as “initial fluctuation”.
- the thickness of the region where residual carbon exists in the vicinity of the SiC / SiO 2 interface, the amount of residual carbon, and the like are not constant and change depending on the oxidation rate in thermal oxidation and the thickness of the thermal oxide film.
- the present inventor has found that the fluctuation of the threshold voltage due to the residual carbon can be reduced by utilizing the effect of substituting or terminating the residual carbon with the nitrogen atom, and has reached the present invention.
- a silicon carbide semiconductor device includes a silicon carbide semiconductor layer, a gate insulating layer that is disposed on the silicon carbide semiconductor layer and includes a silicon oxide film, and a gate electrode that is disposed on the gate insulating layer. And a carbon transition layer located between the silicon carbide semiconductor layer and the silicon oxide film and having a carbon atom concentration of 10% to 90% with respect to the carbon atom concentration in the silicon carbide semiconductor layer, In the transition layer, in the region closer to the silicon oxide film than the position where the nitrogen atom concentration is maximum, the ratio of the integrated value of the nitrogen atom concentration to the integrated value of the carbon atom concentration is 0.11 or more.
- the silicon carbide semiconductor device is provided, for example, on a substrate that supports the silicon carbide semiconductor layer, a drain electrode provided on the opposite side of the substrate from the silicon carbide semiconductor layer, and the silicon carbide semiconductor layer.
- the silicon carbide semiconductor layer is disposed in the body region, the drift region of the first conductivity type, the body region of the second conductivity type disposed adjacent to the drift region, and the source electrode.
- An impurity region of a first conductivity type, and a channel layer provided between the body region and the gate insulating layer so as to connect the drift region and the impurity region, and the source electrode is
- the carbon transition layer may be located between the channel layer and the silicon oxide film and electrically connected to the impurity region.
- the silicon carbide semiconductor device further includes, for example, a substrate that supports the silicon carbide semiconductor layer, and a source electrode and a drain electrode provided on the silicon carbide semiconductor layer, and the silicon carbide semiconductor layer includes: A drift region of one conductivity type, a body region of a second conductivity type disposed adjacent to the drift region, a first impurity region of a first conductivity type disposed at a distance from each other in the body region, and A second impurity region; and a channel layer provided to connect the first impurity region and the second impurity region between the body region and the gate insulating layer;
- the drain region is electrically connected to the first impurity region, the drain electrode is electrically connected to the second impurity region, and the carbon transition layer is formed between the channel layer and the silicon oxide film. It may be located in.
- the profile in the depth direction of the nitrogen atom concentration has, for example, a peak in the carbon transition layer.
- a method for manufacturing a silicon carbide semiconductor device includes a step (a) of preparing a silicon carbide semiconductor layer and a step of forming a gate insulating layer including a silicon oxide film on the surface of the silicon carbide semiconductor layer.
- a carbon transition layer having a carbon atom concentration of 10% to 90% with respect to the carbon atom concentration in the silicon carbide semiconductor layer is formed between the silicon carbide semiconductor layer and the silicon oxide film.
- a step (c) in which the ratio of the integrated value of the nitrogen atom concentration to the integrated value of the atom concentration is 0.11 or more.
- the step (b) may include a step of thermally oxidizing the surface of the silicon carbide semiconductor layer to form the silicon oxide film.
- the step (c) includes, for example, a step of heat-treating the silicon carbide semiconductor layer on which the gate insulating layer is formed at a temperature of 1200 ° C. or higher in an atmosphere containing nitrogen.
- an appropriate amount of nitrogen is introduced into a region where residual carbon exists in the vicinity of the SiC / SiO 2 interface in accordance with the amount of residual carbon.
- “in the vicinity of the SiC / SiO 2 interface” refers to a layer having a predetermined thickness located between the silicon carbide layer and the silicon oxide film.
- the silicon carbide layer, the silicon oxide film, and the carbon transition layer located therebetween are defined by the carbon atom concentration, this corresponds to the carbon transition layer.
- Patent Document 1 and Non-Patent Document 1 disclose that nitriding is performed, but it is not recognized that the cause of threshold fluctuation due to the application of a positive bias to the gate electrode is due to residual carbon. There is no mention of the relationship between the carbon atom concentration and the nitrogen atom concentration in the layer.
- FIG. 1A is a partial cross-sectional view for illustrating the silicon carbide semiconductor device of this embodiment.
- the silicon carbide semiconductor device of the present embodiment includes a silicon carbide semiconductor layer 102, a gate insulating layer 104 disposed on the silicon carbide semiconductor layer 102 and including a silicon oxide film (SiO 2 film) 104 a, and a gate insulating layer 104.
- the gate electrode 105 is disposed.
- a structure including silicon carbide semiconductor layer 102, gate insulating layer 104, and gate electrode 105 is also referred to as a “MOS structure”.
- a layer 110 having a carbon atom concentration of 10% to 90% with respect to the carbon atom concentration in the silicon carbide semiconductor layer 102 is located.
- a layer 110 is referred to as a carbon transition layer.
- the carbon transition layer 110 contains nitrogen atoms.
- the ratio R is 0.11 or more.
- FIG. 2A is a diagram for explaining the carbon transition layer 110 in the present embodiment, and is a graph showing an example of the concentration profile of carbon atoms and nitrogen atoms in the depth direction from the surface of the silicon oxide film 104a. is there.
- the carbon atom concentration decreases from the silicon carbide semiconductor layer 102 toward the silicon oxide film 104a, and the carbon atom concentration in the silicon carbide semiconductor layer 102 is 90% with respect to the carbon atom concentration.
- the region changing from 10% to 10% becomes the carbon transition layer 110.
- the carbon transition layer 110 contains carbon atoms (residual carbon) that remain without being sublimated during thermal oxidation.
- the thickness of the carbon transition layer 110 varies depending on the formation method and conditions of the silicon oxide film 104a, but is 0.5 nm or more and 3 nm or less, for example.
- the carbon transition layer 110 tends to be thicker than when formed by a CVD method or the like, and the thickness is not less than 0.5 nm and not more than 5 nm, for example.
- Nitrogen atoms are introduced into the carbon transition layer 110.
- the nitrogen atom concentration profile has a peak in the carbon transition layer 110. Therefore, the region 104b located on the silicon oxide film 104a side from the depth at which the nitrogen atom concentration profile reaches a peak in the carbon transition layer 110 is an atomic concentration integration region. In this region, the ratio R of the integrated value of the nitrogen atom concentration to the integrated value of the carbon atom concentration may be 0.11 or more.
- the peak of the nitrogen atom concentration profile is located in the carbon transition layer 110, nitrogen atoms are efficiently introduced into the carbon transition layer 110, so that a more remarkable effect can be obtained.
- the peak of the nitrogen atom concentration profile may not be located in the carbon transition layer 110.
- the region 104b located on the silicon oxide film 104a side from the depth at which the nitrogen atom concentration is maximum in the carbon transition layer 110 is the atomic concentration integration region. Therefore, if the peak of the nitrogen atom concentration profile is at a position deeper than the depth of the interface between the silicon oxide film 104a and the carbon transition layer 110 (the depth at which the carbon atom concentration is 10%), the atomic concentration integration region is determined. Can be identified. For example, as shown in FIG. 2B, when the peak of the nitrogen atom concentration profile is located in the silicon carbide semiconductor layer 102, the entire carbon transition layer 110 becomes the atom concentration integration region 104b.
- the nitrogen atom concentration profile does not have a sharp peak and may have a flat region.
- the flat region has the maximum nitrogen atom concentration in the carbon transition layer 110
- the region 104b from the flat region to the silicon oxide film 104a side to the silicon oxide film 104a is the atomic concentration integration region.
- the carbon transition layer 110 which is a region containing residual carbon, contains a nitrogen atom amount of a predetermined ratio or more with respect to the carbon atom amount, and therefore when a positive bias is applied to the gate electrode 105, Threshold variation due to residual carbon can be reduced. The reason will be described later with reference to the experimental results.
- FIG. 1B is a cross-sectional view illustrating a silicon carbide semiconductor device (vertical MOSFET) 100 of this embodiment.
- the vertical MOSFET 100 includes a plurality of unit cells, and FIG. 1B shows one unit cell.
- Each unit cell of silicon carbide semiconductor device 100 includes substrate 101 and silicon carbide semiconductor layer 102, carbon transition layer 110, gate insulating layer 104, and gate electrode 105 arranged in this order on main surface of substrate 101.
- MOS structure, source electrode 106 provided on silicon carbide semiconductor layer 102, and drain electrode 107 provided on the back surface (surface opposite to the main surface) of substrate 101 are provided.
- the MOS structure has a configuration similar to that described above with reference to FIG.
- Substrate 101 is, for example, a low-resistance first conductivity type (here, n + -type) silicon carbide substrate.
- the gate insulating layer 104 is, for example, a silicon oxide film 104a. Note that the gate insulating layer 104 only needs to include the silicon oxide film 104 a, and may include another insulating film between the silicon oxide film 104 a and the gate electrode 105.
- Silicon carbide semiconductor layer 102 has a body region 122 having a second conductivity type (here, p-type) different from the first conductivity type, and a portion of silicon carbide semiconductor layer 102 located in a portion where body region 122 is not disposed.
- a drift region 121 of one conductivity type and a channel layer 125 provided between the body region 122 and the gate insulating layer 104 are provided.
- Drift region 121 is arranged adjacent to body region 122.
- Drift region 121 is, for example, an n ⁇ type silicon carbide semiconductor region containing an n type impurity at a lower concentration than substrate 101.
- an impurity region (source region) 123 containing a high-concentration first-conductivity type impurity (here, n + -type) is disposed inside the body region 122.
- the impurity region 123 is in contact with the source electrode 106.
- a contact region 124 containing a second conductivity type impurity at a higher concentration than the body region 122 (here, p + -type) may be disposed inside the body region 122.
- Contact region 124 is disposed in contact with source electrode 106. Therefore, body region 122 is electrically connected to source electrode 106 through contact region 124.
- the channel layer 125 is disposed on the body region 122 so as to connect the drift region 121 and the impurity region 123.
- Channel layer 125 may be, for example, a first conductivity type (here, n-type) silicon carbide layer.
- the channel layer 125 drifts between these body regions 122 from the body region 122 and the source region 123 inside thereof to the adjacent body region 122 and the source region 123 inside thereof. It is provided so as to straddle the region 121.
- a portion of the channel layer 125 located on the body region 122 functions as a channel through which carriers move.
- Silicon carbide semiconductor layer 102 may include a silicon carbide epitaxial layer (for example, thickness: 10 ⁇ m) formed by epitaxial growth on substrate 101 and a channel layer 125 formed on the silicon carbide epitaxial layer.
- body region 122, drift region 121, and contact region 124 may be formed in the silicon carbide epitaxial layer.
- Channel layer 125 may also be formed on the silicon carbide epitaxial layer by epitaxial growth.
- a current can be passed through channel layer 125 under gate electrode 105 by a voltage applied to gate electrode 105. Therefore, a current (drain current) from the drain electrode 107 flows to the source electrode 106 through the substrate 101, the drift region 121, the channel layer 125, and the source region 123 (on state).
- the substrate 101 in the present embodiment preferably includes, for example, an n-type impurity of 1 ⁇ 10 18 cm ⁇ 3 or more.
- the n-type impurity contained in the substrate 101 is preferably nitrogen, phosphorus, arsenic, or the like.
- the drift region 121 is doped with n-type impurities of about 1 ⁇ 10 14 cm ⁇ 3 to 1 ⁇ 10 16 cm ⁇ 3
- the impurity region 123 is doped with n-type impurities of about 1 ⁇ 10 19 cm ⁇ 3 to 1 ⁇ 10 21 cm ⁇ 3. It may be.
- the n-type impurity may be nitrogen.
- the channel layer 125 may contain a small amount of n-type impurity such as nitrogen, phosphorus, or antimony.
- the body region 122 may contain a p-type impurity of about 1 ⁇ 10 16 cm ⁇ 3 to 2 ⁇ 10 19 cm ⁇ 3
- the contact region 124 may contain a p-type impurity of about 5 ⁇ 10 19 cm ⁇ 3 .
- the p-type impurity concentration in body region 122 is preferably 1 ⁇ 10 17 cm ⁇ 3 or more.
- an interlayer insulating film that covers the gate electrode 105 and the source electrode 106 may be formed as necessary, and a wiring connected to the gate electrode 105, the source electrode 106, and the like may be formed on the interlayer insulating film.
- the source electrode 106 is provided so as to be in contact with both the source region 123 and the contact region 124, but the source electrode 106 may not be in contact with the contact region 124.
- a contact electrode may be formed on the contact region 124, and the source electrode 106 and the contact electrode may be connected by wiring or the like.
- the contact region 124 may be disposed in the body region 122 and may not be in contact with the source region 123.
- carbon transition layer 110 is located between silicon carbide semiconductor layer 102 (here, channel layer 125) and silicon oxide film 104a. Yes.
- the ratio R of the integrated value of the nitrogen atom concentration to the integrated value of the carbon atom concentration is 0. .11 or more.
- the ratio R of the integrated value of the nitrogen atom concentration to the integrated value of the carbon atom concentration can be obtained as follows, for example.
- FIG. 3 is a graph illustrating a concentration profile in the depth direction of carbon atoms and nitrogen atoms obtained by SIMS.
- the horizontal axis of the graph represents the depth from the surface of the silicon oxide film 104a.
- a depth at which the carbon atom concentration is 10% or more and 90% or less of the carbon atom concentration of the silicon carbide semiconductor layer 102 is determined to define the carbon transition layer 110 (see FIGS. 2A and 2B). Further, a depth at which the nitrogen atom concentration in the carbon transition layer 110 is maximized is obtained, and an atomic concentration integration region is defined.
- the obtained integrated value can be evaluated as an area nitrogen atom concentration (atom / cm 2 ) and an area carbon atom concentration (atom / cm 2 ), ignoring the dimension in the depth direction.
- the influence of resolution accuracy in the depth direction can be reduced by integrating the concentration in the depth direction and using the area concentration that can ignore the dimension in the depth direction as an index of concentration.
- an n-type silicon carbide epitaxial layer is formed on the substrate 101 by epitaxial growth.
- the impurity concentration of the silicon carbide epitaxial layer can be controlled by adding an impurity (for example, nitrogen) gas during epitaxial growth.
- a plurality of body regions 122 are formed in the silicon carbide epitaxial layer by implanting p-type impurity ions (here, Al (aluminum) ions) into the silicon carbide epitaxial layer.
- p-type impurity ions here, Al (aluminum) ions
- the region in which the body region 122 is not formed in the silicon carbide epitaxial layer becomes an n-type drift region.
- the source region 123 is formed by implanting n-type impurity ions (N (nitrogen) ions in this case) into the body region 122.
- the contact region 124 is formed by implanting p-type impurity ions (Al ions) into the body region 122.
- annealing for activating impurity ions implanted into the silicon carbide epitaxial layer is performed.
- the activation annealing is performed, for example, in an Ar atmosphere at a temperature of 1700 ° C. for 30 minutes.
- a channel layer 125 is formed by further epitaxially growing silicon carbide on the silicon carbide epitaxial layer. Thereby, silicon carbide semiconductor layer 102 is obtained.
- the channel layer 125 is n-type and has an impurity concentration of 1 ⁇ 10 15 cm ⁇ 3 and a thickness of about 100 nm, for example.
- the impurity concentration of the channel layer 125 can be controlled by adding an impurity (for example, nitrogen) gas during epitaxial growth.
- the thickness of the channel layer 125 is reduced when a gate insulating layer is formed later.
- the nitrogen concentration is, for example, about 2 ⁇ 10 19 cm ⁇ 3 .
- the amount of nitrogen contained in the region where the gate insulating layer is formed by thermal oxidation in a later step is less than the SIMS detection lower limit, and is extremely small compared to the amount of nitrogen doped in this region by the nitriding treatment described later.
- a silicon oxide film 104a is formed as a gate insulating layer 104 on the channel layer 125 by thermally oxidizing the surface portion of the channel layer 125.
- the thermal oxidation can be performed, for example, at a temperature of about 1100 ° C. to 1250 ° C. in a dry oxygen atmosphere.
- the processing time can be appropriately adjusted so as to obtain a thermal oxide film (silicon oxide film 104a) having a desired thickness.
- a diluent gas such as nitrogen gas or argon gas may be added to the oxygen atmosphere.
- a silicon oxide film 104a having a thickness of 70 nm is formed at a temperature of 1200 ° C. in a dry oxygen atmosphere.
- silicon atoms in silicon carbide semiconductor layer 102 (here, channel layer 125) become silicon dioxide, and carbon atoms in silicon carbide semiconductor layer 102 sublimate as COn.
- some carbon atoms are not sublimated and remain between silicon carbide semiconductor layer 102 and silicon oxide film 104a formed by thermal oxidation, and become residual carbon. In this way, the carbon transition layer 110 containing residual carbon is formed.
- the silicon oxide film 104a may be formed by a method other than thermal oxidation, such as pyrogenic oxidation or chemical vapor deposition (CVD). Even when a method other than thermal oxidation is used, the carbon transition layer 110 is formed. However, when thermal oxidation is used, the amount of residual carbon is increased as compared with other methods. Therefore, the present invention can more effectively suppress threshold fluctuation caused by residual carbon.
- thermal oxidation such as pyrogenic oxidation or chemical vapor deposition (CVD).
- nitrogen doping is performed on at least the carbon transition layer 110 from above the silicon oxide film 104a (nitriding treatment).
- Nitrogen doping can be performed, for example, in a nitrogen monoxide (NO) atmosphere at a temperature of 1200 ° C. or higher. The nitriding temperature and time are appropriately adjusted so that a desired amount of nitrogen is introduced into the carbon transition layer 110.
- the treatment atmosphere is not limited to the nitrogen monoxide atmosphere, and various gas atmospheres containing nitrogen may be used. When doping nitrogen, it is preferable to dilute with nitrogen so that carbon monoxide is not excessively decomposed.
- a gate electrode 105 is formed on the gate insulating layer 104.
- the gate electrode 105 may be formed, for example, by depositing a polysilicon film doped with an n-type impurity and patterning it.
- a silicide layer may be provided on the gate electrode 105.
- the source electrode 106 and the drain electrode are formed.
- the source electrode 106 can be formed by forming a Ni film so as to be in contact with the source region 123 and the contact region 124 and performing an alloying reaction between SiC and Ni by heat treatment.
- the source electrode 106 thus obtained contains nickel silicide and forms an ohmic junction with the source region 123 and the contact region 124.
- the drain electrode 107 can also be formed by depositing Ni on the back surface of the substrate 101 and performing an alloying reaction between SiC in the substrate 101 and Ni.
- Example In the following, a plurality of evaluation samples (SiC-MOSFETs) A to F are manufactured under different nitriding conditions, and the amount of variation in the threshold voltage is evaluated. The method and result will be described.
- Samples A to F were manufactured using silicon carbide substrates having a polytype of 4H and an off angle of 4 °.
- a silicon oxide film (thickness: 70 nm) was formed by thermally oxidizing the surface of the silicon carbide semiconductor layer (channel layer). Thermal oxidation was performed at a temperature of 1200 ° C. in a dry oxygen atmosphere.
- the nitriding treatment was performed by introducing nitrogen from above the silicon oxide film in a nitrogen monoxide atmosphere. Specifically, nitric oxide is introduced into the chamber at atmospheric pressure for 1 slm (where slm is L / min at 0 ° C.
- ⁇ Vth the variation amount ( ⁇ Vth) of the threshold voltage Vth of the samples A to F was evaluated.
- ⁇ Vth was defined as a difference between Vth2 after applying a predetermined voltage to the gate electrode and Vth1 in an initial state before applying the voltage (Vth2 ⁇ Vth1).
- the heater temperature was set to 150 ° C.
- the sample (MOSFET) to be evaluated was installed, and the threshold voltage Vth1 in the initial state was measured before applying the voltage to the gate electrode.
- the voltage applied to the gate electrode is gradually increased in a state where the drain-source voltage (Vds) is 10 V, and the gate-source voltage (Vgs) when the drain current (Id) is 1 mA is Vth1. did.
- Vds was set to 0 V without changing the heater temperature, and a voltage (stress voltage) of +20 V was applied to the gate electrode.
- Vth was measured again at 150 ° C. to obtain Vth2 after voltage application.
- the difference between Vth2 after voltage application and Vth1 in the initial state was obtained and set as ⁇ Vth.
- FIG. 4 is a diagram showing the results of evaluating the amount of variation in the threshold voltage of each sample.
- the vertical axis represents the fluctuation amount ⁇ Vth from the threshold value Vth1 in the initial state, and the horizontal axis represents the cumulative voltage application time to the gate electrode.
- the variation amount ⁇ Vth increases as the accumulated voltage application time to the gate electrode increases. Further, the fluctuation amount ⁇ Vth decreases as the nitriding temperature increases, and the fluctuation amount ⁇ Vth decreases as the nitriding time increases at the same temperature. Furthermore, when the area nitrogen atom concentration in the carbon transition layer of each sample was examined, the area nitrogen atom concentration increased in the order of samples A to F. Therefore, it was found that the higher the nitrogen atom concentration, the more the threshold voltage variation ⁇ Vth due to the positive bias application to the gate electrode can be suppressed.
- the present inventor examined the evaluation results shown in FIG. 4 while focusing on the tendency of the change rate of the threshold fluctuation amount of each sample, the change in the fluctuation amount caused by the application of the stress voltage for a relatively long time was examined. It has been found that the ratio (the slope of the graph) and the ratio of the change in the amount of change caused by the application of the stress voltage for a relatively short time have different tendencies. This is because there is a mechanism of threshold fluctuation that occurs after a relatively long time has elapsed since the start of stress voltage application, and a mechanism of threshold fluctuation that occurs within a relatively short period of time after the start of stress voltage application. It is thought to mean different. That is, there are at least two mechanisms that cause threshold variation by applying a positive bias to the gate. Therefore, the present inventor examined two factors that cause threshold fluctuations.
- FIG. 6 is a graph showing a nitrogen atom distribution in the vicinity of the SiO 2 / SiC interface in Sample B as an example of a sample having a large ⁇ Vth and Sample F as an example of a sample having a small ⁇ Vth.
- a high concentration of nitrogen is distributed in the vicinity of the nitrided SiO 2 / SiC interface, and even in these samples, a high concentration of nitrogen atoms is present in the vicinity of the SiO 2 / SiC interface. It was confirmed that was introduced. In these samples, the peak of nitrogen atom concentration was located in the carbon transition layer.
- FIG. 7 shows the result of measuring the energy distribution of the interface state density in the vicinity of the band edge on the conduction band side for the samples B and F described above.
- the horizontal axis represents the difference between the energy (Ec) at the lower end of the conduction band and the energy (Ev) at the upper end of the valence band, and the vertical axis represents the interface state density (Dit). Since the interface state density is difficult to measure with the vertical MOSFET shown in FIG. 1, it was evaluated using a MOS capacitor having an area of 0.1 mm 2 manufactured under the same conditions as those of each sample.
- the voltage applied to the gate electrode is changed from 15 V to -15 V at 0.1 V / s, and 100 kHz high frequency CV measurement and quasi-Static CV measurement are performed simultaneously.
- the interface state density was calculated from the difference (High-Low method).
- the interface state density of sample F is smaller than the interface state density of sample B. Therefore, it was found that the interface state density can be decreased by increasing the nitrogen atom concentration in the vicinity of the SiO 2 / SiC interface. Therefore, it was confirmed that one of the factors causing the threshold fluctuation is an increase in interface state density.
- Nit (t) A ⁇ E m ⁇ exp ( ⁇ / kT) ⁇ t n
- A is a constant
- E is an electric field
- m is an electric field-dependent exponent
- ⁇ is an activation energy
- k is a Boltzmann coefficient
- T is an absolute temperature
- t time
- n is a time-dependent exponent.
- the graph a shown in FIG. 5 is a graph schematically showing the measurement results of the samples A and B, the graph c is the samples C and D, and the graph e is the samples E and F.
- Graphs a (h), c (h), and e (h) provided corresponding to each graph show threshold voltage fluctuations ⁇ Vth (assuming that the threshold voltage increases as the interface state density increases. It is a graph which shows the behavior of h).
- the behavior of ⁇ Vth that occurs after a relatively long time is the behavior of ⁇ Vth (h) (graphs a (h), c (h ) And e (h)). Therefore, the threshold fluctuation that occurs after a long time is caused by an increase in interface state density in the vicinity of the interface between silicon carbide semiconductor layer 102 and silicon oxide film 104a, as described above with reference to FIGS. It is guessed.
- the fluctuation of the threshold voltage that occurs after a short time has elapsed since the start of the application of the stress voltage is considered to be caused by a mechanism that has not been conventionally known.
- the magnitude ⁇ Vth of the threshold fluctuation (initial fluctuation) after a short period of time is further varied in addition to ⁇ Vth (h) of graph a (h). Has occurred. It can be seen that this variation is caused by factors other than the interface state density.
- the magnitude ⁇ Vth of the initial fluctuation is lower than ⁇ Vth (h) in the graph e (h).
- the fluctuation was caused by residual carbon. That is, it is considered that the threshold value fluctuation is caused by the defect level (or trap) caused by the residual carbon existing over the region of several nm at the unstable MOS interface generated in the oxidation process.
- the effect of substituting or terminating residual carbon with nitrogen is increased. As a result, a more stable state for electrons can be created, and it is presumed that the effect of suppressing the initial fluctuation of the threshold voltage has occurred.
- FIG. 8 is a diagram showing the correlation between the ratio R of the nitrogen atom concentration to the carbon atom concentration in the vicinity of the SiO 2 / SiC interface of Samples A to F and the amount of variation ⁇ Vth s of Vth due to a short-time stress voltage application. It is.
- the ratio R of nitrogen atom concentration shown on the horizontal axis is obtained by integrating the carbon atom concentration and the nitrogen atom concentration obtained by SIMS, and the ratio of the nitrogen atom concentration integrated value to the carbon atom concentration integrated value (nitrogen atom concentration integrated value / carbon atom). (Density integrated value) is calculated.
- the integration range of each atom is the atomic concentration integration region (carbon transition layer) in which the carbon atom concentration is 10% to 90% of the silicon carbide semiconductor (on the silicon oxide film side from the maximum value of the nitrogen atom concentration). 2).
- the fluctuation amount ⁇ Vth s on the vertical axis is the fluctuation amount of Vth when a stress voltage of +20 V is applied to the gate electrode for 300 seconds in a high temperature atmosphere of 150 ° C.
- the threshold voltage fluctuation amount ⁇ Vth s can be further reduced as the nitrogen atom concentration ratio R increases. Focusing on the change in the variation ⁇ Vth s of samples C to F having a nitriding temperature of 1200 ° C., as shown by the chain line in the figure, an increase in the ratio R of nitrogen atom concentration (that is, an increase in nitriding time) ) And the variation amount ⁇ Vth s decreases, and when the nitrogen atom concentration ratio R is 0.11 or more, the decrease amount of the variation amount ⁇ Vth s is saturated.
- the threshold voltage fluctuation amount ⁇ Vth s caused by the short-time stress voltage application depends not only on the nitrogen atom concentration but also on the concentration of carbon atoms (residual carbon) in the vicinity of the SiO 2 / SiC interface. .
- the nitrogen atom concentration ratio R increases, the effect of substituting or terminating defect levels (or traps) caused by residual carbon existing in the carbon transition layer with nitrogen increases, and the variation ⁇ Vth s decreases.
- the amount of nitrogen atoms is greater than or equal to a predetermined amount (the ratio R is greater than or equal to 0.11) with respect to the residual carbon amount, the fluctuation amount ⁇ Vth s is saturated and becomes substantially constant.
- the ratio R of the nitrogen atom concentration is 0.11 or more, the fluctuation amount ⁇ Vth s due to the short-time stress voltage application can be reduced, and the fluctuation amount due to the subsequent stress voltage application is also reduced by this reduction amount. The Therefore, it is possible to reduce the fluctuation of the threshold voltage regardless of the stress voltage application time.
- the range of the amount of nitrogen atoms to be introduced in the vicinity of the SiO 2 / SiC interface in order to suppress the fluctuation amount ⁇ Vth s cannot be determined unconditionally for any silicon oxide film formed. Varies depending on the amount of carbon atoms present.
- the entire carbon transition layer Since residual carbon exists over the entire carbon transition layer, it may be possible to set the entire carbon transition layer in the atomic concentration integration region. However, if the entire carbon transition layer is in the range of the atomic concentration integration region, it may be difficult to accurately measure the ratio of the nitrogen atom concentration because the carbon atom concentration is extremely higher than the nitrogen atom concentration. As a result, it becomes difficult to investigate the relationship between the ratio of the nitrogen atom concentration and the threshold fluctuation and suppress the threshold fluctuation. Therefore, a region having a relatively low carbon atom concentration in the carbon transition layer was set as an atomic concentration integration region, and a ratio R of nitrogen atom concentration was obtained. Incidentally, it is considered that the correlation between carbon and nitrogen appears most prominently at the position where the nitrogen atom concentration reaches a peak. This is because the localization of nitrogen atoms means that there are the most defect levels (or traps). Therefore, in the above embodiment, the atomic concentration integration region in the carbon transition layer is set with reference to the peak position of the nitrogen atom concentration.
- the upper limit value of the nitrogen atom concentration ratio R is not particularly limited, but is, for example, 0.18 or less.
- the area nitrogen atom concentration in the carbon transition layer should be suppressed to 1 ⁇ 10 15 cm ⁇ 2 or less. Is preferred.
- the interface state density can be further reduced, so that the threshold voltage variation ⁇ Vth due to the stress voltage application for a long time is reduced. The effect is increased. Therefore, the threshold voltage fluctuation amount ⁇ Vth due to the application of the stress voltage for a short time and for a long time can be more effectively reduced, so that a more remarkable effect can be obtained.
- the area carbon atom concentration in the carbon transition layer is not limited because it can vary depending on the formation method, formation conditions, and materials of the silicon carbide semiconductor layer and the silicon oxide film.
- the area carbon atom concentration in the carbon transition layer is, for example, 6 ⁇ 10 15 cm ⁇ 2 or more and 1 ⁇ 10 16 cm ⁇ 2 or less. It is.
- the half-value width ⁇ M is a width of a region where nitrogen atoms exist at a concentration of 1/2 or more of the peak value Cm of nitrogen atom concentration.
- Sample F will be described as an example.
- a nitrogen atom concentration profile in the depth direction in the vicinity of the interface between the silicon oxide film of the sample F and the silicon carbide semiconductor layer is obtained by SIMS.
- the measurement of the nitrogen atom concentration using SIMS was performed using oxygen ions as primary ions.
- the peak value (peak concentration) Cm and the half value width ⁇ M of the nitrogen atom concentration are obtained.
- the width ⁇ M of the depth between two points at which the concentration (Cm / 2) is 1 ⁇ 2 of the peak value Cm is the half-value width.
- the half-value width ⁇ M increases as the NO treatment time increases.
- the full width at half maximum ⁇ M is, for example, 2.3 nm or more.
- residual carbon exists over a region of several nm at the MOS interface. This region is referred to as “residual carbon region”. In the residual carbon region, the residual carbon exists at a concentration of 1.0 ⁇ 10 19 cm ⁇ 3 or more, for example.
- the half-value width ⁇ M of the nitrogen atom concentration profile is small, a region in which the nitrogen atoms are insufficient may occur in the residual carbon region. For this reason, threshold fluctuations may occur due to defect levels resulting from residual carbon that has not been substituted or terminated by nitrogen atoms.
- the half-value width ⁇ M is increased (for example, 2.3 nm or more)
- the residual carbon can be more reliably replaced or terminated with nitrogen over the residual carbon region, so that the threshold fluctuation due to the defect level caused by the residual carbon. Can be suppressed more effectively.
- the silicon carbide semiconductor device of this embodiment is not limited to the vertical MOSFET shown in FIG.
- the MOSFET of this embodiment may not have a channel layer.
- a gate insulating layer silicon oxide film
- the present embodiment can be applied to various semiconductor devices having a structure (MOS structure) in which an electrode is disposed on a silicon carbide semiconductor layer via an insulating film.
- MOS structure a structure in which an electrode is disposed on a silicon carbide semiconductor layer via an insulating film.
- a lateral MOSFET may be used.
- FIG. 9 is a cross-sectional view illustrating a lateral MOSFET.
- source electrode 106 and drain electrode 107 are provided on silicon carbide semiconductor layer 102.
- a contact electrode 108 may be further provided on the silicon carbide semiconductor layer 102.
- Silicon carbide semiconductor layer 102 includes a first conductivity type (here, n ⁇ -type) drift region 121, a second conductivity type (here, p-type) body region 122 disposed adjacent to drift region 121, and A channel layer 125 is provided between the body region 122 and the silicon oxide film 104a.
- the carbon transition layer 110 is located between the channel layer 125 and the silicon oxide film 104a.
- the body region 122 (here, n + -type) a first conductivity type (also referred to as a source region) first impurity region 123, a second impurity region (drain region of the first conductivity type (here n + -type) 126) are also spaced apart from each other.
- the source region 123 and the drain region 126 are arranged on both sides with the gate electrode 105 interposed therebetween.
- the channel layer 125 is disposed so as to connect the first impurity region 123 and the second impurity region 126.
- the source electrode 106 is electrically connected to the first impurity region 123
- the drain electrode 107 is electrically connected to the second impurity region 126.
- the source electrode 106, the drain electrode 107, and the contact electrode 108 are independently arranged. However, as in the structure shown in FIG. 108 may be integrally formed.
- the first conductivity type is n-type and the second conductivity type is p-type.
- the n-type region and the p-type region can be interchanged.
- MOSFET which has a gate trench.
- the present invention can also be applied to silicon carbide semiconductor devices other than MOSFETs.
- the MOSFET is manufactured using the substrate 101 having the same conductivity type as that of the drift region 121.
- an insulated gate bipolar transistor Insulated Gate Bipolar Transistor: IGBT
- IGBT Insulated Gate Bipolar Transistor
- the channel mobility can be improved and the threshold value fluctuation when a positive bias is applied to the gate electrode can be suppressed, so that the reliability can be greatly improved. It is useful as a silicon carbide semiconductor device.
- the present invention can be widely applied to various silicon carbide semiconductor devices having a MOS structure such as MOEFET and IGBT.
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Abstract
Description
炭素原子濃度の積分値に対する窒素原子濃度の積分値の比率Rは、例えば以下のようにして求めることができる。
次に、炭化珪素半導体装置100の製造方法の一例を説明する。
以下、窒化処理の条件を異ならせて、複数の評価用試料(SiC-MOSFET)A~Fを作製し、それらの閾値電圧の変動量を評価したので、その方法および結果を説明する。
試料A~Fの作製には、ポリタイプが4Hでありオフ角が4°の炭化珪素基板を用いた。また、これらの試料では、炭化珪素半導体層(チャネル層)の表面を熱酸化することにより、シリコン酸化膜(厚さ:70nm)を形成した。熱酸化は、ドライ酸素雰囲気中で1200℃の温度で行った。窒化処理は、一酸化窒素雰囲気中でシリコン酸化膜の上方から窒素を導入することにより行った。具体的には、大気圧にてチャンバー内に一酸化窒素を1slm(但し、slmは、L/min at 0℃、101.3kPaである。)、窒素を4slmの流量で導入して熱処理を行った。窒化処理条件(温度および時間)は試料ごとに異ならせた。試料A~Fにおける窒素導入時の温度および時間を表1に示す。窒化処理条件以外のプロセス条件は全て同じとして、図1(b)に示す縦型MOSFETを作成し、試料A~Fを得た。
次に、上記A~Fの試料の閾値電圧Vthの変動量(ΔVth)を評価した。ΔVthは、ゲート電極に所定の電圧を印加した後のVth2と、電圧を印加する前の初期状態のVth1との差とした(Vth2-Vth1)。
窒素の導入によって閾値変動が低減されるメカニズムを検討するために、まず、各試料の窒素原子濃度分布を測定し、窒素原子濃度と閾値変動量との関係を調べた。
前述したように、図4の結果から、閾値変動の要因は少なくとも2つあり、その1つは界面準位密度の増加と考えられる。そこで、本発明者は、界面準位密度と閾値電圧の変動量ΔVthとが相関関係を有すると仮定し、モデル式からΔVth(h)を算出した。なお、ΔVth(h)の算出に用いる界面準位密度は、下記式により求めた。
Nit(t)=A・Em・exp(-φ/kT)・tn
ここで、Aは定数、Eは電界、mは電界依存性のべき指数、φは活性化エネルギー、kはボルツマン係数、Tは絶対温度、tは時間、nは時間依存性のべき指数である。
各試料B~Fについて、深さ方向における窒素原子濃度プロファイルからピーク値Cmおよび半値幅ΔMを求めたので、その方法および結果を説明する。半値幅ΔMは、窒素原子濃度のピーク値Cmの1/2以上の濃度で窒素原子が存在する領域の幅である。
102 炭化珪素半導体層
104 ゲート絶縁層
104a シリコン酸化膜
105 ゲート電極
106 ソース電極
107 ドレイン電極
108 コンタクト電極
110 炭素遷移層
121 ドリフト領域
122 ボディ領域
123 ソース領域
124 コンタクト領域
125 チャネル層
126 ドレイン領域
Claims (7)
- 炭化珪素半導体層と、
前記炭化珪素半導体層上に配置され、シリコン酸化膜を含むゲート絶縁層と、
前記ゲート絶縁層上に配置されたゲート電極と、
前記炭化珪素半導体層と前記シリコン酸化膜との間に位置し、前記炭化珪素半導体層における炭素原子濃度に対する炭素原子濃度が10%以上90%以下である炭素遷移層と
を備え、
前記炭素遷移層のうち窒素原子濃度が最大となる位置よりも前記シリコン酸化膜側にある領域において、炭素原子濃度の積分値に対する窒素原子濃度の積分値の比率が0.11以上である炭化珪素半導体装置。 - 前記炭化珪素半導体層を支持する基板と、前記基板の前記炭化珪素半導体層と反対側に設けられたドレイン電極と、前記炭化珪素半導体層の上に設けられたソース電極とをさらに備え、
前記炭化珪素半導体層は、第1導電型のドリフト領域と、前記ドリフト領域に隣接して配置された第2導電型のボディ領域と、前記ボディ領域内に配置された第1導電型の不純物領域と、前記ボディ領域と前記ゲート絶縁層との間に、前記ドリフト領域と前記不純物領域とを接続するように設けられたチャネル層とを有し、
前記ソース電極は前記不純物領域と電気的に接続されており、
前記炭素遷移層は、前記チャネル層と前記シリコン酸化膜との間に位置する請求項1に記載の炭化珪素半導体装置。 - 前記炭化珪素半導体層を支持する基板と、前記炭化珪素半導体層の上に設けられたソース電極およびドレイン電極とをさらに備え、
前記炭化珪素半導体層は、第1導電型のドリフト領域と、前記ドリフト領域に隣接して配置された第2導電型のボディ領域と、前記ボディ領域内に互いに間隔を空けて配置された第1導電型の第1不純物領域および第2不純物領域と、前記ボディ領域と前記ゲート絶縁層との間に、前記第1不純物領域と前記第2不純物領域とを接続するように設けられたチャネル層とを有し、
前記ソース電極は前記第1不純物領域と電気的に接続され、前記ドレイン電極は前記第2不純物領域と電気的に接続されており、
前記炭素遷移層は、前記チャネル層と前記シリコン酸化膜との間に位置する請求項1に記載の炭化珪素半導体装置。 - 前記窒素原子濃度の深さ方向におけるプロファイルは、前記炭素遷移層内にピークを有している請求項1から3のいずれかに記載の炭化珪素半導体装置。
- 炭化珪素半導体層を用意する工程(a)と、
前記炭化珪素半導体層の表面にシリコン酸化膜を含むゲート絶縁層を形成する工程であって、前記炭化珪素半導体層と前記シリコン酸化膜との間には、前記炭化珪素半導体層における炭素原子濃度に対する炭素原子濃度が10%以上90%以下である炭素遷移層が形成される工程(b)と、
少なくとも前記炭素遷移層に窒素原子を導入する工程であって、これにより、前記炭素遷移層のうち窒素原子のピークとなる位置よりも前記シリコン酸化膜側にある領域において、炭素原子濃度の積分値に対する窒素原子濃度の積分値の比率を0.11以上とする工程(c)と
を包含する炭化珪素半導体装置の製造方法。 - 前記工程(b)は、前記炭化珪素半導体層の前記表面を熱酸化して前記シリコン酸化膜を形成する工程を含む請求項5に記載の炭化珪素半導体装置の製造方法。
- 前記工程(c)は、前記ゲート絶縁層が形成された前記炭化珪素半導体層に対して、窒素を含む雰囲気中で1200℃以上の温度で熱処理を行う工程を含む請求項5または6に記載の炭化珪素半導体装置の製造方法。
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JP7072148B2 (ja) | 2018-09-14 | 2022-05-20 | 株式会社東芝 | 半導体装置、半導体装置の製造方法、インバータ回路、駆動装置、車両、及び、昇降機 |
WO2020188862A1 (ja) * | 2019-03-18 | 2020-09-24 | 三菱電機株式会社 | 炭化珪素半導体装置、電力変換装置および炭化珪素半導体装置の製造方法 |
JPWO2020188862A1 (ja) * | 2019-03-18 | 2021-10-21 | 三菱電機株式会社 | 炭化珪素半導体装置、電力変換装置および炭化珪素半導体装置の製造方法 |
JP7138770B2 (ja) | 2019-03-18 | 2022-09-16 | 三菱電機株式会社 | 炭化珪素半導体装置、電力変換装置および炭化珪素半導体装置の製造方法 |
JP2020155698A (ja) * | 2019-03-22 | 2020-09-24 | 株式会社豊田中央研究所 | 炭化珪素半導体装置 |
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JPWO2014103186A1 (ja) | 2017-01-12 |
US20150303271A1 (en) | 2015-10-22 |
US9209262B2 (en) | 2015-12-08 |
CN104137266A (zh) | 2014-11-05 |
JP5608840B1 (ja) | 2014-10-15 |
CN104137266B (zh) | 2015-07-15 |
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