WO2014019248A1 - 一种检测线路及液晶显示面板的制作方法 - Google Patents

一种检测线路及液晶显示面板的制作方法 Download PDF

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Publication number
WO2014019248A1
WO2014019248A1 PCT/CN2012/079867 CN2012079867W WO2014019248A1 WO 2014019248 A1 WO2014019248 A1 WO 2014019248A1 CN 2012079867 W CN2012079867 W CN 2012079867W WO 2014019248 A1 WO2014019248 A1 WO 2014019248A1
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Prior art keywords
control
test
lines
line
signal
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PCT/CN2012/079867
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English (en)
French (fr)
Inventor
陈政鸿
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深圳市华星光电技术有限公司
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Application filed by 深圳市华星光电技术有限公司 filed Critical 深圳市华星光电技术有限公司
Priority to DE201211006646 priority Critical patent/DE112012006646T5/de
Priority to US13/641,108 priority patent/US8529307B1/en
Publication of WO2014019248A1 publication Critical patent/WO2014019248A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/006—Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/1306—Details
    • G02F1/1309—Repairing; Testing
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136254—Checking; Testing

Definitions

  • the present invention relates to the field of liquid crystal display technology, and in particular, to a detection circuit and a method for fabricating the liquid crystal display panel.
  • the manufacturing process of the liquid crystal display is generally divided into an array process, a group process, and a module process.
  • the array process mainly uses a glass substrate as a glass substrate for a liquid crystal display, in which a glass substrate and a color filter substrate are combined in a group process, and a liquid crystal is injected between the two substrates to form a large piece.
  • the glass is combined, and the combined glass is cut to form a plurality of liquid crystal display panels.
  • various components such as a liquid crystal display panel and a back frame formed after cutting are assembled to form a liquid crystal display.
  • a large piece of composite glass has a plurality of panel units, and each of the panel units needs to be array tested or PSVA (Polymer) Stabilization Vertical Alignment, etc. to determine if each panel unit is working properly.
  • PSVA Polymer Stabilization Vertical Alignment
  • a large piece of composite glass 10 has N panel units 11, and each test unit requires a test line (Test Circuit) or PSVA line is m, then at least N x is required on the entire composite glass 10 m test lines or PSVA lines, and each test line or PSVA line corresponds to one Pad (test pad, not shown), so a large piece of composite glass 10 requires at least N x m Pads to apply test signals to the test line or PSVA line via Pad.
  • each panel unit 11 corresponds to a Pad set 12, wherein each Pad set 12 has m Pads connected to m test circuits or PSVA lines of each panel unit 11, respectively. With such a detection line, it is possible to detect a plurality of panel units separately.
  • the large combined glass 10 has more panel units 11 (i.e., the number of N is larger) or the large combined glass 10 has a higher utilization rate, the number of test lines or pads is also larger, and it is difficult at this time. So many test lines and pads are placed on the large combined glass 10.
  • test lines or PSVA lines of the same signal for different panel units 21 Connected to the same line in parallel, each line is connected to a Pad, of which Pad Set 22 includes m Pads. Therefore, the test line or PSVA line of the large combined glass 20 can be simplified from N x m strips to m strips, and the number of Pads can be reduced from N x m to m pieces.
  • the technical problem to be solved by the present invention is to provide a detection circuit and a method for fabricating the liquid crystal display panel, which can simplify the peripheral detection lines of the plurality of panel units, reduce the load of the detection line, and can clearly distinguish the panel unit in which the short circuit occurs. .
  • a technical solution adopted by the present invention is to provide a detection circuit in a liquid crystal display assembly process for testing a combined substrate having a plurality of panel units, wherein a plurality of panel units are divided into At least two groups each of the panel units includes at least one panel unit, the plurality of panel units including at least one set of signal lines, and the detecting circuit includes: at least one set of test lines disposed on the combined substrate, each set of test lines including at least one test line a plurality of sets of control lines disposed on the combined substrate, each set of control lines comprising at least one control line; a set of test pads disposed on the combined substrate, the test pad set comprising a plurality of sets of control signal pads and at least one set of test signal pads;
  • the switch set on the combined substrate, the switch set includes at least two sets of control switches, each set of control switches includes at least one control switch, the control switch includes a control end, an input end, and an output end; the control end of each control switch passes the corresponding The control lines
  • control ends of the control switches corresponding to each group of panel units are electrically connected to a corresponding one of the control signal pads through a corresponding control line; the number of test lines is consistent with the number of test signal pads, and one-to-one correspondence, all panel units
  • the input terminals of the control switches corresponding to the same signal line are electrically connected to the corresponding one of the test signal pads through a corresponding one of the test lines.
  • each set of panel units includes at least one panel unit
  • the plurality of panel units includes at least one set of signal lines
  • the detection lines include: at least one set of test lines disposed on the combined substrate, each set of test lines including at least one test a plurality of sets of control lines disposed on the combined substrate, each set of control lines comprising at least one control line; a set of test pads disposed on the combined substrate, the test pad set comprising a plurality of sets of control signal pads and at least one set of test signal pads; a switch set disposed on the combined substrate, the switch set includes at least two sets of control switches, each set of control switches includes at least one control switch, the control switch includes a control end, an input end, and an output end; each control switch has a corresponding control end
  • the number of groups of control signal pads, the number of groups of control lines, and the number of groups of panel units are consistent, and one-to-one correspondence.
  • control ends of the control switches corresponding to each group of panel units are electrically connected to a corresponding one of the control signal pads through a corresponding control line; the number of test lines is consistent with the number of test signal pads, and one-to-one correspondence, all panel units
  • the input terminals of the control switches corresponding to the same signal line are electrically connected to the corresponding one of the test signal pads through a corresponding one of the test lines.
  • control switch is a thin film transistor, including a gate, a source and a drain, and the gate is electrically connected to the corresponding control signal pad through a corresponding control line, and the source is electrically connected to the test signal pad through a corresponding test line, and the drain Electrically connected to the signal line.
  • another technical solution adopted by the present invention is to provide a method for fabricating a liquid crystal display panel, comprising: preparing a first substrate and a second substrate, wherein the first substrate corresponds to a plurality of panel units, and the plurality of panels
  • the unit is divided into at least two groups, each group of panel units includes at least one panel unit, and the plurality of panel units includes at least one set of signal lines
  • the detection circuit is formed on the first substrate or the second substrate, and the detection line includes: at least one set of test lines, Each set of test lines includes at least one test line; a plurality of sets of control lines, each set of control lines includes at least one control line; a test pad set, the test pad set includes a plurality of sets of control signal pads and at least one set of test signal pads; switch sets, switches
  • the set includes at least two sets of control switches, each set of control switches includes at least one control switch, the control switch includes a control end, an input end, and an output end; the control end of each control switch is
  • the number of groups of control signal pads, the number of groups of control lines, and the number of groups of panel units are consistent, and one-to-one correspondence.
  • control ends of the control switches corresponding to each group of panel units are electrically connected to a corresponding one of the control signal pads through a corresponding control line; the number of test lines is consistent with the number of test signal pads, and one-to-one correspondence, all panel units
  • the input terminals of the control switches corresponding to the same signal line are electrically connected to a test signal pad through a corresponding test line.
  • control switch is a thin film transistor, including a gate, a source and a drain, and the gate is electrically connected to the corresponding control signal pad through a corresponding control line, and the source is electrically connected to the test signal pad through the corresponding test line, and the drain The pole is electrically connected to the signal line.
  • the beneficial effects of the present invention are: the inventors of the present application have earlier proposed to connect test lines or PSVA lines of the same signal of different panel units 21 to the same line in parallel, and each line is connected with a pad. a way to simplify the line so that each Pad and N x
  • the connection of m test lines or PSVA lines leads to an increase in the capacitive load corresponding to each Pad. This requires that the external power supply must have sufficient current supply capability, otherwise the problem of insufficient thrust may occur.
  • the N panel units 21 are simultaneously tested, and if one of the N panel units 21 is short-circuited, the panel unit in which the short circuit has occurred cannot be discerned.
  • the inventors enable the detection line to pass the test pad set and the switch set in the present invention, and pass all the signal lines of each panel unit through the input end and the output end of the control switch in the switch set and the test pad set.
  • the corresponding test signal pad is connected, and the control end of the control switch is electrically connected to the control signal pad to selectively perform differential test on one or more panel units, which can simplify the test line and reduce the load of the test line. It is also possible to clearly distinguish the panel unit in which the short circuit has occurred.
  • FIG. 1 is a schematic diagram of a circuit layout for detecting a plurality of panel units in the prior art
  • FIG. 2 is a schematic view showing the layout of a test circuit for simplifying the combined glass proposed by the inventors earlier;
  • FIG. 3 is a schematic diagram of a circuit layout of an embodiment of a detection circuit in a liquid crystal display assembly process of the present invention
  • FIG. 4 is a schematic diagram of a circuit layout of another embodiment of a detection line in a liquid crystal display assembly process of the present invention.
  • FIG. 5 is a schematic diagram of a circuit layout of still another embodiment of a detection line in a liquid crystal display assembly process of the present invention.
  • Fig. 6 is a flow chart showing an embodiment of a method of fabricating a liquid crystal display panel of the present invention.
  • the detection circuit in the liquid crystal display assembly process of the invention can simplify the test circuit, reduce the load of the test circuit, and can clearly distinguish the panel unit in which the short circuit occurs.
  • the detecting circuit in an embodiment of the detecting circuit in the liquid crystal display assembly process of the present invention, is used for testing the combined substrate 100 having a plurality of panel units, including array testing on a plurality of panel units or PSVA test, etc.
  • the combined substrate 100 includes:
  • N N is greater than or equal to 2 panel units, respectively, panel units 1011-101N.
  • the panel unit 101k (k is less than or equal to N, representing the kth panel unit among the N panel units) includes at least one signal line. Taking two signal lines as an example, the panel unit 101k includes a first signal line 1021 and a second signal line 1022.
  • the detecting circuit includes two test lines disposed on the combined substrate 100, which are a first test line 1031 and a second test line 1032, respectively; and a plurality of control lines disposed on the combined substrate 100, respectively, a control line 1041- 104N;
  • test pad set 108 disposed on the combined substrate 100, comprising a plurality of control signal pads and two test signal pads, the plurality of control signal pads respectively being control signal pads 1061-106N, and the two test signal pads are respectively the first test a signal pad 1051 and a second test signal pad 1052;
  • a switch set 107 disposed on the combined substrate 100 includes a plurality of control switches 1071 including a control terminal 10711, an input terminal 10712, and an output terminal 10713.
  • each control switch 1071 is electrically connected to the corresponding control signal pad through a corresponding control line, and the input end 10712 is electrically connected to the corresponding test signal pad through a corresponding test line, and the output end 10713 is correspondingly
  • the signal lines of the panel unit are electrically connected.
  • the first test line 1031 is connected to the N panel units through N control switches 1071, respectively, and the second test line 1032 is connected to the N panel units through the other N control switches 1071, respectively.
  • the first test line 1031 is electrically connected to the first test signal pad 1051
  • the second test line 1032 is electrically connected to the second test signal pad 1052.
  • Control lines 1041-104N are correspondingly electrically coupled to control signal pads 1061-106N.
  • the first signal lines 1021 of the panel units 1011-101N are respectively connected to the corresponding first test lines 1031 through a control switch 1071 to input test signals to the panel units 1011-101N through the first test signal pad 1051; the panel unit 1011-
  • the second signal line 1022 of 101N is respectively connected to the corresponding second test line 1032 through another control switch 1071 to input a test signal to the panel unit 1011-101N through the second test signal pad 1052.
  • the first signal line 1021 and the second signal line 1022 of the panel unit 101k are electrically connected to the output terminals 10713 of the two control switches 1071, respectively, and the input terminals 10712 of the two control switches 1071 are respectively.
  • the first test line 1031 and the second test line 1032 are electrically connected to input a test signal to the panel unit 101k through the first test signal pad 1051 and the second test signal pad 1052, respectively.
  • the control terminals 10711 of the two control switches 1071 corresponding to the panel unit 101k are electrically connected to the control signal pad 106k (representing the kth control signal pad) through the corresponding control line 104k (representing the kth control line) to pass the control.
  • the signal pad 106k controls the opening and closing of the two control switches 1071 corresponding to the panel unit 101k.
  • the N panel units 1011-101N are divided into N groups, and each group of panel units includes one panel unit, that is, the panel unit 101k.
  • the panel unit 101k includes two sets of signal lines, one set of signal lines including the first signal line 1021 and the other set of signal lines including the second signal line 1022, and thus the plurality of panel units includes a plurality of sets of signal lines.
  • the detection circuit includes: two sets of test lines, one set of test lines includes a first test line 1031, another set of test lines includes a second test line 1032; N sets of control lines, each set of control lines includes one control line, that is, control Line 104k; N sets of control signal pads, each set of control signal pads includes a control signal pad, that is, control signal pad 106k; two sets of test signal pads, one set of test signal pads includes a first test signal pad 1051, another set of test signals
  • the pad includes a second test signal pad 1052; a plurality of sets of control switches, each set of control switches including a control switch 1071.
  • the number of groups of the N panel units 1011-101N, the number of groups of the N control signal pads 1061-106N, and the number of groups of the N control lines 1041-104N are consistent, and one set of panel units corresponds to a set of control signal pads and one Group control lines, one for each.
  • the number of groups of all the signal lines of the N panel units 1011-101N and the number of groups of the control switches 1071 in the switch set 107 are the same, and one set of signal lines corresponds to a group of control switches, and the two correspond one-to-one.
  • control switches 1071 in each group of control switches is consistent with the number of signal lines in each group of signal lines of the corresponding panel unit, and one-to-one correspondence; the control ends of the control switches corresponding to each group of panel units pass corresponding A control line is electrically connected to a corresponding one of the control signal pads.
  • control terminals 10711 of all the control switches 1071 corresponding to the panel unit 101k are electrically connected to the corresponding control signal pads 106k through the control line 104k; the number of test lines and The number of the test signal pads is consistent and corresponds one-to-one, and the input terminals 10712 of the control switches 1071 corresponding to the first signal lines 1021 of all the panel units 1011-101N are electrically connected to the corresponding first through the corresponding first test lines 1031.
  • a test signal pad 1051, the input terminal 10712 of the control switch 1071 corresponding to the second signal line 1022 of all the panel units 1011-101N is electrically connected to the corresponding second test signal pad 1052 through the corresponding second test line 1032.
  • the control switch 1071 of the present embodiment may be a thin film transistor including a gate as a control terminal, a source as an input terminal, and a drain as an output terminal.
  • the gates of the two thin film transistors corresponding to the panel unit 101k are electrically connected to the corresponding control signal pads 106k through respective control lines 104k, and the sources are respectively passed through the corresponding first test line 1031 and second test line 1032.
  • the first test signal pad 1051 and the second test signal pad 1052 are electrically connected, and the drains are electrically connected to the corresponding first signal line 1021 and second signal line 1022, respectively.
  • the present embodiment can selectively test one of the panel units 1011-101N by the control signal pads 1061-106N. Specifically, when testing the panel unit 101k, first, a control signal is input correspondingly to the control signal pad 106k to open all the control switches 1071 corresponding to the panel unit 101k, and then the first test signal pad 1051 and the second test signal pad 1052 are respectively The test signal is input to the first signal line 1021 and the second signal line 1022 through the corresponding control switch 1071 to cause the test signal to enter the panel unit 101k.
  • the detection line of the embodiment can selectively test one panel unit separately, avoiding the problem that the first and second test lines test a plurality of panel units and causing a large load, and can simplify the test. The line reduces the load on the detection line and clearly distinguishes the panel unit in which the short circuit occurs.
  • the plurality of panel units can be tested simultaneously by the control signal pad 1061-106N.
  • the panel unit 1011-101N needs to perform the PSVA test, and the control signal pads 1061-106N can be simultaneously input with the control signals, so that the first and second test signal pads simultaneously face the panel unit 1011-101N. Enter the PSVA test signal for PSVA detection.
  • the panel unit 101k may further include three or more signal lines, and each of the signal lines needs a control switch to be connected to the corresponding test line, and the same signal lines of the different panel units are respectively connected to the same test line through the control switch.
  • the test line is consistent with the number of test signal pads.
  • each panel unit includes one panel unit.
  • different panel unit groups may also include different panel units.
  • the present embodiment uses three panel units 2011-2013.
  • the panel units 2011-2013 each include two signal lines of a first signal line 2021 and a second signal line 2022.
  • the three panel units 2011-2013 are divided into two groups, namely a first panel unit group 201 and a second panel unit group 202, wherein the first panel unit group 201 includes panel units 2011-2012, and the second panel unit group includes panels.
  • the first panel unit group 201 includes a set of signal lines including a first signal line 2021 and a second signal line 2022 of the panel unit 2011-2012.
  • the second panel unit group 202 includes a set of signal lines including a first signal line 2021 and a second signal line 2022 of the panel unit 2013.
  • the switch set 207 includes two sets of control switches, a first control switch group 2071 and a second control switch group 2072, each of which includes two control switches 3071.
  • the first signal line 2021 of the two panel units 2011-2012 of the first panel unit group 201 is electrically connected to the output end 30713 of one control switch 3071 of the first control switch group 2071, and the second signal line 2022 is connected to the other.
  • An output terminal 30713 of a control switch 3071 is electrically connected.
  • the first signal line 2021 of the panel unit 2013 of the second panel unit group 202 is electrically connected to the output end 30713 of one control switch 3071 of the second control switch group 2072, and the second signal line 2022 and the output end 30713 of the other control switch 3071. Electrical connection.
  • the control terminals 30711 of the two control switches 3071 of the first control switch group 2071 are electrically connected to the first control signal pad 2061 through the first control line 2041, and the control terminals 30711 of the two control switches 3071 of the second control switch group 2072 are both
  • the second control signal pad 2062 is electrically connected to the second control signal pad 2062.
  • the input end 30712 of the control switch 3071 corresponding to the first signal line 2021 of the panel unit 2011-2013 is electrically connected to the first test signal pad 2051 through the first test line 2031, and the second signal line 2022 of the panel unit 2011-2013 corresponds to The input terminal 30712 of the control switch 3071 is electrically connected to the second test signal pad 2052 through the second test line 2032.
  • the present embodiment can test the first panel unit group 201 and the second panel unit group 202 only by inputting the control signals through the corresponding control signal pads, and within the range of load values allowed by the detection line,
  • the two panel units 2011-2012 of the first panel unit group 201 are connected to the first and second test signal pads 2051 and 2052 through the same two control switches 3071, and the panel units 2011 and 2012 are simultaneously tested by the first control switch group 2071.
  • the number of control switches of the detection line can be reduced, the cost can be reduced, the detection line can be simplified, the load of the detection line can be reduced, and the panel unit group in which the short circuit occurs can be distinguished.
  • the multiple panel units of the present embodiment may also be grouped in other manners, such as three groups, each group of panel units may also include different number of panel units, and within the allowable load value range,
  • the detection circuit may adopt a line layout similar to that of FIG. 3 to enable testing of a single panel unit, or a line layout similar to that of FIG. 4 to test different panel unit groups without specific limitations.
  • the four panel units 30131-314 are taken as an example, and the two panel units are grouped into a range within a range allowed by the load value of the detection line.
  • the first panel unit group 301 includes panel units 3011 and 3012
  • the second panel unit group includes panel units 3013 and 3014.
  • the control terminals 40711 of the control switch 4071 corresponding to the first signal lines 3021 of the two panel units 3011, 3012 of the first panel unit group 301 are electrically connected to the control signal pad 3061 through the control line 3041, and the second signal line 3022 corresponds to Control terminal 40711 of control switch 4071 is electrically coupled to control signal pad 3062 via control line 3042.
  • the control end 40711 of the control switch 4071 corresponding to the first signal line 3021 of the two panel units 3013, 3014 of the second panel unit group 302 is electrically connected to the control signal pad 3063 through the control line 3043, and the corresponding control of the second signal line 3022
  • the control terminal 40711 of the switch 4071 is electrically coupled to the control signal pad 3064 via a control line 3044.
  • an embodiment of a method for fabricating a liquid crystal display panel of the present invention includes the following steps:
  • Step S601 preparing a first substrate and a second substrate, wherein the first substrate corresponds to a plurality of panel units, and the plurality of panel units are divided into at least two groups, each group of panel units includes at least one panel unit, and the plurality of panel units includes at least one group a signal line forming a detection line on the first substrate or the second substrate, the detection line comprising at least one set of test lines, a plurality of sets of control lines, a test pad set, and a switch pad set, wherein the test pad set includes a plurality of sets of control signal pads and at least A set of test signal pads, the set of switches including at least two sets of control switches.
  • the detection line of the present embodiment is the detection line of each of the above embodiments, and the detection line shown in FIG. 3 will be described as an example.
  • N N is greater than or equal to 2
  • panel units are divided into 101 groups of 1011-101N, and each group includes one panel unit.
  • the detection circuit includes: two sets of test lines, one set of test lines includes a first test line 1031, another set of test lines includes a second test line 1032; N sets of control lines 1041-104N, each set of control lines includes one control line N sets of control signal pads 1061-106N, each set of control signal pads includes a control signal pad; two sets of test signal pads, one set of test signal pads includes a first test signal pad 1051, and another set of test signal pads includes a second test Signal pad 1052; multiple sets of control switches, each set of control switches including a control switch 1071.
  • each control switch 1071 is electrically connected to a corresponding control signal pad in the control signal pad 1061-1061N through a corresponding control line in the control line 1041-104N, and the input end passes through the corresponding corresponding in the first test line 1021, 1022
  • the test leads are electrically connected to corresponding test signal pads in the test signal pads 1051, 1052, and the output terminals are electrically connected to the signal lines of the corresponding panel units in the panel units 1011-101N.
  • the first test line 1031 is connected to N panel units by N control switches 1071
  • the second test line 1032 is connected to N panel units by another N control switches 1071.
  • Step S602 assembling the first substrate and the second substrate, and forming a liquid crystal layer between the first substrate and the second substrate to form a combined substrate having a plurality of panel units.
  • Step S603 sequentially applying a selection electric signal to each control signal pad, sequentially electrically conducting the control switch of the corresponding panel unit to keep all other control switches closed, and passing the test signal pad when electrically controlling a corresponding switch of the panel unit. Test the corresponding panel unit.
  • the control signal pad corresponding to the panel unit to be detected is input into the electrical signal to open the control switch of the corresponding panel unit, and then the test signal is input to the corresponding panel unit through the test signal pad to test the corresponding panel unit.
  • Step S604 cutting the combined substrate after the test is completed to form a plurality of liquid crystal display panels corresponding to the panel unit.
  • the combined substrate is cut to separate each panel unit, and a process such as cure curing of each panel unit is performed in a subsequent process to form a liquid crystal display panel.
  • the detection line is formed on the first substrate or the second substrate, so that each panel unit can be individually tested to avoid the detection line when forming the combined substrate having the plurality of panel units. Simultaneous detection of multiple panel units results in a large load, which simplifies the detection line, reduces the load on the detection line, and clearly distinguishes the short-circuited panel unit.

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Abstract

一种液晶显示器组立制程中的检测线路及液晶显示面板的制作方法，该检测线路通过设置测试垫集合（108）和开关集合（107），将每个面板单元（1011-101N）的所有信号线（1021，1022）分别通过开关集合（107）中的控制开关（1071）的输入端（10712）和输出端（10713）与测试垫集合（108）中的相应测试信号垫（1051，1052）连接，控制开关（1071）的控制端（10711）则电连接至控制信号垫（1061-106N），以选择性地对一个面板单元（1011-101N）进行单独测试。通过上述方式，能够简化检测线路，减小检测线路的负载。

Description

一种检测线路及液晶显示面板的制作方法
【技术领域】
本发明涉及液晶显示技术领域，特别是涉及一种检测线路及液晶显示面板的制作方法。
【背景技术】
液晶显示器的制作过程，一般分为阵列制程、组立制程以及模组制程。阵列制程主要是以玻璃为基底制成液晶显示器所需的玻璃基板，以在组立制程中将玻璃基板与彩色滤光基板结合，并在两基板之间注入液晶后贴合，从而形成大片的组合玻璃，再将组合玻璃切割形成多个液晶显示面板。在模组制程中，对切割后形成的液晶显示面板与背框等多种零件进行组装以形成液晶显示器。
在组立制程中，形成大片的组合玻璃之后，对大片的组合玻璃进行切割之前，还需对大片的组合玻璃进行测试，以保证后续制程的顺利进行。其中，大片的组合玻璃具有多个面板单元，需对这些面板单元分别进行阵列测试或PSVA（Polymer Stabilization Vertical Alignment，聚合物稳定垂直对齐）测试等，以确定每个面板单元是否能正常工作。
如图1所示，大片的组合玻璃10具有N个面板单元11，每个面板单元需要的测试线路（Test circuit）或PSVA线路为m条，则整个组合玻璃10上至少需要N x m条测试线路或PSVA线路，并且每一条测试线路或PSVA线路对应一个Pad（测试垫，图中未示），因此大片的组合玻璃10至少需要N x m个Pad，以通过Pad对测试线路或PSVA线路施加测试信号。在图1中，每个面板单元11对应一个Pad set（测试垫集合）12，其中每个Pad set 12具有m个Pad，其分别连接至每个面板单元11的m条测试电路或PSVA线路。通过此种检测线路，能够分别对多个面板单元进行检测。但是，当大片的组合玻璃10具有较多的面板单元11（即N的数目较大）或者大片的组合玻璃10利用率较高时，测试线路或Pad的数目也会较多，此时难以在大片的组合玻璃10上设置如此多的测试线路和Pad。
参阅图2，为了精简大片的组合玻璃20上的线路或Pad的数目，本申请发明人曾经提出一种解决办法，该解决的方法是将不同面板单元21的相同信号的测试线路或PSVA线路以并接的方式连接至同一条线路中，每条线路与一个Pad连接，其中Pad set 22中包括m个Pad。因此，大片的组合玻璃20的测试线路或PSVA线路可由N x m条简化为m条，而Pad数目也可由N x m个简化为m个。
【发明内容】
本发明主要解决的技术问题是提供一种检测线路及液晶显示面板的制作方法，能够简化多个面板单元的周边检测线路，减小检测线路的负载，同时也能够明确分辨出发生短路的面板单元。
为解决上述技术问题，本发明采用的一个技术方案是：提供一种液晶显示器组立制程中的检测线路，用于对具有多个面板单元的组合基板进行测试，其中，多个面板单元分为至少两组，每组面板单元至少包括一个面板单元，多个面板单元包括至少一组信号线，检测线路包括：设置于组合基板上的至少一组测试线，每组测试线至少包括一条测试线；设置于组合基板上的多组控制线，每组控制线至少包括一条控制线；设置于组合基板上的测试垫集合，测试垫集合包括多组控制信号垫和至少一组测试信号垫；设置于组合基板上的开关集合，开关集合包括至少两组控制开关，每组控制开关至少包括一个控制开关，控制开关包括控制端、输入端以及输出端；每个控制开关的控制端均通过相应的控制线电连接至相应的控制信号垫，每个控制开关的输入端均通过相应的测试线电连接至相应的测试信号垫，每个控制开关的输出端均与相应的面板单元的信号线电连接；其中，一条测试线分别通过至少两个相应的控制开关连接到至少两个面板单元；控制信号垫的组数量、控制线的组数量、面板单元的组数量一致，并且一一对应；控制开关为薄膜晶体管，包括栅极、源极以及漏极，栅极通过相应的控制线与相应的控制信号垫电连接，源极通过相应的测试线与测试信号垫电连接，漏极与信号线电连接。
其中，每组面板单元对应的控制开关的控制端均通过相应的一条控制线电连接至相应的一个控制信号垫；测试线的数量和测试信号垫的数量一致，并一一对应，所有面板单元相同的信号线对应的控制开关的输入端均通过相应的一条测试线电连接至相应的一个测试信号垫。
为解决上述技术问题，本发明采用的另一个技术方案是：提供一种液晶显示器组立制程中的检测线路，用于对具有多个面板单元的组合基板进行测试，其中，多个面板单元分为至少两组，每组面板单元至少包括一个面板单元，多个面板单元包括至少一组信号线，检测线路包括：设置于组合基板上的至少一组测试线，每组测试线至少包括一条测试线；设置于组合基板上的多组控制线，每组控制线至少包括一条控制线；设置于组合基板上的测试垫集合，测试垫集合包括多组控制信号垫和至少一组测试信号垫；设置于组合基板上的开关集合，开关集合包括至少两组控制开关，每组控制开关至少包括一个控制开关，控制开关包括控制端、输入端以及输出端；每个控制开关的控制端均通过相应的控制线电连接至相应的控制信号垫，每个控制开关的输入端均通过相应的测试线电连接至相应的测试信号垫，每个控制开关的输出端均与相应的面板单元的信号线电连接；其中一条测试线分别通过至少两个相应的控制开关连接到至少两个面板单元。
其中，控制信号垫的组数量、控制线的组数量、面板单元的组数量一致，并且一一对应。
其中，每组面板单元对应的控制开关的控制端均通过相应的一条控制线电连接至相应的一个控制信号垫；测试线的数量和测试信号垫的数量一致，并一一对应，所有面板单元相同的信号线对应的控制开关的输入端均通过相应的一条测试线电连接至相应的一个测试信号垫。
其中，控制开关为薄膜晶体管，包括栅极、源极以及漏极，栅极通过相应的控制线与相应的控制信号垫电连接，源极通过相应的测试线与测试信号垫电连接，漏极与信号线电连接。
为解决上述技术问题，本发明采用的又一个技术方案是：提供一种液晶显示面板的制作方法，包括：准备第一基板和第二基板，其中第一基板对应多个面板单元，多个面板单元分为至少两组，每组面板单元至少包括一个面板单元，多个面板单元包括至少一组信号线，在第一基板或第二基板形成检测线路，检测线路包括：至少一组测试线，每组测试线至少包括一条测试线；多组控制线，每组控制线至少包括一条控制线；测试垫集合，测试垫集合包括多组控制信号垫和至少一组测试信号垫；开关集合，开关集合包括至少两组控制开关，每组控制开关至少包括一个控制开关，控制开关包括控制端、输入端以及输出端；每个控制开关的控制端均与通过相应的控制线电连接至相应的控制信号垫，每个控制开关的输入端均通过相应的测试线电连接至相应的测试信号垫，每个控制开关的输出端均与相应的面板单元的信号线电连接；其中一条测试线分别通过至少两个相应的控制开关连接至至少两个面板单元；组装第一基板和第二基板，并在第一基板和第二基板之间形成液晶层，以形成具有多个面板单元的组合基板；依次对每个控制信号垫施加选择电信号，依次电导通相应面板单元的控制开关而使其他所有控制开关保持关闭，并在电导通一个面板单元对应的控制开关时，通过测试信号垫对相应面板单元进行测试；在完成测试后切割组合基板以形成多个对应面板单元的液晶显示面板。
其中，控制信号垫的组数量、控制线的组数量、面板单元的组数量一致，并且一一对应。
其中，每组面板单元对应的控制开关的控制端均通过相应的一条控制线电连接至相应的一个控制信号垫；测试线的数量和测试信号垫的数量一致，并一一对应，所有面板单元相同的信号线对应的控制开关的输入端均通过相应的一条测试线电连接至一个测试信号垫。
其中，控制开关为薄膜晶体管，包括栅极、源极以及漏极，栅极通过相应的控制线与相应的控制信号垫电连接，源极与通过相应的测试线与测试信号垫电连接，漏极与信号线电连接。
本发明的有益效果是：本申请发明人较早前提出将不同面板单元21的相同信号的测试线路或PSVA线路以并接的方式连接至同一条线路中、每条线路与一个Pad连接，此种简化线路的方式，使得每个Pad与N x m条测试线路或PSVA线路连接，导致每个Pad所对应的电容负载增大，这就需要外加的电源供应器必须要有足够的电流供应能力，否则容易发生推力不足的问题。再者，在测试的过程中，N个面板单元21同时进行测试，若N个面板单元21中的其中一个面板单元21发生短路的情况，无法辨别出发生短路的面板单元。本发明人根据上述情况，在本发明中使检测线路通过设置测试垫集合和开关集合，将每个面板单元的所有信号线分别通过开关集合中的控制开关的输入端和输出端与测试垫集合中的相应测试信号垫连接，控制开关的控制端则电连接至控制信号垫，以选择性地对一个或以上面板单元进行有区别的测试，能够简化测试线路的同时，减小测试线路的负载，也能够明确分辨出发生短路的面板单元。
【附图说明】
图1是现有技术中对多个面板单元进行检测的线路布局示意图；
图2是本发明人在较早前提出的简化组合玻璃的测试线路的线路布局示意图；
图3是本发明液晶显示器组立制程中的检测线路的一实施方式的线路布局示意图；
图4是本发明液晶显示组立制程中的检测线路的另一实施方式的线路布局示意图；
图5是本发明液晶显示组立制程中的检测线路的又一实施方式的线路布局示意图；
图6是本发明液晶显示面板的制作方法的一实施方式的流程图。
【具体实施方式】
本发明的液晶显示器组立制程中的检测线路，能够简化测试线路，减小测试线路的负载，同时也能够明确分辨出发生短路的面板单元。
下面将结合附图和实施方式对本发明进行详细描述。
参阅图3，在本发明液晶显示器组立制程中的检测线路的一实施方式中，检测线路用于对具有多个面板单元的组合基板100进行测试，包括对多个面板单元进行的阵列测试或者PSVA测试等。
具体地，组合基板100包括：
N（N大于或等于2）个面板单元，分别为面板单元1011-101N。其中面板单元101k（k小于或等于N，表示N个面板单元中的第k个面板单元）包括至少一条信号线。以两条信号线为例，面板单元101k包括第一信号线1021和第二信号线1022。
对应地，检测线路包括设置在组合基板100上的两条测试线，分别为第一测试线1031和第二测试线1032；设置在组合基板100上的多条控制线，分别为控制线1041-104N；
设置在组合基板100上的测试垫集合108，其包括多个控制信号垫和两个测试信号垫，多个控制信号垫分别为控制信号垫1061-106N，两个测试信号垫分别为第一测试信号垫1051和第二测试信号垫1052；
设置在组合基板100上的开关集合107，其包括多个控制开关1071，控制开关1071包括控制端10711、输入端10712以及输出端10713。
其中，每个控制开关1071的控制端10711均通过相应的控制线电连接至相应的控制信号垫，输入端10712均通过相应的测试线电连接至相应的测试信号垫，输出端10713均与相应的面板单元的信号线电连接。第一测试线1031分别通过N个控制开关1071连接至N个面板单元，第二测试线1032分别通过另外的N个控制开关1071连接至N个面板单元。
具体地，第一测试线1031与第一测试信号垫1051电连接，第二测试线1032与第二测试信号垫1052电连接。控制线1041-104N对应地与控制信号垫1061-106N电连接。面板单元1011-101N的第一信号线1021均分别通过一个控制开关1071与对应的第一测试线1031连接，以通过第一测试信号垫1051输入测试信号至面板单元1011-101N；面板单元1011-101N的第二信号线1022均分别通过另一个控制开关1071与对应的第二测试线1032连接，以通过第二测试信号垫1052输入测试信号至面板单元1011-101N。
进一步地，以面板单元101k为例，面板单元101k的第一信号线1021和第二信号线1022分别与两个控制开关1071的输出端10713电连接，两个控制开关1071的输入端10712分别与第一测试线1031和第二测试线1032电连接，以分别通过第一测试信号垫1051和第二测试信号垫1052输入测试信号至面板单元101k。而面板单元101k对应的两个控制开关1071的控制端10711均通过对应的控制线104k（表示第k条控制线）与控制信号垫106k（表示第k个控制信号垫）电连接，以通过控制信号垫106k控制面板单元101k对应的两个控制开关1071的打开与关闭。
从另外一个角度来说，也可以认为N个面板单元1011-101N分为N组，每组面板单元包括一个面板单元，即面板单元101k。面板单元101k包括两组信号线，一组信号线包括第一信号线1021，另一组信号线包括第二信号线1022，因此多个面板单元包括多组信号线。检测线路中，包括：两组测试线，一组测试线包括第一测试线1031，另一组测试线包括第二测试线1032；N组控制线，每组控制线包括一条控制线，即控制线104k；N组控制信号垫，每组控制信号垫包括一个控制信号垫，即控制信号垫106k；两组测试信号垫，一组测试信号垫包括第一测试信号垫1051，另一组测试信号垫包括第二测试信号垫1052；多组控制开关，每组控制开关包括一个控制开关1071。
其中，N个面板单元1011-101N的组数量、N个控制信号垫1061-106N的组数量以及N条控制线1041-104N的组数量一致，并且一组面板单元对应一组控制信号垫和一组控制线，三者一一对应。而N个面板单元1011-101N的所有信号线的组数量和开关集合107中的控制开关1071的组数量一致，一组信号线对应一组控制开关，两者一一对应。进一步地，每组控制开关中控制开关1071的数量与相应面板单元的每组信号线中的信号线的数量一致，并一一对应；每组面板单元对应的控制开关的控制端均通过相应的一条控制线电连接至相应的一个控制信号垫，可理解为，面板单元101k对应的所有控制开关1071的控制端10711均通过控制线104k电连接至相应的控制信号垫106k；测试线的数量和测试信号垫的数量一致，并一一对应，并且，所有面板单元1011-101N的第一信号线1021对应的控制开关1071的输入端10712均通过相应的第一测试线1031电连接至相应的第一测试信号垫1051，所有面板单元1011-101N的第二信号线1022对应的控制开关1071的输入端10712均通过相应的第二测试线1032电连接至相应的第二测试信号垫1052。
本实施方式的控制开关1071可以是薄膜晶体管，包括作为控制端的栅极、作为输入端的源极以及作为输出端的漏极。对应地，面板单元101k对应的两个薄膜晶体管的栅极分别通过相应的控制线104k与相应的控制信号垫106k电连接，源极分别通过相应的第一测试线1031和第二测试线1032与第一测试信号垫1051和第二测试信号垫1052电连接，漏极分别与相应的第一信号线1021和第二信号线1022电连接。
本实施方式通过控制信号垫1061-106N能够选择性地对面板单元1011-101N中的一个面板单元进行测试。具体为，对面板单元101k进行测试时，首先对应地在控制信号垫106k输入控制信号，以打开面板单元101k对应的所有控制开关1071，然后第一测试信号垫1051和第二测试信号垫1052分别通过对应的控制开关1071输入测试信号至第一信号线1021和第二信号线1022，以使测试信号进入面板单元101k。通过上述方式，本实施方式的检测线路能选择性地对一个面板单元进行单独测试，避免了第一、第二测试线对多个面板单元进行测试而出现较大负载的问题，同时能够简化测试线路，减小检测线路的负载，明确分辨出发生短路的面板单元。
当然，在检测线路允许的负载值的范围内，也可以通过控制信号垫1061-106N同时对多个面板单元进行测试，具体测试过程可参考上述测试方式，在此不进行赘述。而根据实际测试的需要，例如，需对面板单元1011-101N进行PSVA测试，可同时对控制信号垫1061-106N输入控制信号，以使得第一、第二测试信号垫同时对面板单元1011-101N输入PSVA测试信号进行PSVA检测。
此外，面板单元101k还可以包括三条或更多的信号线，而每条信号线需一个控制开关与对应的测试线连接，不同面板单元的相同信号线分别通过控制开关连接至同一条测试线，测试线与测试信号垫的数量一致，具体的线路布局可参考上述实施方式的检测线路，在此不进行详细描述。
上述实施方式中每组面板单元包括一个面板单元，当然，在另一实施方式中也可以使不同的面板单元组包括不同个面板单元，参阅图4，本实施方式以三个面板单元2011-2013为例，面板单元2011-2013均包括第一信号线2021和第二信号线2022两条信号线。将三个面板单元2011-2013分为两组，分别为第一面板单元组201和第二面板单元组202，其中第一面板单元组201包括面板单元2011-2012，第二面板单元组包括面板单元2013。第一面板单元组201包括一组信号线，该组信号线包括面板单元2011-2012的第一信号线2021和第二信号线2022。第二面板单元组202包括一组信号线，该组信号线包括面板单元2013的第一信号线2021和第二信号线2022。开关集合207包括两组控制开关，分别为第一控制开关组2071和第二控制开关组2072，每组控制开关均包括两个控制开关3071。其中，第一面板单元组201的两个面板单元2011-2012的第一信号线2021均与第一控制开关组2071的一个控制开关3071的输出端30713电连接，第二信号线2022均与另一个控制开关3071的输出端30713电连接。第二面板单元组202的面板单元2013的第一信号线2021与第二控制开关组2072的一个控制开关3071的输出端30713电连接，第二信号线2022与另一个控制开关3071的输出端30713电连接。第一控制开关组2071的两个控制开关3071的控制端30711均通过第一控制线2041与第一控制信号垫2061电连接，第二控制开关组2072的两个控制开关3071的控制端30711均通过第二控制线2042与第二控制信号垫2062电连接。面板单元2011-2013的第一信号线2021对应的控制开关3071的输入端30712均通过第一测试线2031与第一测试信号垫2051电连接，面板单元2011-2013的第二信号线2022对应的控制开关3071的输入端30712均通过第二测试线2032与第二测试信号垫2052电连接。
通过上述方式，本实施方式只需通过相应的控制信号垫输入控制信号即可分别对第一面板单元组201和第二面板单元组202进行测试，并且在检测线路允许的负载值范围内，使第一面板单元组201的两个面板单元2011-2012通过相同的两个控制开关3071与第一、第二测试信号垫2051、2052连接，通过第一控制开关组2071同时测试面板单元2011和2012，由此能够减少检测线路的控制开关数量，降低成本，也能够简化检测线路，减小检测线路的负载，并且能分辨出发生短路的面板单元组。
值得注意的是，本实施方式的多个面板单元还可以进行其他方式的分组，如分为三组，每组面板单元也可以包括不同个数的面板单元，而在允许的负载值范围内，检测线路可以采用与图3类似的线路布局，以能够对单独一个面板单元进行测试，或者采用与图4相类似的线路布局，以对不同面板单元组进行测试，在此不进行具体限制。
参阅图5，本发明检测线路的又一实施方式中，以四个面板单元3011-3014为例，在检测线路的负载值允许的范围内，将两个面板单元分为一组。其中，第一面板单元组301包括面板单元3011和3012，第二面板单元组包括面板单元3013和3014。将第一面板单元组301的两个面板单元3011、3012的第一信号线3021对应的控制开关4071的控制端40711均通过控制线3041电连接至控制信号垫3061，第二信号线3022对应的控制开关4071的控制端40711均通过控制线3042电连接至控制信号垫3062。第二面板单元组302的两个面板单元3013、3014的第一信号线3021对应的控制开关4071的控制端40711均通过控制线3043电连接至控制信号垫3063，第二信号线3022对应的控制开关4071的控制端40711均通过控制线3044电连接至控制信号垫3064。
本实施方式通过将每组面板单元中不同面板单元的相同信号线对应的控制开关的控制端电连接至同一控制信号垫，能够减小检测线路负载，辨别出发生短路的面板单元组，同时也能检测出不同面板单元的相同信号线是否发生短路或故障。
参阅图6，本发明液晶显示面板的制作方法的一实施方式，包括步骤：
步骤S601：准备第一基板和第二基板，其中第一基板对应多个面板单元，多个面板单元分为至少两组，每组面板单元至少包括一个面板单元，多个面板单元包括至少一组信号线，在第一基板或第二基板上形成检测线路，检测线路包括至少一组测试线、多组控制线、测试垫集合以及开关垫集合，其中测试垫集合包括多组控制信号垫和至少一组测试信号垫，开关集合包括至少两组控制开关。
本实施方式的检测线路为上述各实施方式的检测线路，以图3所示的检测线路为例进行说明。参阅图3，将N（N大于或等于2）个面板单元分1011-101N为N组，每组包括一个面板单元。检测线路中，包括：两组测试线，一组测试线包括第一测试线1031，另一组测试线包括第二测试线1032；N组控制线1041-104N，每组控制线包括一条控制线；N组控制信号垫1061-106N，每组控制信号垫包括一个控制信号垫；两组测试信号垫，一组测试信号垫包括第一测试信号垫1051，另一组测试信号垫包括第二测试信号垫1052；多组控制开关，每组控制开关包括一个控制开关1071。
其中，每个控制开关1071的控制端均通过控制线1041-104N中相应的控制线电连接至控制信号垫1061-1061N中相应控制信号垫，输入端均通过第一测试线1021、1022中相应的测试线电连接至测试信号垫1051、1052中相应的测试信号垫，输出端均与面板单元1011-101N中相应面板单元的信号线电连接。第一测试线1031通过N个控制开关1071连接至N个面板单元，第二测试线1032通过另外的N个控制开关1071连接至N个面板单元。
步骤S602：组装第一基板和第二基板，并在第一基板和第二基板之间形成液晶层，以形成具有多个面板单元的组合基板。
步骤S603：依次对每个控制信号垫施加选择电信号，依次电导通相应面板单元的控制开关而使其他所有控制开关保持关闭，并在电导通一个面板单元对应的控制开关时，通过测试信号垫对相应面板单元进行测试。
在形成检测线路后，形成液晶显示面板之前，需对组合基板的多个面板单元进行检测，以判断面板单元是否有损坏。将需检测的面板单元所对应的控制信号垫输入电信号，以打开相应面板单元的控制开关，再通过测试信号垫对相应面板单元输入测试信号，以对相应面板单元进行测试。
步骤S604：在完成测试后切割组合基板以形成多个对应面板单元的液晶显示面板。
在完成测试后，将组合基板进行切割以将每个面板单元分离出来，在后续制程中通过对每个面板单元进行框胶固化等制程以形成液晶显示面板。
本实施方式的液晶显示面板的制作方法，在第一基板或第二基板上形成的检测线路，从而在形成具有多个面板单元的组合基板时可以对每个面板单元进行单独测试，避免检测线路对多个面板单元进行同时检测而出现负载较大的问题，能够简化检测线路，减小检测线路的负载，并能明确分辨出短路的面板单元。
以上所述仅为本发明的实施方式，并非因此限制本发明的专利范围，凡是利用本发明说明书及附图内容所作的等效结构或等效流程变换，或直接或间接运用在其他相关的技术领域，均同理包括在本发明的专利保护范围内。

Claims (10)

  1. 一种液晶显示器组立制程中的检测线路，用于对具有多个面板单元的组合基板进行测试，其中，多个所述面板单元分为至少两组，每组所述面板单元至少包括一个面板单元，所述多个面板单元包括至少一组信号线，所述检测线路包括：
    设置于所述组合基板上的至少一组测试线，每组所述测试线至少包括一条测试线；
    设置于所述组合基板上的多组控制线，每组所述控制线至少包括一条控制线；
    设置于所述组合基板上的测试垫集合，所述测试垫集合包括多组控制信号垫和至少一组测试信号垫；
    设置于所述组合基板上的开关集合，所述开关集合包括至少两组控制开关，每组所述控制开关至少包括一个控制开关，所述控制开关包括控制端、输入端以及输出端；
    每个所述控制开关的控制端均通过相应的控制线电连接至相应的控制信号垫，每个所述控制开关的输入端均通过相应的测试线电连接至相应的测试信号垫，每个所述控制开关的输出端均与相应的面板单元的信号线电连接；
    其中，一条所述测试线分别通过至少两个相应的控制开关连接到至少两个面板单元；
    所述控制信号垫的组数量、控制线的组数量、面板单元的组数量一致，并且一一对应；
    所述控制开关为薄膜晶体管，包括栅极、源极以及漏极，所述栅极通过相应的控制线与相应的控制信号垫电连接，所述源极通过相应的测试线与测试信号垫电连接，所述漏极与信号线电连接。
  2. 根据权利要求1所述的检测线路，其中，
    每组所述面板单元对应的所述控制开关的控制端均通过相应的一条所述控制线电连接至相应的一个所述控制信号垫；
    所述测试线的数量和测试信号垫的数量一致，并一一对应，所有面板单元相同的所述信号线对应的控制开关的输入端均通过相应的一条测试线电连接至相应的一个测试信号垫。
  3. 一种液晶显示器组立制程中的检测线路，用于对具有多个面板单元的组合基板进行测试，其中，多个所述面板单元分为至少两组，每组所述面板单元至少包括一个面板单元，所述多个面板单元包括至少一组信号线，所述检测线路包括：
    设置于所述组合基板上的至少一组测试线，每组所述测试线至少包括一条测试线；
    设置于所述组合基板上的多组控制线，每组所述控制线至少包括一条控制线；
    设置于所述组合基板上的测试垫集合，所述测试垫集合包括多组控制信号垫和至少一组测试信号垫；
    设置于所述组合基板上的开关集合，所述开关集合包括至少两组控制开关，每组所述控制开关至少包括一个控制开关，所述控制开关包括控制端、输入端以及输出端；
    每个所述控制开关的控制端均通过相应的控制线电连接至相应的控制信号垫，每个所述控制开关的输入端均通过相应的测试线电连接至相应的测试信号垫，每个所述控制开关的输出端均与相应的面板单元的信号线电连接；
    其中一条所述测试线分别通过至少两个相应的控制开关连接到至少两个面板单元。
  4. 根据权利要求3所述的检测线路，其中，
    所述控制信号垫的组数量、控制线的组数量、面板单元的组数量一致，并且一一对应。
  5. 根据权利要求4所述的检测线路，其中，
    每组所述面板单元对应的所述控制开关的控制端均通过相应的一条所述控制线电连接至相应的一个所述控制信号垫；
    所述测试线的数量和测试信号垫的数量一致，并一一对应，所有面板单元相同的所述信号线对应的控制开关的输入端均通过相应的一条测试线电连接至相应的一个测试信号垫。
  6. 根据权利要求3所述的检测线路，其中，
    所述控制开关为薄膜晶体管，包括栅极、源极以及漏极，所述栅极通过相应的控制线与相应的控制信号垫电连接，所述源极通过相应的测试线与测试信号垫电连接，所述漏极与信号线电连接。
  7. 一种液晶显示面板的制作方法，其中，包括：
    准备第一基板和第二基板，其中第一基板对应多个面板单元，多个所述面板单元分为至少两组，每组所述面板单元至少包括一个面板单元，所述多个面板单元包括至少一组信号线，在所述第一基板或第二基板上形成检测线路，所述检测线路包括：
    至少一组测试线，每组所述测试线至少包括一条测试线；
    多组控制线，每组所述控制线至少包括一条控制线；
    测试垫集合，所述测试垫集合包括多组控制信号垫和至少一组测试信号垫；
    开关集合，所述开关集合包括至少两组控制开关，每组所述控制开关至少包括一个控制开关，所述控制开关包括控制端、输入端以及输出端；
    每个所述控制开关的控制端均与通过相应的控制线电连接至相应的控制信号垫，每个所述控制开关的输入端均通过相应的测试线电连接至相应的测试信号垫，每个所述控制开关的输出端均与相应的面板单元的信号线电连接；
    其中一条所述测试线分别通过至少两个相应的控制开关连接至至少两个面板单元；
    组装所述第一基板和第二基板，并在第一基板和第二基板之间形成液晶层，以形成具有多个面板单元的组合基板；
    依次对每个所述控制信号垫施加选择电信号，电导通相应面板单元的控制开关而使其他所有控制开关保持关闭，并在电导通一个所述面板单元对应的控制开关时，通过所述测试信号垫对相应面板单元进行测试；
    在完成所述测试后切割组合基板以形成多个对应面板单元的液晶显示面板。
  8. 根据权利要求7所述的制作方法，其中，
    所述控制信号垫的组数量、控制线的组数量、面板单元的组数量一致，并且一一对应。
  9. 根据权利要求7所述的制作方法，其中，
    每组面板单元对应的所述控制开关的控制端均通过相应的一条控制线电连接至相应的一个控制信号垫；
    所述测试线的数量和测试信号垫的数量一致，并一一对应，所有面板单元相同的所述信号线对应的控制开关的输入端均通过相应的一条测试线电连接至一个测试信号垫。
  10. 根据权利要求7所述的制作方法，其中，
    所述控制开关为薄膜晶体管，包括栅极、源极以及漏极，所述栅极通过相应的控制线与相应的控制信号垫电连接，所述源极与通过相应的测试线与测试信号垫电连接，所述漏极与信号线电连接。
PCT/CN2012/079867 2012-08-01 2012-08-09 一种检测线路及液晶显示面板的制作方法 WO2014019248A1 (zh)

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