WO2013187187A1 - 半導体装置 - Google Patents

半導体装置 Download PDF

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Publication number
WO2013187187A1
WO2013187187A1 PCT/JP2013/063999 JP2013063999W WO2013187187A1 WO 2013187187 A1 WO2013187187 A1 WO 2013187187A1 JP 2013063999 W JP2013063999 W JP 2013063999W WO 2013187187 A1 WO2013187187 A1 WO 2013187187A1
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WIPO (PCT)
Prior art keywords
metal film
opening
semiconductor device
pad opening
pad
Prior art date
Application number
PCT/JP2013/063999
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English (en)
French (fr)
Inventor
智光 理崎
章滋 中西
ひと美 桜井
洸一 島崎
Original Assignee
セイコーインスツル株式会社
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Publication date
Application filed by セイコーインスツル株式会社 filed Critical セイコーインスツル株式会社
Priority to EP13804750.1A priority Critical patent/EP2863419B1/en
Priority to US14/406,997 priority patent/US20150162296A1/en
Priority to CN201380029681.8A priority patent/CN104350586B/zh
Priority to KR1020147035015A priority patent/KR102010224B1/ko
Publication of WO2013187187A1 publication Critical patent/WO2013187187A1/ja
Priority to US15/879,364 priority patent/US10497662B2/en

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    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
    • H01L27/0296—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices involving a specific disposition of the protective devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/35—Mechanical effects

Definitions

  • the present invention relates to a semiconductor device having a pad structure.
  • the pads of the semiconductor device and the external connection terminals are connected with metal wires using wire bonding technology. Since the wire bonding technique is a mechanical process for bonding a wire made of gold or the like to a pad of a semiconductor device using heat, ultrasonic waves, or weight, the semiconductor device may be damaged. This will be described with reference to FIGS. 11A and 11B.
  • the ball forming wire 15 formed at the tip of the bonding wire 14 is pressure-bonded to the uppermost metal film 3 in the pad opening provided in the semiconductor device to form a crushed ball 16, and the bonding wire 14 is the uppermost layer in the pad opening. Bonded to the metal film 3. At this time, a crack 18 is generated in the insulating film 5 under the pad opening, which may affect the reliability of the semiconductor device.
  • Patent Document 1 describes that in order to prevent cracks, bonding damage can be suppressed and cracking can be suppressed by devising the capillary structure of the ball bonding apparatus.
  • Patent Document 2 it is described that a metal film of a pad opening that is in direct contact with a bonding wire is formed thick in order to maintain a bonding strength and prevent a crack. Since the metal film itself absorbs bonding damage, cracks are suppressed and the crack resistance of the pad structure itself is increased.
  • Patent Document 3 as shown in FIG. 12, a pad structure is shown in which the effective film thickness of the insulating film under the pad opening 9 that receives bonding damage is increased.
  • the second metal film 2 is not provided under the uppermost metal film 3 in the pad opening 9, and the thickness of the insulating film between the first metal film 1 and the uppermost metal film 3 is the second insulating film 4 and the third metal film 3.
  • the total thickness of the insulating film 5 and the effective thickness of the insulating film under the pad opening 9 that receives bonding damage is increased. Since the thick insulating film absorbs bonding damage, cracks are suppressed. Since the wiring or the like of the first metal film 1 can be disposed under the pad opening 9, the chip size can be reduced.
  • Patent Document 1 if the bonding strength is lowered, the problem that the wire bonding is likely to come off easily occurs.
  • Patent Document 2 the uppermost metal film of the pad structure becomes thick, and it becomes difficult to process the metal film. As a result, the width of the metal film wiring cannot be sufficiently reduced, and the chip size increases.
  • Patent Document 3 in order to reduce the parasitic resistance to the elements inside the semiconductor device in the pad structure so as not to affect the electrical characteristics of the IC, FIG. 12
  • the uppermost layer of the pad structure To increase the distance d1 from the opening end of the pad opening 9 to the end of the uppermost metal film 3 of the pad structure, or as shown in FIG. 13B, the uppermost layer of the pad structure.
  • Many vias can be arranged by increasing the distance d2 from the end of the metal film 3 to the end of the second metal film 2.
  • the pad structure becomes large as shown in the cross-sectional view of FIG. 13, the chip size increases.
  • the present invention has been made in view of the weakness of increasing the chip size as described above, and an object of the present invention is to provide a semiconductor device that does not increase the chip size while suppressing cracks under the pad opening.
  • the present invention provides a semiconductor device having a pad structure, which has a rectangular opening under the pad opening, has a rectangular ring shape, and a tip of a ball bonder capillary tip during ball bonding.
  • a protective film having a rectangular pad opening.
  • the metal film under the uppermost layer metal film in the pad opening is not only outside the pad opening but also under the chamfering angle of the tip of the ball bonder capillary at the time of ball bonding. It also exists inside the opening. Accordingly, the area of the metal film under the uppermost metal film in the pad opening is increased, and the parasitic resistance to the elements inside the semiconductor device is reduced without increasing the pad structure.
  • the metal film below the uppermost metal film of the pad opening does not exist inside the pad opening and below the chamfer angle of the tip of the ball bonder capillary at the time of ball bonding. Under the chamfering angle, the effective film thickness of the insulating film under the pad opening that receives bonding damage increases. Since the thick insulating film absorbs bonding damage, cracks are suppressed.
  • FIG. 1A is a perspective view
  • FIG. 1B is a cross-sectional view
  • FIG. 1C is a plan view for explaining the relationship between a second metal film and a pad opening, and is a top layer metal.
  • the film 3 is not drawn.
  • the semiconductor substrate 11 is provided with an element (not shown).
  • a first insulating film 10 is provided on the semiconductor substrate 11, and a first metal film 1 is provided on the first insulating film 10.
  • the element and the first metal film 1 are electrically connected by a contact 12.
  • a second insulating film 4 is provided on the first metal film 1, and a second metal film 2 is provided on the second insulating film 4.
  • the first metal film 1 and the second metal film 2 are electrically connected by a first via 7 provided in the second insulating film 4.
  • a third insulating film 5 is provided on the second metal film 2, and an uppermost metal film 3 is provided on the third insulating film 5.
  • the second metal film 2 and the uppermost metal film 3 are electrically connected by a second via 8 that is not disposed under the pad opening 9.
  • a protective film 6 is provided on the uppermost metal film 3.
  • the protective film 6 has a pad opening 9 exposing a part of the uppermost metal film 3.
  • the pad opening 9 is rectangular, and here is square, and the opening width is d0.
  • the second metal film 2 has an opening below the pad opening 9. This opening is also rectangular, here square, and the opening width is d4.
  • the distance between the opening end of the protective film 6 and the opening end of the second metal film 2 is d3.
  • the second metal film 2 has a square ring shape and protrudes by a distance d3 inside the pad opening 9.
  • the distance d3 is the amount of protrusion of the second metal film 2.
  • the second metal film 2 may have a ring shape. Since the second metal film 2 does not exist immediately below the pad opening 9 of the uppermost metal film 3, the effective film thickness of the insulating film under the pad opening 9 is thick.
  • FIG. 11 is a diagram showing the bonding damage of ball bonding.
  • the crack 18 when the crack 18 is generated due to the bonding damage, the crack 18 does not occur under the edge of the crushed ball 16. It occurs below the chamfer angle 13 at the tip of the ball bonder capillary. That is, in FIG. 11B, the crack 18 occurs not with the width r2 of the crushed ball 16, but with the width r1 between the chamfer angles shown in FIG. 11A.
  • the opening width d0 of the pad opening 9 is set wider than the width r2 (d0> r2). Further, the opening width d4 of the second metal film 2 under the pad opening 9 is wider than the width r1 between the chamfering angles (d4> r1).
  • the generated bonding damage 17 is transmitted from the chamfering angle 13 at the tip of the ball bonder capillary to the uppermost metal film 3 in the pad opening 9. Since there is no second metal film 2 below the chamfered angle 13 at the tip of the ball bonder capillary during ball bonding, the total thickness of the second insulating film 4 and the third insulating film 5 is the first metal film 1 and the uppermost layer. The thickness of the insulating film between the metal film 3 and the bonding damage 17 is received here.
  • the second metal film 2 under the uppermost metal film 3 in the pad opening 9 is not only outside the pad opening 9 but also a ball bonder capillary at the time of ball bonding. It exists also inside the pad opening part 9 except under the chamfering angle 13 at the tip. Accordingly, the area of the metal film 2 under the uppermost metal film 3 in the pad opening 9 is increased. Therefore, it is possible to increase the number of vias between the second metal film and the uppermost metal film and the number of vias between the first metal film and the second metal film without increasing the pad structure. This reduces the parasitic resistance to the elements inside the semiconductor device. Alternatively, by maintaining the number of vias, it is possible to reduce the size of each metal film as much as the second metal film protrudes inward while maintaining the value of the parasitic resistance as in the conventional case.
  • the second metal film 2 below the uppermost metal film 3 in the pad opening 9 is inside the pad opening 9 and below the chamfering angle 13 at the tip of the ball bonder capillary at the time of ball bonding. not exist. Therefore, under the chamfer angle 13, the effective film thickness of the insulating film under the pad opening 9 that receives the bonding damage 17 is increased. Since the thick insulating film absorbs the bonding damage 17, the crack is suppressed.
  • the element under the pad opening 9 is an ESD protection element
  • the area of the second metal film 2 is increased, more first vias 7 may be disposed in the second metal film 2 correspondingly.
  • the parasitic resistance between the pad structure and the ESD protection element is reduced. Therefore, current concentration is reduced and the ESD tolerance of the ESD protection element is increased.
  • an element such as an ESD protection element is present under the pad opening 9
  • An element such as an ESD protection element may be disposed away from the pad. In that case, the element and the pad are electrically connected via the first metal film, the second metal film, and the like.
  • the semiconductor device is manufactured by a three-layer metal process, but the present invention is not limited to this.
  • a semiconductor device may be manufactured by a two-layer metal process.
  • the pad openings 9 provided in the protective film 6 and the openings provided in the second metal film 2 are both square.
  • the present invention is not limited to this.
  • a rectangular shape or a circular shape may be used as long as the relationship between the lengths indicated by the inequality used in the description can be satisfied.
  • Various combinations are possible.
  • FIG. 3 shows another pad structure of the present invention.
  • (A) is sectional drawing
  • (b) is a top view for demonstrating mainly the relationship between a 2nd metal film and a pad opening part.
  • FIG. 4 is a diagram illustrating a case where ball bonding is performed to the pad structure.
  • the rectangular second metal film 19 is not in contact with the rectangular ring-shaped first second metal film 2 below the pad opening 9. It is different in that it is placed under. As shown in FIG. 4, the width d5 of the second second electrode film 19 needs to be narrower (d5 ⁇ r1) than the width r1 between the chamfering angles.
  • the bonding damage 17 occurs from the chamfering angle 13 at the tip of the ball bonder capillary to the uppermost metal film 3 of the pad opening 9, so that the second second metal film 19 has a chamfered angle 13. It is arranged so as to be completely within the width r1 formed by the chamfering angles by avoiding the bottom. Therefore, the effective film thickness of the insulating film under the pad opening 9 that receives the bonding damage 17 remains thick. Since the thick insulating film absorbs the bonding damage 17, the crack is suppressed.
  • the second second metal film 19 may be circular as shown in FIG. Further, as shown in FIG. 6, the second second metal film 19 may be a dot pattern composed of a plurality of rectangles. The second second metal film 19 may be a dot pattern composed of a plurality of circles, although not shown.
  • FIG. 7 is a view showing a pad structure of the present invention, (a) is a sectional view, and (b) is for mainly explaining the relationship between a second metal film and a pad opening. It is a top view.
  • the second second metal film 19 is different from the first modification in that it is electrically connected to the uppermost metal film 3 by the second via 8.
  • the second second metal film 19 is also electrically connected to the first metal film 1 by the first via 7.
  • the 2nd 2nd metal film 19 it is also possible to make the 2nd 2nd metal film 19 circular like FIG. 5, and to arrange
  • the second second metal film 19 can be formed into a rectangular dot pattern as in FIG. 6, and the second via 8 can be disposed therein.
  • FIG. 10 shows a pad structure of the present invention.
  • the second metal film 2 having a rectangular ring shape below the pad opening 9 is different in that it includes a slit 30 as shown in FIG.
  • the second metal film 2 can be formed in a U shape or an L shape in accordance with the layout pattern restrictions.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Geometry (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Wire Bonding (AREA)

Abstract

　パッド開口部の下のクラックを抑制しつつチップサイズを大きくしないために、保護膜６は、一部の最上層金属膜３を露出するパッド開口部９を有する。このパッド開口部９は矩形で正方形であり、開口幅はｄ０である。第二金属膜２は、パッド開口部９の下において開口部を有する。この開口部は矩形で正方形であり、開口幅はｄ４である。保護膜６の開口端と第二金属膜２の開口端との距離はｄ３である。第二金属膜２は、矩形のリング形状であり、パッド開口部９の内側に、距離ｄ３だけはみ出している。

Description

半導体装置
　本発明は、パッド構造を有する半導体装置に関する。
　半導体装置が外部と電気信号のやりとりをするために、ワイヤボンディング技術を用いて、半導体装置のパッドと外部接続端子とを金属のワイヤで結んでいる。ワイヤボンディング技術は熱、超音波、加重を用いて金などでできたワイヤを半導体装置のパッドに接合する機械的な工程であるため、半導体装置がダメージを受けることがある。その様子を図１１の（ａ）及び（ｂ）を用いて説明する。ボンディングワイヤ１４の先端に形成されたボール化ワイヤ１５が、半導体装置に設けられたパッド開口部の最上層金属膜３に圧着され、潰れたボール１６となり、ボンディングワイヤ１４はパッド開口部の最上層金属膜３にボンディングされる。この時、パッド開口部の下の絶縁膜５にクラック１８が生じ、半導体装置の信頼性に影響を与えることがある。
　特許文献１では、クラック防止のため、ボールボンディング装置のキャピラリ構造の工夫により、ボンディングダメージが抑制され、クラックの発生を抑制できることが記載されている。
　特許文献２の背景技術には、ボンディング強度を保ってクラックを防止するため、ボンディングワイヤと直接接触するパッド開口部の金属膜を厚く形成することが記されている。その金属膜自体がボンディングダメージを吸収するので、クラックが抑制され、パッド構造自体のクラック耐性が高くなる。
　また、特許文献３では、図１２に示すように、ボンディングダメージを受けるパッド開口部９の下の絶縁膜の実効膜厚を厚くしたパッド構造が示されている。パッド開口部９の最上層金属膜３の下は第二金属膜２を設けず、第一金属膜１と最上層金属膜３との間の絶縁膜の厚みが第二絶縁膜４と第三絶縁膜５との厚みの合計となり、ボンディングダメージを受けるパッド開口部９の下の絶縁膜の実効膜厚が厚くなる。その厚い絶縁膜がボンディングダメージを吸収するので、クラックが抑制される。第一金属膜１の配線等をパッド開口部９の下に配置することができるので、チップサイズを小さくできる。
特開平０４－０６９９４２号公報 特開２０１１－０５５００６号公報 特開平１１－１８６３２０号公報
　特許文献１の場合には、ボンディング強度を低くすると、ワイヤボンディングが外れやすくなるという不具合が生じやすくなる。
　特許文献２の場合には、パッド構造の最上層の金属膜が厚くなり、その金属膜の加工が困難になる。その結果、この金属膜の配線の幅を十分に細くできず、チップサイズが大きくなる。
　図１２に示した特許文献３の構造においては、パッド構造における半導体装置内部の素子への寄生抵抗を小さくして、ＩＣの電気特性に影響を与えないようにするには、図１３の（ａ）に示すように、パッド開口部９の開口端からパッド構造の最上層金属膜３の端までの距離ｄ１を長くする、あるいは、図１３の（ｂ）に示すように、パッド構造の最上層金属膜３の端から第二金属膜２の端までの距離ｄ２を長くすることで多くのビアが配置できるようにする。しかし、その分、図１３の断面図のように、パッド構造が大きくなるので、チップサイズが大きくなる。
　本発明は、上記のようにチップサイズを大きくするという弱点に鑑みてなされ、パッド開口部の下のクラックを抑制しつつチップサイズを大きくしない半導体装置を提供することを課題とする。
　本発明は、上記課題を解決するために、パッド構造を有する半導体装置において、パッド開口部の下において矩形の開口部を有し、矩形リング形状であり、ボールボンディング時のボールボンダ用キャピラリ先端の面取り角の下に無く、前記パッド開口部の内側に所定距離だけはみ出している金属膜と、前記金属膜の上に設けられる絶縁膜と、前記絶縁膜の上に設けられる最上層金属膜と、前記パッド開口部の下に無く、前記金属膜と前記最上層金属膜とを電気的に接続するビアと、前記最上層金属膜の上に設けられ、一部の前記最上層金属膜を露出する矩形のパッド開口部を有する保護膜と、を備えることを特徴とする半導体装置を提供する。
　本発明によるパッド構造においては、パッド開口部の最上層金属膜の下の金属膜が、パッド開口部の外側だけでなく、ボールボンディング時のボールボンダ用キャピラリ先端の面取り角の下を除いたパッド開口部の内側にも存在する。その分、パッド開口部の最上層金属膜の下の金属膜の面積が広くなり、パッド構造を大きくしなくとも、半導体装置内部の素子への寄生抵抗が小さくなる。
　また、本発明によるパッド構造においては、パッド開口部の最上層金属膜の下の金属膜が、パッド開口部の内側で、ボールボンディング時のボールボンダ用キャピラリ先端の面取り角の下に存在しないので、その面取り角の下において、ボンディングダメージを受けるパッド開口部の下の絶縁膜の実効膜厚が厚くなる。その厚い絶縁膜がボンディングダメージを吸収するので、クラックが抑制される。
本発明のパッド構造を示す図である。 パッド構造へボールボンディングをするときの図である。 本発明のパッド構造を示す図である。 パッド構造へボールボンディングをするときの図である。 本発明のパッド構造を示す図である。 本発明のパッド構造を示す図である。 本発明のパッド構造を示す図である。 本発明のパッド構造を示す図である。 本発明のパッド構造を示す図である。 本発明のパッド構造を示す図である。 ボールボンディングのボンディングダメージを示す図である。 従来のパッド構造を示す図である。 従来のパッド構造を示す図である。
　以下、本発明の実施形態を、図面を参照して説明する。
　まず、本発明の半導体装置のパッド構造について図１を用いて説明する。図１の（ａ）は斜視図であり、（ｂ）は断面図であり、（ｃ）は第二金属膜とパッド開口部との関係を説明するための平面図であって、最上層金属膜３を描いていない。
　半導体基板１１には図示しないが素子が設けられている。半導体基板１１の上に第一絶縁膜１０を設け、第一絶縁膜１０の上には第一金属膜１を設ける。素子と第一金属膜１とは、コンタクト１２によって電気的に接続されている。第一金属膜１の上に第二絶縁膜４を設け、第二絶縁膜４の上には第二金属膜２を設ける。第一金属膜１と第二金属膜２とは、第二絶縁膜４に設けられた第一ビア７によって電気的に接続されている。第二金属膜２の上に第三絶縁膜５を設け、第三絶縁膜５の上には最上層金属膜３を設ける。第二金属膜２と最上層金属膜３とは、パッド開口部９の下には配置されていない第二ビア８によって電気的に接続されている。最上層金属膜３の上には保護膜６を設ける。
　保護膜６は、最上層金属膜３の一部を露出するパッド開口部９を有している。このパッド開口部９は矩形であり、さらにここでは正方形であり、開口幅はｄ０である。第二金属膜２は、パッド開口部９の下に開口部を有している。この開口部も矩形であり、ここでは正方形であり、開口幅はｄ４である。保護膜６の開口端と第二金属膜２の開口端との距離はｄ３である。第二金属膜２は、正方形のリング形状であり、パッド開口部９の内側に、距離ｄ３だけはみ出している。距離ｄ３は第二金属膜２のはみ出し量である。長さの間には、ｄ０＝ｄ３×２＋ｄ４、あるいは、ｄ３＝（ｄ０－ｄ４）／２なる関係がある。一般的には、第二金属膜２は、リング形状で良い。最上層金属膜３のパッド開口部９の真下にあたるところには第二金属膜２がないので、パッド開口部９の下の絶縁膜の実効膜厚が厚くなっている。
　既に説明したように、図１１はボールボンディングのボンディングダメージを示す図であるが、ボンディングダメージによってクラック１８が発生してしまう場合、そのクラック１８は、潰れたボール１６のエッジ下で生じないで、ボールボンダ用キャピラリ先端の面取り角１３の下で生じる。つまり、図１１（ｂ）において、クラック１８は、潰れたボール１６の幅ｒ２ではなく、図１１（ａ）に示した面取り角同士の幅ｒ１を有して発生する。
　図２に示すように、潰れたボール１６は幅ｒ２まで広がるので、パッド開口部９の開口幅ｄ０は幅ｒ２よりも広くとる（ｄ０＞ｒ２）。また、パッド開口部９の下の第二金属膜２の開口幅ｄ４は、面取り角同士の幅ｒ１よりも広くとる（ｄ４＞ｒ１）。発生したボンディングダメージ１７は、ボールボンダ用キャピラリ先端の面取り角１３からパッド開口部９の最上層金属膜３に伝わる。ボールボンディング時のボールボンダ用キャピラリ先端の面取り角１３の下に第二金属膜２が無いので、第二絶縁膜４と第三絶縁膜５との厚みの合計が第一金属膜１と最上層金属膜３との間の絶縁膜の厚みとなり、ここでボンディングダメージ１７を受けとめることになる。
　＜効果＞上記のように、パッド構造において、パッド開口部９の最上層金属膜３の下の第二金属膜２が、パッド開口部９の外側だけでなく、ボールボンディング時のボールボンダ用キャピラリ先端の面取り角１３の下を除いたパッド開口部９の内側にも存在する。その分、パッド開口部９の最上層金属膜３の下の金属膜２の面積が広くなる。よって、パッド構造が大きくしないで、第二金属膜と最上層金属膜の間のビアの数および第一金属膜と第二金属膜の間のビアの数を多くすることが可能となり、パッド構造による半導体装置内部の素子への寄生抵抗が小さくなる。あるいは、ビアの数を保つことで寄生抵抗の値を従来同様に保ったまま、第二金属膜が内側にせり出している分、それぞれの金属膜を小さくすることも可能である。
　また、パッド構造において、パッド開口部９の最上層金属膜３の下の第二金属膜２が、パッド開口部９の内側で、ボールボンディング時のボールボンダ用キャピラリ先端の面取り角１３の下に存在しない。よって、その面取り角１３の下において、ボンディングダメージ１７を受けるパッド開口部９の下の絶縁膜の実効膜厚が厚くなる。その厚い絶縁膜がボンディングダメージ１７を吸収するので、クラックが抑制される。
　また、パッド開口部９の下の素子がＥＳＤ保護素子である場合、第二金属膜２の面積が広くなると、その分、第二金属膜２に多くの第一ビア７が配置されることができるので、パッド構造とＥＳＤ保護素子との間の寄生抵抗が少なくなる。よって、電流の集中が少なくなり、ＥＳＤ保護素子のＥＳＤ耐量が高くなる。
　なお、上記の説明では、パッド開口部９の下にＥＳＤ保護素子などの素子が存在する場合を述べたが、これに限定されるものではない。ＥＳＤ保護素子などの素子は、パッドから離れて配置されていてもよく、その場合は、第一金属膜および第二金属膜等を介して素子とパッドとは電気的に接続される。
　また、上記の説明では、３層メタルプロセスで半導体装置を製造しているが、これに限定されない。２層メタルプロセスで半導体装置を製造しても良い。
　また、先の説明においては保護膜６に設けられたパッド開口部９および第二金属膜２に設けられた開口部の形状をともに正方形としたが、これに限るものではない。説明に用いた不等式で示される長さの間の関係を満たすことできれば長方形であっても良いし、円形であっても良い。さまざまな組み合わせが可能である。
　＜変形例１＞本発明の他のパッド構造を図３に示す。（ａ）は断面図であり、（ｂ）は第二金属膜とパッド開口部との関係を主に説明するための平面図である。図４は、パッド構造へボールボンディングがされる場合を示す図である。
　前述の実施形態と比較すると、ここでは、矩形の第二の第二金属膜１９を、パッド開口部９の下の矩形リング形状の第一の第二金属膜２と接しないようパッド開口部９の下に配置している点が異なる。第二の第二電極膜１９の幅ｄ５は、図４に示すように、面取り角同士の幅ｒ１よりも狭い（ｄ５＜ｒ１）ことが必要である。
　図４に示すように、ボンディングダメージ１７は、ボールボンダ用キャピラリ先端の面取り角１３からパッド開口部９の最上層金属膜３に生じるので、第二の第二金属膜１９はその面取り角１３の下を避けて面取り角同士が作る幅ｒ１の中に完全に収まるように配置される。よって、ボンディングダメージ１７を受けるパッド開口部９の下の絶縁膜の実効膜厚は厚いままである。その厚い絶縁膜がボンディングダメージ１７を吸収するので、クラックが抑制される。
　なお、第二の第二金属膜１９は、図５に示すように、円形とすることもできる。また、第二の第二金属膜１９は、図６に示すように、複数の矩形からなるドットパターンとしても良い。また、第二の第二金属膜１９は、図示しないが、複数の円形からなるドットパターンとしても良い。
　＜変形例２＞図７は本発明のパッド構造を示す図であり、（ａ）は断面図であり、（ｂ）は第二金属膜とパッド開口部との関係を主に説明するための平面図である。
　変形例１と比較すると、ここでは、第二の第二金属膜１９は第二ビア８によって最上層金属膜３と電気的に接続されている点が異なる。また、第二の第二金属膜１９は第一ビア７によって第一金属膜１とも電気的に接続されている。
　パッド構造において、第一ビア７と第二ビア８と第二金属膜１９とが新たに電気伝導に寄与するので、パッド構造が有する寄生抵抗が小さくなる。
　なお、図８に示すように、図５と同様に第二の第二金属膜１９を円形とし、その中に第二ビア８を配置することも可能である。また、図９に示すように、図６と同様に第二の第二金属膜１９を矩形のドットパターンとし、その中に第二ビア８を配置すること可能である。
　＜変形例３＞図１０は、本発明のパッド構造を示す図である。
　前述の実施形態と比較すると、ここでは、パッド開口部９の下の矩形リング形状の第二金属膜２が、図１０に示すように、スリット３０を含んでいる点が異なっている。
　なお、第二金属膜２は、図示しないが、レイアウトパターンの制約に従い、コの字の形状やＬの字の形状などとすることも可能である。
１　第一金属膜
２　第二金属膜
３　最上層金属膜
４　第二絶縁膜
５　第三絶縁膜
６　保護膜
７　第一ビア
８　第二ビア
９　パッド開口部
１０　第一絶縁膜
１１　半導体基板
１２　コンタクト
１３　ボールボンダ用キャピラリ先端の面取り角
１４　ボンディングワイヤ
１５　ボール化ワイヤ
１６　潰れたボール
１７　ボンディングダメージ
１８　クラック
１９　第二金属膜

Claims (10)

  1. 　多層の金属膜からなるパッド構造を有する半導体装置であって、
    　半導体基板と、
    　前記半導体基板の表面に設けられた第一絶縁膜と、
    　前記第一絶縁膜の上に設けられた第一金属膜と、
    　前記第一金属膜の上に設けられた第二絶縁膜と、
    　前記第二絶縁膜の上に設けられた第一の第二金属膜と、
    　前記第二絶縁膜に設けられた前記第一金属膜と前記第一の第二金属膜とを接続する第一ビアと、
    　前記第一の第二金属膜の上に設けられた第三絶縁膜と、
    　前記第三絶縁膜の上に設けられた最上層金属膜と、
    　前記第三絶縁膜に設けられた前記第一の第二金属膜と前記最上層金属膜とを接続する第二ビアと、
    　前記最上層金属膜の上に設けられ、前記最上層金属膜の表面の一部を露出するためのパッド開口部を有する保護膜と、
    からなり、
    　前記第一の第二金属膜は、リング形状であり、前記パッド開口部の下において開口部を有し、前記開口部はボールボンディングに用いられるボールボンダ用キャピラリ先端の面取り角の外側に位置するとともに、前記第一の第二金属膜は前記パッド開口部の内側に所定のはみ出し量だけはみ出していることを特徴とする半導体装置。
  2. 　前記パッド開口部および前記開口部はともに正方形である請求項１記載の半導体装置。
  3. 　前記はみ出し量は、前記はみ出し量をｄ３とするとき、前記パッド開口部の一辺の長さをｄ０、前記一辺と同じ方向となる、前記第一の第二金属膜の前記開口部の一辺の長さをｄ４とすると、
    　ｄ３＝（ｄ０－ｄ４）／２なる関係を満たすことを特徴とする請求項２記載の半導体装置。
  4. 　前記パッド開口部の一辺の長さｄ０および前記第一の第二金属膜の前記開口部の一辺の下に位置する一辺の長さをｄ４、潰れたボールの幅をｒ２、面取り角同士の幅をｒ１とすると、
    　ｄ０＞ｒ２、および、ｄ４＞ｒ１なる関係を満たすことを特徴とする請求項２記載の半導体装置。
  5. 　ボールボンディング時の前記面取り角の下に無く、前記パッド開口部の下のリング形状の前記第一の第二金属膜と接しないよう前記パッド開口部の下に設けられた、断面が矩形または円形の第二の第二金属膜をさらに備えることを特徴とする請求項１記載の半導体装置。
  6. 　ボールボンディング時の前記面取り角の下に無く、前記パッド開口部の下のリング形状の前記第一の第二金属膜と接しないよう前記パッド開口部の下に設けられた、断面が複数の矩形または円形の集合であるドットパターンを有する第二の第二金属膜をさらに備えることを特徴とする請求項１記載の半導体装置。
  7. 　前記矩形または円形の前記第二の第二金属膜は、前記第二ビアによって前記最上層金属膜に電気的に接続されていることを特徴とする請求項５または６記載の半導体装置。
  8. 　前記第一の第二金属膜は、スリットを有することを特徴とする請求項１記載の半導体装置。
  9. 　前記パッド開口部の下に設けられた素子をさらに備えたことを特徴とする請求項１記載の半導体装置。
  10. 　前記素子は、ＥＳＤ保護素子であることを特徴とする請求項９記載の半導体装置。
PCT/JP2013/063999 2012-06-15 2013-05-21 半導体装置 WO2013187187A1 (ja)

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