JP2011055006A - 半導体装置の製造方法 - Google Patents
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Abstract
【解決手段】半導体チップ20には、パワートランジスタが形成されたパワートランジスタ形成領域21、ロジック回路が形成されたロジック回路形成領域22およびアナログ回路が形成されたアナログ回路形成領域23が形成されている。そして、パワートランジスタ形成領域21には、パッド25が形成されており、このパッド25とリード27aとはワイヤ29よりも断面積の大きいクリップ28で接続されている。一方、ボンディングパッド24は、ワイヤ29によって接続されている。
【選択図】図5
Description
ダメージを防止することができる。このため、パワートランジスタが形成されているパワートランジスタ形成領域の真上にパッド25を形成しても、クリップ28で接続する際、ダメージをパワートランジスタに与えることはない。したがって、パワートランジスタ形成領域にパッド25を配置することができる。このため、パワートランジスタ形成領域の外部にパッド25を配置する場合に比べて、半導体チップ20のサイズを縮小化することができる。このように、本実施の形態によれば、パワートランジスタに接続するパッド25とリード27aとをクリップ28で接続する構成をとることにより、パワートランジスタのオン抵抗を低減することができるだけでなく、同時に半導体チップの縮小化も実現することができる。
2 HDD用モータドライバIC
3 スピンドルモータ
4 Rsns
5 VCM
6 パワートランジスタ
7 パワートランジスタ
8 デジタルPWMシステム
9 シリアルI/O
10 コントロールロジック部
11 リトラクトコントロール部
12 ヘッドスピード検知部
13 衝撃検知部
14 3.3Vシリーズレギュレータ
15 スイッチングレギュレータ
16 負電圧生成レギュレータ
17 パワーモニタ
18 パワーオンリセット部
19 ブースタ
20 半導体チップ
21 パワートランジスタ形成領域
22 ロジック回路形成領域
23 アナログ回路形成領域
24 ボンディングパッド
25 パッド
26 リードフレーム
27a リード
27b リード
28 クリップ
29 ワイヤ
Claims (4)
- (a)複数のリードが形成されたリードフレームを準備する工程と、
(b)前記リードフレーム上に表面に複数のボンディングパッドが配置された半導体チップを搭載する工程と、
(c)前記複数のボンディングパッドと前記複数のリードのそれぞれを電気的に接続する工程と、
(d)前記半導体チップと前記複数のリードの一部を封止体により封止する工程と、
(e)前記封止体から露出した前記複数のリードを端子形成する工程と、を有し、
前記半導体チップには、パワートランジスタと前記パワートランジスタを制御する制御用集積回路が形成されており、
前記複数のボンディングパッドは、前記パワートランジスタと電気的に接続された第1ボンディングパッドと、前記制御用集積回路と電気的に接続された第2ボンディングパッドと、を含み、
前記複数のリードは、第1リードと、第2リードと、を含み、
前記(c)工程は、
(c1)前記第1ボンディングパッドと第1外部端子とを、第1導電体により電気的に接続する工程と、
(c2)前記第2ボンディングパッドと第2外部端子とを、前記第1導電体の断面積よりもその断面積が小さい第2導電体により電気的に接続する工程と、を有し、
前記半導体チップは、平面視において、前記制御用集積回路が、前記第1ボンディングパッドと前記第2ボンディングパッドとに重ならないように配置されており、さらに平面視において、前記パワートランジスタが、前記第1ボンディングパッドと重なるように前記第1ボンディングパッド下に配置されていることを特徴とする半導体装置の製造方法。 - 請求項1に記載の半導体装置の製造方法において、
前記第1導電体はクリップであって、前記第2導電体はワイヤであることを特徴とする半導体装置の製造方法。 - 請求項2に記載の半導体装置の製造方法において、
前記クリップと前記第1ボンディングパッドとの接続は、半田もしくは導電性の樹脂ペーストの接続材を熱処理することにより行うことを特徴とする半導体装置の製造方法。 - 請求項3に記載の半導体装置の製造方法において、
前記(c1)工程は、前記(c2)工程よりも先に行うことを特徴とする半導体装置の製造方法。
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JP2010276784A JP5250018B2 (ja) | 2010-12-13 | 2010-12-13 | 半導体装置の製造方法 |
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JP2005235778A Division JP4676277B2 (ja) | 2005-08-16 | 2005-08-16 | 半導体装置 |
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JP5250018B2 JP5250018B2 (ja) | 2013-07-31 |
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Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2013187187A1 (ja) | 2012-06-15 | 2013-12-19 | セイコーインスツル株式会社 | 半導体装置 |
EP2695795A1 (en) | 2011-04-07 | 2014-02-12 | Mitsubishi Electric Corporation | Molded module and electric power steering apparatus |
JP2014087148A (ja) * | 2012-10-23 | 2014-05-12 | Renesas Electronics Corp | 半導体装置 |
JP2014179603A (ja) * | 2013-03-12 | 2014-09-25 | Internatl Rectifier Corp | 制御及びドライバ回路を有するパワー・カッド・フラット・ノーリード(pqfn)パッケージ |
JP2015072942A (ja) * | 2013-10-01 | 2015-04-16 | ローム株式会社 | 半導体装置 |
KR20170120017A (ko) * | 2016-04-20 | 2017-10-30 | 앰코 테크놀로지 인코포레이티드 | 도전성 인터커넥션 프레임 및 구조를 구비한 반도체 패키지 제조 방법 |
Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH08316397A (ja) * | 1995-05-16 | 1996-11-29 | Hitachi Ltd | 半導体装置およびその製造方法 |
JPH09266226A (ja) * | 1996-03-28 | 1997-10-07 | Toshiba Corp | 半導体装置およびその製造方法 |
JP2001274206A (ja) * | 2000-03-23 | 2001-10-05 | Nec Corp | 半導体パッケージ用接続導体、半導体パッケージ、及び半導体パッケージの組立方法 |
JP2002151554A (ja) * | 2000-08-31 | 2002-05-24 | Nec Corp | 半導体装置 |
JP2002314018A (ja) * | 2001-04-18 | 2002-10-25 | Toshiba Corp | 半導体装置および半導体装置の製造方法 |
JP2005026609A (ja) * | 2003-07-02 | 2005-01-27 | Nippon Telegr & Teleph Corp <Ntt> | 集積化電子装置およびその製造方法 |
JP2008053313A (ja) * | 2006-08-22 | 2008-03-06 | Denso Corp | 半導体集積回路装置 |
-
2010
- 2010-12-13 JP JP2010276784A patent/JP5250018B2/ja not_active Expired - Fee Related
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH08316397A (ja) * | 1995-05-16 | 1996-11-29 | Hitachi Ltd | 半導体装置およびその製造方法 |
JPH09266226A (ja) * | 1996-03-28 | 1997-10-07 | Toshiba Corp | 半導体装置およびその製造方法 |
JP2001274206A (ja) * | 2000-03-23 | 2001-10-05 | Nec Corp | 半導体パッケージ用接続導体、半導体パッケージ、及び半導体パッケージの組立方法 |
JP2002151554A (ja) * | 2000-08-31 | 2002-05-24 | Nec Corp | 半導体装置 |
JP2002314018A (ja) * | 2001-04-18 | 2002-10-25 | Toshiba Corp | 半導体装置および半導体装置の製造方法 |
JP2005026609A (ja) * | 2003-07-02 | 2005-01-27 | Nippon Telegr & Teleph Corp <Ntt> | 集積化電子装置およびその製造方法 |
JP2008053313A (ja) * | 2006-08-22 | 2008-03-06 | Denso Corp | 半導体集積回路装置 |
Cited By (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP2695795A1 (en) | 2011-04-07 | 2014-02-12 | Mitsubishi Electric Corporation | Molded module and electric power steering apparatus |
WO2013187187A1 (ja) | 2012-06-15 | 2013-12-19 | セイコーインスツル株式会社 | 半導体装置 |
KR20150020313A (ko) | 2012-06-15 | 2015-02-25 | 세이코 인스트루 가부시키가이샤 | 반도체 장치 |
JP2014087148A (ja) * | 2012-10-23 | 2014-05-12 | Renesas Electronics Corp | 半導体装置 |
US9667147B2 (en) | 2012-10-23 | 2017-05-30 | Renesas Electronics Corporation | Semiconductor device with DC/DC converter circuit |
US10135337B2 (en) | 2012-10-23 | 2018-11-20 | Renesas Electronics Corporation | Semiconductor device |
JP2014179603A (ja) * | 2013-03-12 | 2014-09-25 | Internatl Rectifier Corp | 制御及びドライバ回路を有するパワー・カッド・フラット・ノーリード(pqfn)パッケージ |
JP2015072942A (ja) * | 2013-10-01 | 2015-04-16 | ローム株式会社 | 半導体装置 |
US9831212B2 (en) | 2013-10-01 | 2017-11-28 | Rohm Co., Ltd. | Semiconductor device |
US10109611B2 (en) | 2013-10-01 | 2018-10-23 | Rohm Co., Ltd. | Semiconductor device |
KR20170120017A (ko) * | 2016-04-20 | 2017-10-30 | 앰코 테크놀로지 인코포레이티드 | 도전성 인터커넥션 프레임 및 구조를 구비한 반도체 패키지 제조 방법 |
KR102631810B1 (ko) * | 2016-04-20 | 2024-02-01 | 앰코 테크놀로지 인코포레이티드 | 도전성 인터커넥션 프레임 및 구조를 구비한 반도체 패키지 제조 방법 |
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