WO2013069522A1 - 接続装置、接続構造体の製造方法、チップスタック部品の製造方法及び電子部品の実装方法 - Google Patents
接続装置、接続構造体の製造方法、チップスタック部品の製造方法及び電子部品の実装方法 Download PDFInfo
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- WO2013069522A1 WO2013069522A1 PCT/JP2012/078237 JP2012078237W WO2013069522A1 WO 2013069522 A1 WO2013069522 A1 WO 2013069522A1 JP 2012078237 W JP2012078237 W JP 2012078237W WO 2013069522 A1 WO2013069522 A1 WO 2013069522A1
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Abstract
Description
本出願は、日本国において2011年11月7日に出願された日本特許出願番号特願2011-243528を基礎として優先権を主張するものであり、この出願は参照されることにより、本出願に援用される。
本発明が適用された接続装置1は、表面実装部品2を配線基板3上に実装した接続構造体4、あるいは接着剤を介してチップ基板11を積層したチップ積層体12の各チップ基板11を電気的、機械的に接続したチップスタック部品10を製造するために用いられるものである。表面実装部品2としては、例えばICやLSI等のパッケージ部品、抵抗やコンデンサ等のチップ部品、あるいは半導体チップ等のチップ基板11を三次元的に配置し、半導体チップに設けた小さな孔に金属を充填することによって、サンドイッチ状に積み重ねた複数のチップ基板を電気的に接続するTSV(Through Silicon Via)技術等を用いたチップスタック部品10などがある。本願では、配線基板3に搭載される表面実装部品2及びチップ積層体12を合わせて電子部品と称する。
第1の弾性体8は、加熱押圧ヘッド7の熱加圧面と表面実装部品2やチップ積層体12の上面との間に介在されることにより、表面実装部品2やチップ積層体12の中央部と外周部との圧力差、あるいはバンプが形成された領域と形成されていない領域との圧力差を吸収し、表面実装部品2やチップ積層体12に対して均一な熱加圧を行うものである。
第2の弾性体9は、表面実装部品2やチップ積層体12の周囲に配置されるとともに、第1の弾性体8を支持する支持部材となるものであり、加熱押圧ヘッド7によって熱加圧された第1の弾性体8の圧力が、表面実装部品2やチップ積層体12の外周部に集中することを防止するものである。
接続装置1は、第2の弾性体9の硬度を第1の弾性体8の硬度以上とすることが好ましい。これにより、第2の弾性体9によって第1の弾性体8を確実に支持し、第1の弾性体8によるチップ積層体12の外周部への圧力集中を効果的に防止することができる。一方、第2の弾性体9の硬度が第1の弾性体8の硬度に満たない場合、第2の弾性体9が第1の弾性体8に押圧されてしまい、第1の弾性体8による表面実装部品2やチップ積層体12の外周部への圧力集中を防止することができない。
次いで、加熱押圧ヘッド7によって熱加圧されることにより、表面実装部品2を配線基板3上に接続し、あるいはチップ基板11間を接続する接着剤6について説明する。接着剤6は、例えば図2に示すように、膜形成樹脂、熱硬化性樹脂、潜在性硬化剤、シランカップリング剤等を含有する通常のバインダ(接着剤)23からなり、フィルム状又はペースト状に形成されたものである。以下、フィルム状に成形された絶縁性接着フィルム17(NCF(Non Conductive Film))を例に説明する。
次いで、接続装置1を用いて表面実装部品2を配線基板3に接続した接続構造体4を製造する工程について説明する。本実施の形態では、表面実装部品2としてチップスタック部品10を用いる場合について説明する。
次に、接続装置1を用いてチップスタック部品10を製造する工程について説明する。先ず、接続装置1による熱加圧工程の前工程として、複数のチップ基板11を、互いのバンプ11a同士が接触しうるように位置合わせされて、絶縁性接着フィルム17を介して積層されたチップ積層体12を形成する。
また、図6に示すように、接続装置1は、第2の弾性体9を表面実装部品2やチップ積層体12の数に応じて格子状に形成することにより複数の電子部品を同時に熱加圧するようにしてもよい。格子状に形成された第2の弾性体9の分割領域内には表面実装部品2やチップ積層体12が配置される。表面実装部品2やチップ積層体12を上面から押圧する第1の弾性体8は、格子状に形成された第2の弾性体9の各格子上を覆うと共に、第2の弾性体9によって外周部を含む全面が格子状に支持される。第2の弾性体9によって構成される格子形状は、1行複数列、複数行複数列のいずれでもよい。
Claims (17)
- 熱硬化性の接着剤層と積層された電子部品が載置される載置部と、
上記電子部品を加熱押圧する加熱押圧ヘッドと、
上記電子部品と上記加熱押圧ヘッドの押圧面との間に配置され、上記電子部品の上面を押圧する第1の弾性体と、
上記電子部品の周囲に配置されるとともに、上記第1の弾性体を支持する支持部材とを有する接続装置。 - 上記支持部材は、上記第1の弾性体の硬度以上の硬度を有する第2の弾性体である請求項1記載の接続装置。
- 上記第1の弾性体と上記第2の弾性体の硬度は、JIS K 6253に規定されるタイプAデュロメーターによる測定で、20~60の範囲にある請求項2記載の接続装置。
- 上記支持部材を格子状に設けることによって、上記電子部品が載置される複数の領域が形成されている請求項1記載の接続装置。
- 載置部に電子部品が実装される基板を載置する工程と、
上記載置部に載置された基板に、熱硬化性の接着剤を介して電子部品を搭載する工程と、
上記電子部品の上面側に第1の弾性体を配置するとともに、上記電子部品の周囲に上記第1の弾性体を支持する支持部材を配置し、上記第1の弾性体を介して加熱押圧ヘッドによって上記電子部品を熱加圧し上記基板に実装する工程とを有する接続構造体の製造方法。 - 上記支持部材は、上記第1の弾性体の硬度以上の硬度を有する第2の弾性体である請求項5記載の接続構造体の製造方法。
- 上記第1の弾性体と上記第2の弾性体の硬度は、JIS K 6253に規定されるタイプAデュロメーターによる測定で、20~60の範囲にある請求項6記載の接続構造体の製造方法。
- 上記電子部品は、チップ基板が複数積層され、各チップ基板が電気的、機械的に接続されたチップスタック部品である請求項7記載の接続構造体の製造方法。
- 上記電子部品は、熱硬化性の接着剤を介して複数のチップ基板が積層されたチップ積層体である請求項7記載の接続構造体の製造方法。
- 上記支持部材によって、上記電子部品が載置される複数の領域に分割され、複数の上記電子部品を同時に実装する請求項5記載の接続構造体の製造方法。
- チップ基板が複数積層され、各チップ基板が電気的、機械的に接続されたチップスタック部品の製造方法において、
チップ基板の一面に設けられたバンプを熱硬化性の接着剤を介して隣接するチップ基板の他面に設けられた電極上に載置することにより、複数のチップ基板が積層されたチップ積層体を形成する工程と、
上記チップ積層体の上面側に第1の弾性体を配置するとともに、上記チップ積層体の周囲に上記第1の弾性体を支持する支持部材を配置し、上記第1の弾性体を介して加熱押圧ヘッドによって上記チップ積層体を熱加圧する工程とを有するチップスタック部品の製造方法。 - 上記支持部材は、上記第1の弾性体の硬度以上の硬度を有する第2の弾性体である請求項11記載のチップスタック部品の製造方法。
- 上記第1の弾性体と上記第2の弾性体の硬度は、JIS K 6253に規定されるタイプAデュロメーターによる測定で、20~60の範囲にある請求項12記載のチップスタック部品の製造方法。
- 上記チップ積層体は、少なくとも1層は厚さ100μm以下のチップ基板を含む請求項13記載のチップスタック部品の製造方法。
- 上記支持部材によって、上記電子部品が載置される複数の領域に分割され、複数の上記チップスタック部品を同時に製造する請求項11記載のチップスタック部品の製造方法。
- 基板又はウェハ上に熱硬化性の接着剤を介して上記チップ積層体を載置し、一括して熱加圧する請求項11記載のチップスタック部品の製造方法。
- 載置部に電子部品が実装される基板を載置する工程と、
上記載置部に載置された基板に、熱硬化性の接着剤を介して電子部品を搭載する工程と、
上記電子部品の上面側に第1の弾性体を配置するとともに、上記電子部品の周囲に上記第1の弾性体を支持する支持部材を配置し、上記第1の弾性体を介して加熱押圧ヘッドによって上記電子部品を熱加圧する工程とを有する電子部品の実装方法。
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CN201280054633.XA CN104025273B (zh) | 2011-11-07 | 2012-10-31 | 连接装置、连接构造体的制造方法、芯片堆叠部件的制造方法及电子部件的安装方法 |
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KR101681024B1 (ko) * | 2015-10-29 | 2016-12-01 | 한국기계연구원 | 웨이퍼 본딩 장치 |
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US11152328B2 (en) * | 2018-12-13 | 2021-10-19 | eLux, Inc. | System and method for uniform pressure gang bonding |
US11004828B2 (en) * | 2019-08-28 | 2021-05-11 | Micron Technology, Inc. | Methods and apparatus for integrated gang bonding and encapsulation of stacked microelectronic devices |
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