WO2013065895A1 - Procédé de fabrication d'un boîtier semi-conducteur de sortie à l'aide d'une grille de connexion et boîtier de semi-conducteur et boîtier sur boîtier pour ce dernier - Google Patents

Procédé de fabrication d'un boîtier semi-conducteur de sortie à l'aide d'une grille de connexion et boîtier de semi-conducteur et boîtier sur boîtier pour ce dernier Download PDF

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WO2013065895A1
WO2013065895A1 PCT/KR2011/009049 KR2011009049W WO2013065895A1 WO 2013065895 A1 WO2013065895 A1 WO 2013065895A1 KR 2011009049 W KR2011009049 W KR 2011009049W WO 2013065895 A1 WO2013065895 A1 WO 2013065895A1
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lead frame
package
semiconductor chip
semiconductor
lead
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PCT/KR2011/009049
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English (en)
Korean (ko)
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헤안 소흐세이
지엔 시에우유엔
권용태
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주식회사 네패스
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Publication of WO2013065895A1 publication Critical patent/WO2013065895A1/fr

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    • H01L24/96—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being encapsulated in a common layer, e.g. neo-wafer or pseudo-wafer, said common layer being separable into individual assemblies after connecting
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    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
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Definitions

  • the present invention relates to a method for manufacturing a fan-out semiconductor package using a leadframe, and to a semiconductor package and a package-on-package according to the present invention, and more particularly to a circuit pattern or via for achieving fan-out of the leadframe. via)
  • Semiconductor devices have been continuously reduced in size by reducing line widths and simplifying the design of circuits included therein.
  • continuous research and development has been conducted to include more functional electronic circuits in one semiconductor device. Accordingly, the size of the semiconductor chip has been gradually reduced, and the size and spacing of the bond pad, which is an external connection terminal included in the semiconductor chip, have evolved to a more compact fine-pitch type.
  • a fan-out structure means that a redistribution pattern connected to a bond pad is extended and relocated wider than the size of the semiconductor chip.
  • a fan-in structure is a semiconductor chip. The bond pad is relocated within the size limit of.
  • Korean Patent Publication No. 2011-0077213 discloses a semiconductor package of a fan-out type. However, this technique has a disadvantage in that there is a limit in simplifying the manufacturing process.
  • the present invention reduces the number of layers in which the redistribution metal pattern is formed by using a lead frame, and uses a signal lead of the lead frame as a planar or vertical connection passage, thereby simplifying the process of manufacturing a semiconductor package and reducing manufacturing cost.
  • Another object of the present invention is to provide a fan-out semiconductor package manufacturing method using a lead frame, which can further improve product performance.
  • the present invention reduces the number of layers in which the redistribution metal pattern is formed by using a lead frame, and uses a signal lead of the lead frame as a planar or vertical connection passage, thereby simplifying the process of manufacturing a semiconductor package and reducing manufacturing cost. It is another object of the present invention to provide a fan-out semiconductor package using a lead frame that can further improve product performance.
  • the present invention reduces the number of layers in which the redistribution metal pattern is formed by using a lead frame, and uses a signal lead of the lead frame as a planar or vertical connection passage, thereby simplifying the process of manufacturing a semiconductor package and reducing manufacturing cost.
  • Another aim is to provide a package-on-package (POP) using leadframe to further improve product performance.
  • POP package-on-package
  • a lead frame in a strip state having an opening in which a semiconductor chip can be seated at a center thereof and having a plurality of signal leads in a periphery thereof, and attaching the lead frame to a first base and Mounting a semiconductor chip on the first base through an opening of the semiconductor chip; sealing the semiconductor chip and the lead frame on the first base with an encapsulant and removing the first base; Forming an insulating film thereon and patterning the lead of the encapsulant and the bond pads of the semiconductor chip; forming a redistribution metal pattern connecting the exposed signal leads and the bond pads; Forming a redistribution metal pad exposing a portion of the redistribution metal pattern, and conducting conductive lead to the exposed redistribution metal pad
  • a method of manufacturing a fan-out semiconductor package using a lead frame includes attaching a terminal and performing a singulation process of separating a unit semiconductor package from the lead frame strip and separating individual signal lines. .
  • the lead frame of the strip state is provided with an opening in which the semiconductor chip can be seated in the center and a plurality of signal leads in the periphery
  • the projection lead is provided with a protrusion by half etching Preparing a lead, attaching the lead frame to the first base, mounting the semiconductor chip on the first base through the opening of the lead frame, and only the protrusion of the lead frame and the bottom surface of the semiconductor chip.
  • exposing the signal lead of the lead frame and the bond pad of the semiconductor chip to the outside by performing a molding process of exposing the substrate, removing the first base, and forming an insulating layer pattern on the entire opposite surface on which the protrusion is formed.
  • a method of manufacturing a fan-out semiconductor package using a lead frame includes attaching a terminal and performing a singulation process of separating a unit semiconductor package from the lead frame strip and separating individual signal lines. do.
  • the present invention provides a step of preparing a lead frame in a strip state having an opening in which a semiconductor chip can be seated in the center and a signal lead in the form of a protrusion by half etching; Attaching the lead frame to a first base, mounting a semiconductor chip on the first base through an opening of the lead frame, forming an encapsulant that completely seals the semiconductor chip and the lead frame; Polishing the half-etched portion of the encapsulant and the leadframe to separate and expose the signal leads, and to remove the first base; and to form an insulating film pattern on the entire surface of the resultant in which the first base is removed.
  • Exposing the signal leads and bond pads of the semiconductor chip Forming a lower metal pattern connecting the pads, forming an insulating layer pattern on the entire surface of the resultant product on which the lower metal pattern is formed, and forming a lower metal pad connected to the lower metal pattern and exposed to the outside by the insulating layer pattern; And attaching a conductive connection terminal on the lower metal pad, and performing a singulation process of separating a unit semiconductor package from the leadframe strip and separating individual signal lines.
  • a method of manufacturing an out-of- semiconductor package is provided.
  • the present invention a semiconductor chip, an encapsulant surrounding the bottom and the outer surface of the semiconductor chip, a plurality of signal leads of a lead frame material located inside the encapsulant, and A lead frame including a redistribution metal pattern connecting a bond pad and a plurality of signal leads of the lead frame material, a redistribution metal pad connected to the redistribution metal pattern, and a conductive connection terminal attached to the redistribution metal pad It provides a fan-out semiconductor package using.
  • the present invention the encapsulation material surrounding the semiconductor chip, the outer edge of the semiconductor chip, having the same height as the semiconductor chip, and located inside the encapsulation material in the vertical direction
  • a plurality of signal leads made of a lead frame material having a penetrating shape, a redistribution metal pattern connecting the bond pads of the semiconductor chip and the signal leads, a redistribution metal pad connected to the redistribution metal pattern, and the redistribution metal
  • the present invention a semiconductor chip, encapsulating the outer edge of the semiconductor chip, the encapsulant having the same height as the semiconductor chip, included in the encapsulant and penetrating the encapsulant in the vertical direction
  • a first semiconductor package having a conductive connection terminal, a sealing material mounted on the first semiconductor package through a conductive connection terminal, surrounding the semiconductor chip and the outer edge of the semiconductor chip, and having the same height as the semiconductor chip, the encapsulation member
  • a second semiconductor package including a redistribution metal pattern connecting the signal lead, a redistribution
  • the signal lead of the leadframe can simplify a complicated circuit design or be used as a vertical connection terminal.
  • This structure is advantageous for signal connection in a package on package (POP), in which two semiconductor packages are stacked vertically.
  • FIG. 1 is a flowchart illustrating a method of manufacturing a fan-out semiconductor package using a lead frame according to a first embodiment of the present invention.
  • FIGS. 2 and 3 are a plan view and a cross-sectional view for explaining the lead frame used in the first embodiment of the present invention.
  • FIGS. 4 through 9 are cross-sectional views illustrating a method of manufacturing a fan-out semiconductor package using a lead frame according to a first embodiment of the present invention.
  • FIG. 10 is a flowchart illustrating a method of manufacturing a fan-out semiconductor package using a lead frame according to a second embodiment of the present invention.
  • 11 and 12 are a plan view and a cross-sectional view for explaining a lead frame used in a second embodiment of the present invention.
  • 13 to 18 are cross-sectional views illustrating a method of manufacturing a fan-out semiconductor package using a lead frame according to a second embodiment of the present invention.
  • 19 is a flowchart illustrating a method of manufacturing a fan-out semiconductor package using a lead frame according to a third embodiment of the present invention.
  • 20 and 21 are a plan view and a cross-sectional view for explaining a lead frame used in a third embodiment of the present invention.
  • 22 to 27 are cross-sectional views illustrating a method of manufacturing a fan-out semiconductor package using a lead frame according to a third embodiment of the present invention.
  • 28 and 29 are cross-sectional views illustrating modified examples of FIGS. 22 and 23.
  • FIG. 1 is a flowchart illustrating a method of manufacturing a fan-out semiconductor package using a lead frame according to a first embodiment of the present invention.
  • a lead frame as shown in FIGS. 2 and 3, in which an opening in which a semiconductor chip is mounted is prepared (S100).
  • the leadframe may be an etched leadframe or a stamped leadframe.
  • the present invention is not limited thereto, and a general conductive plate (eg, a metal plate) having a conductive structure as the lead frame may be applied without limitation, and a method of manufacturing the lead frame may be variously selected.
  • the lead frame is attached on the first base (S102).
  • the semiconductor chip is attached to the first base through the opening of the lead frame as shown in FIG. 4 (S104).
  • a molding process is performed to form an encapsulant that seals the lead frame and the semiconductor chip on the first base as shown in FIG. 5 (S106), and illustrates a first base used to form an encapsulant.
  • the resultant from which the first base has been removed is inverted and a second base (118 of FIG. 7) is optionally attached to the lower part of the resultant if necessary.
  • an insulating film is formed and patterned on the resultant to form an insulating film pattern to expose the bond pad of the semiconductor chip and the signal lead of the lead frame to the outside (S110).
  • the redistribution metal pattern is formed to connect the bond pad and the signal lead as shown in FIG. 8 (S112).
  • the insulating layer pattern is formed again to expose the redistribution metal pad exposing a part of the redistribution metal pattern (S114). Thereafter, a conductive connection terminal is attached to the exposed redistribution metal pad as shown in FIG. 8 (S116).
  • the conductive connection terminal may be solder balls or solder bumps.
  • a singulation process for separating the unit semiconductor package from the lead frame in a strip state is performed as shown in FIG. 9 (S118) to manufacture a fan-out semiconductor package using the lead frame according to the first embodiment of the present invention.
  • S118 a singulation process for separating the unit semiconductor package from the lead frame in a strip state is performed as shown in FIG. 9 (S118) to manufacture a fan-out semiconductor package using the lead frame according to the first embodiment of the present invention.
  • C1 of FIG. 2 indicates a portion of the lead frame in which signal terminals respectively separated remain inside the semiconductor package.
  • FIG. 2 and 3 are a plan view and a cross-sectional view for explaining the lead frame used in the first embodiment of the present invention.
  • Figure 3 indicates the cut surface of 3-3 'of FIG.
  • the lead frame 100 used in the first embodiment of the present invention is preferably in the form of a strip in which at least two or more lead frames are arranged in a long band shape as shown in FIG. 2.
  • the strip frame lead frame 100 may have a strip shape in which a plurality of unit lead frames for forming one semiconductor package are arranged in a matrix form.
  • the lead frame 100 has a dam line 106 for supporting the respective signal leads 102 on the outside thereof, and a plurality of signal leads 102 connected to the dam line 106 are formed. have. Meanwhile, the shape of the signal lead 102 shown in FIG. 2 is an example for describing the present invention and may be modified in various shapes for effective connection with the semiconductor chip.
  • the lead frame 100 is characterized in that the opening 104, which is a space in which the semiconductor chip can be mounted inside the signal lead 102, is provided.
  • a typical lead frame has a chip mounting portion formed in the center thereof, and thus there is no opening.
  • the lead frame 100 according to the present invention is characterized by an opening having an empty place.
  • This structure is a semiconductor package having a fan-out structure. It can be confirmed through the subsequent process that it is useful in the process of making.
  • FIGS. 4 through 9 are cross-sectional views illustrating a method of manufacturing a fan-out semiconductor package using a lead frame according to a first embodiment of the present invention.
  • the lead frame 100 of FIGS. 2 and 3 is attached onto the first base 112 by using an adhesive material.
  • the first base 112 may be used as long as it is a material of a solid type material. For example, a mold molding or a polyimide tape may be used.
  • the semiconductor chip 108 is mounted on the first base 112 using an adhesive material through the opening of the lead frame (104 in FIG. 3).
  • the semiconductor chip 108 is preferably mounted so that the active region A in which the circuit portion is formed is directed downward, and the bottom surface B in which the circuit portion is not formed is mounted upward. Therefore, the bond pad 110 provided in the active region A in which the circuit unit is formed is in contact with the first base 112.
  • a molding process is performed on the resultant product on which the semiconductor chip 108 is mounted.
  • the encapsulant 114 is sealed to sufficiently cover the semiconductor chip 108 and the signal lead 102 of the lead frame.
  • the encapsulant 114 may be a high molecular compound such as an epoxy mold compound.
  • the first base 112 used for fixing the semiconductor chip 108 and the signal lead 102 is removed and removed to form the panel 116.
  • the bond pad 110 and the signal lead 102 of the semiconductor chip 108 are exposed to the position where the first base 112 is removed from the panel 116.
  • the second base 118 is selectively attached to the direction in which the bottom surface of the semiconductor chip 108 is positioned by inverting the result of removing the first base, as shown in FIG. 7.
  • the second base 118 may also be used as long as it is a material of a solid type material. For example, a mold molding or a polyimide tape may be used.
  • an insulating film 124 is formed on the entire surface of the exposed bond pad 110 and the signal lead 102, and then patterned to form the bond pad 110 and the signal lead 102. Expose to the outside.
  • a redistribution metal pattern 122 connecting the bond pad 110 and the signal lead 102 is formed on the exposed insulating pad 110 and the insulating film 124 having the signal lead 102.
  • the redistribution metal pattern 122 extends the array of bond pads 110 formed in the semiconductor chip 108 together with the signal leads 102 to the signal leads 102 formed outside the semiconductor chip 108. It is a means for implementing the out semiconductor package.
  • an insulating film 124 is formed on the resultant product on which the redistribution metal pattern 122 is formed and patterned to form a redistribution metal pad exposing a part of the redistribution metal pattern 122.
  • the redistribution metal pad may be formed on the metal layer pattern of the single layer structure connected to the bond pad as shown in FIG. 8, or may be formed on the metal layer pattern formed on the two layer structure as illustrated in FIG. 9.
  • a conductive connection terminal 126 for example, a solder ball or a solder bump is attached to the exposed redistribution metal pad.
  • each leadframe is separated along the cutout 128 using a diamond blade or the like to perform a singulation process of separating the unit semiconductor package from the leadframe strip.
  • the singulation process removes all the outer portions including the damper line (106 in FIG. 2) of the lead frame and leaves only the signal leads 102 separated from each other as shown in C1 of FIG. 2.
  • This signal lead (102 in FIG. 2) functions to expand the circuit wiring planarly or vertically in the semiconductor package of the fan-out structure, thereby reducing the number of layers of the redistribution metal pattern and simplifying the design of the circuit wiring. It can be a means.
  • the singulation process may be performed using a punch instead of cutting using the blade, or may be performed using a laser (LASER).
  • a fan-out semiconductor package using a lead frame includes a semiconductor chip (108 in FIG. 7), an encapsulant (114 in FIG. 8) surrounding the underside and the outside of the semiconductor chip, and the semiconductor.
  • the signal lead (102 in FIG. 7) of the lead frame material is disposed horizontally or vertically in the encapsulant around the semiconductor chip, thereby minimizing the number of layers forming the redistribution metal pattern, and a complicated circuit. It simplifies the design and improves the electrical performance of the semiconductor package.
  • the present invention is not limited thereto, and three or more semiconductor chips 108 may be attached thereto. At this time, a matrix arrangement of the semiconductor chips 108 is possible in the horizontal-vertical direction.
  • FIG. 10 is a flowchart illustrating a method of manufacturing a fan-out semiconductor package using a lead frame according to a second embodiment of the present invention.
  • a lead frame as shown in FIGS. 11 and 12 having an opening on which a semiconductor chip is mounted is prepared (S200).
  • the lead frame is preferably an etched leadframe in which protrusions formed by half etching are formed.
  • the lead frame is attached on the first base (S202).
  • the semiconductor chip is attached to the first base through the opening of the lead frame as shown in FIG. 13 (S204).
  • a molding process is performed to form an encapsulant sealing the lead frame and the semiconductor chip on the first base (S206), and the protrusion of the lead frame is polished with a polishing stopper.
  • the protrusion of the signal lead is exposed to the outside as shown in FIG.
  • An upper metal pad for example, a vertically connected metal pad is formed on the exposed signal of the lead frame as shown in FIG. 15 (S210).
  • the first base used for forming the encapsulant is removed (S212).
  • an insulating film pattern is formed on the entire opposite surface on which the protrusion is formed, thereby exposing the signal lead of the lead frame and the bond pad of the semiconductor chip to the outside (S214).
  • the signal lead of the lead frame and the bond pad of the semiconductor chip may be connected to each other using a lower metal pattern, for example, a redistribution metal pattern, and an insulating layer pattern may be formed on the entire surface of the resultant product on which the lower metal pattern is formed, and then connected to the lower metal pattern.
  • a lower metal pad exposed to the outside by the insulating film pattern is formed as shown in FIG. 16 (S218).
  • a conductive connection terminal is attached to the exposed redistribution metal pad as shown in FIG. 16 (S220).
  • the conductive connection terminal may be solder balls or solder bumps.
  • a singulation process is performed to separate the unit semiconductor package from the lead frame in a strip state (S222).
  • two semiconductor packages are vertically mounted using conductive connection terminals and an upper metal pad.
  • POP package on package
  • C2 of FIG. 11 indicates a portion of the lead frame in which signal terminals respectively separated remain inside the semiconductor package.
  • FIG. 11 and 12 are a plan view and a cross-sectional view for explaining a lead frame used in a second embodiment of the present invention.
  • FIG. 12 refers to the cut plane of 12-12 'of FIG.
  • a damper line 206 for supporting each signal lead 202 is formed at an outer side thereof.
  • a plurality of signal leads 202 connected to the damper line 206 are configured.
  • the signal lead 202 includes a half-etched portion (203 in FIG. 12) and a protrusion (201 in FIG. 12) that is protruded because it is not half-etched by etching only a part of the lead frame.
  • the shape of the signal lead 202 shown in FIG. 11 is an example for describing the present invention, and may be modified in various shapes for connection with a semiconductor chip.
  • the lead frame 200 is characterized in that the opening 204 is provided, which is a space in which the semiconductor chip can be mounted inside the signal lead 202.
  • the structure of the opening 204 may be usefully applied in the process of making a fan-out semiconductor package through a subsequent process.
  • the strip frame leadframe 200 may be a strip in which a plurality of unit leadframes for forming one semiconductor package are arranged in a matrix form.
  • 13 to 18 are cross-sectional views illustrating a method of manufacturing a fan-out semiconductor package using a lead frame according to a second embodiment of the present invention.
  • the leadframe 200 illustrated in FIGS. 11 and 12 is attached onto the first base 212 using an adhesive material.
  • the lead frame 200 is preferably attached so that the protrusion (201 of FIG. 12) is upward in the signal lead 202 of the lead frame.
  • the first base 212 may be used as long as it is a material of a solid type material. For example, a mold molding or a polyimide tape may be used.
  • the semiconductor chip 208 is mounted on the first base 212 using an adhesive material through the opening of the lead frame (204 of FIG. 12).
  • the semiconductor chip 208 is preferably mounted so that the active region in which the circuit portion is formed faces downward, and is mounted so that the bottom surface where the circuit portion is not formed faces upward. Therefore, the bond pad 210 formed in the active region where the circuit portion is formed is in contact with the first base 212.
  • the molding process is performed on the resultant product on which the semiconductor chip 208 is mounted.
  • the encapsulant 213 is used to completely seal the semiconductor chip 208 and the signal lead 202 of the lead frame as shown in FIG. 13.
  • the encapsulant 213 may be made of a polymer compound such as an epoxy mold compound.
  • the protrusion 201 of the lead frame is polished to an upper portion of the encapsulant 213 by using a polishing stopper to expose the protrusion 201 of the signal lead to the surface of the encapsulant 213. Be sure to
  • the insulating film 214 is coated as shown in FIG. 15, and then patterned to expose the protrusion 201 of the signal lead, and then a metal film is formed on the insulating film 214 in a blanket manner. Patterning to form the upper metal pad 216 is electrically connected to the protrusion 201 of the signal lead.
  • the upper metal pad 216 may serve as a vertical connection passage in a process of stacking a fan-out semiconductor package in a vertical direction to create a package on package (POP).
  • POP package on package
  • the first base 212 used for fixing the semiconductor chip 208 and the signal lead 202 is removed and removed.
  • a single or multiple layers of upper metal patterns may be further formed.
  • an insulating film 218 is formed on the entire surface of the bond pad 210 and the signal lead 202 exposed to the surface from which the first base 212 is removed, and then patterned to form the insulating pad 210. And signal lead 202 are exposed to the outside.
  • the lower metal pattern 220 connecting the bond pad 210 and the signal lead 202 to the insulating layer 218 including the exposed bond pad 210 and the signal lead 202 may be formed.
  • the lower metal pattern 220 is formed of a single layer, but the present invention is not limited thereto, and may be formed of a plurality of layers.
  • the redistribution metal pattern 220 extends the arrangement of the bond pads 210 formed on the semiconductor chip to the signal lead 202 formed on the outside of the semiconductor chip 208, thereby becoming a main means for making a fan-out semiconductor package.
  • an insulating film 218 pattern is formed on the entire surface of the resultant product on which the lower metal pattern 220 is formed, and a lower metal pad 222 connected to the lower metal pattern 220 and exposed to the outside by the insulating film 218 pattern is formed. do.
  • the insulating layer 218 may be a thin film having a multilayer structure made of the same material or different materials.
  • a conductive connection terminal 226, for example, a solder ball or a solder bump is attached to the lower metal pad 222. If the conductive connection terminal 226 is solder ball or solder bump, an under bump metal (UBM) may be further formed between the conductive connection terminal 226 and the lower metal pad 222. In addition, UBM may be further formed on the upper metal pad 216.
  • UBM under bump metal
  • each lead frame is cut (224) using a diamond blade or the like to perform a singulation process of separating the unit semiconductor package from the lead frame strip.
  • the singulation process all the outer portions including some of the damper lines (206 in FIG. 11) of the lead frame are removed, and only the signal leads 202 are separated from each other as shown in C2 of FIG. 11.
  • the signal lead 202 of FIG. 11 may reduce the number of layers of the redistribution metal pattern in the semiconductor package having a fan out structure, and may have a half-etched staircase structure to simplify the circuit design.
  • the singulation process may be performed using a punch (cut) instead of the blade, or may be performed using a laser (LASER).
  • FIG. 17 is a cross-sectional view of a fan-out semiconductor package using a lead frame according to a second embodiment of the present invention, which is manufactured by the singulation process.
  • a fan-out semiconductor package 230A using a lead frame may include a semiconductor chip 208 of FIG. 14 and an outer surface of the semiconductor chip.
  • the signal lead 202 serves to reduce the number of layers of a metal layer, for example, a redistribution metal pattern used to manufacture a fan-out semiconductor package, between the bond pad of the semiconductor chip and the conductive connection terminal, which is an external connection terminal. This has the advantage of simplifying the circuit design in its path.
  • the half-etched signal lead 202 is a vertical connection penetrating the top and bottom of the semiconductor package without forming a separate via hole or via contact inside the encapsulant 213A. Can be used as a terminal. This structure is advantageous for signal connection in a package on package (POP), in which two semiconductor packages are stacked vertically.
  • POP package on package
  • a package on package is manufactured by stacking first and second semiconductor packages 230B and 230A using the lead frame shown in FIG. 17 up and down.
  • the upper metal pad 216 may not be formed on the signal lead of the first semiconductor package 230B as shown in part D of the drawing.
  • the second semiconductor package 230A and the first semiconductor package 230B are physically and electrically connected to each other by the conductive connection terminal 226A of the second semiconductor package 230A.
  • first semiconductor package 230B and the second semiconductor package 230A have substantially the same structure, the present invention is not limited thereto and may have different sizes and functions.
  • a passive element 228 such as a resistor or a capacitor may be additionally attached to improve the function of the package on package.
  • 19 is a flowchart illustrating a method of manufacturing a fan-out semiconductor package using a lead frame according to a third embodiment of the present invention.
  • a lead frame as shown in FIGS. 20 and 21, in which an opening and a half etching part on which a semiconductor chip is mounted, is prepared (S300).
  • the lead frame is preferably an etched leadframe in which protrusions formed by half etching are formed.
  • the lead frame is attached on the first base (S302).
  • the protruding portion downward as shown in FIG. 22.
  • the semiconductor chip is attached together on the first base through the opening of the lead frame (S304). At this time, it is suitable to attach the bond pad of the semiconductor chip to face downward.
  • a molding process may be performed to form an encapsulant that completely seals the lead frame and the upper portion of the semiconductor chip on the first base (S306), and the upper encapsulant and the leadframe half etching part (FIG. 21). 303) is removed completely. Accordingly, the signal lead (302 of FIG. 21) consisting of the half-etching portion (303 in FIG. 21) and the protrusion is separated, and only the protrusion 302 is exposed to the outside of the encapsulant as shown in FIG. 23 (S308). An upper metal pad, for example, a vertically connected metal pad, is formed on the exposed lead frame signal lead as illustrated in FIG. 24 (S310). Thereafter, the first base used for forming the encapsulant is removed (S312).
  • an insulating film is formed on the entire opposite surface on which the upper metal pad is formed and patterned to expose the signal lead of the lead frame and the bond pad of the semiconductor chip to the outside (S314).
  • the signal lead of the lead frame and the bond pad of the semiconductor chip are connected to a lower metal pattern, for example, a redistribution metal pattern (S316), an insulating film pattern is formed on the entire surface of the resultant product on which the lower metal pattern is formed, and connected to the lower metal pattern.
  • a lower metal pad exposed to the outside by the insulating film pattern is formed as shown in FIG. 25 (S318).
  • the conductive connection terminal is attached to the exposed redistribution metal pad as shown in FIG. 26 (S320).
  • the conductive connection terminal may be solder balls or solder bumps.
  • a singulation process for separating the unit semiconductor package from the lead frame in a strip state is performed (S322), and two semiconductor packages are vertically mounted using conductive connection terminals as shown in FIG. 27.
  • a process of manufacturing a fan-out semiconductor package, for example, a package on package (POP) using the lead frame according to the third embodiment is completed (S324).
  • the protrusion 301 indicates a portion of the lead frame in which signal terminals separated from each other remain in the semiconductor package.
  • FIG. 20 and 21 are a plan view and a cross-sectional view for explaining a lead frame used in a third embodiment of the present invention.
  • FIG. 21 illustrates a cut plane of 21-21 'of FIG. 20.
  • the lead frame 300 used in the third embodiment of the present invention does not include a damper line like the lead frames described above, and has a half-etched flat half-etched portion ( Only the protrusion 302 to be used as the signal lead in 303 is formed in a rectangle.
  • the shape of the signal lead, that is, the protrusion 302 may be modified in various shapes.
  • the lead frame 300 is characterized in that the opening 304, which is a space in which the semiconductor chip can be mounted, is provided in the center.
  • the structure of the opening 304 may be usefully applied in the process of making a semiconductor package having a fan-out structure through a subsequent process.
  • the strip frame lead frame 300 may be a strip in which a plurality of unit lead frames for forming one semiconductor package are arranged in a matrix form.
  • 22 to 27 are cross-sectional views illustrating a method of manufacturing a fan-out semiconductor package using a lead frame according to a third embodiment of the present invention.
  • the lead frame 300 illustrated in FIGS. 20 and 21 is attached onto the first base 312 by using an adhesive material. At this time, it is suitable to attach the lead frame 300 so that the protrusion 302 of FIG. 22 faces downward in the lead frame.
  • the first base 312 can be used as long as the material of the solid (rigid type) material, for example, may be a molded molding or a polyimide tape.
  • the semiconductor chip 308 is mounted on the first base 312 using an adhesive material through the opening of the lead frame (304 in FIG. 21).
  • the semiconductor chip 308 is suitable to be mounted so that the active region in which the circuit portion is formed to face downward, it is suitable to be mounted so that the bottom surface without the circuit portion is formed to face upward. Therefore, the bond pad 310 formed in the active region where the circuit portion is formed is in contact with the first base 312.
  • the molding process is performed on the resultant product on which the semiconductor chip 308 is mounted.
  • the encapsulant 314 is used to completely seal the upper portion of the semiconductor chip 308 and the upper portion of the lead frame 300 as shown in FIG. 22.
  • the encapsulant 314 may be made of a polymer compound such as an epoxy mold compound.
  • the upper portion of the encapsulant 314 and the half-etched portion 303 of FIG. 21 are completely polished as shown in FIG. 23 to separate the signal leads 302 in the form of protrusions from the lead frame 300, respectively.
  • the surface of the encapsulant 314 is exposed.
  • the bottom surface of the semiconductor chip 308 may also be polished while the half etching portion 303 is polished.
  • a method of attaching the semiconductor chip 308 in the polished state may be used.
  • separation of the protrusion may be performed as follows. Referring to FIG. 28, when polishing is performed while the thickness of the protrusion 302v of the lead frame 300 ′ is covered by the encapsulant 314 ′ in a state where the thickness of the protrusion 302v is greater than the thickness of the semiconductor chip 308, FIG. 29. As shown, the bottom surface of the semiconductor chip 308 is not polished. At this time, the semiconductor chip 308 is covered with the encapsulant 314A '.
  • the signal lead 302 is exposed, and then a metal film is formed on the insulating film 316 in a blanket manner.
  • Patterning forms an upper metal pad 320 electrically connected to the signal lead 302.
  • the upper metal pad 320 may serve as a vertical connection passage in a process of stacking a fan-out semiconductor package in a vertical direction to make a package on package (POP).
  • POP package on package
  • the first base 312 used for fixing the semiconductor chip 308 and the signal lead 302 is removed and removed.
  • a single or multiple layers of upper metal patterns may be further formed.
  • another bond layer 310 is formed on the entire surface of the bond pad 310 and the signal lead 302 exposed to the surface from which the first base 312 is removed, and then patterned to form the bond pad 310. ) And the signal lead 302 are exposed to the outside.
  • the lower metal pattern 324 connecting the bond pad 310 and the signal lead 302 to the insulating layer 322 including the exposed bond pad 310 and the signal lead 302 may be formed.
  • the lower metal pattern 324 is formed as a single layer, but the present invention is not limited thereto and may be formed as a plurality of layers.
  • the redistribution metal pattern 324 extends the arrangement of the bond pads 310 formed on the semiconductor chip to the signal lead 302 formed on the outside of the semiconductor chip 308, thereby becoming a main means for making a fan-out semiconductor package.
  • an insulating film 322 pattern is formed on the entire surface of the resultant product on which the lower metal pattern 324 is formed, and the lower metal pad 326 connected to the lower metal pattern 324 in the vertical direction and exposed to the outside by the insulating film 322 pattern.
  • the insulating layer 322 may be a thin film having a multilayer structure made of the same material or different materials.
  • a conductive connector 328 for example, solder balls or solder bumps, is attached to the lower metal pad 326.
  • each lead frame is cut 330 using a diamond blade or the like to perform a singulation process of separating the unit semiconductor package from the lead frame strip. In the singulation process, cutting may be performed using a punch instead of a blade, or cutting may be performed using a laser.
  • the signal lead 302 of FIG. 21 penetrates up and down the semiconductor package without forming a separate via hole or via contact inside the encapsulant 314. It can be used as a vertical connector.
  • This structure is advantageous for signal connection in a package on package (POP), in which two semiconductor packages are stacked vertically.
  • FIG. 26 is a cross-sectional view of a fan-out semiconductor package using a lead frame according to a third embodiment of the present invention, which is manufactured by the singulation process of FIG. 25.
  • a fan-out semiconductor package 340 using a lead frame may include a semiconductor chip (308 of FIG. 23), an outer surface of the semiconductor chip, and a semiconductor chip; 23 (314A in FIG. 23) having the same height, a plurality of signal leads (302 in FIG. 23) of lead frame material included in the encapsulant and penetrating the encapsulant vertically, and the semiconductor chip.
  • the signal lead 302 may be used as a vertical connection terminal penetrating the top and bottom of the semiconductor package without forming a separate via hole or via contact in the encapsulant 314A. This structure is advantageous for signal connection in a package on package (POP), in which two semiconductor packages are stacked vertically.
  • POP package on package
  • a package on package POP is manufactured by stacking first and second packages 340B and 340A up and down using the lead frame illustrated in FIG. 26.
  • the upper metal pad 320 may not be formed on the signal lead of the first semiconductor package 340B.
  • the second semiconductor package 340A and the second semiconductor package 340B are physically and electrically connected to each other by the conductive connection terminal 328 of the second semiconductor package 340A.
  • UBMs may be further formed on the upper metal pad 320 and the lower metal pad 326.
  • first semiconductor package 340B and the second semiconductor package 340A have substantially the same structure, the present invention is not limited thereto and may have different sizes and functions.
  • a passive element 330 such as a resistor or a capacitor may be additionally attached to improve the function of the package on package.
  • a package on package (POP) can be manufactured as a simple manufacturing process.

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Abstract

La présente invention se rapporte à un procédé de fabrication d'un boîtier semi-conducteur de sortie à l'aide d'une grille de connexion et à un boîtier de semi-conducteur ainsi qu'à un boîtier sur boîtier pour ce dernier. A cette fin, dans le procédé de la présente invention, une grille de connexion est installée au niveau du périmètre d'une puce semi-conductrice afin de réaliser une structure de boîtier semi-conducteur de sortie. Par conséquent, un conducteur de signal est utilisé de sorte à utiliser le conducteur de signal de manière bidimensionnelle et de manière tridimensionnelle afin de simplifier des conceptions de circuit compliquées et de réduire le nombre de couches métalliques qui sont formées. La grille de connexion peut être utilisée comme borne de raccordement de type plat ou comme borne de raccordement de type vertical en trois dimensions à l'intérieur du boîtier semi-conducteur.
PCT/KR2011/009049 2011-11-03 2011-11-25 Procédé de fabrication d'un boîtier semi-conducteur de sortie à l'aide d'une grille de connexion et boîtier de semi-conducteur et boîtier sur boîtier pour ce dernier WO2013065895A1 (fr)

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KR1020110113649A KR101297015B1 (ko) 2011-11-03 2011-11-03 리드프레임을 이용한 팬-아웃 반도체 패키지 제조방법, 이에 의한 반도체 패키지 및 패키지 온 패키지

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