WO2012090422A1 - エピタキシャル膜形成方法、スパッタリング装置、半導体発光素子の製造方法、半導体発光素子、および照明装置 - Google Patents
エピタキシャル膜形成方法、スパッタリング装置、半導体発光素子の製造方法、半導体発光素子、および照明装置 Download PDFInfo
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- WO2012090422A1 WO2012090422A1 PCT/JP2011/007040 JP2011007040W WO2012090422A1 WO 2012090422 A1 WO2012090422 A1 WO 2012090422A1 JP 2011007040 W JP2011007040 W JP 2011007040W WO 2012090422 A1 WO2012090422 A1 WO 2012090422A1
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- electrode
- group iii
- nitride semiconductor
- iii nitride
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 195
- 238000004544 sputter deposition Methods 0.000 title claims abstract description 85
- 238000000034 method Methods 0.000 title claims abstract description 74
- 238000004519 manufacturing process Methods 0.000 title claims description 19
- 238000005286 illumination Methods 0.000 title description 4
- 239000000758 substrate Substances 0.000 claims abstract description 188
- 150000004767 nitrides Chemical class 0.000 claims abstract description 184
- 239000010408 film Substances 0.000 claims abstract description 170
- 239000010409 thin film Substances 0.000 claims abstract description 68
- 229910018072 Al 2 O 3 Inorganic materials 0.000 claims description 82
- 239000013078 crystal Substances 0.000 claims description 26
- 238000000151 deposition Methods 0.000 claims description 4
- 230000008021 deposition Effects 0.000 claims description 4
- 229910052594 sapphire Inorganic materials 0.000 abstract description 4
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 description 68
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 61
- 229910002601 GaN Inorganic materials 0.000 description 60
- 238000005259 measurement Methods 0.000 description 32
- 239000007789 gas Substances 0.000 description 21
- 230000000052 comparative effect Effects 0.000 description 20
- 230000015572 biosynthetic process Effects 0.000 description 14
- 230000007246 mechanism Effects 0.000 description 13
- 230000005684 electric field Effects 0.000 description 11
- 239000000463 material Substances 0.000 description 11
- 229910052751 metal Inorganic materials 0.000 description 11
- 239000002184 metal Substances 0.000 description 11
- 238000010438 heat treatment Methods 0.000 description 9
- 238000002474 experimental method Methods 0.000 description 8
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- 125000004429 atom Chemical group 0.000 description 5
- 125000004433 nitrogen atom Chemical group N* 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
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- 238000002791 soaking Methods 0.000 description 4
- 230000001629 suppression Effects 0.000 description 4
- 229910002704 AlGaN Inorganic materials 0.000 description 3
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 3
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 3
- 229910052782 aluminium Inorganic materials 0.000 description 3
- 230000007547 defect Effects 0.000 description 3
- 239000010931 gold Substances 0.000 description 3
- 229910002804 graphite Inorganic materials 0.000 description 3
- 239000010439 graphite Substances 0.000 description 3
- 239000011777 magnesium Substances 0.000 description 3
- 238000001020 plasma etching Methods 0.000 description 3
- 239000010936 titanium Substances 0.000 description 3
- 229910000838 Al alloy Inorganic materials 0.000 description 2
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- 238000004833 X-ray photoelectron spectroscopy Methods 0.000 description 2
- 210000004027 cell Anatomy 0.000 description 2
- 150000001875 compounds Chemical class 0.000 description 2
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- 239000010949 copper Substances 0.000 description 2
- 239000003989 dielectric material Substances 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 230000005669 field effect Effects 0.000 description 2
- 229910052733 gallium Inorganic materials 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 229910052738 indium Inorganic materials 0.000 description 2
- 239000011810 insulating material Substances 0.000 description 2
- 238000004969 ion scattering spectroscopy Methods 0.000 description 2
- 238000001459 lithography Methods 0.000 description 2
- 238000001755 magnetron sputter deposition Methods 0.000 description 2
- -1 nitride compound Chemical class 0.000 description 2
- 239000010935 stainless steel Substances 0.000 description 2
- 229910001256 stainless steel alloy Inorganic materials 0.000 description 2
- 229910052719 titanium Inorganic materials 0.000 description 2
- PIGFYZPCRLYGLF-UHFFFAOYSA-N Aluminum nitride Chemical compound [Al]#N PIGFYZPCRLYGLF-UHFFFAOYSA-N 0.000 description 1
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 1
- FYYHWMGAXLPEAU-UHFFFAOYSA-N Magnesium Chemical compound [Mg] FYYHWMGAXLPEAU-UHFFFAOYSA-N 0.000 description 1
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- NWAIGJYBQQYSPW-UHFFFAOYSA-N azanylidyneindigane Chemical compound [In]#N NWAIGJYBQQYSPW-UHFFFAOYSA-N 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 238000000407 epitaxy Methods 0.000 description 1
- 210000002304 esc Anatomy 0.000 description 1
- 230000002349 favourable effect Effects 0.000 description 1
- 229910052732 germanium Inorganic materials 0.000 description 1
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 1
- 229910021478 group 5 element Inorganic materials 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 229910052749 magnesium Inorganic materials 0.000 description 1
- 150000002736 metal compounds Chemical class 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000007935 neutral effect Effects 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 238000005121 nitriding Methods 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 239000010980 sapphire Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 1
- 238000003786 synthesis reaction Methods 0.000 description 1
- JBQYATWDVHIOAR-UHFFFAOYSA-N tellanylidenegermanium Chemical compound [Te]=[Ge] JBQYATWDVHIOAR-UHFFFAOYSA-N 0.000 description 1
- 230000008646 thermal stress Effects 0.000 description 1
Images
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/06—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
- C23C14/0617—AIII BV compounds, where A is Al, Ga, In or Tl and B is N, P, As, Sb or Bi
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
- C23C14/34—Sputtering
- C23C14/3435—Applying energy to the substrate during sputtering
- C23C14/345—Applying energy to the substrate during sputtering using substrate bias
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B23/00—Single-crystal growth by condensing evaporated or sublimed materials
- C30B23/002—Controlling or regulating
- C30B23/005—Controlling or regulating flux or flow of depositing species or vapour
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B23/00—Single-crystal growth by condensing evaporated or sublimed materials
- C30B23/02—Epitaxial-layer growth
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
- C30B25/02—Epitaxial-layer growth
- C30B25/06—Epitaxial-layer growth by reactive sputtering
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
- C30B29/10—Inorganic compounds or compositions
- C30B29/40—AIIIBV compounds wherein A is B, Al, Ga, In or Tl and B is N, P, As, Sb or Bi
- C30B29/403—AIII-nitrides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/0242—Crystalline insulating materials
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02455—Group 13/15 materials
- H01L21/02458—Nitrides
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02538—Group 13/15 materials
- H01L21/0254—Nitrides
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/02631—Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
- H01L33/007—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
Definitions
- the present invention relates to an epitaxial film forming method, a sputtering apparatus, a semiconductor light emitting element manufacturing method, a semiconductor light emitting element, and an illumination apparatus, and more particularly, an epitaxial film forming method capable of forming a high quality epitaxial film, and such an epitaxial film.
- the present invention relates to a method for manufacturing a semiconductor light emitting element using a film, a sputtering apparatus, a semiconductor light emitting element, and an illumination apparatus.
- a group III nitride semiconductor is composed of an aluminum (Al) atom, a gallium (Ga) atom, an indium (In) atom, and a group VB element (hereinafter simply referred to as group V element) which are group IIIB elements (hereinafter simply referred to as group III element). It is a compound semiconductor material with a certain nitrogen (N) atom. That is, a compound semiconductor material obtained as aluminum nitride (AlN), gallium nitride (GaN), indium nitride (InN), and mixed crystals thereof (AlGaN, InGaN, InAlN, InGaAlN) is a group III nitride semiconductor.
- a light emitting diode LED: Light Emitting Diode
- LD Laser Diode
- LD solar cell
- PVSC Photovoltaic Solar Cell
- PD Photo Diode
- HEMT High Electron Mobility Transistor
- HE metal oxide semiconductor field effect transistor
- MOSFET There are electronic elements such as Metal-Oxide-Semiconductor Field Effect Transistor).
- MOCVD organic metal compound chemical vapor deposition
- the sputtering method is characterized by low production costs and low probability of particle generation. Therefore, if at least a part of the film forming process of the group III nitride semiconductor thin film can be replaced by the sputtering method, there is a possibility that at least a part of the above problem can be solved.
- Non-Patent Document 1 discloses the crystallinity of a group III nitride semiconductor thin film manufactured using a sputtering method.
- a c-axis oriented GaN film is epitaxially grown on an ⁇ -Al 2 O 3 (0001) substrate using a high-frequency magnetron sputtering method.
- Non-Patent Document 1 describes that the full width at half maximum (FWHM) is 35.1 arcmin (2106 arcsec) in the X-ray rocking curve (XRC) measurement of the GaN (0002) plane. This value is extremely large compared to the GaN film on the ⁇ -Al 2 O 3 substrate currently on the market, indicating that the tilt mosaic spread described later is large and the crystal quality is inferior. Yes.
- the tilt mosaic spread in (1) indicates the degree of variation in crystal orientation in the substrate vertical direction
- the mosaic spread in twist in (2) indicates the degree of variation in crystal orientation in the in-plane direction of the substrate.
- the polarity of (3) is a term that means the crystal orientation.
- + c polarity and -c polarity there are two types of growth modes: + c polarity and -c polarity. Growth with + c polarity corresponds to (0001) orientation and growth with -c polarity corresponds to (000-1) orientation.
- Patent Document 1 discloses that a plasma treatment is performed on a substrate before a group III nitride semiconductor thin film (AlN in Patent Document 1) is formed on an ⁇ -Al 2 O 3 substrate using a sputtering method.
- a method for achieving high quality of a group III nitride semiconductor thin film, particularly a method for obtaining a group III nitride semiconductor thin film having a very small mosaic spread of tilt is disclosed.
- a buffer layer (intermediate layer in Patent Document 2) made of a Group III nitride semiconductor (Group III nitride compound in Patent Document 2) is formed on a substrate by a sputtering method.
- a method for manufacturing a light emitting element is disclosed.
- Patent Document 2 as a procedure for forming a buffer layer made of a group III nitride semiconductor, a pretreatment step for performing plasma treatment on the substrate, and a buffer made of a group III nitride semiconductor by sputtering after the pretreatment step. And a step of forming a layer.
- an ⁇ -Al 2 O 3 substrate and AlN are used as a preferable form of the substrate and the buffer layer made of a group III nitride semiconductor, and an n-type semiconductor layer including a base film, a light emitting layer,
- the MOCVD method is preferably used as a method for forming the p-type semiconductor layer.
- Patent Document 1 and Patent Document 2 a group III nitride semiconductor with a small mosaic spread of tilt and twist is obtained by sputtering.
- the prior art does not disclose a method for controlling the polarity, which is a major problem in adopting the sputtering method as a process for manufacturing a group III nitride semiconductor.
- Patent Documents 1 and 2 do not reduce the mixture of + c polarity and ⁇ c polarity, and a group III nitride semiconductor thin film with + c polarity cannot be obtained. That is, the techniques disclosed in Patent Documents 1 and 2 are effective techniques because the mosaic spread of tilt and twist can be reduced, but in order to obtain a further high-quality group III nitride semiconductor thin film, It is desired to unify the polarities as much as possible.
- an object of the present invention is to provide an epitaxial film forming method capable of producing an epitaxial film with improved uniformity of + c polarity (improved (0001) orientation) by sputtering. Furthermore, it is providing the manufacturing method of a semiconductor light-emitting device using this epitaxial film, a sputtering device, the semiconductor light-emitting device manufactured by this manufacturing method, and an illuminating device.
- the present inventors have completed the present invention by obtaining new knowledge that the polarity of the epitaxial film can be controlled by a high-frequency bias power applied to a bias electrode built in the substrate holder, as will be described later.
- a first aspect of the present invention is a sputtering method comprising: a target electrode on which a target can be placed; and a substrate holder on which a substrate can be placed toward the target electrode and provided with a heater electrode and a bias electrode.
- the method for manufacturing a semiconductor light emitting device includes a step of forming a buffer layer of the semiconductor light emitting device by the epitaxial film forming method according to the first aspect described above.
- the third aspect of the present invention is a buffer layer, a group III nitride semiconductor intermediate layer, an n-type group III nitride semiconductor layer, a group III nitride semiconductor active layer, a p-type on an ⁇ -Al 2 O 3 substrate.
- a fourth aspect of the present invention is an illumination device, comprising the semiconductor light emitting element according to the third aspect described above. Furthermore, a fourth aspect of the present invention is a sputtering apparatus, a target electrode on which a target can be disposed, a substrate holder that can be disposed toward the target electrode, and that includes a heater electrode and a bias electrode, and Frequency interference between the high-frequency power applied to the target electrode and the high-frequency bias power applied to the bias electrode when performing the step of forming an epitaxial film of the group III nitride semiconductor thin film described in 1 Frequency interference suppression means for preventing the occurrence of noise.
- an epitaxial film of a group III nitride semiconductor that has little mosaic spread of tilt and twist, reduces the mixture of + c polarity and ⁇ c polarity, and improves the unity degree of + c polarity is formed by ⁇ -Al 2. It becomes possible to produce on an O 3 substrate using a sputtering method. Further, by using the group III nitride semiconductor epitaxial film produced by this sputtering method, the light emission characteristics of light emitting elements such as LEDs and LDs can be improved.
- the main feature of the present invention is that when a group III nitride semiconductor thin film is epitaxially grown on an ⁇ -Al 2 O 3 substrate by a sputtering method such as a high-frequency sputtering method, a substrate holder provided with a heater electrode and a bias electrode The Al 2 O 3 substrate is heated to an arbitrary temperature, and then a group III nitride semiconductor film is formed while applying a high frequency bias power to the bias electrode.
- a sputtering method such as a high-frequency sputtering method
- a substrate holder provided with a heater electrode and a bias electrode
- the Al 2 O 3 substrate is heated to an arbitrary temperature, and then a group III nitride semiconductor film is formed while applying a high frequency bias power to the bias electrode.
- FIG. 1 is a schematic configuration diagram showing an example of a sputtering apparatus used for forming a group III nitride semiconductor thin film according to an embodiment of the present invention.
- reference numeral 101 is a vacuum vessel
- reference numeral 102 is a target electrode
- reference numeral 103 is a bias electrode
- reference numeral 104 is a heater electrode
- reference numeral 105 is a target shield
- reference numeral 106 is a high-frequency power source for sputtering
- reference numeral 107 is a high-frequency power source for sputtering.
- reference numeral 108 is a target
- reference numeral 109 is a gas introduction mechanism
- reference numeral 110 is an exhaust mechanism
- reference numeral 111 is a substrate holder
- reference numeral 112 is a reflector
- reference numeral 113 is an insulating material
- reference numeral 114 is a chamber shield
- reference numeral 115 is a magnet unit
- Reference numeral 116 denotes a target shield holding mechanism
- reference numeral 130 denotes a bias high-frequency power source.
- symbol 111 in FIG. 1 shall be arbitrary in the board
- As the substrate 107 an ⁇ -Al 2 O 3 substrate (601) can be used as the substrate 107.
- the vacuum vessel 101 is made of a metal member such as stainless steel or aluminum alloy and is electrically grounded. Further, the vacuum vessel 101 prevents or reduces the temperature rise of the wall surface by a cooling mechanism (not shown). Furthermore, the vacuum vessel 101 is connected to the gas introduction mechanism 109 via a mass flow controller (not shown) and is connected to the exhaust mechanism 110 via a variable conductance valve (not shown).
- the target shield 105 is attached to the vacuum vessel 101 via the target shield holding mechanism 116.
- the target shield holding mechanism 116 and the target shield 105 can be metal members such as stainless steel and aluminum alloy, and are electrically connected to the vacuum vessel 101.
- the target electrode 102 is attached to the vacuum vessel 101 via an insulating material 113.
- the target 108 is attached to the target electrode 102, and the target electrode 102 is connected to the sputtering high-frequency power source 106 through a matching box (not shown).
- the target 108 may be directly attached to the target electrode 102 or may be attached to the target electrode 102 via a bonding plate (not shown) made of a metal member such as copper (Cu).
- the target 108 may be a metal target containing at least one of Al, Ga, and In, or a nitride target containing at least one of the above group III elements.
- the target electrode 102 is provided with a cooling mechanism (not shown) for preventing the temperature of the target 108 from rising.
- the target electrode 102 has a magnet unit 115 built therein. Although 13.56 MHz is easily industrially used as the electric power supplied from the sputtering high-frequency power source 106 to the target electrode 102, it is possible to use a high frequency of another frequency, superimpose a direct current on the high frequency, or pulse them. It is also possible to use it.
- the chamber shield 114 is attached to the vacuum vessel 101 to prevent or reduce film adhesion to the vacuum vessel 101 during film formation.
- the substrate holder 111 has a heater electrode 104 and a bias electrode 103 inside.
- a heating power supply (not shown) is connected to the heater electrode 104, and a bias high frequency power supply 130 is connected to the bias electrode 103 via a matching box (not shown).
- reference numeral 201 is a base
- reference numeral 202 is a base coat
- reference numeral 103a is a bias electrode
- reference numeral 104 is a heater electrode
- reference numeral 205 is an overcoat.
- Base 201 is made of graphite
- base coat 202 and overcoat 205 are made of pyrolytic boron nitride (PBN)
- bias electrode 103a or 103b
- heater electrode 104 are made of pyrolytic graphite (PG).
- the base coat 202 and the overcoat 205 made of PBN are high-resistance dielectric materials.
- a heating power source (not shown) is connected to the heater electrode 104. From this heating power source, an AC or DC current is passed through the heater electrode 104 to generate Joule heat, and the ⁇ placed on the substrate holder 111a (or 111b) by infrared rays from the substrate holder generated by the Joule heat. -al 2 O 3 the substrate can be heated.
- a bias high-frequency power source 130 is connected to the bias electrode 103a (or 103b) via a matching box (not shown).
- a high frequency bias power to the bias electrode 103a (or 103b) during film formation, a negative DC bias voltage is generated on the surface of the ⁇ -Al 2 O 3 substrate placed on the substrate holder 111a (or 111b). be able to.
- an electrostatic chuck (ESC) power supply (not shown) can be further connected to the bias electrode 103a (or 103b) via a low-pass filter (not shown). is there.
- the bias electrode 103a is configured as an electrically separated electrode indicated by reference signs A and B (one is a first electrode and the other is a second electrode).
- Bipolar ESCs may be realized by applying positive and negative DC voltages.
- the bias electrode 103b is configured as an electrically separated electrode indicated by reference numerals C and D (one is a first electrode and the other is a second electrode).
- Bipolar ESC can be realized by applying positive and negative DC voltages.
- FIG. 4 shows another configuration example 111 c of the substrate holder 111.
- Reference numeral 401 is a base
- reference numeral 402 is a base coat
- reference numeral 403 is a common electrode
- reference numeral 404 is a backside coat
- reference numeral 405 is an overcoat.
- Base 401 is made of graphite
- base coat 402 and overcoat 405 are made of PBN
- common electrode 403 and backside coat 404 are made of PG
- base coat 402 and overcoat 405 made of PBN are high-resistance dielectric materials.
- a bias high frequency power source 130 is connected to the common electrode 403 via a matching box, and a heating power source (not shown) is connected via a low pass filter (not shown).
- the common electrode 403 has a function of integrating the heater electrode 104 and the bias electrode 103a in FIG.
- the substrate holder 111c By supplying an AC or DC current from the heating power source to the common electrode 403, the substrate holder 111c generates heat, and the ⁇ -Al 2 O 3 substrate placed on the substrate holder 111c is heated by the infrared rays.
- a high frequency bias power from a bias high frequency power supply in a state where a heating current is supplied to the common electrode 403, while heating the ⁇ -Al 2 O 3 substrate placed on the substrate holder 111c, A negative DC bias voltage can be generated on the surface.
- the effect of the present invention can be obtained even if a common electrode in which the heater electrode and the bias electrode are integrated into one is used.
- Joule heat generated from the heater electrode 104 is transmitted to the substrate mounting surface M side through the base coat 202, the base 201, the overcoat 205, and the bias electrode 103a.
- the base 201 plays a role as a soaking plate, there is a feature that high soaking properties are easily obtained in the substrate surface.
- the bias electrode 103b has a substantially disc-shaped electrode (corresponding to reference C) at the center and a substantially ring-shaped electrode (corresponding to reference D) at the outer periphery.
- the bias electrode 103b (particularly C portion) further functions as a soaking plate, and the soaking performance in the surface can be further improved as compared with the substrate holder 111a having the structure shown in FIG.
- the substrate holder 111a having the structure shown in FIG. 2 may generate a temperature distribution depending on the pattern shape of the bias electrode 103a.
- the structure is characterized in that such a problem can be remarkably improved.
- the materials constituting the substrate holder shown in FIGS. 2 to 4 are preferably used because the efficiency of heating the ⁇ -Al 2 O 3 substrate is higher than that of the conventional infrared lamp, but ⁇ -Al 2
- the present invention is not limited to this as long as the O 3 substrate can be heated to a predetermined temperature.
- the substrate holder is not limited to the structure of the substrate holders 111a, 111b, and 111c.
- a structure such as the above-described substrate holders 111a, 111b, and 111c is preferable because it can improve the thermal uniformity and increase the power utilization efficiency, and the structure can be appropriately selected according to the purpose. It is.
- a high-frequency bias power is applied to the bias electrode at a predetermined temperature to generate a negative DC bias voltage on the surface of the ⁇ -Al 2 O 3 substrate. It is important that the epitaxial film can be formed with + c polarity. Therefore, it is needless to say that any structure can be applied to the present embodiment as long as it conforms to the spirit of the present invention.
- FIG. 5 is a model diagram showing a mechanism in which a group III nitride semiconductor thin film is formed with + c polarity by applying high-frequency bias power to the bias electrode.
- reference numeral 111 denotes an arbitrary substrate holder among the substrate holders 111a, 111b, and 111c
- reference numeral 107 denotes an ⁇ -Al 2 O 3 substrate
- reference numeral 503 denotes a nitride molecule.
- FIG. 6 is an example of a cross-sectional structure of a light-emitting diode (LED) as a semiconductor light-emitting device manufactured using the method for manufacturing a group III nitride semiconductor thin film according to an embodiment of the present invention.
- reference numeral 601 is an ⁇ -Al 2 O 3 substrate
- reference numeral 602 is a buffer layer
- reference numeral 603 is a group III nitride semiconductor intermediate layer
- reference numeral 604 is an n-type group III nitride semiconductor layer
- reference numeral 605 is a group III nitride.
- Numeral 606 is a p-type group III nitride semiconductor layer
- symbol 607 is a translucent electrode
- symbol 608 is an n-type electrode
- symbol 609 is a p-type bonding pad electrode
- symbol 610 is a protective film.
- the buffer layer 602 As a material constituting the buffer layer 602, AlN, AlGaN, or GaN is preferably used.
- Materials constituting the group III nitride semiconductor intermediate layer 603, the n-type group III nitride semiconductor layer 604, the group III nitride semiconductor active layer 605, and the p-type group III nitride semiconductor layer 606 include AlGaN, GaN, and InGaN. Preferably used.
- the n-type group III nitride semiconductor layer 604 includes silicon (Si) or germanium (Ge) in the material
- the p-type group III nitride semiconductor layer 606 includes magnesium (Mg) or zinc (Zn) in the material.
- the group III nitride semiconductor active layer 605 desirably forms a multiple quantum well (MQW) structure of the above material.
- a lighting device can be configured using the above-described light emitting diode (LED).
- FIG. 7A and 7B are diagrams for explaining a frequency interference suppressing unit according to an embodiment of the present invention.
- FIG. 7A is an example of a means for suppressing frequency interference (frequency interference suppressing means), which will be described later, using high-frequency power supplies having different frequencies as the sputtering high-frequency power supply 106 and the biasing high-frequency power supply 130.
- Reference numerals 701 and 702 denote matching boxes.
- the high frequency power from the sputtering high frequency power supply 106 is supplied to the target electrode 102 by reducing the reflected wave through the matching box 701, and the high frequency power from the bias high frequency power supply 130 passes through the matching box 702. As a result, the reflected wave is reduced and supplied to the bias electrode 103.
- the sputtering high-frequency power source 106 and the biasing high-frequency power source 130 are set to have different frequencies.
- the frequency of the sputtering high-frequency power source 106 is 13.56 MHz
- the frequency interference described later can be suppressed by using a frequency such as 13.54 MHz or 13.58 MHz as the bias high-frequency power source 130. It becomes.
- FIG. 7B shows an example of means for suppressing frequency interference (frequency interference suppressing means) described later by adjusting the phase of the high-frequency power from the sputtering high-frequency power supply 106 and the biasing high-frequency power supply 130.
- reference numeral 703 is a phase control unit
- reference numeral 704 is a high-frequency oscillator
- reference numerals 705 and 706 are phase adjustment circuits.
- the high frequency power from the sputtering high frequency power supply 106 is supplied to the target electrode 102 by reducing the reflected wave through the matching box 701, and the high frequency power from the bias high frequency power supply 130 passes through the matching box 702. As a result, the reflected wave is reduced and supplied to the bias electrode 103.
- the phase control unit 703 includes a high-frequency oscillator 704 and phase adjustment circuits 705 and 706, and the high-frequency signal from the high-frequency oscillator 704 is adjusted by the phase adjustment circuits 705 and 706 and output to an external circuit. it can. Further, the output section of the phase control unit 703 is connected to external input terminal sections of the sputtering high-frequency power source 106 and the bias high-frequency power source 130. Sputtering is performed by a phase-adjusted high-frequency signal output from the phase control unit 703 (that is, a high-frequency signal oscillated by the high-frequency oscillator 704 and whose phase is adjusted by the phase adjustment circuits 705 and 706).
- the phase of the high-frequency power output from the high-frequency power source for bias 106 and the high-frequency power source for bias 130 is controlled. For example, by adjusting the phase control unit 703 and setting the phase difference of the high-frequency power output from the sputtering high-frequency power source 106 and the biasing high-frequency power source 130 to a phase difference such as 180 °, frequency interference described later is suppressed. It becomes possible.
- the high frequency power supplied to the target electrode 102 and the high frequency power supplied to the bias electrode 103 are set to different frequencies, or the target electrode It is an effective means to keep the high frequency power supplied to 102 and the high frequency power supplied to the bias electrode 103 at a predetermined phase difference. In order to obtain the effects of the present invention with high reproducibility, it is very effective to have these frequency interference suppression means.
- an epitaxial film is formed on an ⁇ -Al 2 O 3 substrate by a method having the following first to fourth steps.
- the substrate holder 111 indicates any one of the substrate holders 111a, 111b, and 111c
- the bias electrode 103 is a bias provided in the arbitrary substrate holder 111 (111a, 111b, 111c).
- the electrodes 103a, 103b, and 403 (403 is a common electrode) are shown.
- the substrate 107 is introduced into the vacuum vessel 101 maintained at a predetermined pressure by the exhaust mechanism 110.
- the substrate ( ⁇ -Al 2 O 3 substrate) 107 is transported to the top of the substrate holder 111 by a transport robot (not shown), and held on the lift pins (not shown) protruding from the substrate holder 111. Thereafter, the lift pins holding the substrate 107 are lowered, and the substrate 107 is placed on the substrate holder 111.
- the voltage applied to the heater electrode 104 built in the substrate holder 111 is controlled to hold the substrate 107 at a predetermined temperature.
- the temperature of the substrate holder 111 is monitored using a thermocouple (not shown) built in the substrate holder 111, or the temperature of the substrate holder 111 is monitored using a pyrometer (not shown) installed in the vacuum vessel 101. Then, the temperature is controlled to be a predetermined temperature.
- N 2 gas or a mixed gas of N 2 gas and rare gas is introduced from the gas introduction mechanism 109 into the vacuum vessel 101, and a mass flow controller (not shown) and a variable conductance valve (not shown) are introduced.
- the pressure of the vacuum vessel 101 is set to a predetermined pressure according to FIG.
- high-frequency bias power is applied to the bias electrode 103 built in the substrate holder 111, and plasma is generated on the front surface of the target 108 by applying high-frequency power to the target 108 from the sputtering high-frequency power source 106. generate.
- ions in the plasma knock out an element constituting the target 108, and a group III nitride semiconductor thin film is formed on the substrate 107 by the knocked-out element.
- the predetermined pressure in the first step is desirably less than 5 ⁇ 10 ⁇ 4 Pa. Above that, a large amount of impurities such as oxygen is taken into the group III nitride semiconductor thin film, and a good epitaxial film is formed. It is difficult to obtain. Further, the temperature of the substrate holder 111 in the first step is not particularly limited, but it is desirable to set the temperature to obtain the substrate temperature during film formation from the viewpoint of productivity.
- the predetermined temperature in the second step is desirably set to the film formation temperature in the fourth step from the viewpoint of productivity, and the predetermined pressure in the third step is the same as that in the fourth step. It is desirable to set the film pressure from the viewpoint of productivity.
- the second process and the third process may be performed at the same time or may be performed simultaneously. Moreover, it is desirable from the viewpoint of productivity that the temperature set in the second step and the pressure set in the third step are maintained at least until the fourth step is started.
- the high-frequency bias power applied to the bias electrode 103 is set to a predetermined power at which a group III nitride semiconductor film (group group III nitride semiconductor thin film with + c polarity) having a high degree of unification of + c polarity is obtained. It is necessary to keep it. If the power is too small, a group III nitride semiconductor thin film with mixed polarity is formed. If the power is too large, the group III nitride semiconductor thin film is damaged by the collision of high energy particles, and a high quality group III nitride semiconductor is obtained. A thin film cannot be obtained.
- a group III nitride semiconductor thin film having no or reduced ⁇ c polarity that is, a group III nitride semiconductor having a high degree of unification of + c polarity and a mixture of + c polarity and ⁇ c polarity is reduced.
- the thin film will be referred to as a “+ c polarity group III nitride semiconductor thin film”.
- the substrate temperature when performing the fourth step is desirably set to be in the range of 100 to 1200 ° C., and more preferably in the range of 400 to 1000 ° C.
- the temperature is lower than 100 ° C., a film in which an amorphous structure is mixed is easily formed.
- the film itself is not formed, or even if formed, an epitaxial film having many defects is obtained due to thermal stress.
- the film forming pressure is preferably set in the range of 0.1 to 100 mTorr (1.33 ⁇ 10 ⁇ 2 to 1.33 ⁇ 10 1 Pa), and further, 1.0 to 10 mTorr (1.33 ⁇ 10 ⁇ 1 to 1.33 Pa) is preferable.
- the deposition pressure may be increased by temporarily introducing at least one kind of process gas flow rate, and the opening of a variable conductance valve (not shown) may be temporarily reduced.
- the film forming pressure may be increased.
- the timing of applying the high-frequency bias power to the bias electrode 103 and the timing of applying the high-frequency power to the target electrode 102 may be simultaneous, or the first is applied first, and then the other You may apply to.
- the high-frequency power is first applied to the target electrode 102
- the high-frequency power is applied to the bias electrode 103 before the deposition surface of the ⁇ -Al 2 O 3 substrate 107 is covered with the crystal layer made of a group III nitride semiconductor. Bias power needs to be applied.
- the crystal layer of the group III nitride semiconductor formed in a state where no high-frequency bias power is applied to the bias electrode 103 tends to be in a mixed polarity state or in a ⁇ c polarity state.
- a state in which ⁇ c polarity is mixed occurs, it becomes difficult to obtain a group III nitride semiconductor thin film having + c polarity even by applying a high frequency bias power to the bias electrode 103 thereafter. Therefore, when high frequency power is first applied to the target electrode 102, the bias electrode 103 is immediately applied after high frequency power is applied to the target electrode 102 and plasma is generated on the front surface of the target (that is, after sputtering is started). A high frequency bias power is applied to the bias electrode 103 before a crystal layer made of a group III nitride semiconductor is formed on the ⁇ -Al 2 O 3 substrate 107. desirable.
- the first step there may be a step of transporting the substrate 107 to a pretreatment chamber (not shown) and performing heat treatment or plasma treatment of the substrate 107 at a temperature equal to or higher than the film formation temperature.
- a pretreatment chamber not shown
- performing heat treatment or plasma treatment of the substrate 107 at a temperature equal to or higher than the film formation temperature.
- ⁇ -Al 2 O 3 substrate 107 on the substrate holder 111 is mounted to a predetermined temperature
- N 2 gas or N into the vacuum chamber Either a mixed gas of two gases and a rare gas is introduced.
- high-frequency bias power is applied to the bias electrode, and plasma is generated on the target side to form a group III nitride semiconductor thin film.
- the target surface is nitrided by the active species containing N atoms, and the surface is sputtered with positive ions, whereby nitride molecules 503 shown in FIG. Is released from the target surface and reaches the surface of the ⁇ -Al 2 O 3 substrate 107.
- nitride molecules 503 shown in FIG. 5 are released from the target surface and reach the surface of the ⁇ -Al 2 O 3 substrate 107.
- a diatomic molecule 503 is shown for simplification, but the diatomic molecule is not limited to a diatomic molecule.
- high frequency bias power is applied to the bias electrode 103, and in the space facing the surface side of the ⁇ -Al 2 O 3 substrate 107, a plasma region indicated by G and a symbol S are indicated. A sheath region is formed. The sheath region S is formed between the plasma region G and the ⁇ -Al 2 O 3 substrate 107.
- the densities of positive charges (positive ions) and negative charges (electrons) are substantially equal, and are in an electrically neutral state.
- the plasma region G is normally in a substantially constant potential state (referred to as plasma potential) that is positive with respect to the ground potential.
- plasma potential substantially constant potential state
- excess electrons are supplied to the surface of the ⁇ -Al 2 O 3 substrate 107. As a result, a negative DC bias voltage is generated.
- the nitride molecule 503 has a group III element 503a and an N atom 503b, and the group III element 503a is positive and the N atom 503b has a negative charge bias. That is, the nitride molecule 503 has the polarization indicated by the symbol P.
- the nitride molecules 503 are considered to be in a random direction in the plasma region G, but when reaching the sheath region S, the electric field E acts on the polarization P of the nitride molecules 503, and the group III element 503a becomes ⁇ -Al 2 O 3 direction of the substrate, so that N atoms 503b are in the direction of the plasma region G, i.e., the polarization P is believed that aligned so that the direction of the alpha-Al 2 O 3 substrate.
- the polarization P of the nitride molecule 503 is oriented so as to face the direction of the ⁇ -Al 2 O 3 substrate. That is, the polarization P of the nitride molecule 503 is oriented so as to face the ⁇ -Al 2 O 3 substrate by the electric field E of the sheath region S generated by applying the high frequency bias power, and the orientation is maintained while ⁇ It is considered that a + c polarity group III nitride semiconductor thin film is obtained by being adsorbed on the surface of the —Al 2 O 3 substrate.
- the high-frequency bias power is too large, a high-quality group III nitride semiconductor may not be obtained. This is because positive ions in the plasma are accelerated by the electric field E in the sheath region S and collide with a large amount of energy on the surface of the ⁇ -Al 2 O 3 substrate. This is thought to be due to the formation of defects.
- the frequency used as the high frequency bias power is not particularly limited. However, if the frequency of the high frequency bias power matches the frequency of the high frequency power applied to the target, a low frequency beat phenomenon caused by the interference of the high frequency power is likely to occur. Therefore, the film forming conditions may be affected. (Hereinafter, this low frequency beat phenomenon is called frequency interference).
- frequency interference occurs in this embodiment, the plasma becomes unstable and the DC bias voltage generated on the surface of the ⁇ -Al 2 O 3 substrate becomes unstable. Therefore, it is preferable to use high-frequency power with different frequencies. Taking FIG.
- the above-described frequency interference can also be suppressed by shifting the high-frequency bias power applied to the bias electrode and the high-frequency power applied to the target by a predetermined phase difference.
- FIG. 7B when the phase control unit 703 adjusts the phase difference between the high-frequency bias power applied to the bias electrode 103 and the high-frequency power applied to the target electrode 102 to be 180 °, That is, when adjusting so that the positive peak top voltage of the high frequency power is applied to the target electrode 102 and at the same time the negative peak top voltage of the high frequency bias power is applied to the bias electrode 103, the frequency is most effectively applied. Interference can be prevented or reduced.
- phase difference may be finely adjusted so that the reflected wave to each high frequency power source (high frequency power source for sputtering and high frequency power source for bias) is further reduced. That is, it is assumed that the phase difference of 180 ° includes a finely adjusted range.
- phase differences can be used without problems as long as frequency interference is not caused.
- the plasma becomes unstable and the reflected wave to each high-frequency power source (high-frequency power source for sputtering and high-frequency power source for bias) tends to increase. It is desirable to adjust the phase difference to be 0).
- metal components non-nitride component
- Group III Care When sputtering the metal target 108 by plasma using a mixed gas of N 2 gas and a rare gas, and controlling the ratio of a mixed gas of N 2 gas and a rare gas, metal components (non-nitride component) Group III Care must be taken so that a large amount of nitride semiconductor thin film is not incorporated.
- the ratio of the group III element released from the target in the form of metal atoms or metal clusters is likely to be larger than that of the nitride molecule 503, so that a high frequency bias power is applied to the bias electrode 103.
- the effects of the present invention may not be sufficiently obtained.
- the buffer layer 602 of the LED element of FIG. 6 is manufactured using the sputtering apparatus (epitaxial film forming method) according to the present invention, and then the group III nitride semiconductor intermediate layer is formed using the MOCVD method.
- the group III nitride semiconductor intermediate layer is formed using the MOCVD method.
- the buffer layer 602 and the group III nitride semiconductor intermediate layer 603 are produced by using the sputtering apparatus (epitaxial film forming method) according to the present invention, and then the n-type III using the MOCVD method.
- the sputtering apparatus epitaxial film forming method
- MOCVD method MOCVD method
- a buffer layer 602, a group III nitride semiconductor intermediate layer 603 and an n-type group III nitride semiconductor layer 604 are produced using the sputtering apparatus (epitaxial film forming method) according to the present invention, and then There is a method of manufacturing an epitaxial wafer by sequentially laminating a group III nitride semiconductor active layer 605 and a p-type group III nitride semiconductor layer 606 using MOCVD.
- a buffer layer 602, a group III nitride semiconductor intermediate layer 603, an n-type group III nitride semiconductor layer 604, and a group III nitride semiconductor active layer 605 are formed by a sputtering apparatus (epitaxial film forming method) according to the present invention.
- a sputtering apparatus epitaxial film forming method
- a buffer layer 602, a group III nitride semiconductor intermediate layer 603, an n-type group III nitride semiconductor layer 604, a group III nitride semiconductor active layer 605, and a p-type group III nitride semiconductor layer 606 are provided.
- the epitaxial wafer thus obtained is subjected to lithography technology and RIE (reactive ion etching) technology, as shown in FIG. 6, a translucent electrode 607, p-type bonding pad electrode 609, n-type electrode 608, protection.
- RIE reactive ion etching
- a translucent electrode 607, p-type bonding pad electrode 609, n-type electrode 608, protection By forming the film 610, an LED structure can be obtained.
- materials of the translucent electrode 607, the p-type bonding pad electrode 609, the n-type electrode 608, and the protective film 610 are not particularly limited, and materials well known in this technical field can be used without limitation. .
- an AlN film as a buffer layer 602 is formed as ⁇ -Al 2 O 3 using the method for forming a group III nitride semiconductor thin film according to one embodiment of the present invention.
- An example in which a film is formed on a (0001) substrate will be described. More specifically, an example will be described in which an AlN film is formed on an ⁇ -Al 2 O 3 (0001) substrate using a sputtering method with high-frequency bias power applied to the bias electrode 103.
- the AlN film was formed using the same sputtering apparatus as in FIG.
- the frequencies of the high frequency power applied to the target electrode 102 and the high frequency power applied to the bias electrode 103 are 13.56 MHz and 13.54 MHz, respectively.
- the ⁇ -Al 2 O 3 (0001) substrate is transported to the vacuum vessel 101 held at 1 ⁇ 10 ⁇ 4 Pa or less in the first step and placed on the substrate holder 111.
- the substrate was held at a film forming temperature of 550 ° C.
- the current flowing to the heater electrode 104 was controlled so that the monitor value of the thermocouple built in the substrate holder 111 was 750 ° C.
- a mixed gas of N 2 gas and Ar gas is introduced so as to be N 2 / (N 2 + Ar): 25%, and the pressure of the vacuum vessel 101 is 3.75 mTorr (0.5 Pa).
- a high-frequency bias power of 10 W is applied to the bias electrode 103 by the fourth step, and a high-frequency power of 2000 W is applied from the sputtering high-frequency power source 106 to the target 108 made of metal Al, and a film is formed on the substrate by sputtering. A 50 nm thick AlN film was formed.
- XPS X-ray photoelectron spectroscopy
- the deposition temperature in this embodiment is embedded thermocouple performed beforehand substrate temperature measured by ⁇ -Al 2 O 3 (0001 ) substrate, at that time, ⁇ -Al 2 O 3 (0001 ) and the temperature of the substrate This is set from the relationship between the monitor value of the thermocouple built in the heater, that is, the temperature of the heater.
- the produced AlN film was measured by X-ray diffraction (XRD) measurement in the 2 ⁇ / ⁇ scan mode at the symmetric reflection position, XRC measurement in the ⁇ scan mode with respect to the symmetry plane, and ⁇ scan in the In-plane arrangement. It was evaluated by XRC measurement of the mode and coaxial type direct collision ion scattering spectroscopy (CAICISS: Coaxial Impact Collation Ion Scattering Spectroscopy) measurement.
- CAICISS Coaxial Impact Collation Ion Scattering Spectroscopy
- the XRC measurement in the ⁇ scan mode with respect to the symmetry plane and the XRC measurement in the ⁇ scan mode in the In-plane arrangement are Each was used to evaluate the mosaic spread of tilt and twist.
- the CAICISS measurement was used as a polarity determination means.
- XRC measurement in the ⁇ scan mode with respect to the symmetry plane (in this example, the AlN (0002) plane) was performed on the AlN film produced in this example.
- the FWHM of the obtained XRC profile was 450 arcsec or less when the detector was in an open detector state, and 100 arcsec or less when an analyzer crystal was inserted into the detector. Therefore, it was confirmed that the tilt mosaic spread in the fabricated AlN film was small.
- XRC measurement with an analyzer crystal inserted in the detector has a FWHM of 20 arcsec or less.
- the detector When the detector is in an open detector state is the original XRC measurement, but in the case of a thin film sample as in this embodiment, the FWHM of the XRC profile is widened by the film thickness effect and lattice relaxation, It becomes difficult to correctly evaluate the mosaic spread. Therefore, in recent years, as described above, even when an analyzer crystal is inserted into the detector, it is treated as a broad XRC measurement.
- the XRC measurement uses the open detector state.
- the a-axis of the AlN film was a 30 ° plane with respect to the a-axis of the ⁇ -Al 2 O 3 (0001) substrate. It was confirmed that it was rotating inward. This indicates that the AlN film is formed in a general epitaxial relationship when the AlN film is epitaxially grown on the ⁇ -Al 2 O 3 (0001) substrate.
- the AlN film produced in this example was a c-axis oriented epitaxial film having + c polarity and a small mosaic spread of tilt. That is, according to the present invention, it has been clarified that a group III nitride semiconductor thin film with + c polarity can be obtained while reducing the mosaic spread of tilt and twist. In addition, when the same experiment as this example was repeated several times, it was confirmed that the reproducibility was good.
- an AlN film manufactured by using the method for forming a group III nitride semiconductor thin film according to the present invention is used as a buffer layer, and a MOCVD method is used on the AlN film.
- a MOCVD method is used on the AlN film.
- a sputtering method is used to form an AlN film on an ⁇ -Al 2 O 3 (0001) substrate with the same apparatus and conditions as in the first embodiment, and then a wafer (substrate) is introduced into the MOCVD apparatus.
- An undoped GaN film having a thickness of 5 ⁇ m was formed.
- the surface of the obtained undoped GaN film was a mirror surface, and the XRD measurement in the 2 ⁇ / ⁇ scan mode at the symmetrical reflection position showed that the undoped GaN film was c-axis oriented.
- ⁇ scan mode XRC measurement using a GaN (0002) plane as a symmetry plane and ⁇ scan mode XRC measurement for the GaN ⁇ 10-10 ⁇ plane in an in-plane configuration were performed. It was confirmed that it was 250 arcsec or less and 500 arcsec or less. From this, it was found that the obtained undoped GaN film was obtained as a high-quality crystal with a small mosaic spread of tilt and twist.
- the polarity of the obtained undoped GaN film was + c polarity. As described in the first embodiment, this is because the polarity of the AlN film used as the buffer layer can be controlled to + c polarity, and thus the undoped GaN film formed thereon also takes over the polarity. be able to.
- the AlN film controlled to + c polarity which is produced using the method for forming a group III nitride semiconductor thin film according to the present invention, as a buffer layer, it is grown using the MOCVD method thereon.
- the undoped GaN film thus obtained can be obtained as a high-quality epitaxial film with little mosaic spread and controlled to + c polarity. That is, a + c polarity group III nitride semiconductor thin film can be epitaxially grown on the ⁇ -Al 2 O 3 substrate.
- the undoped GaN film is formed by the MOCVD method, but it has been confirmed that the same result can be obtained even by using the sputtering method. Moreover, when the same experiment as this example was repeated a plurality of times, it was confirmed that the reproducibility was good.
- an AlN film manufactured by using the method for forming a group III nitride semiconductor thin film according to the present invention is used as a buffer layer, and further, it is made of undoped GaN by using the MOCVD method.
- Group III nitride semiconductor intermediate layer n-type group III nitride semiconductor layer composed of Si-doped GaN, group III nitride semiconductor active layer having MQW structure of InGaN and GaN, p-type group III nitride semiconductor composed of Mg-doped GaN
- the layers are sequentially epitaxially grown, and further, an n-type electrode layer, a translucent electrode, a p-type electrode layer, and a protective film are formed, and then the wafer is separated by scribing to produce an LED element.
- a sputtering method was used to form an AlN film as a buffer layer 602 on the ⁇ -Al 2 O 3 (0001) substrate under the same conditions as in the first example. Thereafter, the wafer was introduced into the MOCVD apparatus, and a group III nitride semiconductor intermediate layer 603 made of undoped GaN having a thickness of 5 ⁇ m and an n-type group III nitride semiconductor layer 604 made of Si doped GaN having a thickness of 2 ⁇ m were formed. Formed.
- III-Nitride semiconductor active layer having a MQW structure in which five layers of InGaN having a film thickness of 3 nm and six layers of GaN having a film thickness of 16 nm are alternately stacked, starting from GaN and ending with GaN.
- a translucent electrode 607, a p-type bonding pad electrode 609, an n-type electrode 608, and a protective film 610 were formed on the obtained epitaxial wafer using a lithography technique and an RIE technique as shown in FIG.
- ITO Indium-Tin-Oxide
- Ti titanium
- Al aluminum
- Au gold
- Ni nickel
- Al, Ti, Au laminated structure, SiO 2 was used as a protective film.
- the wafer on which the LED structure thus obtained was formed was separated into 350 ⁇ m square LED chips by scribing, this LED chip was placed on a lead frame, and connected to the lead frame with a gold wire to connect with the LED element. did.
- an LED element having good light emission characteristics can be obtained by using the AlN film controlled to the + c polarity, which is manufactured by the method for forming a group III nitride semiconductor thin film according to the present invention, as the buffer layer 602.
- p-type group III nitride semiconductor layer 606 made of Mg-doped GaN is formed by MOCVD, but it has been confirmed that similar results can be obtained even if these layers are formed by sputtering. ing. Moreover, when the same experiment as this example was repeated a plurality of times, it was confirmed that the reproducibility was good.
- First comparative example As a first comparative example of the present invention, an AlN film is formed on an ⁇ -Al 2 O 3 (0001) substrate without applying high-frequency bias power to the bias electrode characteristic of the present invention using a sputtering method. An example will be described.
- the AlN film was formed by the same sputtering apparatus 1, substrate holder 111, and film formation conditions as those in the first example except that no high frequency bias power was applied to the bias electrode 103.
- the frequency of the high frequency power applied to the target electrode 102 is 13.56 MHz.
- a buffer layer made of AlN is formed on the ⁇ -Al 2 O 3 (0001) substrate by sputtering without applying high-frequency bias power to the bias electrode 103.
- An example will be described in which an undoped GaN film is formed thereon using MOCVD.
- the buffer layer made of AlN is formed using the same sputtering apparatus 1, substrate holder 111, and film formation conditions as in the first comparative example, and the undoped GaN film is the same as in the second embodiment. Film formation was performed under the same conditions.
- a buffer layer made of AlN is formed on an ⁇ -Al 2 O 3 (0001) substrate using the same sputtering apparatus 1, substrate holder 111, and film formation conditions as those in the first comparative example. Thereafter, a wafer was introduced into the MOCVD apparatus to form an undoped GaN film having a thickness of 5 ⁇ m.
- the surface of the obtained undoped GaN film is cloudy, and the XRD measurement in the 2 ⁇ / ⁇ scan mode at the symmetrical reflection position shows that the undoped GaN film is c-axis oriented.
- XRC measurement in the ⁇ scan mode using the GaN (0002) plane as the symmetry plane and ⁇ RC measurement in the ⁇ scan mode for the GaN ⁇ 10-10 ⁇ plane in the in-plane configuration were performed. It was confirmed that the FWHM was about 600 arcsec and about 1000 arcsec. From this, the undoped GaN film obtained by this comparative example is obtained as a low-quality crystal having a large mosaic spread of tilt and twist compared to the undoped GaN film obtained in the second embodiment. all right.
- the polarity of the obtained undoped GaN film was a film in which + c polarity and ⁇ c polarity were mixed. This is because, as described in the first comparative example, the buffer layer made of AlN is a film in which + c polarity and ⁇ c polarity are mixed, and therefore the undoped GaN film formed thereon is also mixed in polarity. Can be considered as a result of taking over.
- a buffer layer made of AlN is formed on an ⁇ -Al 2 O 3 (0001) substrate using a sputtering method without applying high-frequency bias power to the bias electrode,
- a group III nitride semiconductor intermediate layer made of undoped GaN, an n-type group III nitride semiconductor layer made of Si-doped GaN, and a group III nitride semiconductor having an MQW structure of InGaN and GaN, using MOCVD Layers, and a p-type group III nitride semiconductor layer made of Mg-doped GaN are epitaxially grown in sequence, and after forming an n-type electrode layer, a translucent electrode, a p-type electrode layer, and a protective film, the wafer is separated by scribing.
- the example which produced the LED element is demonstrated.
- the method of forming the buffer layer made of AlN is the same as that of the first comparative example.
- the group III nitride semiconductor intermediate layer made of undoped GaN formed by MOCVD and the n-type III made of Si-doped GaN are used.
- the material of the p-type electrode layer, the protective film, the film forming method, and the subsequent device forming steps are all the same as in the third embodiment.
- the p-type group III nitride semiconductor layer made of doped GaN is formed by the MOCVD method, it has been confirmed that the same result is obtained even when the sputtering method is used.
- the same experiment as this Example was repeated several times, the LED element which has a favorable light emission characteristic was not able to be obtained.
- the frequency of the high frequency power applied to the target electrode 102 and the frequency of the high frequency power applied to the bias electrode 103 are both 13.56 MHz and the phase is shifted by 180 °.
- the frequency of the high frequency power applied to the target electrode 102 and the frequency of the high frequency power applied to the bias electrode 103 are both 13.56 MHz, and the rest are the same devices as in the first embodiment, An example in which an AlN film is formed on an ⁇ -Al 2 O 3 (0001) substrate using the method for forming a group III nitride semiconductor thin film according to the present invention will be described.
- the phase of the high frequency power applied to the target electrode 102 and the high frequency power applied to the bias electrode 103 is not controlled.
- the main feature of the present invention is that high-frequency bias power is applied to the bias electrode when forming an epitaxial film of a group III nitride semiconductor by a sputtering method.
- the orientation is controlled by applying the electric field of the sheath region S generated on the film-forming surface side of the substrate by applying high-frequency bias power to the bias electrode to the polarization of nitride molecules emitted from the target, and utilizing the orientation.
- a heater electrode and a bias electrode are provided on the substrate holder under the technical idea unique to the present invention.
- the substrate holder By configuring the substrate holder in this way, as shown in the first to fourth embodiments and the first to fourth comparative examples described above, the mosaic spread of tilt and twist is reduced by the sputtering method.
- a group III nitride semiconductor thin film having + c polarity can be formed.
Abstract
Description
また、本発明の第二の態様に係る半導体発光素子の製造方法は、上述した第一の態様に係るエピタキシャル膜形成方法により半導体発光素子の緩衝層を形成する工程を有することを特徴とする。
さらに、本発明の第四の態様は、スパッタリング装置であって、ターゲットを配置できるターゲット電極と、前記ターゲット電極に向けて基板を配置でき、ヒーター電極及びバイアス電極を備えた基板ホルダーと、請求項1に記載された前記III族窒化物半導体薄膜のエピタキシャル膜を形成する工程を行う際に、前記ターゲット電極に印加された前記高周波電力と前記バイアス電極に印加される前記高周波バイアス電力との周波数干渉が生じないようにする周波数干渉抑制手段とを備えることを特徴とする。
図7Aは、スパッタリング用高周波電源106およびバイアス用高周波電源130として異なる周波数の高周波電源を用いた、後述する周波数干渉を抑制する手段(周波数干渉抑制手段)の一例である。符号701および702はマッチングボックスを示している。スパッタリング用高周波電源106からの高周波電力は、マッチングボックス701を介すことによって、反射波を低減してターゲット電極102へ供給され、バイアス用高周波電源130からの高周波電力は、マッチングボックス702を介すことによって、反射波を低減してバイアス電極103へと供給される。また、スパッタリング用高周波電源106とバイアス用高周波電源130とは、異なる周波数となるように設定されている。例えば、スパッタリング用高周波電源106の周波数を13.56MHzとした場合、バイアス用高周波電源130としては、13.54MHzや13.58MHzなどの周波数を用いることで、後述する周波数干渉を抑制することが可能となる。
なお、本明細書では、-c極性が無いないしは低減されたIII族窒化物半導体薄膜、すなわち、+c極性と-c極性との混在が低減され、+c極性の統一度が高いIII族窒化物半導体薄膜を、「+c極性のIII族窒化物半導体薄膜」と呼ぶことにする。
(第一の実施例)
本発明の第一の実施例として、本発明の一実施形態にかかるIII族窒化物半導体薄膜の成膜方法を用いて緩衝層602(図6参照)としてのAlN膜をα‐Al2O3(0001)基板上に成膜した例を説明する。より詳しくは、バイアス電極103に高周波バイアス電力を印加した状態で、α‐Al2O3(0001)基板上にスパッタリング法を用いてAlN膜を形成した例について説明する。なお、本実施例において、AlN膜は図1と同様のスパッタリング装置を用いて成膜した。また、ターゲット電極102に印加する高周波電力と、バイアス電極103に印加する高周波電力の周波数は、それぞれ、13.56MHz、13.54MHzとしている。
次に、本発明の第二の実施例として、本発明に係るIII族窒化物半導体薄膜の成膜方法を用いて作製したAlN膜を緩衝層とし、その上に、MOCVD法を用いて、図6のIII族窒化物半導体中間層603としてのアンドープGaN膜を形成した例について説明する。
本発明の第三の実施例として、本発明に係るIII族窒化物半導体薄膜の成膜方法を用いて作製したAlN膜を緩衝層とし、その上に、MOCVD法を用いて、アンドープGaNからなるIII族窒化物半導体中間層、SiドープGaNからなるn型III族窒化物半導体層、InGaNとGaNのMQW構造を有するIII族窒化物半導体活性層、MgドープGaNからなるp型III族窒化物半導体層を順次エピタキシャル成長し、更に、n型電極層、透光性電極、p型電極層、保護膜まで形成した後、ウェハーをスクライブにより分離しLED素子を作製した例について説明する。
本発明の第一の比較例として、本発明に特徴的なバイアス電極への高周波バイアス電力の印加を行わずにα‐Al2O3(0001)基板上にスパッタリング法を用いてAlN膜を形成した例について説明する。なお、本比較例において、AlN膜は、バイアス電極103へ高周波バイアス電力を印加しないことを除いて、第一の実施例と同一のスパッタリング装置1、基板ホルダー111、成膜条件により成膜した。また、ターゲット電極102に印加する高周波電力の周波数は、13.56MHzとしている。
次に、本発明の第二の比較例として、バイアス電極103への高周波バイアス電力の印加を行わずにα‐Al2O3(0001)基板上にスパッタリング法を用いてAlNからなる緩衝層を形成し、その上に、MOCVD法を用いて、アンドープGaN膜を形成した例について説明する。なお、本比較例において、AlNからなる緩衝層は第一の比較例と同一のスパッタリング装置1、基板ホルダー111、成膜条件にて成膜を行い、アンドープGaN膜は、第二の実施例と同様の条件にて成膜を行なった。
本発明の第三の比較例として、バイアス電極への高周波バイアス電力の印加を行わずにα‐Al2O3(0001)基板上にスパッタリング法を用いてAlNからなる緩衝層を形成し、その上に、MOCVD法を用いて、アンドープGaNからなるIII族窒化物半導体中間層、SiドープGaNからなるn型III族窒化物半導体層、InGaNとGaNとのMQW構造を有するIII族窒化物半導体活性層、MgドープGaNからなるp型III族窒化物半導体層を順次エピタキシャル成長し、更に、n型電極層、透光性電極、p型電極層、保護膜まで形成した後、ウェハーをスクライブにより分離しLED素子を作製した例について説明する。
本発明の第四の実施例として、ターゲット電極102に印加する高周波電力と、バイアス電極103に印加する高周波電力の周波数を共に13.56MHzとすると共に、位相を180°ずらし、その他は、第一の実施例と同様の装置、条件を用いて、本発明にかかるIII族窒化物半導体薄膜の成膜方法を用いてAlN膜をα‐Al2O3(0001)基板上に成膜した例について説明する。
本発明の第四の比較例として、ターゲット電極102に印加する高周波電力と、バイアス電極103に印加する高周波電力の周波数を共に13.56MHzとし、その他は、第一の実施例と同様の装置、条件を用いて、本発明にかかるIII族窒化物半導体薄膜の成膜方法を用いてAlN膜をα‐Al2O3(0001)基板上に成膜した例について説明する。なお、本比較例においては、ターゲット電極102に印加する高周波電力と、バイアス電極103に印加する高周波電力の位相の制御は行っていない。
Claims (13)
- ターゲットを配置できるターゲット電極と、前記ターゲット電極に向けて基板を配置でき、ヒーター電極及びバイアス電極を備えた基板ホルダーとを有するスパッタリング装置を用い、前記基板ホルダー上に配置されたα‐Al2O3基板に対して、スパッタリング法によってIII族窒化物半導体薄膜をエピタキシャル成長させるエピタキシャル膜形成方法であって、
前記基板ホルダー上に前記α‐Al2O3基板を配置する工程と、
前記基板ホルダー上に配置した前記α‐Al2O3基板上に前記III族窒化物半導体薄膜のエピタキシャル膜を形成する工程とを有し、
前記III族窒化物半導体薄膜のエピタキシャル膜を形成する工程は、
前記ヒーター電極によって前記α‐Al2O3基板を所定温度に保持し、
前記ターゲット電極に高周波電力を印加するとともに、前記バイアス電極に高周波バイアス電力を印加し、
前記高周波電力と前記高周波バイアス電力とは、前記高周波電力と前記高周波バイアス電力との周波数干渉が生じないように印加されることを特徴とするエピタキシャル膜形成方法。 - 前記高周波電力と前記高周波バイアス電力の周波数は、それぞれ異なる周波数が選択されることを特徴とする請求項1に記載のエピタキシャル膜形成方法。
- 前記高周波電力と前記高周波バイアス電力は、同じ周波数が選択されるとともに、位相差が180°になるように印加されることを特徴とする請求項1に記載のエピタキシャル膜形成方法。
- 前記バイアス電極は、一方の極性の直流電圧が印加される第1電極と、他方の極性の直流電圧が印加される第2電極とを有し、
前記第1電極及び前記第2電極に前記直流電圧を印加し、前記基板ホルダーに前記α‐Al2O3基板を静電吸着させるとともに、前記第1電極及び前記第2電極に前記高周波バイアス電力が印加された状態で、
前記α‐Al2O3基板上に前記III族窒化物半導体薄膜のエピタキシャル膜を形成することを特徴とする請求項1に記載のエピタキシャル膜形成方法。 - 前記高周波バイアス電力は、前記高周波電力が印加された後、且つ、前記α‐Al2O3基板の被成膜面がIII族窒化物半導体からなる結晶層で覆われるよりも前に印加されることを特徴とする請求項1に記載のエピタキシャル膜形成方法。
- 請求項1に記載されたエピタキシャル膜形成方法により半導体発光素子の緩衝層を形成する工程を有することを特徴とする半導体発光素子の製造方法。
- 前記α‐Al2O3基板上に緩衝層、III族窒化物半導体中間層、n型III族窒化物半導体層、III族窒化物半導体活性層、p型III族窒化物半導体層、透光性電極が少なくとも形成された半導体発光素子であって、
前記緩衝層、前記III族窒化物半導体中間層、前記n型III族窒化物半導体層、前記III族窒化物半導体活性層、前記p型III族窒化物半導体層の少なくとも1つの層は、請求項1に記載されたエピタキシャル膜形成方法によって作製されたことを特徴とする半導体発光素子。 - 請求項7に記載の半導体発光素子を備えることを特徴とする照明装置。
- ターゲットを配置できるターゲット電極と、
前記ターゲット電極に向けて基板を配置でき、ヒーター電極及びバイアス電極を備えた基板ホルダーと、
請求項1に記載された前記III族窒化物半導体薄膜のエピタキシャル膜を形成する工程を行う際に、前記ターゲット電極に印加された前記高周波電力と前記バイアス電極に印加される前記高周波バイアス電力との周波数干渉が生じないようにする周波数干渉抑制手段と
を備えることを特徴とするスパッタリング装置。 - 請求項1に記載された前記III族窒化物半導体薄膜のエピタキシャル膜を形成する工程を行う際に、
前記高周波電力と前記高周波バイアス電力の周波数は、それぞれ異なる周波数が選択されることを特徴とする請求項9に記載のスパッタリング装置。 - 請求項1に記載された前記III族窒化物半導体薄膜のエピタキシャル膜を形成する工程を行う際に、
前記高周波電力と前記高周波バイアス電力は、同じ周波数が選択されるとともに、位相差が180°になるように印加されることを特徴とする請求項9に記載のスパッタリング装置。 - 前記バイアス電極は、一方の極性の直流電圧が印加される第1電極と、他方の極性の直流電圧が印加される第2電極とを有し、
請求項1に記載された前記III族窒化物半導体薄膜のエピタキシャル膜を形成する工程を行う際に、
前記第1電極及び前記第2電極には前記直流電圧が印加され、前記基板ホルダーには前記α‐Al2O3基板を静電吸着させるとともに、前記第1電極及び前記第2電極には前記高周波バイアス電力が印加させることを特徴とする請求項9に記載のスパッタリング装置。 - 請求項1に記載された前記III族窒化物半導体薄膜のエピタキシャル膜を形成する工程を行う際に、
前記バイアス電極には、前記高周波電力が印加された後、且つ、前記α‐Al2O3基板の被成膜面がIII族窒化物半導体からなる結晶層で覆われるよりも前に前記高周波バイアス電力が印加されることを特徴とする請求項9に記載のスパッタリング装置。
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WO2014002465A1 (ja) * | 2012-06-26 | 2014-01-03 | キヤノンアネルバ株式会社 | エピタキシャル膜形成方法、スパッタリング装置、半導体発光素子の製造方法、半導体発光素子、および照明装置 |
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JP5444460B2 (ja) * | 2010-04-30 | 2014-03-19 | キヤノンアネルバ株式会社 | エピタキシャル膜形成方法、真空処理装置、半導体発光素子の製造方法、半導体発光素子、照明装置 |
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Also Published As
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JPWO2012090422A1 (ja) | 2014-06-05 |
US20170309480A1 (en) | 2017-10-26 |
KR101564251B1 (ko) | 2015-10-29 |
JP5576507B2 (ja) | 2014-08-20 |
KR20130095830A (ko) | 2013-08-28 |
CN103329248A (zh) | 2013-09-25 |
CN103329248B (zh) | 2015-12-16 |
US20130277206A1 (en) | 2013-10-24 |
US10844470B2 (en) | 2020-11-24 |
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