WO2011089918A1 - 注入同期型分周器及びpll回路 - Google Patents
注入同期型分周器及びpll回路 Download PDFInfo
- Publication number
- WO2011089918A1 WO2011089918A1 PCT/JP2011/000317 JP2011000317W WO2011089918A1 WO 2011089918 A1 WO2011089918 A1 WO 2011089918A1 JP 2011000317 W JP2011000317 W JP 2011000317W WO 2011089918 A1 WO2011089918 A1 WO 2011089918A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- signal
- injection
- frequency
- channel mos
- frequency divider
- Prior art date
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Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/26—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback
- H03K3/28—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback
- H03K3/281—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator
- H03K3/286—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator bistable
- H03K3/288—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator bistable using additional transistors in the input circuit
- H03K3/2885—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator bistable using additional transistors in the input circuit the input circuit having a differential configuration
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
Abstract
Description
図6は、本発明の実施の形態1に係る注入同期型分周器の構成を示す回路図である。本実施の形態は、PLL回路に搭載される注入同期型分周器に適用可能である。
図12は、本発明の実施の形態2に係る注入同期型分周器の構成を示す回路図である。図6と同一構成部分には同一符号を付して重複箇所の説明を省略する。
図14は、本発明の実施の形態3に係る注入同期型分周器の構成を示す回路図である。図12と同一構成部分には同一符号を付して重複箇所の説明を省略する。
図15は、本発明の実施の形態4に係る固定分周回路(プリスケーラ)の構成を示す図である。
図16は、本発明の実施の形態5に係るPLL回路の構成を示す図である。
111,121,131,150,212,222,232,251,252,253,350 NチャネルMOS型トランジスタ
112,122,132,212,222,232 PチャネルMOS型トランジスタ
140,240 リング発振器
141 第1増幅回路
142 第2増幅回路
143 第3増幅回路
160 差動信号注入回路
250 電流源
400 固定分周回路
410 基準信号発振器
420 電圧制御発振器
430 位相周波数比較器
440 チャージポンプ
450 ループフィルタ
500 PLL回路
Claims (4)
- NチャネルMOS型トランジスタとPチャネルMOS型トランジスタとを含む増幅回路をリング状に(2n+1)(nは任意の自然数)段縦続接続したリング発振器と、
前記リング発振器に接続され、前記リング発振器を駆動させるNチャネルMOS型トランジスタからなる電流源と、
前記リング発振器に注入信号を出力し、前記電流源に前記注入信号の逆相信号を差動信号として出力する差動信号注入回路と、
を備え、
前記電流源の前記NチャネルMOS型トランジスタのドレインは、前記リング発振器のNチャネルMOS型トランジスタのソースに接続し、
前記差動信号注入回路は、前記リング発振器のPチャネルMOS型トランジスタのゲートに前記注入信号を出力し、かつ、前記電流源の前記NチャネルMOS型トランジスタのゲートに前記差動信号を出力する、
注入同期型分周器。 - 前記リング発振器の出力段は、前記注入信号を基に増幅した信号と前記差動信号を基に増幅した信号とを同相で重ね合わせて出力する請求項1記載の注入同期型分周器。
- 前記差動信号注入回路は、前記リング発振器の発振周波数のm(2n+1)(mは任意の自然数)倍の周波数の信号を注入する請求項1記載の注入同期型分周器。
- 基準信号を出力する基準信号発振器と、
高周波信号を出力する電圧制御発振器と、
前記高周波信号を分周する注入同期型分周器と、
前記注入同期型分周器の分周と前記基準信号発振器の出力信号とを比較し、位相と周波数の誤差を出力する位相周波数比較器と、
前記位相周波数比較器により検波された位相と周波数の誤差を電流に変換するチャージポンプと、
前記電圧制御発振器の制御電圧を生成し、生成した制御電圧を前記電圧制御発振器に出力するループフィルタとを備え、前記制御電圧は、前記位相周波数比較器で検波される誤差が小さくなるように前記電圧制御発振器を制御する、周波数負帰還動作を行うPLL回路であって、
前記注入同期型分周器は、請求項1に記載の注入同期型分周器であるPLL回路。
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP11734525.6A EP2528232B1 (en) | 2010-01-22 | 2011-01-21 | Injection-locked frequency divider and pll circuit |
JP2011519541A JP5480896B2 (ja) | 2010-01-22 | 2011-01-21 | 注入同期型奇数分周器及びpll回路 |
US13/266,160 US8466721B2 (en) | 2010-01-22 | 2011-01-21 | Injection locked frequency divider and PLL circuit |
CN201180001435.2A CN102356547B (zh) | 2010-01-22 | 2011-01-21 | 注入锁定分频器、以及锁相环电路 |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2010-012131 | 2010-01-22 | ||
JP2010012131 | 2010-01-22 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2011089918A1 true WO2011089918A1 (ja) | 2011-07-28 |
Family
ID=44306721
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP2011/000317 WO2011089918A1 (ja) | 2010-01-22 | 2011-01-21 | 注入同期型分周器及びpll回路 |
Country Status (5)
Country | Link |
---|---|
US (1) | US8466721B2 (ja) |
EP (1) | EP2528232B1 (ja) |
JP (2) | JP5480896B2 (ja) |
CN (2) | CN102356547B (ja) |
WO (1) | WO2011089918A1 (ja) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPWO2014136399A1 (ja) * | 2013-03-05 | 2017-02-09 | パナソニック株式会社 | 注入同期型発振器 |
US9847785B2 (en) | 2014-03-13 | 2017-12-19 | Mitsubishi Electric Corporation | Phase locked loop circuit and method of frequency adjustment of injection locked frequency divider |
Families Citing this family (12)
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US9099956B2 (en) | 2011-04-26 | 2015-08-04 | King Abdulaziz City For Science And Technology | Injection locking based power amplifier |
JP5761232B2 (ja) * | 2013-03-01 | 2015-08-12 | ソニー株式会社 | 受信装置および電子機器 |
US9106234B2 (en) | 2013-03-15 | 2015-08-11 | Qualcomm Incorporated | Programmable frequency divider for local oscillator generation |
WO2015042814A1 (en) * | 2013-09-25 | 2015-04-02 | Huawei Technologies Co., Ltd. | Wideband injection locked frequency multipliers, oscillators and dividers using higher order lc resonant tank |
US9219486B2 (en) * | 2013-11-18 | 2015-12-22 | California Institute Of Technology | Quadrature-based injection locking of ring oscillators |
CN104579319B (zh) * | 2014-04-22 | 2019-04-09 | 上海华虹宏力半导体制造有限公司 | 多相位时钟生成器 |
CN105262484B (zh) * | 2015-11-17 | 2018-04-24 | 中山大学 | 实现环形振荡器注入锁定的方法及其电路 |
US10411716B2 (en) | 2016-06-06 | 2019-09-10 | Richwave Technology Corp. | Subsampling motion detector for detecting motion of object under measurement |
US10942255B2 (en) * | 2018-10-11 | 2021-03-09 | Globalfoundries U.S. Inc. | Apparatus and method for integrating self-test oscillator with injection locked buffer |
CN109560774B (zh) * | 2018-11-28 | 2021-09-14 | 电子科技大学 | 一种能在不同频段实现不同分频比功能的注入锁定分频器 |
TWI726791B (zh) | 2019-08-14 | 2021-05-01 | 創未來科技股份有限公司 | 訊號除頻器、訊號分佈系統與其相關方法 |
US10715038B1 (en) * | 2019-11-29 | 2020-07-14 | Realtek Semiconductor Corp. | Apparatus and method for frequency quintupling |
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JP2010012131A (ja) | 2008-07-07 | 2010-01-21 | Toshiba Corp | 超音波診断装置 |
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2011
- 2011-01-21 CN CN201180001435.2A patent/CN102356547B/zh not_active Expired - Fee Related
- 2011-01-21 WO PCT/JP2011/000317 patent/WO2011089918A1/ja active Application Filing
- 2011-01-21 JP JP2011519541A patent/JP5480896B2/ja not_active Expired - Fee Related
- 2011-01-21 US US13/266,160 patent/US8466721B2/en not_active Expired - Fee Related
- 2011-01-21 EP EP11734525.6A patent/EP2528232B1/en not_active Not-in-force
- 2011-01-21 CN CN201410081843.9A patent/CN103997318B/zh not_active Expired - Fee Related
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2014
- 2014-02-13 JP JP2014025392A patent/JP5793698B2/ja not_active Expired - Fee Related
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JPH0548402A (ja) * | 1991-08-19 | 1993-02-26 | Nippon Telegr & Teleph Corp <Ntt> | スタテイツク型フリツプフロツプ回路 |
JPH09246957A (ja) * | 1996-03-08 | 1997-09-19 | Toshiba Corp | 分周器 |
JPH1093399A (ja) | 1996-09-19 | 1998-04-10 | Toshiba Corp | 注入同期リング発振器 |
JP2010012131A (ja) | 2008-07-07 | 2010-01-21 | Toshiba Corp | 超音波診断装置 |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPWO2014136399A1 (ja) * | 2013-03-05 | 2017-02-09 | パナソニック株式会社 | 注入同期型発振器 |
US9847785B2 (en) | 2014-03-13 | 2017-12-19 | Mitsubishi Electric Corporation | Phase locked loop circuit and method of frequency adjustment of injection locked frequency divider |
Also Published As
Publication number | Publication date |
---|---|
EP2528232B1 (en) | 2018-08-01 |
JPWO2011089918A1 (ja) | 2013-05-23 |
EP2528232A1 (en) | 2012-11-28 |
US8466721B2 (en) | 2013-06-18 |
US20120038396A1 (en) | 2012-02-16 |
JP5793698B2 (ja) | 2015-10-14 |
CN102356547A (zh) | 2012-02-15 |
CN103997318B (zh) | 2016-08-31 |
JP5480896B2 (ja) | 2014-04-23 |
CN102356547B (zh) | 2014-04-09 |
JP2014123973A (ja) | 2014-07-03 |
CN103997318A (zh) | 2014-08-20 |
EP2528232A4 (en) | 2016-10-19 |
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