WO2011067281A1 - Metallisierung mit hoher leistungsverträglichkeit und hoher elektrischer leitfähigkeit - Google Patents
Metallisierung mit hoher leistungsverträglichkeit und hoher elektrischer leitfähigkeit Download PDFInfo
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- WO2011067281A1 WO2011067281A1 PCT/EP2010/068628 EP2010068628W WO2011067281A1 WO 2011067281 A1 WO2011067281 A1 WO 2011067281A1 EP 2010068628 W EP2010068628 W EP 2010068628W WO 2011067281 A1 WO2011067281 A1 WO 2011067281A1
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- WIPO (PCT)
- Prior art keywords
- metallization
- layer
- upper layer
- substrate
- metallization according
- Prior art date
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- 238000001465 metallisation Methods 0.000 title claims abstract description 66
- 239000010936 titanium Substances 0.000 claims abstract description 8
- 229910052802 copper Inorganic materials 0.000 claims abstract description 4
- 239000000758 substrate Substances 0.000 claims description 54
- 238000000034 method Methods 0.000 claims description 22
- 238000010897 surface acoustic wave method Methods 0.000 claims description 12
- 229920002120 photoresistant polymer Polymers 0.000 claims description 9
- 238000004519 manufacturing process Methods 0.000 claims description 4
- 229910052709 silver Inorganic materials 0.000 claims description 3
- 150000003609 titanium compounds Chemical class 0.000 claims description 3
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 2
- 238000004140 cleaning Methods 0.000 claims description 2
- 239000000470 constituent Substances 0.000 claims description 2
- 229910052737 gold Inorganic materials 0.000 claims description 2
- 229910052763 palladium Inorganic materials 0.000 claims description 2
- 229910052697 platinum Inorganic materials 0.000 claims description 2
- 229910045601 alloy Inorganic materials 0.000 claims 3
- 239000000956 alloy Substances 0.000 claims 3
- 229910018134 Al-Mg Inorganic materials 0.000 claims 1
- 229910018182 Al—Cu Inorganic materials 0.000 claims 1
- 229910018467 Al—Mg Inorganic materials 0.000 claims 1
- 229910017818 Cu—Mg Inorganic materials 0.000 claims 1
- 229910013641 LiNbO 3 Inorganic materials 0.000 claims 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 abstract description 7
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 abstract description 7
- 229910052782 aluminium Inorganic materials 0.000 abstract description 7
- 229910052719 titanium Inorganic materials 0.000 abstract description 7
- 239000010949 copper Substances 0.000 abstract description 5
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 abstract description 3
- 125000004429 atom Chemical group 0.000 description 6
- 238000005530 etching Methods 0.000 description 5
- 238000001000 micrograph Methods 0.000 description 4
- 239000007772 electrode material Substances 0.000 description 3
- WSMQKESQZFQMFW-UHFFFAOYSA-N 5-methyl-pyrazole-3-carboxylic acid Chemical compound CC1=CC(C(O)=O)=NN1 WSMQKESQZFQMFW-UHFFFAOYSA-N 0.000 description 2
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- GQYHUHYESMUTHG-UHFFFAOYSA-N lithium niobate Chemical compound [Li+].[O-][Nb](=O)=O GQYHUHYESMUTHG-UHFFFAOYSA-N 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- NJPPVKZQTLUDBO-UHFFFAOYSA-N novaluron Chemical compound C1=C(Cl)C(OC(F)(F)C(OC(F)(F)F)F)=CC=C1NC(=O)NC(=O)C1=C(F)C=CC=C1F NJPPVKZQTLUDBO-UHFFFAOYSA-N 0.000 description 2
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 2
- 238000002360 preparation method Methods 0.000 description 2
- 239000004332 silver Substances 0.000 description 2
- 101100346656 Drosophila melanogaster strat gene Proteins 0.000 description 1
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- 241000033695 Sige Species 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- AZDRQVAHHNSJOQ-UHFFFAOYSA-N alumane Chemical group [AlH3] AZDRQVAHHNSJOQ-UHFFFAOYSA-N 0.000 description 1
- 238000000137 annealing Methods 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000011109 contamination Methods 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000005137 deposition process Methods 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 239000000284 extract Substances 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 239000004922 lacquer Substances 0.000 description 1
- 125000004433 nitrogen atom Chemical group N* 0.000 description 1
- 238000012856 packing Methods 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 238000002203 pretreatment Methods 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 239000002904 solvent Substances 0.000 description 1
- 239000002966 varnish Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49838—Geometry or layout
- H01L23/49844—Geometry or layout for devices being provided for in H01L29/00
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N30/00—Piezoelectric or electrostrictive devices
- H10N30/80—Constructional details
- H10N30/87—Electrodes or interconnections, e.g. leads or terminals
- H10N30/877—Conductive materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49866—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
- H03H9/02—Details
- H03H9/02535—Details of surface acoustic wave devices
- H03H9/02818—Means for compensation or elimination of undesirable effects
- H03H9/02929—Means for compensation or elimination of undesirable effects of ageing changes of characteristics, e.g. electro-acousto-migration
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
- H03H9/02—Details
- H03H9/125—Driving means, e.g. electrodes, coils
- H03H9/145—Driving means, e.g. electrodes, coils for networks using surface acoustic waves
- H03H9/14538—Formation
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/09—Use of materials for the conductive, e.g. metallic pattern
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
- H05K3/388—Improvement of the adhesion between the insulating substrate and the metal by the use of a metallic or inorganic thin film adhesion layer
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N30/00—Piezoelectric or electrostrictive devices
- H10N30/01—Manufacture or treatment
- H10N30/06—Forming electrodes or interconnections, e.g. leads or terminals
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N30/00—Piezoelectric or electrostrictive devices
- H10N30/80—Constructional details
- H10N30/85—Piezoelectric or electrostrictive active materials
- H10N30/853—Ceramic compositions
- H10N30/8542—Alkali metal based oxides, e.g. lithium, sodium or potassium niobates
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N30/00—Piezoelectric or electrostrictive devices
- H10N30/80—Constructional details
- H10N30/87—Electrodes or interconnections, e.g. leads or terminals
- H10N30/872—Interconnections, e.g. connection electrodes of multilayer piezoelectric or electrostrictive devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0263—High current adaptations, e.g. printed high current conductors or using auxiliary non-printed means; Fine and coarse circuit patterns on one circuit board
- H05K1/0265—High current adaptations, e.g. printed high current conductors or using auxiliary non-printed means; Fine and coarse circuit patterns on one circuit board characterized by the lay-out of or details of the printed conductors, e.g. reinforced conductors, redundant conductors, conductors having different cross-sections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0335—Layered conductors or foils
- H05K2201/0338—Layered conductor, e.g. layered metal substrate, layered finish layer or layered thin film adhesion layer
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/04—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching
- H05K3/046—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching by selective transfer or selective detachment of a conductive layer
- H05K3/048—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching by selective transfer or selective detachment of a conductive layer using a lift-off resist pattern or a release layer pattern
Definitions
- the invention relates to metallization with high power resistance and high electrical conductivity for stromtra ⁇ ing structures and methods for their preparation.
- the invention particularly relates to metallizations for current-carrying structures for working with acoustic waves components.
- Metallizations for operating with acoustic waves components from which, for example, bus bars, the bus bars are formed with associated electrode fingers or reflector structures on a piezoelectric substrate, are particularly preferred performance firmly extracts ⁇ Stalten.
- Bulk acoustic wave (BAW) or surface acoustic wave (SAW) propagation within a solid or on its surface; their frequencies are in the GHz range.
- SAW surface acoustic wave
- To take the current-carrying (electrode) structures which high-frequency electrical signals into acoustic waves or reverse acoustic waves into electrical radio frequency signals umwan ⁇ spindles have thus withstand the one hand, the electrical currents and at the other ⁇ hand, the mechanical deformation due to the acoustic waves, without damage.
- an electrode structure is arranged on monocrystalline lithium tantalate or lithium niobate.
- the electrode structure comprises a first layer of titanium.
- a second layer deposited thereon comprises aluminum.
- the second layer comprises two ⁇ 1 1 1> domains.
- Methods for producing the electrode layers relate to the epitaxial growth of the layer comprising aluminum.
- the growth of a layer deposited on a substrate is said to be epitaxial when the orientation of the atoms of the layer is oriented to the orientation of the atoms of the substrate.
- a general problem with epitaxial growth is to provide a suitable surface. Because the nature of the surface of the substrate - as cut ⁇ interface between substrate and coating - influences the Ord ⁇ voltage of the atoms of the deposited layer significantly. Usually, substrates are therefore pretreated by annealing or by etching. Between the pre-treatment and the actual deposition process, the surface of the substrate must no longer be contaminated with impurities. The use of the lift-off technique when depositing
- Electrode structures on substrates are problematic when it comes to a particularly "clean" substrate surface, because in the first step a resist layer is applied to the optionally pretreated substrate surface, in further process steps this lacquer layer is then partially exposed and the exposed areas removed in a further process step. at the formerly be ⁇ exposed areas, the substrate surface is now back free. But these had now both the varnish layer and with the solvent, which removed the exposed resist ⁇ layer, contact. The substrate surface is therefore contaminated.
- etching method is based on applying the electrode material over a large area to the given ⁇ pretreated substrate surface and to obtain the electrode structures by etching away the unwanted coverage areas of the electrode material: überflüs ⁇ siges electrode material is removed.
- Object of the present invention is to provide a Metallisie ⁇ tion for current-carrying structures, which is performance-resistant, which has high electrical conductivities ⁇ and which is compatible with both etching and lift-off method.
- the invention provides a metallization for current-carrying structures, which may find application in electrical components, wherein the metallization is disposed on a substrate.
- the metallization comprises a base and an upper layer arranged thereon.
- the base comprises a lower layer, which is arranged above or directly on the substrate surface ⁇ .
- the lower layer comprises titanium as a main component or a titanium compound.
- the base further comprises an upper layer, which is arranged above or di ⁇ rectly on the lower layer and as Hauptbe ⁇ constituent copper comprises.
- the upper layer is arranged directly on the upper layer and comprises aluminum as its main component.
- ⁇ sene, structured, highly-textured electrode structure has a very high electrical conductivity and high mechanical strength ⁇ African performance. It is particularly advantageous that such an electrode structure can be structured both by means of etching processes and by means of a lift-off process. The possible contamination of the substrate during the lift-off process does not hinder the formation of a highly textured layer. Such electrode structures can therefore be manufactured in high quality and with high reproducibility in a simple manner.
- the out-of-plane texture of an electrode produced in this way or its upper layer can be a ⁇ 1 1 1> texture.
- Such a texture is distinguished in that its ⁇ 1 1 1> direction - that is to say the spatial diagonal of the cubic face-centered unit cell - coincides with the surface normal of the substrate.
- the in-plane texture is also aligned with the texture predefined by the substrate surface.
- the pedestal serves primarily to provide the upper layer with a defined, ie atomically as uniform as possible, surface on which the upper layer is provided then - as epitaxially as possible - can grow up.
- the upper layer in turn is intended to carry primarily electrical currents.
- the base comprises a middle one
- the middle layer comprises a Ele ⁇ ment, which is more noble than aluminum, that has a higher (on hydrogen normalized) standard electrode potential.
- the bottom layer of the socket is thinner than the top layer of the socket.
- the lower layer is a titanium layer in question.
- a titanium layer or a layer comprising titanium is preferably thicker than about 2 nm and thinner than about 20 nm. If the lower layer is too thin, there is a risk that the effect of good texturing is eliminated. A too thick lower layer leads to increased Rau ⁇ ability and also in deteriorated texture.
- the top layer is thinner than the top layer.
- An object of the upper layer can transmit "surface information" to the upper layer to be sailed ⁇ hen, therein. Therefore, a relatively thin upper layer is be ⁇ vorzugt.
- the electrical current carrying substantially the upper layer which, therefore, also preferably a lower having electrical resistivity than the base.
- each individual layer of the base can have a higher conductivity ⁇ ness than the upper layer.
- the upper layer then has the lower resistance due to its thickness.
- a relatively thick top layer is advantageous.
- An advantageous upper layer, eg made of Cu, is between 1 and 30 nm thick Cu comprehensive upper layer is also a highly textured, AI comprehensive layer not sufficiently powerful.
- the middle layer is thinner than the lower layer or thinner than the upper layer.
- the material cost for the middle layer, wel ⁇ che expensive Ag may include reduced; the separation time is shortened.
- a relatively thin middle layer a good texture is obtained.
- a preferred thickness of the middle layer for an optimal texture, z. B. a middle layer of Ag, is between 0.5 nm and 10 nm.
- the lower layer comprises nitrogen atoms.
- TiN is provided as the material of the lower layer.
- the middle layer comprises gold, silver, platinum or palladium.
- a metallization comprises a base of a lower layer comprising as a main component is titanium or a titanium compound, of an upper layer with the main component of copper and of a central layer comprising silver , In this case, the middle layer is arranged between the lower layer and the upper layer.
- a metallization, whose upper layer is arranged on such a base, has a particularly high power resistance.
- the top layer has a ⁇ 1 1 1> texture.
- the ⁇ 1 1 1> direction is the direction of the spatial diagonals of the unit cell of the upper layer. This direction agrees with the direction of the surface normals of the sub- strats.
- the ⁇ 1 1 1> direction runs vertically through densest possible packed layers of aluminum atoms.
- a metallization according to the invention has not only an in-plane texture (the atoms of the electrode are oriented in the directions parallel to the substrate surface) but also an out-of-plane texture (the atoms of the electrode are normal in one direction Substratoberflä ⁇ che aligned).
- the top layer of the metallization has a twin or a single texture.
- the atoms of the upper layer are aligned in hexagonally arranged atomic layers.
- a single texture has a higher degree of order than a twin texture.
- the twin texture differs from the simple texture in that two of the possible orientations of different atomic layers are realized. In the single texture, a given relative orientation of adjacent atomic layers to each other is maintained by all layers.
- a piezoelectric layer is disposed between the substrate and the lower layer of the metallization.
- the substrate itself is piezoelectric.
- Such a substrate or the piezoelectric layer may comprise, for example, lithium tantalate or lithium niobate.
- Such a device may be a bulk acoustic wave device.
- a metallization according to the invention is used in a device working with surface acoustic waves.
- the use of Me ⁇ metallization in a working surface acoustic wave duplexer is possible.
- a method according to the invention for producing such a metallization comprises the steps
- a metallization according to the invention also has a high performance strength and a good electrical conductivity when WOR applied to a substrate with ⁇ means of a lift-off technique to is, opens up in the manufacture of components corresponding metallization now more freedom.
- a method for producing a metallization according to the invention may comprise the steps
- the patterning of the photoresist can thereby producing ei ⁇ ner known.
- Negative structure represent.
- FIG. 1 shows a cross section through a structured metallization arranged on a substrate
- FIG. 2 shows a cross section through a structured metallization arranged on a substrate, which is arranged on a piezoelectric layer on the substrate surface,
- FIG. 2 shows a micrograph of the in-plane texturing of a conventional metallization arranged on a substrate by means of a lift-off technique
- FIG. 3b shows a microscope image of the in-plane texturing of a metallization according to the invention, which is shown in FIG Lift-off technique was applied to a substrate.
- FIG. 1 shows the cross-section of a metallization M with an upper layer TL, which is arranged on a base.
- the base includes an upper layer UL and a lower layer BL.
- the base of upper layer UL and lower layer BL is angeord ⁇ net on the surface of a substrate S.
- the metallization consisting of upper layer TL and Sokel UL, BL, for example, the metallization for the
- FIG. 1 shows the cross section through such an electrode finger.
- FIG. 2 shows a cross section through a further embodiment of the metallization M.
- the metallization M comprises an upper layer TL on a pedestal.
- the base is formed by an upper layer UL, a lower layer BL and, as a further part, by a middle layer ML.
- a piezoelectric layer PL is arranged between the Sub ⁇ strat S and the lower layer BL of the metallization M.
- corresponding electrodes formed from the metallization convert electrical high-frequency signals into acoustic waves (BAW or SAW) or vice versa acoustic waves into electrical high-frequency signals.
- Acoustic surface waves propagate on the surface of a substrate.
- the substrate In order to be able to induce surface acoustic waves on the surface of the substrate, the substrate must interact with the electric field distribution between electrode fingers of different polarity. If the substrate is piezoelectric, the electrical high-frequency alternating fields can directly excite surface acoustic waves in the substrate. If the substrate is not piezoelectric, a piezoelectric layer PL is required at least on the surface of the substrate S between the substrate and metallization M ⁇ tion.
- FIG. 3a shows a micrograph of a non-or hardly bes ⁇ case scenario, structured electrode surface, which was measured by a lift-off method on a substrate angeord ⁇ net and patterned.
- FIG. 3b shows a microscope image of a highly textured metallization according to the invention, which was likewise produced on a substrate by means of lift-off processes.
- the threefold symmetry of the texturing, which corresponds to a hexagonal mesh, can be clearly recognized.
- a metallization according to the invention is not limited to one of the described embodiments. Variations which, for example, further layers or plies umfas ⁇ sen or the layers or plies comprise further elements, illustrate embodiments of the present invention as well.
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- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Acoustics & Sound (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Manufacturing & Machinery (AREA)
- Inorganic Chemistry (AREA)
- Geometry (AREA)
- Materials Engineering (AREA)
- Ceramic Engineering (AREA)
- Surface Acoustic Wave Elements And Circuit Networks Thereof (AREA)
- Parts Printed On Printed Circuit Boards (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
Description
Claims
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2012541486A JP5878127B2 (ja) | 2009-12-02 | 2010-12-01 | 高い耐電力性及び高い導電性を有するメタライジング層 |
KR1020127015150A KR101761955B1 (ko) | 2009-12-02 | 2010-12-01 | 높은 출력 호환성 및 높은 전기 전도도를 포함한 금속배선 |
US13/509,181 US9173305B2 (en) | 2009-12-02 | 2010-12-01 | Metallization having high power compatibility and high electrical conductivity |
CN201080054640.0A CN102763492B (zh) | 2009-12-02 | 2010-12-01 | 具有高电源兼容性和高导电性的金属化部 |
US14/867,759 US9728705B2 (en) | 2009-12-02 | 2015-09-28 | Metallization having high power compatibility and high electrical conductivity |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE102009056663.5A DE102009056663B4 (de) | 2009-12-02 | 2009-12-02 | Metallisierung mit hoher Leistungsverträglichkeit und hoher elektrischer Leitfähigkeit und Verfahren zur Herstellung |
DE102009056663.5 | 2009-12-02 |
Related Child Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US13/509,181 A-371-Of-International US9173305B2 (en) | 2009-12-02 | 2010-12-01 | Metallization having high power compatibility and high electrical conductivity |
US14/867,759 Division US9728705B2 (en) | 2009-12-02 | 2015-09-28 | Metallization having high power compatibility and high electrical conductivity |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2011067281A1 true WO2011067281A1 (de) | 2011-06-09 |
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JP (2) | JP5878127B2 (de) |
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DE102009056663B4 (de) * | 2009-12-02 | 2022-08-11 | Tdk Electronics Ag | Metallisierung mit hoher Leistungsverträglichkeit und hoher elektrischer Leitfähigkeit und Verfahren zur Herstellung |
CN109660224B (zh) * | 2018-12-18 | 2023-03-24 | 北方民族大学 | 滤波器用复合压电基片及其制备方法 |
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2010
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- 2010-12-01 US US13/509,181 patent/US9173305B2/en active Active
- 2010-12-01 KR KR1020127015150A patent/KR101761955B1/ko active IP Right Grant
- 2010-12-01 JP JP2012541486A patent/JP5878127B2/ja active Active
- 2010-12-01 WO PCT/EP2010/068628 patent/WO2011067281A1/de active Application Filing
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Also Published As
Publication number | Publication date |
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DE102009056663A1 (de) | 2011-06-09 |
CN105702660A (zh) | 2016-06-22 |
US20120280595A1 (en) | 2012-11-08 |
JP2013513232A (ja) | 2013-04-18 |
JP2016040944A (ja) | 2016-03-24 |
US9173305B2 (en) | 2015-10-27 |
CN102763492A (zh) | 2012-10-31 |
JP6450669B2 (ja) | 2019-01-09 |
US20160020378A1 (en) | 2016-01-21 |
US9728705B2 (en) | 2017-08-08 |
KR101761955B1 (ko) | 2017-07-26 |
CN102763492B (zh) | 2016-04-13 |
JP5878127B2 (ja) | 2016-03-08 |
DE102009056663B4 (de) | 2022-08-11 |
KR20120094489A (ko) | 2012-08-24 |
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