WO2011061991A1 - 結晶半導体膜の製造方法 - Google Patents
結晶半導体膜の製造方法 Download PDFInfo
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- WO2011061991A1 WO2011061991A1 PCT/JP2010/066174 JP2010066174W WO2011061991A1 WO 2011061991 A1 WO2011061991 A1 WO 2011061991A1 JP 2010066174 W JP2010066174 W JP 2010066174W WO 2011061991 A1 WO2011061991 A1 WO 2011061991A1
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- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
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- H01L21/02656—Special treatments
- H01L21/02664—Aftertreatments
- H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
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- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/127—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement
- H01L27/1274—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement using crystallisation of amorphous semiconductor or recrystallisation of crystalline semiconductor
- H01L27/1285—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement using crystallisation of amorphous semiconductor or recrystallisation of crystalline semiconductor using control of the annealing or irradiation parameters, e.g. using different scanning direction or intensity for different transistors
Definitions
- the present invention relates to a method for manufacturing a crystalline semiconductor film in which a non-single crystal semiconductor film is crystallized by moving a pulse laser having a line beam shape a plurality of times (overlapping irradiation).
- Thin film transistors generally used in TVs and PC displays are composed of amorphous (non-crystalline) silicon (hereinafter referred to as a-silicon), but silicon is crystallized (hereinafter referred to as p-silicon) by some means.
- a-silicon amorphous (non-crystalline) silicon
- p-silicon silicon is crystallized
- the performance as a TFT can be remarkably improved.
- excimer laser annealing technology has already been put into practical use as a Si crystallization process at low temperature, and is frequently used for small displays such as mobile phones. Has been made.
- a non-single crystal semiconductor film is irradiated with an excimer laser having a high pulse energy, so that the semiconductor that has absorbed the light energy is in a molten or semi-molten state, and then rapidly cooled and solidified. It is a mechanism to make it.
- a pulse laser shaped into a line beam shape is irradiated while scanning in a relatively short axis direction.
- pulse laser scanning is performed by moving an installation table on which a single crystal semiconductor film is installed.
- the pulse laser is moved in the scanning direction at a predetermined pitch so that the pulse laser is irradiated a plurality of times (overlap irradiation) at the same position of the non-single crystal semiconductor film (for example, patents). Reference 1).
- the pulse laser is moved in the scanning direction at a predetermined pitch so that the pulse laser is irradiated a plurality of times (overlap irradiation) at the same position of the non-single crystal semiconductor film (for example, patents). Reference 1).
- Patent Document 1 since the crystallinity non-uniformity (variation) due to the sequential operation of the laser causes variations between elements, the size S of the channel region in the scanning direction of the pulse laser and the pulse laser
- periodic changes in the pattern of the crystalline distribution are made equal.
- the beam width in the scanning direction of the pulse laser is fixed to about 0.35 to 0.4 mm, and the substrate feed amount per pulse is set to 3% to 8% of the beam width. It is considered that it is necessary to increase the number of laser irradiations as much as possible in order to ensure the uniformity of the performance of the plurality of thin film transistors.
- the overlap rate is 92 to 95% (irradiation frequency 12 to 20 times, scanning pitch 32 to 20 ⁇ m), and in an OLED semiconductor film, the overlap rate is 93.8 to 97% (irradiation frequency 16). To 33 times and a scanning pitch of 25 to 12 ⁇ m).
- the number of times of laser irradiation increases as the scanning pitch is reduced, but in practice, there are times of irradiation such as about 8 times of irradiation under a predetermined condition. It has been found that the crystal grain size does not increase and becomes saturated when the number of times is exceeded. That is, even if the number of irradiations is increased more than necessary, the laser output cannot be used effectively, leading to an increase in the crystallization processing time. Further, if the beam width is increased more than necessary, the laser pulse energy is constant. Therefore, in order to obtain a predetermined energy density, it is necessary to shorten the line beam length, and a large semiconductor film is processed. In this case, the processing efficiency decreases.
- the present invention has been made against the background of the above circumstances, and provides a method for manufacturing a crystalline semiconductor film capable of efficiently performing laser annealing treatment by appropriately determining the number of laser pulses and the pulse width. Objective.
- the method for producing a crystalline semiconductor film of the present invention is the method for producing a crystalline semiconductor film, wherein the non-single crystal semiconductor film is crystallized by irradiating a line beam shaped pulse laser while relatively scanning.
- the pulse laser has a flat portion (beam width a) with uniform intensity in the beam cross-sectional shape in the scanning direction, and the channel region width in the scanning direction of a transistor formed of a semiconductor film crystallized by irradiation with the pulse laser.
- the pulse laser has an irradiation pulse energy density E lower than an irradiation pulse energy density at which microcrystallization occurs in the non-single-crystal semiconductor film by irradiation of the pulse laser;
- the number of irradiations of the pulse laser n is (n0-1) or more, where n0 is the number of irradiations when the crystal grain size growth is saturated by the irradiation of the pulse laser having the irradiation pulse energy density E,
- the movement amount c of each pulse in the scanning direction of the pulse laser is set to b / 2 or less. It is characterized by that.
- the pulse laser has a flat portion (beam width a) with uniform intensity in the beam cross-sectional shape in the scanning direction. This flat portion can be shown in an area of 90% or more with respect to the maximum energy intensity.
- the number of irradiations at which the crystal grain size growth is saturated by the irradiation of the pulse laser with the irradiation energy density E of the pulse laser is n0. Note that the irradiation pulse energy density E is lower than the irradiation pulse energy density at which microcrystallization occurs in the non-single-crystal semiconductor film by irradiation with a pulse laser. Whether or not microcrystallization occurs can be determined by an electron micrograph or the like.
- the irradiation pulse energy density is set to a value larger than the value at which microcrystallization occurs, the crystal grain size becomes extremely small, and the electron mobility as a semiconductor becomes about 1/10. Further, the fact that the crystal grain size growth is saturated by irradiation with a pulse laser having an irradiation pulse energy density E means a state in which individual grain sizes are uniform and the grain size does not increase even when the number of irradiations is increased. Further, if the number of times of laser irradiation does not reach (n0-1), the crystal grain size does not grow sufficiently, and crystals with different grain sizes are mixed, resulting in variations in electron mobility. For the same reason, it is preferably n0 or more. The number of times of laser irradiation n is desirably 3 ⁇ n0 or less. If it exceeds 3 ⁇ n0, the productivity is significantly reduced. Furthermore, 2 ⁇ n0 or less is more desirable for the same reason.
- the scanning pitch of the pulse laser that is, the movement amount c per pulse is set to b / 2 or less.
- the number of laser pulse seams appearing in each channel region is two or three or more, and variations in transistor performance can be reduced.
- the movement amount c is larger than b / 2 and less than or equal to b, the number of seams in the channel region is one or two.
- the movement amount c is larger than b, the number of seams in the channel region is zero. Or it becomes one, and the performance variation of the transistor in a channel area becomes large.
- the channel area width in the pulse laser scanning direction is desirably 1 mm or less. If the region width of the transistor, that is, the transistor is reduced, the time for electrons to flow through the transistor can be shortened, the signal processing speed can be improved, and a thin film semiconductor with excellent performance can be obtained.
- the semiconductor to be processed in the present invention is not limited to a specific material, but Si can be cited as a suitable material.
- An excimer laser can be cited as a suitable pulse laser.
- the non-single crystalline semiconductor film is crystallized by irradiating the line laser beam while relatively scanning the pulse laser.
- the pulse laser has a flat portion (beam width a) of uniform intensity in the beam cross-sectional shape in the scanning direction, and a channel region in the scanning direction of a transistor formed of a semiconductor film crystallized by irradiation with the pulse laser.
- the pulse laser has an irradiation pulse energy density E lower than an irradiation pulse energy density at which microcrystallization occurs in the non-single-crystal semiconductor film by irradiation of the pulse laser;
- the number of irradiations of the pulse laser n is (n0-1) or more, where n0 is the number of irradiations when the crystal grain size growth is saturated by the irradiation of the pulse laser having the irradiation pulse energy density E, Since the movement amount c of each pulse in the scanning direction of the pulse laser is set to b / 2 or less, the laser annealing process can be efficiently performed with an appropriate number of pulse laser irradiations and the movement amount of each pulse.
- the beam width of the pulse laser can be set to an appropriate value, a sufficient line beam length can be obtained, and further efficient processing can be achieved.
- FIG. 1 shows a state in which a substrate placed on a moving table 1 is irradiated with a pulse laser 3 made of a line beam excimer laser.
- a non-single crystal semiconductor film 2 such as Si amorphous is formed on the substrate.
- the pulse laser 3 has a line beam length L and a beam width a.
- the pulse laser 3 is scanned with the non-single crystal at a predetermined pitch and the number of irradiation times.
- the semiconductor film 2 is irradiated.
- FIG. 2 shows a beam cross-sectional shape of the pulse laser 3 in the scanning direction. It has a flat portion having an energy intensity of 90% or more with respect to the maximum energy intensity, and the width of the flat portion is indicated as a beam width a.
- the pulse laser 3 is set to an irradiation pulse energy density E that does not cause the non-single crystal semiconductor film 2 to be microcrystallized when the non-single crystal semiconductor film 2 is irradiated.
- FIG. 3 is a diagram showing the relationship between the irradiation pulse energy density and the crystal grain size due to laser pulse irradiation. In the region where the irradiation pulse energy density is low, the crystal grain size increases as the irradiation pulse energy density increases. For example, when the irradiation pulse energy density becomes larger than the irradiation pulse energy density E1 in the middle of the process, the crystal grain size rapidly increases.
- the irradiation pulse energy density E when the irradiation pulse energy density is increased to a certain extent, the crystal grain size hardly increases even if the irradiation pulse energy density is further increased.
- the irradiation pulse energy density E2 is exceeded, the crystal grain size rapidly increases. It becomes small and microcrystallization occurs. Therefore, the irradiation pulse energy density E can be expressed by E ⁇ E2.
- FIG. 4 is a diagram showing the relationship of the crystal grain size with respect to the number of irradiations when the irradiation pulse energy density E is set to the irradiation pulse energy density E1 or the irradiation pulse energy density E2.
- the crystal grain size increases as the number of irradiations increases, but at a certain number of irradiations, the crystal grain size growth does not progress any further and is saturated. To do.
- This number of times of irradiation is shown as the number of times of irradiation n0 in the present invention.
- the actual number of irradiations n is set to (n0-1) or more and 3.n0 or less with respect to the number of irradiations n0. Thereby, the non-single-crystal semiconductor film 2 can be crystallized effectively and efficiently.
- FIG. 5 shows a planned arrangement state of the thin film semiconductors 10 on the non-single crystal semiconductor film 2.
- Each thin film semiconductor 10 has a source 11, a drain 12, and a channel portion 13 located between the source and drain, and the width of the channel portion 13 in the scanning direction of the pulse laser is a channel region width b.
- FIG. 5A shows the state of occurrence of the beam joint 3a when the movement amount c for each pulse is larger than the channel region width b.
- the beam joint 3 a is not located in the channel portion 13 or appears one, and the performance variation of the thin film semiconductor 10 is increased.
- FIG. 5B shows the state of occurrence of the beam joint 3a when the movement amount c for each pulse is larger than 1 ⁇ 2 of the channel region width b.
- one or two beam joints 3a appear in the channel portion 13, and although the performance variation of the thin film semiconductor 10 is reduced, it is not sufficiently reduced.
- FIG. 5A shows the state of occurrence of the beam joint 3a when the movement amount c for each pulse is larger than the channel region width b.
- the beam joint 3 a is not located in the channel portion 13 or appears one, and the performance variation of the thin film semiconductor 10 is increased.
- FIG. 5B shows the state of occurrence of the beam joint 3a when the movement amount c for each pulse is larger than 1 ⁇ 2 of the channel region width b
- 5 (c) is defined in the present invention, and shows the state of occurrence of the beam joint 3a when the movement amount c for each pulse is 1 ⁇ 2 or less of the channel region width b.
- two or three beam joints 3a appear in the channel portion 13, and the performance variation of the thin film semiconductor 10 is effectively reduced.
- a 50 nm-thick Si amorphous film was used as a non-single-crystal semiconductor film, and irradiation with a pulsed laser was performed under the following conditions while changing the number of irradiations.
- Excimer laser LSX315C / wavelength 308nm, frequency 300Hz
- Beam size beam length 500 mm x beam width 0.13 mm
- the beam width is a flat part having a maximum energy intensity of 90% or more.
- Scan pitch 32.5 ⁇ m to 6.5 ⁇ m
- Irradiation pulse energy density 320 mJ / cm 2 Channel area width: 40 ⁇ m
- the irradiation pulse energy density is lower than the irradiation pulse energy density at which microcrystals are generated, and it is recognized that the crystal grain size gradually grows from the number of irradiation times 4 to 8 times.
- the crystal grain size growth is saturated after the number of irradiation times of 8 or more.
- FIG. 6 shows the change in crystal grain size according to the number of irradiations, and the crystal grain size increases as the number of irradiations increases until the number of irradiations reaches eight. No increase in crystal grain size was observed after 8 irradiations.
Abstract
Description
このレーザアニール法では、高いパルスエネルギを持つエキシマレーザを非単結晶半導体膜に照射することで、光エネルギを吸収した半導体が溶融または半溶融状態になり、その後急速に冷却され凝固する際に結晶化する仕組みである。この際には、広い領域を処理するために、ラインビーム形状に整形したパルスレーザを相対的に短軸方向に走査しながら照射する。通常は、単結晶半導体膜を設置した設置台を移動させることでパルスレーザの走査が行われる。
例えば、LCD用の半導体膜では、オーバーラップ率を92~95%(照射回数12~20回、走査ピッチ32~20μm)、OLED半導体膜では、オーバーラップ率93.8~97%(照射回数16~33回、走査ピッチ25~12μm)に設定している。
また、ビーム幅を必要以上に大きくすると、レーザパルスエネルギは一定であることから所定のエネルギ密度を得るためには必然的にラインビーム長を短くする必要があり、サイズの大きな半導体膜を処理する場合には、処理効率が低下する。
前記パルスレーザは、該パルスレーザの照射によって前記非単結晶半導体膜に微結晶化が生じる照射パルスエネルギ密度よりも低い照射パルスエネルギ密度Eを有し、
パルスレーザの照射回数nは、前記照射パルスエネルギ密度Eのパルスレーザの照射によって結晶粒径成長が飽和する際の照射回数をn0として、(n0-1)以上とし、
前記パルスレーザの前記走査方向におけるパルス毎の移動量cをb/2以下とする、
ことを特徴とする。
上記パルスレーザの照射パルスエネルギ密度Eのパルスレーザの照射によって結晶粒径成長が飽和する照射回数をn0とする。なお、照射パルスエネルギ密度Eは、パルスレーザの照射によって前記非単結晶半導体膜に微結晶化が生じる照射パルスエネルギ密度よりも低い値とする。微結晶化が生じるか否かは、電子顕微鏡写真等により判定することができる。
照射パルスエネルギ密度を微結晶化が生じる値よりも大きな値とすると、結晶粒径が極端に小さくなり、半導体としての電子移動度が1/10程度になってしまう。
また、照射パルスエネルギ密度Eのパルスレーザの照射によって結晶粒径成長が飽和するとは、個々の粒径が揃い、照射回数を増しても粒径が大きくならない状態をいう。
さらに、レーザ照射回数が、(n0-1)に達しないと、結晶粒径の成長が十分になされず、異なる粒径の結晶が混在し、電子移動度のバラツキが生じる。同様の理由で望ましくはn0以上である。
また、レーザ照射回数nは、3・n0以下とするのが望ましい。3・n0を越えると、著しく生産性が低下する。さらには、同様の理由で、2・n0以下が一層望ましい。
前記パルスレーザは、走査方向のビーム断面形状に強度の均一な平坦部(ビーム幅a)を有し、該パルスレーザの照射によって結晶化した半導体膜により形成されるトランジスタの前記走査方向のチャンネル領域幅をbとして、
前記パルスレーザは、該パルスレーザの照射によって前記非単結晶半導体膜に微結晶化が生じる照射パルスエネルギ密度よりも低い照射パルスエネルギ密度Eを有し、
パルスレーザの照射回数nは、前記照射パルスエネルギ密度Eのパルスレーザの照射によって結晶粒径成長が飽和する際の照射回数をn0として、(n0-1)以上とし、
前記パルスレーザの前記走査方向におけるパルス毎の移動量cをb/2以下とするので、適正なパルスレーザ照射回数およびパルス毎の移動量により効率的にレーザアニール処理を行うことができる。また、パルスレーザのビーム幅を適正な値にして、十分なラインビーム長を得ることができ、さらに効率的な処理が可能になる効果がある。
図1は、移動台1上に載置された基板にラインビーム状のエキシマレーザからなるパルスレーザ3が照射されている状態を示している。基板には、Siアモルファスなどの非単結晶半導体膜2が形成されている。パルスレーザ3は、ラインビーム長Lおよびビーム幅aを有しており、移動台1を所定のピッチで移動させることで、パルスレーザ3が走査されつつ、所定のピッチおよび照射回数で非単結晶半導体膜2上に照射される。
図2は、パルスレーザ3の走査方向のビーム断面形状を示すものである。最大エネルギ強度に対し、90%以上のエネルギ強度を有する平坦部を有しており、該平坦部の幅がビーム幅aとして示される。
図3は、照射パルスエネルギ密度とレーザパルスの照射による結晶粒径の大きさの関係を示す図である。照射パルスエネルギ密度が低い領域では、照射パルスエネルギ密度が増すに連れて結晶粒径が大きくなっている。例えば、その途中の照射パルスエネルギ密度E1よりも照射パルスエネルギ密度が大きくなると結晶粒径が急激に大きくなる。一方、照射パルスエネルギ密度がある程度に迄大きくなると、それ以上に照射パルスエネルギ密度が大きくなっても結晶粒径の増大は殆どなく、ある照射パルスエネルギ密度E2を越えると、結晶粒径が急激に小さくなって微結晶化が生じる。したがって上記照射パルスエネルギ密度Eは、E≦E2で示すことができる。
図4は、照射パルスエネルギ密度Eを、上記照射パルスエネルギ密度E1または照射パルスエネルギ密度E2に設定した場合に、照射回数に対する結晶粒径の関係を示す図である。いずれの照射パルスエネルギ密度の場合も、ある照射回数までは、照射回数が増加するに連れて結晶粒径が大きくなるが、ある照射回数になると結晶粒径成長はそれ以上には進行せず飽和する。この照射回数が本発明における照射回数n0として示される。
実際の照射回数nは、前記照射回数n0に対し、(n0-1)以上、3・n0以下に設定する。これにより、非単結晶半導体膜2を効果的かつ効率的に結晶化することができる。
非単結晶半導体膜2上における薄膜半導体10の配列予定状態を図5に示す。各薄膜半導体10では、ソース11、ドレイン12、ソース、ドレイン間に位置するチャンネル部13を有しており、該チャンネル部13のパルスレーザの走査方向幅が、チャンネル領域幅bとなっている。上記非単結晶半導体膜2に対し走査ピッチ(パルス毎の移動量)cによってパルスレーザ3を照射、移動させると、パルス毎の移動に応じて結晶化半導体膜上にビームの継ぎ目3aが現れる。
図5(b)は、パルス毎の移動量cを前記チャンネル領域幅bの1/2よりも大きくした場合のビーム継ぎ目3aの発生状況を示している。この例では、ビーム継ぎ目3aは、チャンネル部13に1本または2本現れることになり、薄膜半導体10の性能ばらつきは低減されるものの、十分に低減されるものではない。
図5(c)は、本発明で規定されているものであり、パルス毎の移動量cを前記チャンネル領域幅bの1/2以下にした場合のビーム継ぎ目3aの発生状況を示している。この例では、ビーム継ぎ目3aは、チャンネル部13に2本または3本現れることになり、薄膜半導体10の性能ばらつきは効果的に低減される。
50nm厚のSiアモルファスを非単結晶半導体膜として、以下の条件で照射回数を変えてパルスレーザの照射を行った。
エキシマレーザ :LSX315C/波長308nm、周波数300Hz
ビームサイズ :ビーム長500mm×ビーム幅0.13mm
ビーム幅は、最大エネルギ強度90%以上の平坦部
スキャンピッチ :32.5μm~6.5μm
照射パルスエネルギ密度
:320mJ/cm2
チャンネル領域幅:40μm
図7は、照射回数に応じた結晶粒径の変化を示すものであり、照射回数8回に至るまでは、照射回数の増加に応じて結晶粒径が増大している。照射回数8回以降では結晶粒径の増大は見られなかった。
2 非単結晶半導体膜
3 パルスレーザ
3a ビーム継ぎ目
10 薄膜半導体
11 ソース
12 ドレイン
13 チャンネル部
Claims (6)
- 非単結晶半導体膜上に、ラインビーム形状のパルスレーザを相対的に走査しつつ照射して結晶化を行う結晶半導体膜の製造方法において、
前記パルスレーザは、走査方向のビーム断面形状に強度の均一な平坦部を有し、該パルスレーザの照射によって結晶化した半導体膜により形成されるトランジスタの前記走査方向のチャンネル領域幅をbとして、
前記パルスレーザは、該パルスレーザの照射によって前記非単結晶半導体膜に微結晶化が生じる照射パルスエネルギ密度よりも低い照射パルスエネルギ密度Eを有し、
パルスレーザの照射回数nは、前記照射パルスエネルギ密度Eのパルスレーザの照射によって結晶粒径成長が飽和する際の照射回数をn0として(n0-1)以上とし、
前記パルスレーザの前記走査方向におけるパルス毎の移動量cをb/2以下とする、
ことを特徴とする結晶半導体膜の製造方法。 - 前記パルスレーザ照射回数nは、(n0-1)以上、3・n0以下であることを特徴とする請求項1記載の結晶半導体膜の製造方法。
- 前記ビーム幅が500μm以下であることを特徴とする請求項1または2に記載の結晶半導体膜の製造方法。
- 前記チャンネル領域幅が1mm以下であることを特徴とする請求項1~3のいずれかに記載の結晶半導体膜の製造方法。
- 前記非単結晶半導体がSiであることを特徴とする請求項1~4のいずれかに記載の結晶半導体膜の製造方法。
- 前記パルスレーザがエキシマレーザであることを特徴とする請求項1~5のいずれかに記載の結晶半導体膜の製造方法。
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Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH1074697A (ja) * | 1996-08-29 | 1998-03-17 | Toshiba Corp | 多結晶シリコン膜、多結晶シリコンの製造方法、薄膜トランジスタの製造方法、液晶表示装置の製造方法、及びレーザアニール装置 |
JP2001053020A (ja) * | 1999-08-06 | 2001-02-23 | Sony Corp | 半導体薄膜の結晶化方法及び薄膜半導体装置の製造方法 |
JP2002176180A (ja) * | 2000-12-06 | 2002-06-21 | Hitachi Ltd | 薄膜半導体素子及びその製造方法 |
JP2007035812A (ja) * | 2005-07-26 | 2007-02-08 | Mitsubishi Electric Corp | 多結晶シリコン膜の製造方法および薄膜トランジスタ |
JP2008091811A (ja) * | 2006-10-05 | 2008-04-17 | Ihi Corp | レーザアニール方法及びレーザアニール装置 |
JP2009004629A (ja) * | 2007-06-22 | 2009-01-08 | Semiconductor Energy Lab Co Ltd | 多結晶半導体膜形成方法及び多結晶半導体膜形成装置 |
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Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH1074697A (ja) * | 1996-08-29 | 1998-03-17 | Toshiba Corp | 多結晶シリコン膜、多結晶シリコンの製造方法、薄膜トランジスタの製造方法、液晶表示装置の製造方法、及びレーザアニール装置 |
JP2001053020A (ja) * | 1999-08-06 | 2001-02-23 | Sony Corp | 半導体薄膜の結晶化方法及び薄膜半導体装置の製造方法 |
JP2002176180A (ja) * | 2000-12-06 | 2002-06-21 | Hitachi Ltd | 薄膜半導体素子及びその製造方法 |
JP2007035812A (ja) * | 2005-07-26 | 2007-02-08 | Mitsubishi Electric Corp | 多結晶シリコン膜の製造方法および薄膜トランジスタ |
JP2008091811A (ja) * | 2006-10-05 | 2008-04-17 | Ihi Corp | レーザアニール方法及びレーザアニール装置 |
JP2009004629A (ja) * | 2007-06-22 | 2009-01-08 | Semiconductor Energy Lab Co Ltd | 多結晶半導体膜形成方法及び多結晶半導体膜形成装置 |
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