WO2011052207A1 - Carte imprimée et procédé de fabrication de celle-ci - Google Patents

Carte imprimée et procédé de fabrication de celle-ci Download PDF

Info

Publication number
WO2011052207A1
WO2011052207A1 PCT/JP2010/006367 JP2010006367W WO2011052207A1 WO 2011052207 A1 WO2011052207 A1 WO 2011052207A1 JP 2010006367 W JP2010006367 W JP 2010006367W WO 2011052207 A1 WO2011052207 A1 WO 2011052207A1
Authority
WO
WIPO (PCT)
Prior art keywords
circuit
film
resin
resin film
circuit board
Prior art date
Application number
PCT/JP2010/006367
Other languages
English (en)
Japanese (ja)
Inventor
愼悟 吉岡
弘明 藤原
博光 高下
剛 武田
優子 今野
Original Assignee
パナソニック電工株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP2009251399A external-priority patent/JP5350184B2/ja
Priority claimed from JP2009251379A external-priority patent/JP5465512B2/ja
Priority claimed from JP2009253504A external-priority patent/JP2011100798A/ja
Priority claimed from JP2009253505A external-priority patent/JP2011100799A/ja
Priority claimed from JP2009253503A external-priority patent/JP5432672B2/ja
Application filed by パナソニック電工株式会社 filed Critical パナソニック電工株式会社
Publication of WO2011052207A1 publication Critical patent/WO2011052207A1/fr

Links

Images

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/18Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
    • H05K3/181Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating
    • H05K3/182Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating characterised by the patterning method
    • H05K3/184Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating characterised by the patterning method using masks
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/107Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by filling grooves in the support with conductive material
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4644Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4661Adding a circuit layer by direct wet plating, e.g. electroless plating; insulating materials adapted therefor
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0284Details of three-dimensional rigid printed circuit boards
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/095Conductive through-holes or vias
    • H05K2201/09563Metal filled via
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/05Patterning and lithography; Masks; Details of resist
    • H05K2203/0562Details of resist
    • H05K2203/0565Resist used only for applying catalyst, not for plating itself
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42Plated through-holes or plated via connections
    • H05K3/425Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
    • H05K3/426Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in substrates without metal
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4644Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/465Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits by applying an insulating layer having channels for the next circuit layer

Definitions

  • the present invention relates to a circuit board and a method for manufacturing the circuit board.
  • the subtractive method is a method of forming an electric circuit by removing (subtractive) the metal foil other than the portion (circuit forming portion) where the electric circuit on the surface of the metal foil-clad laminate is to be formed.
  • the additive method is a method of forming a predetermined circuit by performing electroless plating only on a portion where a circuit on an insulating substrate is formed.
  • the subtractive method is a method in which a thick metal foil is etched to leave only a portion where the electric circuit is to be formed (circuit formation portion), and other portions are removed.
  • This method is disadvantageous from the viewpoint of manufacturing cost because the portion of the metal to be removed is wasted.
  • the additive method can form a metal wiring by electroless plating only on a portion where an electric circuit is desired to be formed. For this reason, metal is not wasted and resources are not wasted. Also from such a point, the additive method is a preferable circuit forming method.
  • FIG. 5 is a schematic cross-sectional view for explaining each step of forming a metal wiring by a conventional full additive method.
  • a plating catalyst D102 is deposited on the surface of an insulating substrate D100 in which a through hole D101 is formed. Note that the surface of the insulating base material D100 is roughened in advance.
  • a photoresist layer D103 is formed on the insulating substrate D100 on which the plating catalyst D102 is deposited.
  • the photoresist layer D103 is exposed through a photomask D110 on which a predetermined circuit pattern is formed.
  • the exposed photoresist layer D103 is developed to form a circuit pattern D104. Then, as shown in FIG.
  • a metal wiring D105 is formed on the surface of the circuit pattern D104 formed by development and the inner wall surface of the through hole D101. .
  • a circuit made of the metal wiring D105 is formed on the insulating base material D100.
  • the plating catalyst D102 is deposited on the entire surface of the insulating substrate D100.
  • the following problems have arisen. That is, when the photoresist layer D103 is developed with high accuracy, plating can be formed only on the portion not protected by the photoresist. However, if the photoresist layer D103 is not developed with high accuracy, an unnecessary plating portion D106 may remain in a portion where plating is not originally desired as shown in FIG. This occurs because the plating catalyst D102 is deposited on the entire surface of the insulating substrate D100. The unnecessary plating part D106 causes a short circuit or migration between adjacent circuits. Such a short circuit or migration is more likely to occur when a circuit having a narrow line width and line interval is formed.
  • FIG. 6 is a schematic cross-sectional view for explaining the contour shape of a circuit formed by a conventional full additive method.
  • examples of the manufacturing method different from the above-described method for manufacturing a circuit board include the manufacturing methods described in Patent Document 1 and Patent Document 2.
  • Patent Document 1 discloses the following method as another additive method.
  • a solvent-soluble first photosensitive resin layer and an alkali-soluble second photosensitive resin layer are formed on an insulating substrate (insulating base material). Then, the first and second photosensitive resin layers are exposed through a photomask having a predetermined circuit pattern. Next, the first and second photosensitive resin layers are developed. Next, after the catalyst is adsorbed on the entire surface including the concave portions generated by development, only the unnecessary catalyst is removed by dissolving the alkali-soluble second photosensitive resin with an alkali solution. Then, after that, electroless plating is performed to accurately form a circuit only in a portion where the catalyst exists.
  • Patent Document 2 discloses the following method.
  • a resin protective film is coated on an insulating substrate (insulating base material) (first step).
  • a groove and a through hole corresponding to the wiring pattern are drawn or formed on the insulating substrate coated with the protective film alone or simultaneously by machining or laser beam irradiation (second step).
  • an activation layer is formed on the entire surface of the insulating substrate (third step).
  • the protective film is peeled off, the activation layer on the insulating substrate is removed, and the activation layer is left only on the inner wall surface of the groove and the through hole (fourth step).
  • the insulating substrate is plated without using a plating protective film, and a conductive layer is selectively formed only on the inner surfaces of the activated grooves and through holes (fifth step).
  • Japanese Patent Application Laid-Open No. 58-186994 discloses that after a thermosetting resin is coated on an insulating substrate as a protective film and heated and cured, the protective film and the insulating substrate are cut according to a predetermined wiring pattern, It is described that the thermosetting resin on the surface of the insulating substrate is removed with a solvent (Japanese Patent Laid-Open No. 58-186994, page 2, lower left column, line 16 to lower right column, line 11).
  • thermosetting resin used as the protective film described in JP-A-58-186994 the type is not particularly described. Since general thermosetting resins have excellent solvent resistance, there is a problem that they are difficult to remove with a simple solvent. Also, such a thermosetting resin has too high adhesion to the resin substrate, and it is difficult to accurately remove only the protective film without leaving a fragment of the protective film on the surface of the resin substrate. there were. In addition, when a strong solvent is used for sufficient peeling or when the substrate is immersed for a long time, the plating catalyst on the surface of the substrate is also removed. In this case, the conductive layer is not formed in the portion where the plating catalyst is removed.
  • the protective film made of thermosetting resin may collapse so that the plating catalyst in the protective film is redispersed in the solvent. there were.
  • the plating catalyst redispersed in the solvent may be reattached to the surface of the resin base material, and an unnecessary plating film may be formed in that portion. Therefore, according to a method such as the method disclosed in Patent Document 2, it is difficult to form a circuit having an accurate contour.
  • the present invention has been made in view of such circumstances, and an object thereof is to provide a circuit board in which a highly accurate electric circuit is formed on an insulating base material. It is another object of the present invention to provide a circuit board manufacturing method capable of easily forming a highly accurate electric circuit on an insulating substrate.
  • a circuit board forms a resin film on a surface, and forms a recess having a depth exceeding the thickness of the resin film on the basis of the outer surface of the resin film.
  • An insulating base material formed by forming a circuit groove having a depth, depositing a plating catalyst or a precursor thereof on the surface of the circuit groove and the surface of the resin film, and peeling the resin film;
  • a circuit groove having a predetermined pattern is formed by using laser processing or the like, and the portion where the plating film is not formed is protected by the resin film.
  • the plating catalyst or its precursor is deposited on the surface and the surface of the resin coating, and then the resin coating is removed, leaving the plating catalyst or its precursor only in the portion where the plating film is to be formed. From the portion, an insulating substrate from which the plating catalyst or its precursor has been removed is obtained.
  • the plating catalyst or a precursor thereof is a portion where the plating film is to be formed, that is, an electroless plating film formed only on the circuit groove. An electric circuit is obtained.
  • a circuit board having a highly accurate electric circuit formed on an insulating base material can be obtained. That is, a circuit board in which the outline of the formed circuit is maintained with high accuracy can be obtained. As a result, for example, even when a plurality of circuits are formed at regular intervals, it is possible to suppress the remaining pieces of the electroless plating film between the circuits, and thus suppress the occurrence of short circuits and migration. . In addition, a circuit having a desired depth can be formed.
  • the thickness of the electroless plating film is smaller than the depth of the circuit groove as described above, the electroless plating film does not easily form a protrusion protruding from the circuit forming surface, and the number of stacked layers Even if this increases, the unevenness generated on the circuit formation surface is small, and a fine circuit can be easily formed.
  • the thickness of the plating film is preferably 0.25 or more with respect to the depth of the circuit groove. According to this configuration, it is possible to obtain a circuit board in which a more accurate electric circuit is formed on the insulating base material while suppressing the occurrence of defects.
  • the thickness of the plating film is preferably 0.1 to 10 ⁇ m. According to this configuration, a circuit board on which a highly accurate electric circuit is formed on the insulating base material can be obtained.
  • the depth of the circuit groove is preferably 1 to 5 ⁇ m. According to this configuration, a circuit board on which a highly accurate electric circuit is formed on the insulating base material can be obtained.
  • the circuit board manufacturing method includes a film forming step of forming a resin film on the surface of an insulating base, and a depth exceeding the thickness of the resin film on the basis of the outer surface of the resin film.
  • a circuit groove having a predetermined pattern is formed using laser processing or the like, and a portion where a plating film is not formed is protected by the resin film.
  • a plating catalyst or a precursor thereof is deposited on the surface of the circuit groove and the surface of the resin film.
  • the plating catalyst or its precursor is easily left only in the portion where the plating film is to be formed, and the plating catalyst or its precursor is removed from other portions. Can be removed.
  • an electroless plating film having a predetermined thickness can be easily formed only on a portion where the plating catalyst or its precursor remains, which is a portion where the plating film is to be formed. Can be formed.
  • a highly accurate electric circuit can be easily formed on the insulating substrate. That is, the outline of the formed circuit can be maintained with high accuracy. As a result, for example, even when a plurality of circuits are formed at regular intervals, it is possible to suppress the remaining pieces of the electroless plating film between the circuits, and thus suppress the occurrence of short circuits and migration. . In addition, a circuit having a desired depth can be formed.
  • the thickness of the electroless plating film is smaller than the depth of the circuit groove as described above, the electroless plating film does not easily form a protrusion protruding from the circuit forming surface, and the number of stacked layers Even if this increases, the unevenness generated on the circuit formation surface is small, and a fine circuit can be easily formed.
  • the electroless plating film it is preferable to form the electroless plating film so that the thickness of the electroless plating film is 0.25 or more with respect to the depth of the circuit groove. According to this configuration, it is possible to easily form a more accurate electric circuit on the insulating base material while suppressing the occurrence of defects.
  • the step of removing the resin film from the insulating substrate after the film removal step swells the resin film with a predetermined liquid or dissolves a part of the resin film with a predetermined liquid. It is preferable that According to such a manufacturing method, the resin film can be easily peeled from the insulating base material. Therefore, a highly accurate electric circuit can be more easily formed on the insulating substrate.
  • the swelling degree of the resin film with respect to the liquid is 50% or more.
  • the resin film can be easily peeled from the insulating substrate. Therefore, a highly accurate electric circuit can be more easily formed on the insulating substrate.
  • the said resin film has a large degree of swelling with respect to the said liquid, and what melt
  • the catalyst deposition step includes a step of treating in an acidic catalyst metal colloid solution, the predetermined liquid in the coating removal step is an alkaline solution, and the resin coating swells with respect to the acidic catalyst metal colloid solution.
  • the degree is preferably less than 50%, and the degree of swelling with respect to the alkaline solution is preferably 50% or more.
  • the resin film is hardly peeled off in the catalyst deposition process treated under acidic conditions, and is easily peeled off in the film removal process treated with an alkaline solution after the catalyst deposition process. Therefore, the resin coating is selectively peeled off in the coating removal step. Accordingly, the portion where the electroless plating film is not formed can be accurately protected in the catalyst deposition step, and the resin coating can be easily peeled off in the coating removal step after deposition of the plating catalyst or its precursor. For this reason, more accurate circuit formation becomes possible.
  • the film removal step is a step of dissolving and removing the resin film with a predetermined liquid. According to such a manufacturing method, the resin film can be easily removed from the insulating base material. Therefore, a highly accurate electric circuit can be more easily formed on the insulating substrate.
  • the resin coating is preferably a resin coating formed by applying an elastomer suspension or emulsion to the surface of the insulating substrate and then drying. If such a resin film is used, the resin film can be easily formed on the surface of the insulating substrate. Therefore, a highly accurate electric circuit can be more easily formed on the insulating substrate.
  • the resin film is preferably a resin film formed by transferring a resin film formed on a support substrate to the surface of the insulating base material.
  • the resin film used for this transfer is more preferably a resin film formed by applying an elastomer suspension or emulsion to the surface of the support substrate and then drying. If such a resin film is used, a large number of resin films can be prepared in advance, which is preferable from the viewpoint of excellent mass productivity.
  • the elastomer is preferably selected from the group consisting of a diene elastomer, an acrylic elastomer, and a polyester elastomer having a carboxyl group.
  • the diene elastomer is more preferably a styrene-butadiene copolymer. According to such an elastomer, it is possible to easily form a resin film having a desired degree of swelling by adjusting the degree of crosslinking or the degree of gelation. In addition, the degree of swelling of the liquid used in the film removal step can be increased, and a resin film that dissolves in the liquid can be easily formed.
  • a film mainly composed of a resin composed of an acrylic resin having a carboxyl group with an acid equivalent of 100 to 800 is also preferably used.
  • the resin film (a) at least one monomer of carboxylic acid or acid anhydride having at least one polymerizable unsaturated group in the molecule, and (b) the (a) single monomer
  • a polymer resin obtained by polymerizing at least one kind of monomer that can be polymerized with a polymer or a resin composition containing the polymer resin. If such a resin film is used, the resin film can be easily formed on the surface of the insulating substrate. Therefore, a highly accurate electric circuit can be more easily formed on the insulating substrate.
  • many of these resin films can be dissolved by the liquid used in the film removal step, and not only peeling and removal but also dissolution and removal can be used effectively.
  • the acid equivalent of the polymer resin is preferably 100 to 800.
  • the thickness of the resin film is 10 ⁇ m or less from the viewpoint that a fine circuit can be formed with high accuracy.
  • the width of the circuit groove has a portion of 20 ⁇ m or less because an antenna circuit or the like requiring fine processing can be formed.
  • the circuit groove forming step is a step of forming a circuit groove by laser processing
  • a through hole used for interlayer connection can be formed, or a capacitor can be embedded in an insulating base material.
  • the circuit groove forming step is a step of forming a circuit groove using a mold pressing method, it is preferable because the circuit groove can be easily formed by stamping a mold.
  • a through hole is formed in the insulating base material when the circuit groove is formed. According to such a manufacturing method, it is possible to form a through hole that can be used for a via hole or an inner via hole when forming a circuit groove. A via hole or an inner via hole is formed by electroless plating the formed through hole.
  • the insulating base material has a step surface formed in a step shape, and the surface of the insulating base material is the step surface. That is, the insulating base material has a step surface formed in a step shape, and the coating film forming step, the circuit groove forming step, the catalyst deposition step, the coating film removing step, and the plating treatment are formed on the step surface. It is also a preferable form to perform the process. According to such a manufacturing method, a circuit that can overcome a step can be easily formed.
  • the resin coating contains a fluorescent substance, and further includes an inspection step for inspecting a coating removal failure using light emission from the fluorescent substance after the coating removal step.
  • the resin coating contains a fluorescent substance, and further includes an inspection step for inspecting a coating removal failure using light emission from the fluorescent substance after the coating removal step.
  • the resin film is made to contain a fluorescent substance as described above, and after the film removal step, only a portion where the resin film remains by irradiating a predetermined light source on the surface from which the film has been removed. By emitting light with the fluorescent substance, it is possible to inspect the presence or absence of the film removal failure or the location of the film removal failure.
  • a circuit board according to another aspect of the present invention is obtained by the method for manufacturing a circuit board. According to such a configuration, a circuit board on which a highly accurate electric circuit is formed on the insulating base material can be obtained.
  • an object is to provide a circuit board having a highly accurate electric circuit formed on an insulating base material. Further, it is possible to provide a circuit board manufacturing method capable of easily forming a highly accurate electric circuit on an insulating substrate. That is, the outline of the electric circuit formed by the electroless plating film can be maintained with high accuracy. Thereby, it can suppress that the fragment
  • the 1-1 embodiment it is a drawing for explaining the state of the insulating substrate D1 after the circuit groove forming step and after the plating process. It is explanatory drawing for demonstrating the test
  • 2nd-1 embodiment it is drawing for demonstrating the state of insulation base material A1 after the said circuit groove formation process and the said plating process. It is drawing for demonstrating the state of insulating base material A21 at the time of using insulating base material A21 which does not contain a filler.
  • FIGS. 14A and 14B are end views taken along line II of FIG. 13, and (A) a circuit board preparation step, (B) a first insulating layer formation step, (C ) Hole forming step, (D) metal column forming step, (E) second insulating layer forming step and film forming step, (F) circuit pattern forming step, (G) catalyst deposition step, (H) film removing step, And (I) shows a plating step.
  • FIGS. 14A and 14B are end views taken along the line II of FIG.
  • FIGS. 14A and 14B are end views taken along line II of FIG. 13, and (A) a circuit board preparation step, (B) a first insulating layer formation step, (C) in the method for manufacturing a multilayer circuit board according to Embodiment 3-3.
  • FIG. 10 is a process diagram for explaining a problem when the additive method is applied when manufacturing a multilayer circuit board by a build-up method. It is a fragmentary top view for showing the structure of the electric circuit in the multilayer circuit board based on embodiment of this invention, arrangement
  • FIG. 20 is an end view taken along the line II of FIG.
  • FIG. 20 is an end view taken along the line II of FIG. 19, and (A) a circuit board preparation step, (B) an insulating layer formation step, and (C) a hole in the multilayer circuit board manufacturing method according to the 4-2 embodiment.
  • FIG. 20 is an end view taken along the line II of FIG. 19, and (A) a circuit board preparation step, (B) an insulating layer formation step, and (C) a hole in the multilayer circuit board manufacturing method according to the fourth to third embodiments.
  • FIG. 10 is a process diagram for explaining a problem when the additive method is applied when manufacturing a multilayer circuit board by a build-up method.
  • FIG. 20 is an end view taken along the line II in FIG. 19, and (A) a circuit board preparation step, (B) an insulating layer formation step, and (C) a hole in the multilayer circuit board manufacturing method according to the fourth to fourth embodiments.
  • FIG. 10 is a process diagram for explaining a problem when the additive method is applied when manufacturing a multilayer circuit board by a build-up method.
  • FIG. 20 is an end view taken along the line II in FIG. 19, and (A) a circuit board preparation step, (B) an insulating layer formation step, and (C) a hole in the multilayer circuit board manufacturing method according to the fourth
  • FIG. 26 is an enlarged view of a portion surrounded by a symbol X in FIG. 25 for describing the characteristics of the fourth to fourth embodiments.
  • FIG. 21 is an enlarged view of the (C) hole forming step, (E) film forming step, and (G) catalyst deposition step of FIG. 20 for explaining the 4-1 embodiment in more detail. It is sectional drawing which shows an example of embodiment of the circuit board of this invention.
  • (A) to (E) are schematic cross-sectional views for explaining each step in the method for producing a circuit board of the present invention. It is explanatory drawing for demonstrating the test
  • (A) and (B) are the electroless plating formed when the circuit pattern part (circuit groove) which digs an insulating base material is formed exceeding the thickness of a resin film in a circuit pattern formation process. It is a schematic cross section which shows a film
  • (A) to (E) are schematic cross-sectional views for explaining each step of manufacturing the circuit board (three-dimensional circuit board) of the present invention.
  • (A)-(D) are sectional drawings which show an example of a mode that a circuit board is manufactured by the conventional method. It is sectional drawing which shows an example of the conventional circuit board, (A) shows the state before grinding
  • FIG. 38 It is sectional drawing of a circuit board which shows an example of embodiment of this invention.
  • or (E) are sectional drawings which show the process of the 1st manufacturing method of a circuit board same as the above.
  • or (D) is sectional drawing which shows the process following the process shown by FIG. 36 of the 1st manufacturing method same as the above.
  • or (E) are sectional drawings which show the process of the 2nd manufacturing method of a circuit board same as the above.
  • or (D) is sectional drawing which shows the process following the process shown by FIG. 38 of the 2nd manufacturing method same as the above.
  • FIG. 40 is sectional drawing which shows the process following the process shown by FIG. 40 of the 3rd manufacturing method same as the above.
  • or (F) is sectional drawing which shows an example of the manufacturing process of the conventional circuit board. It is sectional drawing which shows an example of the conventional circuit board.
  • An example of embodiment of this invention is shown and (A) thru
  • the circuit board according to the present embodiment forms a resin film on the surface, and forms a recess having a depth exceeding the thickness of the resin film with reference to the outer surface of the resin film, thereby obtaining a desired shape and depth.
  • An insulating substrate formed by depositing a plating catalyst or a precursor thereof on the surface of the circuit groove and the surface of the resin coating, and peeling off the resin coating, and the insulating substrate
  • An electroless plating film is formed on the circuit groove, and the thickness of the electroless plating film is 0.5 or less with respect to the depth of the circuit groove. It is characterized by.
  • the insulating group is formed by forming a resin film on the surface of the insulating substrate, and forming a recess having a depth exceeding the thickness of the resin film with reference to the outer surface of the resin film.
  • a coating removal step for removing the resin coating from the substrate and a plating treatment step for forming an electroless plating film by performing electroless plating on the insulating substrate from which the resin coating has been removed.
  • the electroless plating film is formed so that the thickness of the electroless plating film is 0.5 or less with respect to the depth of the circuit groove.
  • FIG. 1 is a schematic cross-sectional view for explaining each step in the circuit board manufacturing method according to the 1-1 embodiment.
  • a resin film D2 is formed on the surface of the insulating base D1. This process corresponds to a film forming process.
  • a circuit groove D3 having a depth equal to or greater than the thickness of the resin coating D2 is formed with reference to the outer surface of the resin coating D2. Moreover, you may drill the hole for forming the through-hole D4 as a part of said circuit groove D3 in the said insulation base material D1 as needed.
  • the circuit groove D3 defines a portion where an electroless plating film is formed by electroless plating, that is, a portion where an electric circuit is formed. This step corresponds to a circuit groove forming step.
  • a plating catalyst or its precursor D5 is deposited on the surface of the circuit groove D3 and the surface of the resin film D2 where the circuit groove D3 is not formed. This step corresponds to a catalyst deposition step.
  • the resin coating D2 is removed from the insulating base D1.
  • the plating catalyst or its precursor D5 can remain only on the surface of the insulating substrate D1 where the circuit groove D3 is formed.
  • the plating catalyst or its precursor D5 deposited on the surface of the resin film D2 is removed together with the resin film D2 while being supported on the resin film D2. This process corresponds to a film removal process.
  • electroless plating is performed on the insulating substrate D1 from which the resin coating D2 has been removed.
  • the electroless plating film D6 is formed only in the portion where the plating catalyst or its precursor D5 remains. That is, as shown in FIG. 1 (E), an electroless plating film to be an electric circuit D6 is formed in the portion where the circuit groove D3 is formed. And this electric circuit D6 may consist of this electroless plating film
  • the electroless plating film D6 may be formed so that the thickness of the electroless plating film D6 / the depth of the circuit groove D3 is 0.5 or less.
  • the electroless plating film D6 is preferably formed so that the thickness of the electroless plating film D6 is 0.25 or more with respect to the depth of the circuit groove D3. That is, it is preferable to form the electroless plating film D6 so that the thickness of the electroless plating film D6 / the depth of the circuit groove D3 is 0.25 or more. This process corresponds to a plating process.
  • the circuit board D10 as shown in FIG. 1 (E) is formed by the above steps.
  • the circuit board D10 formed in this way is obtained by forming the electric circuit D6 with high accuracy on the insulating base material D1.
  • FIG. 2 is a view for explaining the state of the insulating base material D1 after the circuit groove forming step and after the plating treatment step.
  • 2A shows after the circuit groove forming step
  • FIG. 2B shows after the plating step.
  • the shape of the circuit groove D3 is not particularly limited.
  • the cross section perpendicular to the longitudinal direction of the circuit groove D3 may be rectangular or U-shaped as shown in FIG.
  • the U-shape is preferable from the viewpoint that the length of the circumference of the wiring with respect to the cross-sectional area of the wiring (electric circuit) becomes long and propagation loss, particularly propagation loss of a high-frequency signal can be reduced.
  • the thickness T of the electroless plating film D6 is not particularly limited as long as it satisfies a predetermined relationship with the depth D of the circuit groove D3. Specifically, the thickness is not particularly limited as long as T / D is 0.5 or less. The thickness T of the electroless plating film D6 is preferably such that T / D is 0.25 or more.
  • the thickness T of the electroless plating film D6 is too thin, the electric resistance of the electric circuit (wiring) tends to increase. On the other hand, if the thickness T of the electroless plating film D6 is too thick, the above-described merit that the propagation loss, particularly the propagation loss of a high-frequency signal can be reduced tends to be reduced.
  • T (T / D) of the electroless plating film D6 with respect to the depth D of the circuit groove D3 is too small, the electric resistance of the electric circuit (wiring) increases and there is a risk of open failure due to thermal history or the like. There is a tendency to increase.
  • T / D is too large, the above-described merit that propagation loss, particularly propagation loss of a high-frequency signal can be reduced tends to be reduced.
  • the specific thickness T of the electroless plating film D6 varies depending on the depth D of the circuit groove D3, but is preferably 0.1 to 10 ⁇ m, for example.
  • the depth D of the circuit groove D3 is not particularly limited as long as the relationship of T / D is satisfied. Specifically, for example, it is preferably 1 to 5 ⁇ m.
  • the size of the circuit groove D3 and the electroless plating film (electric circuit) D6 is, specifically, for example, when the specific thickness T of the electroless plating film D6 is 5 ⁇ m, the circuit groove It is conceivable that the depth D of D3 is 20 ⁇ m or 10 ⁇ m. The T / D at this time is 0.25 or 0.5.
  • the size of the circuit groove D3 and the electroless plating film (electric circuit) D6 can be measured, for example, by observing a cross section perpendicular to the longitudinal direction of the circuit groove D3.
  • the film forming process is a process of forming the resin film D2 on the surface of the insulating base D1.
  • the insulating base material D1 used in the film forming step is not particularly limited as long as it can be used for manufacturing a circuit board. Specifically, for example, a resin substrate containing a resin can be used.
  • organic substrates that can be used for manufacturing a circuit board, for example, a multilayer circuit board, can be used without any particular limitation.
  • organic substrates include those conventionally used in the production of multilayer circuit boards, such as epoxy resins, acrylic resins, polycarbonate resins, polyimide resins, polyphenylene sulfide resins, polyphenylene ether resins, cyanate resins, benzoxazine resins, bis Examples include a substrate made of maleimide resin or the like.
  • the epoxy resin is not particularly limited as long as it is an epoxy resin constituting various organic substrates that can be used for manufacturing a circuit board.
  • bisphenol A type epoxy resin bisphenol F type epoxy resin, bisphenol S type epoxy resin, aralkyl epoxy resin, phenol novolac type epoxy resin, alkylphenol novolac type epoxy resin, biphenol type epoxy resin, naphthalene type epoxy resin , Dicyclopentadiene type epoxy resins, epoxidized products of condensates of phenols and aromatic aldehydes having a phenolic hydroxyl group, triglycidyl isocyanurate, alicyclic epoxy resins, and the like.
  • epoxy resin nitrogen-containing resin, and silicone-containing resin that are brominated or phosphorus-modified to impart flame retardancy are also included.
  • said epoxy resin and resin said each epoxy resin and resin may be used independently, and may be used in combination of 2 or more type.
  • a curing agent is contained for curing.
  • the curing agent is not particularly limited as long as it can be used as a curing agent. Specific examples include dicyandiamide, phenolic curing agents, acid anhydride curing agents, aminotriazine novolac curing agents, and cyanate resins.
  • curing agent a novolak type, an aralkyl type, a terpene type etc. are mentioned, for example. Further examples include phosphorus-modified phenolic resins or phosphorus-modified cyanate resins for imparting flame retardancy.
  • curing agent may be used independently, and may be used in combination of 2 or more type.
  • a resin or the like having good laser light absorption in the wavelength range of 100 to 400 nm because a circuit pattern is formed by laser processing.
  • a polyimide resin or the like can be given.
  • the insulating base material may contain a filler.
  • the filler may be inorganic fine particles or organic fine particles, and is not particularly limited. By containing the filler, the filler is exposed to the laser processed portion, and it is possible to increase the adhesion between the plating due to the unevenness of the filler and the resin.
  • the material constituting the inorganic fine particles include aluminum oxide (Al 2 O 3 ), magnesium oxide (MgO), boron nitride (BN), aluminum nitride (AlN), silica (SiO 2 ), High dielectric constant fillers such as barium titanate (BaTiO 3 ) and titanium oxide (TiO 2 ); magnetic fillers such as hard ferrite; magnesium hydroxide (Mg (OH) 2 ), aluminum hydroxide (Al (OH) 2 ), Antimony trioxide (Sb 2 O 3 ), antimony pentoxide (Sb 2 O 5 ), guanidine salts, zinc borate, molybdate compounds, zinc stannate, and other inorganic flame retardants; talc (Mg 3 (Si 4 O 10) (OH) 2), barium sulfate (BaSO 4), calcium carbonate (CaCO 3), mica, and the like.
  • Al 2 O 3 magnesium oxide
  • MgO magnesium oxide
  • BN boro
  • the said inorganic fine particle may be used independently, and may be used in combination of 2 or more type. Since these inorganic fine particles have high thermal conductivity, relative dielectric constant, flame retardancy, particle size distribution, color tone freedom, etc., when selectively exerting a desired function, appropriate blending and particle size design should be performed. And high filling can be easily performed. Although not particularly limited, it is preferable to use a filler having an average particle diameter equal to or smaller than the thickness of the insulating layer, more preferably 0.01 to 10 ⁇ m, and still more preferably a filler having an average particle diameter of 0.05 ⁇ m to 5 ⁇ m. Is good.
  • the inorganic fine particles may be surface-treated with a silane coupling agent in order to enhance dispersibility in the insulating base material.
  • the insulating base material may contain a silane coupling agent in order to increase the dispersibility of the inorganic fine particles in the insulating base material.
  • the silane coupling agent is not particularly limited. Specific examples include silane coupling agents such as epoxy silane, mercapto silane, amino silane, vinyl silane, styryl silane, methacryloxy silane, acryloxy silane, and titanate.
  • the said silane coupling agent may be used independently, and may be used in combination of 2 or more type.
  • the insulating base material may contain a dispersant in order to improve the dispersibility of the inorganic fine particles in the insulating base material.
  • the dispersant is not particularly limited. Specific examples include dispersants such as alkyl ether, sorbitan ester, alkyl polyether amine, and polymer.
  • the said dispersing agent may be used independently, and may be used in combination of 2 or more type.
  • the resin film D2 is not particularly limited as long as it can be removed by the film removal step. Specifically, for example, a soluble resin that can be easily dissolved in an organic solvent or an alkaline solution, a swellable resin film made of a resin that can be swollen with a predetermined liquid (swelling liquid) described later, and the like. Among these, a swellable resin film is particularly preferable because accurate removal is easy. Moreover, as said swelling resin film, it is preferable that the swelling degree with respect to the said liquid (swelling liquid) is 50% or more, for example.
  • the swellable resin film is not limited to a resin film that does not substantially dissolve in the liquid (swelling liquid) and easily peels off from the surface of the insulating substrate D1 due to swelling.
  • dissolution is also contained.
  • the method for forming the resin coating D2 is not particularly limited. Specifically, for example, it is formed by applying a liquid material capable of forming a resin film on the surface of the insulating base material D1 and then drying, or by applying the liquid material to a support substrate and then drying it. And a method of transferring the resin film to be transferred onto the surface of the insulating base D1.
  • the method for applying the liquid material is not particularly limited. Specifically, for example, conventionally known spin coating method, bar coater method and the like can be mentioned.
  • the thickness of the resin coating D2 is preferably 10 ⁇ m or less, and more preferably 5 ⁇ m or less. On the other hand, the thickness of the resin coating D2 is preferably 0.1 ⁇ m or more, and more preferably 1 ⁇ m or more. When the thickness of the resin coating D2 is too thick, the accuracy of circuit grooves and through holes formed by laser processing or machining in the circuit groove forming process tends to be reduced. Moreover, when the thickness of the resin film D2 is too thin, it tends to be difficult to form a resin film having a uniform film thickness.
  • a resin film having a swelling degree of 50% or more with respect to the swelling liquid can be preferably used. Furthermore, a resin film having a swelling degree with respect to the swelling liquid of 100% or more is more preferable. In addition, when the said swelling degree is too low, there exists a tendency for a swelling resin film to become difficult to peel in the said film removal process.
  • the method for forming the swellable resin film is not particularly limited as long as it is the same as the method for forming the resin film D2 described above. Specifically, for example, a method of drying after applying a liquid material capable of forming a swellable resin film on the surface of the insulating base D1, or drying after applying the liquid material to a support substrate And a method of transferring the swellable resin film formed by the method to the surface of the insulating substrate D1.
  • liquid material that can form the swellable resin film examples include an elastomer suspension or emulsion.
  • the elastomer include a diene elastomer such as a styrene-butadiene copolymer, an acrylic elastomer such as an acrylate ester copolymer, and a polyester elastomer. According to such an elastomer, it is possible to easily form a swellable resin film having a desired degree of swelling by adjusting the degree of crosslinking or gelation of the elastomer resin particles dispersed as a suspension or emulsion.
  • the swellable resin film is particularly preferably a film whose degree of swelling changes depending on the pH of the swelling liquid.
  • the liquid condition in the catalyst deposition step is different from the liquid condition in the coating removal step, so that the swellable resin can be obtained at the pH in the catalyst deposition step.
  • the coating maintains high adhesion to the insulating substrate, and the swellable resin coating can be easily peeled off at the pH in the coating removal step.
  • the catalyst deposition step includes a step of treating in an acidic plating catalyst colloid solution (acid catalyst metal colloid solution) having a pH in the range of 1 to 3, for example, and the coating removal step has a pH of 12 to 12.
  • an acidic plating catalyst colloid solution acid catalyst metal colloid solution
  • the coating removal step has a pH of 12 to 12.
  • the step of swelling the swellable resin film in an alkaline solution in the range of 14 is provided, the swelling degree of the swellable resin film with respect to the acidic plating catalyst colloid solution is less than 50%, and further 40% or less.
  • the resin film preferably has a degree of swelling with respect to the alkaline solution of 50% or more, more preferably 100% or more, and even more preferably 500% or more.
  • Examples of such a swellable resin film include photocuring used for a sheet formed from an elastomer having a predetermined amount of carboxyl groups, a dry film resist (hereinafter also referred to as DFR) for patterning printed wiring boards, and the like. And a sheet obtained by curing the entire surface of a curable alkali-developing resist, and thermosetting or alkali-developing sheet.
  • the elastomer having a carboxyl group examples include diene elastomers such as a styrene-butadiene copolymer having a carboxyl group in the molecule by containing a monomer unit having a carboxyl group as a copolymerization component; acrylic acid Examples include acrylic elastomers such as ester copolymers; and polyester elastomers. According to such an elastomer, a swellable resin film having a desired alkali swelling degree can be formed by adjusting the acid equivalent, the degree of crosslinking or the degree of gelation of the elastomer dispersed as a suspension or emulsion. .
  • the carboxyl group in the elastomer swells the swellable resin film with respect to the alkaline aqueous solution and acts to peel the swellable resin film from the surface of the insulating substrate.
  • the acid equivalent is the polymer weight per equivalent of carboxyl groups.
  • the monomer unit having a carboxyl group examples include (meth) acrylic acid, fumaric acid, cinnamic acid, crotonic acid, itaconic acid, maleic anhydride, and the like.
  • the content ratio of the carboxyl group in the elastomer having such a carboxyl group is preferably 100 to 2000, more preferably 100 to 800 in terms of acid equivalent.
  • the acid equivalent is too small, the compatibility with the solvent or other composition tends to decrease, whereby the resistance to the plating pretreatment liquid tends to decrease.
  • an acid equivalent is too large, there exists a tendency for the peelability with respect to aqueous alkali solution to fall.
  • the molecular weight of the elastomer is preferably 10,000 to 1,000,000, more preferably 20,000 to 60,000.
  • the molecular weight of the elastomer is too large, the releasability tends to decrease, and when it is too small, the viscosity decreases, so that it is difficult to maintain a uniform thickness of the swellable resin film, and plating pretreatment The resistance to the liquid also tends to deteriorate.
  • the resin coating includes (a) at least one monomer of carboxylic acid or acid anhydride having at least one polymerizable unsaturated group in the molecule and (b) the monomer (a). And a polymer resin obtained by polymerizing at least one monomer that can be polymerized with or a resin composition containing the polymer resin.
  • the polymer resin may be an essential component as a main resin, and at least one of oligomers, monomers, fillers and other additives may be added.
  • the main resin is preferably a linear polymer having thermoplastic properties. In order to control fluidity, crystallinity, etc., it may be grafted and branched.
  • the molecular weight is about 1,000 to 500,000 in terms of weight average molecular weight, and preferably 5000 to 50,000. If the molecular weight is too small, the flexibility of the film and the resistance to the plating nucleation solution (acid resistance) tend to decrease. Moreover, when molecular weight is too large, there exists a tendency for the sticking property at the time of using alkali peelability or a dry film to worsen.
  • a cross-linking point may be introduced for improving the resistance to plating nucleus chemicals, suppressing thermal deformation during laser processing, and controlling flow.
  • the composition of the polymer resin as the main resin includes (a) a carboxylic acid or acid anhydride monomer having at least one polymerizable unsaturated group in the molecule, and (b) the above ( a) It is obtained by polymerizing a monomer that can be polymerized with the monomer.
  • known techniques include those described in JP-A-7-281437, JP-A-2000-231190, and JP-A-2001-201851.
  • Examples of (a) include (meth) acrylic acid, fumaric acid, cinnamic acid, crotonic acid, itaconic acid, maleic anhydride, maleic acid half ester, butyl acrylate, etc., alone or in combination of two or more May be combined.
  • Examples of (b) are generally non-acidic and have (1) a polymerizable unsaturated group in the molecule, but are not limited thereto. It is selected so as to maintain various properties such as resistance in the plating process and flexibility of the cured film. Specifically, methyl (meth) acrylate, ethyl (meth) acrylate, iso-propyl (meth) acrylate, n-butyl (meth) acrylate, sec-butyl (meth) acrylate, tert. -Butyl (meth) acrylate, 2-hydroxylethyl (meth) acrylate, 2-hydroxylpropyl (meth) acrylates.
  • esters of vinyl alcohol such as vinyl acetate, (meth) acrylonitrile, styrene or polymerizable styrene derivatives. It can also be obtained by polymerization of only a carboxylic acid or acid anhydride having one polymerizable unsaturated group in the molecule.
  • a monomer having a plurality of unsaturated groups is selected as a monomer used in the polymer so that it can be three-dimensionally cross-linked, such as an epoxy group, a hydroxyl group, an amino group, an amide group, a vinyl group in the molecular skeleton. Reactive functional groups can be introduced.
  • the amount of the carboxyl group contained in the resin is preferably 100 to 2000, preferably 100 to 800, as an acid equivalent.
  • the acid equivalent means the weight of the polymer having 1 equivalent of a carboxyl group therein.
  • compatibility with a solvent or other composition is lowered or plating pretreatment solution resistance is lowered.
  • plating pretreatment solution resistance is lowered.
  • peelability there exists a tendency for peelability to fall.
  • the composition ratio of the monomer (a) is 5 to 70% by mass.
  • Any monomer or oligomer may be used as long as it is resistant to plating nucleation chemicals and can be easily removed with alkali. Further, in order to improve the sticking property of the dry film (DFR), it can be considered that it is used as a tackifier as a plasticizer. Further, a crosslinking agent is added to increase various resistances. Specifically, methyl (meth) acrylate, ethyl (meth) acrylate, iso-propyl (meth) acrylate, n-butyl (meth) acrylate, sec-butyl (meth) acrylate, tert.
  • esters of vinyl alcohol such as vinyl acetate, (meth) acrylonitrile, styrene or polymerizable styrene derivatives. It can also be obtained by polymerization of only a carboxylic acid or acid anhydride having one polymerizable unsaturated group in the molecule. Furthermore, a polyfunctional unsaturated compound may be included. Any of the above monomers or oligomers obtained by reacting the monomers may be used. In addition to the above monomers, it is possible to include two or more other photopolymerizable monomers.
  • Examples of monomers include 1,6-hexanediol di (meth) acrylate, 1,4-cyclohexanediol di (meth) acrylate, polypropylene glycol di (meth) acrylate, polyethylene glycol di (meth) acrylate, polyoxyethylene Polyoxyalkylene glycol di (meth) acrylate such as polyoxypropylene glycol di (meth) acrylate, 2-di (p-hydroxyphenyl) propane di (meth) acrylate, glycerol tri (meth) acrylate, dipentaerythritol penta (meth) Acrylate, trimethylolpropane triglycidyl ether tri (meth) acrylate, bisphenol A diglycidyl ether tri (meth) acrylate, 2,2-bis (4-methacryloxy) Pointer ethoxyphenyl) propane, there is a polyfunctional (meth) acrylate containing urethane groups. Any
  • a filler may be contained.
  • the filler is not particularly limited, but silica, aluminum hydroxide, magnesium hydroxide, calcium carbonate, clay, kaolin, titanium oxide, barium sulfate, alumina, zinc oxide, talc, mica, glass, potassium titanate, wollastonite, sulfuric acid Magnesium, aluminum borate, an organic filler, etc. are mentioned.
  • the resist thickness is generally as thin as 1 to 10 ⁇ m, it is preferable to have a small filler size. Although it is preferable to use a material having a small average particle size and cut coarse particles, the coarse particles can be crushed during dispersion or removed by filtration.
  • additives include, for example, photopolymerizable resins (photopolymerization initiators), polymerization inhibitors, colorants (dyes, pigments, coloring pigments), thermal polymerization initiators, and crosslinking agents such as epoxies and urethanes. Can be mentioned.
  • laser processing may be used, but in the case of laser processing, it is necessary to impart ablation by a laser to the resist material.
  • a laser processing machine a carbon dioxide laser, an excimer laser, a UV-YAG laser, or the like is selected. These laser processing machines have various intrinsic wavelengths, and productivity can be improved by using a material having a high absorption rate for these wavelengths.
  • the UV-YAG laser is suitable for fine processing, and the laser wavelength is the third harmonic 355 nm and the fourth harmonic 266 nm. Therefore, it is desirable that the absorptance is high with respect to these wavelengths.
  • a material having a somewhat low absorption rate may be preferable.
  • the UV light transmits through the resist, so that energy can be concentrated on the underlying insulating layer processing. That is, since the advantages differ depending on the absorption rate of the laser beam, it is preferable to use a resist in which the absorption rate of the laser beam of the resist is adjusted according to the situation.
  • a sheet of a resin composition can be used.
  • a dry film of a photopolymerizable resin composition as disclosed in JP 2000-231190 A, JP 2001-201851 A, and JP 11-212262 A is used. Sheets obtained by curing, and commercially available as an alkali development type DFR, for example, UFG series manufactured by Asahi Kasei Corporation can be mentioned.
  • a resin containing a carboxyl group and containing rosin as a main component for example, “NAZDAR229” manufactured by Yoshikawa Chemical Co., Ltd.
  • a resin containing phenol as a main component for example, LEKTRACHEM “104F”
  • the swellable resin film was formed on the surface of the insulating substrate by applying a resin suspension or emulsion using a conventionally known application method such as a spin coat method or a bar coater method, followed by drying or a support substrate. After the DFR is bonded to the surface of the insulating substrate using a vacuum laminator or the like, it can be easily formed by curing the entire surface.
  • examples of the resin film include the following.
  • the following are mentioned as a resist material which comprises the said resin film.
  • Properties required for the resist material constituting the resin coating include, for example, (1) resistance to a liquid (plating nucleation chemical) in which an insulating substrate on which the resin coating is formed is immersed in a catalyst deposition step described later. (2) The film coating process described later, for example, the resin film (resist) can be easily removed by the step of immersing the insulating base material on which the resin film is formed in alkali, and (3) High film formability. (4) easy dry film (DFR) formation, (5) high storage stability, and the like.
  • the plating nucleation chemical solution As the plating nucleation chemical solution, as will be described later, for example, in the case of an acidic Pd—Sn colloid catalyst system, all are acidic (pH 1-2) aqueous solutions.
  • the catalyst imparting activator is a weak alkali (pH 8 to 12), and the others are acidic. From the above, it is necessary to withstand pH 1 to 11, preferably pH 1 to 12, as the resistance to the plating nucleating solution. Note that being able to withstand is that when a sample on which a resist is formed is immersed in a chemical solution, swelling and dissolution of the resist are sufficiently suppressed, and the resist serves as a resist.
  • the immersion temperature is from room temperature to 60 ° C.
  • the immersion time is from 1 to 10 minutes
  • the resist film thickness is from about 1 to 10 ⁇ m, but is not limited thereto.
  • an aqueous NaOH solution or an aqueous sodium carbonate solution is common. Its pH is 11 to 14, and it is desirable that the resist film can be easily removed preferably at pH 12 to 14.
  • the concentration of the aqueous NaOH solution is about 1 to 10%
  • the processing temperature is room temperature to 50 ° C.
  • the processing time is 1 to 10 minutes
  • the immersion or spray treatment is generally performed, but is not limited thereto.
  • a resist is formed on an insulating material, film formability is also important. A uniform film formation without repelling or the like is necessary. Moreover, although it is made into a dry film for the simplification of a manufacturing process, reduction of material loss, etc., the flexibility of a film is required in order to ensure handling property. Also, a dry film resist is pasted on the insulating material with a laminator (roll, vacuum). The pasting temperature is room temperature to 160 ° C., and the pressure and time are arbitrary. Thus, adhesiveness is required at the time of pasting. For this reason, the resist formed into a dry film is generally used as a three-layer structure sandwiched by a carrier film and a cover film to prevent dust from adhering, but is not limited thereto.
  • Storability is best when it can be stored at room temperature, but it must be refrigerated or frozen. As described above, it is necessary to prevent the composition of the dry film from being separated at low temperatures or to be cracked due to a decrease in flexibility.
  • the resin composition of the resist material may include a main resin (binder resin) as an essential component, and at least one of oligomers, monomers, fillers, and other additives may be added.
  • a main resin binder resin
  • the main resin should be a linear polymer with thermoplastic properties. In order to control fluidity and crystallinity, it may be branched by grafting.
  • the molecular weight is about 1,000 to 500,000 in terms of number average molecular weight, preferably 5000 to 50,000. If the molecular weight is too small, the flexibility of the film and the resistance to the plating nucleation solution (acid resistance) tend to decrease. Moreover, when molecular weight is too large, there exists a tendency for the sticking property at the time of using alkali peelability or a dry film to worsen.
  • a crosslinking point may be introduced to improve resistance to plating nucleus chemicals, suppress thermal deformation during laser processing, and control flow.
  • composition of the main resin (a) a carboxylic acid or acid anhydride monomer having at least one polymerizable unsaturated group in the molecule and (b) (a) a monomer that can be polymerized with the monomer It is obtained by polymerizing.
  • known techniques include those described in JP-A-7-281437, JP-A-2000-231190, and JP-A-2001-201851.
  • Examples of (a) include, for example, (meth) acrylic acid, fumaric acid, cinnamic acid, crotonic acid, itaconic acid, maleic anhydride, maleic acid half ester, butyl acrylate, etc., alone or 2 More than one type may be combined.
  • Examples of (b) are generally non-acidic and have (one) polymerizable unsaturated group in the molecule, but are not limited thereto. It is selected so as to maintain various properties such as resistance in the plating process and flexibility of the cured film. Specifically, for example, methyl (meth) acrylate, ethyl (meth) acrylate, iso-propyl (meth) acrylate, n-butyl (meth) acrylate, sec-butyl (meth) acrylate, tert. -Butyl (meth) acrylate, 2-hydroxylethyl (meth) acrylate, 2-hydroxylpropyl (meth) acrylates and the like.
  • esters of vinyl alcohol such as vinyl acetate, (meth) acrylonitrile, styrene, or a polymerizable styrene derivative may be used. It can also be obtained by polymerization of only a carboxylic acid or acid anhydride having one polymerizable unsaturated group in the molecule.
  • a monomer having a plurality of unsaturated groups is selected as a monomer used in the polymer so that it can be three-dimensionally cross-linked, such as an epoxy group, a hydroxyl group, an amino group, an amide group, a vinyl group in the molecular skeleton. Reactive functional groups can be introduced.
  • the amount of the carboxyl group contained in the resin is preferably 100 to 2000, preferably 100 to 800, in terms of acid equivalent.
  • the acid equivalent means the weight of the polymer having 1 equivalent of a carboxyl group therein.
  • compatibility with a solvent or other composition is lowered or plating pretreatment solution resistance is lowered.
  • an acid equivalent is too high, there exists a tendency for peelability to fall.
  • the composition ratio of the monomer (a) is 5 to 70% by weight.
  • Any monomer or oligomer may be used as long as it is resistant to plating nucleation chemicals and can be easily removed with alkali.
  • DFR dry film
  • a plasticizer as a tackifier.
  • a crosslinking agent is added to increase various resistances. Specifically, for example, methyl (meth) acrylate, ethyl (meth) acrylate, iso-propyl (meth) acrylate, n-butyl (meth) acrylate, sec-butyl (meth) acrylate, tert.
  • esters of vinyl alcohol such as vinyl acetate, (meth) acrylonitrile, styrene, or a polymerizable styrene derivative are also included. It can also be obtained by polymerization of only a carboxylic acid or acid anhydride having one polymerizable unsaturated group in the molecule. Furthermore, a polyfunctional unsaturated compound may be included. Any of the above monomers or oligomers obtained by reacting the monomers may be used.
  • this monomer examples include, for example, 1,6-hexanediol di (meth) acrylate, 1,4-cyclohexanediol di (meth) acrylate, polypropylene glycol di (meth) acrylate, polyethylene glycol di (meth) acrylate, Polyoxyalkylene glycol di (meth) acrylate such as polyoxyethylene polyoxypropylene glycol di (meth) acrylate, 2-di (p-hydroxyphenyl) propane di (meth) acrylate, glycerol tri (meth) acrylate, dipentaerythritol penta (Meth) acrylate, trimethylolpropane triglycidyl ether tri (meth) acrylate, bisphenol A diglycidyl ether tri (meth) acrylate, 2,2-bis (4-methyl) Methacryloxy penta
  • a filler may be contained.
  • the filler is not particularly limited. Specifically, for example, silica, aluminum hydroxide, magnesium hydroxide, calcium carbonate, clay, kaolin, titanium oxide, barium sulfate, alumina, zinc oxide, talc, mica, glass, titanic acid. Examples include potassium, wollastonite, magnesium sulfate, aluminum borate, and an organic filler.
  • the resist thickness is generally as thin as 1 to 10 ⁇ m, it is preferable to have a small filler size. Although it is preferable to use a material having a small average particle size and cut coarse particles, the coarse particles can be crushed during dispersion or removed by filtration.
  • additives include, for example, photopolymerizable resins (photopolymerization initiators), polymerization inhibitors, colorants (dyes, pigments, coloring pigments), thermal polymerization initiators, and crosslinking agents such as epoxies and urethanes. Can be mentioned.
  • laser processing may be used, but in the case of laser processing, it is necessary to impart ablation by a laser to the resist material.
  • a laser processing machine a carbon dioxide laser, an excimer laser, a UV-YAG laser, or the like is selected. These laser processing machines have various intrinsic wavelengths, and productivity can be improved by using a material having a high absorption rate for these wavelengths.
  • the UV-YAG laser is suitable for fine processing, and the laser wavelength is the third harmonic 355 nm and the fourth harmonic 266 nm. Therefore, it is desirable that the absorptance is high with respect to these wavelengths.
  • a material having a somewhat low absorption rate may be preferable.
  • the UV light transmits through the resist, so that energy can be concentrated on the underlying insulating layer processing. That is, since the advantages differ depending on the absorption rate of the laser beam, it is preferable to use a resist in which the absorption rate of the laser beam of the resist is adjusted according to the situation.
  • the circuit groove forming step is a step of forming the circuit groove D3 in the insulating base material D1.
  • the method for forming the circuit groove D3 is not particularly limited. Specifically, for example, the insulating base material D1 on which the resin coating D2 is formed, from the outer surface side of the resin coating D2, laser processing, cutting processing such as dicing processing, mechanical processing such as embossing processing, etc.
  • channel D3 of a desired shape and depth by giving is mentioned.
  • laser processing the cutting depth or the like can be freely adjusted by changing the output of the laser or the like.
  • the stamping process for example, a stamping process using a fine resin mold used in the field of nanoimprinting can be preferably used.
  • a through hole D4 for forming a via hole or the like may be formed as a part of the circuit groove D3.
  • This step defines the shape and depth of the circuit groove D3, the diameter and position of the through hole D4, and the like.
  • the circuit groove forming step may be performed by dug more than the thickness of the resin coating D2, may be dug by the thickness of the resin coating D2, or may be dug beyond the thickness of the resin coating D2.
  • the width of the circuit groove D3 formed in the circuit groove forming step is not particularly limited. When laser processing is used, a fine circuit having a line width of 20 ⁇ m or less can be easily formed.
  • the depth of the circuit groove is the depth of the electric circuit formed in the present embodiment when the step is eliminated between the electric circuit and the insulating base material by fill-up plating.
  • the catalyst deposition step is a step of depositing a plating catalyst or a precursor thereof on the surface of the circuit groove D3 and the surface of the resin coating D2. At this time, when the through hole D4 is formed, the plating catalyst or its precursor is also applied to the inner wall surface of the through hole D4.
  • the plating catalyst or its precursor D5 is a catalyst applied to form an electroless plating film only in a portion where it is desired to form an electroless plating film by electroless plating in the plating treatment step.
  • Any plating catalyst can be used without particular limitation as long as it is known as a catalyst for electroless plating.
  • a plating catalyst precursor may be deposited in advance, and the plating catalyst may be generated after removing the resin film.
  • Specific examples of the plating catalyst include, for example, metal palladium (Pd), platinum (Pt), silver (Ag), etc., or a precursor that generates these.
  • Examples of the method of depositing the plating catalyst or its precursor D5 include a method of treating with an acidic Pd—Sn colloidal solution treated under acidic conditions of pH 1 to 3 and then treating with an acidic solution. It is done. Specific examples include the following methods.
  • the oil adhering to the surface of the insulating base material D1 in which the circuit groove D3 and the through hole D4 are formed is washed with hot water in a surfactant solution (cleaner / conditioner) for a predetermined time.
  • a surfactant solution cleaning / conditioner
  • a soft etching treatment is performed with a sodium persulfate-sulfuric acid based soft etching agent.
  • an acidic solution such as a sulfuric acid aqueous solution or a hydrochloric acid aqueous solution having a pH of 1 to 2.
  • a pre-dip treatment is performed in which a chloride ion is adsorbed on the surface of the insulating substrate D1 by immersing in a pre-dip solution mainly containing a stannous chloride aqueous solution having a concentration of about 0.1%.
  • Pd and Sn are aggregated and adsorbed by further dipping in an acidic plating catalyst colloidal solution such as acidic Pd—Sn colloid having a pH of 1 to 3 containing stannous chloride and palladium chloride.
  • an oxidation-reduction reaction SnCl 2 + PdCl 2 ⁇ SnCl 4 + Pd ⁇
  • the metal palladium which is a plating catalyst precipitates.
  • the acidic plating catalyst colloid solution a known acidic Pd—Sn colloid catalyst solution or the like can be used, and a commercially available plating process using an acidic plating catalyst colloid solution may be used. Such a process is systematized and sold by Rohm & Haas Electronic Materials Co., Ltd., for example.
  • the plating catalyst or its precursor D5 can be deposited on the surface of the circuit groove D3, the inner wall surface of the through hole D4, and the surface of the resin coating D2.
  • the coating removal step is a step of removing the resin coating D2 from the insulating base material D1 subjected to the catalyst deposition step.
  • the method for removing the resin coating D2 is not particularly limited. Specifically, for example, after the resin film D2 is swollen with a predetermined solution (swelling liquid), the resin film D2 is peeled off from the insulating base D1, or the resin with a predetermined solution (swelling liquid). A method in which the resin film D2 is peeled from the insulating substrate D1 after the film D2 is swollen and further partially dissolved, and a method in which the resin film D2 is dissolved and removed with a predetermined solution (swelling liquid) Etc.
  • the swelling liquid is not particularly limited as long as it can swell the resin film D2.
  • the swelling or dissolution is performed by immersing the insulating base material D1 coated with the resin coating D2 in the swelling liquid for a predetermined time. And removal efficiency may be improved by irradiating with ultrasonic waves during the immersion. In addition, when it swells and peels, you may peel off with a light force.
  • the swellable resin film D2 can be formed without substantially decomposing or dissolving the insulating base material D1 and the plating catalyst or its precursor D5. Any liquid that can be swollen or dissolved can be used without particular limitation. Moreover, the liquid which can swell so that the said swellable resin film D2 can be peeled easily is preferable. Such a swelling liquid can be appropriately selected depending on the type and thickness of the swellable resin film D2.
  • the swelling resin film is an elastomer such as a diene elastomer, an acrylic elastomer, and a polyester elastomer, or (a) a carboxylic acid or an acid having at least one polymerizable unsaturated group in the molecule.
  • a polymer resin obtained by polymerizing at least one monomer of an anhydride and (b) at least one monomer that can be polymerized with the monomer (a) or the polymer resin In the case where the resin composition is formed from a carboxyl group-containing acrylic resin, an alkaline aqueous solution such as a sodium hydroxide aqueous solution having a concentration of about 1 to 10% can be preferably used.
  • the swelling resin film D2 has a swelling degree of less than 50%, preferably 40% or less under acidic conditions.
  • the degree of swelling is 50% or more under alkaline conditions
  • elastomers such as diene elastomers, acrylic elastomers, and polyester elastomers, (a) at least one polymerizable unsaturated group in the molecule
  • Polymer resin obtained by polymerizing at least one monomer of carboxylic acid or acid anhydride having at least one monomer and (b) at least one monomer that can be polymerized with monomer
  • it is preferably formed from a resin composition containing the polymer resin and a carboxyl group-containing acrylic resin.
  • Such a swellable resin film easily swells and peels off with an alkaline aqueous solution having a pH of 12 to 14, for example, a sodium hydroxide aqueous solution having a concentration of about 1 to 10%.
  • an alkaline aqueous solution having a pH of 12 to 14 for example, a sodium hydroxide aqueous solution having a concentration of about 1 to 10%.
  • Examples of the method for swelling the swellable resin film D2 include a method of immersing the insulating base material D1 coated with the swellable resin film D2 in a swelling liquid for a predetermined time. Moreover, in order to improve peelability, it is particularly preferable to irradiate with ultrasonic waves during immersion. In addition, when not peeling only by swelling, you may peel off with a light force as needed.
  • the plating treatment step is a step of performing an electroless plating treatment on the insulating substrate D1 after the resin coating D2 is removed.
  • an insulating base material D1 partially coated with a plating catalyst or its precursor D5 is immersed in an electroless plating solution, and the plating catalyst or its precursor D5 is applied.
  • a method of depositing an electroless plating film (plating layer) only on the portion may be used.
  • Examples of the metal used for electroless plating include copper (Cu), nickel (Ni), cobalt (Co), and aluminum (Al).
  • the plating which has Cu as a main component is preferable from the point which is excellent in electroconductivity.
  • Ni is included, it is preferable from the point which is excellent in corrosion resistance and adhesiveness with a solder.
  • an electroless plating film is deposited only on the portion where the plating catalyst or its precursor D5 remains on the surface of the insulating base D1. Therefore, it is possible to accurately form the conductive layer only in the portion where the circuit groove is to be formed. On the other hand, the deposition of the electroless plating film on the portion where the circuit groove is not formed can be suppressed. Therefore, even when a plurality of fine circuits having a narrow line width with a narrow pitch interval are formed, an unnecessary plating film does not remain between adjacent circuits. Therefore, the occurrence of a short circuit and the occurrence of migration can be suppressed.
  • the resin coating D2 contains a fluorescent material, and after the coating removal step, the coating removal failure is inspected by using light emitted from the fluorescent material.
  • An inspection process may be further included. That is, by including a fluorescent substance in the resin film D2, the film removal failure is caused by using light emitted from the fluorescent substance by irradiating the surface to be inspected with ultraviolet light or near ultraviolet light after the film removal step. It is possible to inspect the presence or absence of the film and the location where the film removal is defective.
  • an electric circuit having an extremely narrow line width and line interval can be formed.
  • FIG. 3 is an explanatory diagram for explaining an inspection process for inspecting defective film removal by using a light emission from the fluorescent substance by adding a fluorescent substance to the resin film.
  • the fluorescent substance that can be contained in the resin film D2 used in the inspection process is not particularly limited as long as it exhibits light emission characteristics when irradiated with light from a predetermined light source. Specific examples thereof include Fluoresceine, Eosine, Pyroline G, and the like.
  • the part where the light emission from the fluorescent substance is detected by this inspection process is the part where the residue D2a of the resin film D2 remains. Therefore, by removing the portion where luminescence is detected, it is possible to suppress the formation of an electroless plating film on that portion. Thereby, generation
  • the circuit board manufacturing method further includes a desmear treatment step of performing a desmear treatment after the plating treatment step, specifically, before or after the fill-up plating. May be.
  • a desmear treatment step of performing a desmear treatment after the plating treatment step specifically, before or after the fill-up plating. May be.
  • desmear treatment unnecessary resin adhered to the electroless plating film can be removed.
  • the surface of the insulating base material where the electroless plating film is not formed is roughened, and the adhesion with the upper layer of the circuit board is improved. Can be improved.
  • a desmear process may be performed on the via bottom. By doing so, unnecessary resin adhered to the via bottom can be removed.
  • a well-known desmear process can be used. Specifically, the process etc. which are immersed in a permanganic acid solution etc. are mentioned, for example.
  • circuit board D10 as shown in FIG. 1 (E) is formed.
  • the circuit board obtained by forming the electric circuit on the planar insulating base material has been described, but the present invention is not particularly limited thereto. Specifically, even when a three-dimensional insulating base material having a stepped three-dimensional surface is used as the insulating base material, a circuit board (stereoscopic circuit board) having an accurate electric circuit of wiring can be obtained.
  • FIG. 4 is a schematic cross-sectional view for explaining each step of manufacturing the three-dimensional circuit board according to the first to second embodiments.
  • a resin coating D2 is formed on the surface of a three-dimensional insulating substrate D51 having a stepped portion. This process corresponds to a film forming process.
  • various resin molded bodies that can be used in the manufacture of conventionally known three-dimensional circuit boards can be used without any particular limitation. It is preferable from the viewpoint of production efficiency that such a molded body is obtained by injection molding.
  • Specific examples of the resin material for obtaining the resin molding include polycarbonate resin, polyamide resin, various polyester resins, polyimide resin, polyphenylene sulfide resin, and the like.
  • the method for forming the resin coating D2 is not particularly limited. Specifically, for example, the same formation method as in the case of the first to first embodiments can be mentioned.
  • a circuit groove D3 having a depth equal to or greater than the thickness of the resin coating D2 is formed with reference to the outer surface of the resin coating D2.
  • the method for forming the circuit groove D3 is not particularly limited. Specifically, for example, the same formation method as in the case of the first to first embodiments can be mentioned.
  • the circuit groove D3 defines a portion where an electroless plating film is formed by electroless plating, that is, a portion where an electric circuit is formed. This step corresponds to a circuit groove forming step.
  • a plating catalyst or its precursor D5 is deposited on the surface of the circuit groove D3 and the surface of the resin film D2 where the circuit groove D3 is not formed.
  • the method for depositing the plating catalyst or its precursor D5 is not particularly limited. Specifically, for example, the same method as in the first to first embodiments can be used.
  • This step corresponds to a catalyst deposition step.
  • the plating catalyst or its precursor D5 can be deposited on the surface of the circuit groove D3 and the surface of the resin coating D2.
  • the resin coating D2 is removed from the three-dimensional insulating base D51.
  • a plating catalyst or its precursor D5 can be made to remain only on the surface of the portion where the circuit groove D3 of the three-dimensional insulating substrate D51 is formed.
  • the plating catalyst or its precursor D5 deposited on the surface of the resin film D2 is removed together with the resin film D2 while being supported on the resin film D2.
  • the method for removing the resin film D2 is not particularly limited. Specifically, for example, the same method as in the first to first embodiments can be used. This process corresponds to a film removal process.
  • electroless plating is applied to the three-dimensional insulating substrate D51 from which the resin coating D2 has been removed.
  • the electroless plating film D6 is formed only in the portion where the plating catalyst or its precursor D5 remains. That is, an electroless plating film D6 that becomes an electric circuit is formed in a portion where the circuit groove D3 and the through hole D4 are formed.
  • the formation method of the electroless plating film D6 is not particularly limited. Specifically, for example, the same formation method as in the case of the first to first embodiments can be mentioned. This process corresponds to a plating process.
  • the circuit board D60 formed in this way can form an electric circuit with high accuracy even if the line width and line interval of the electric circuit formed on the insulating base material are narrow.
  • the circuit board according to the present embodiment is accurately and easily formed on the surface of the three-dimensional circuit board having the stepped portion.
  • the present invention relates to a further circuit board and a method for manufacturing said circuit board.
  • the subtractive method is a method of forming an electric circuit by removing (subtractive) a metal foil other than a portion where the electric circuit on the surface of the metal foil-clad laminate is desired to be formed.
  • the additive method is a method of forming an electric circuit by performing electroless plating only on a portion where a circuit on an insulating substrate is to be formed.
  • the subtractive method is a method in which the metal foil on the surface of the metal foil-clad laminate is etched to leave only the portion where the electric circuit is to be formed, and to remove other portions.
  • This method is disadvantageous from the viewpoint of manufacturing cost because the portion of the metal to be removed is wasted.
  • metal wiring can be formed by electroless plating only in a portion where an electric circuit is desired to be formed. For this reason, metal is not wasted and resources are not wasted. Also from such a point, the additive method is a preferable circuit forming method.
  • FIG. 11 is a schematic cross-sectional view for explaining each step of forming a metal wiring by a conventional full additive method.
  • a plating catalyst A102 is deposited on the surface of an insulating substrate A100 in which a through hole A101 is formed. Note that the surface of the insulating base material A100 is roughened in advance.
  • a photoresist layer A103 is formed on the insulating base material A100 on which the plating catalyst A102 is deposited.
  • the photoresist layer A103 is exposed through a photomask A110 on which a predetermined circuit pattern is formed.
  • the exposed photoresist layer A103 is developed to form a circuit pattern A104. Then, as shown in FIG.
  • a metal wiring A105 is formed on the surface of the circuit pattern A104 formed by development and the inner wall surface of the through hole A101. .
  • a circuit made of the metal wiring A105 is formed on the insulating base A100.
  • the plating catalyst A102 is deposited on the entire surface of the insulating base material A100.
  • the following problems have arisen. That is, when the photoresist layer A103 is developed with high accuracy, plating can be formed only on the portions not protected by the photoresist. However, if the photoresist layer A103 is not developed with high accuracy, an unnecessary plating portion A106 may remain in a portion where plating is not originally desired as shown in FIG. This occurs because the plating catalyst A102 is deposited on the entire surface of the insulating base material A100. The unnecessary plating portion A106 causes a short circuit or migration between adjacent circuits. Such a short circuit or migration is more likely to occur when a circuit having a narrow line width and line interval is formed.
  • FIG. 12 is a schematic cross-sectional view for explaining the contour shape of a circuit formed by a conventional full additive method.
  • examples of the manufacturing method different from the above-described circuit board manufacturing method include the manufacturing methods described in JP-A-57-134996 and JP-A-58-186994.
  • JP-A-57-134996 discloses the following method as another additive method.
  • a solvent-soluble first photosensitive resin layer and an alkali-soluble second photosensitive resin layer are formed on an insulating substrate (insulating base material). Then, the first and second photosensitive resin layers are exposed through a photomask having a predetermined circuit pattern. Next, the first and second photosensitive resin layers are developed. Next, after the catalyst is adsorbed on the entire surface including the concave portions generated by development, only the unnecessary catalyst is removed by dissolving the alkali-soluble second photosensitive resin with an alkali solution. Then, after that, electroless plating is performed to accurately form a circuit only in a portion where the catalyst exists.
  • Japanese Patent Laid-Open No. 58-186994 discloses the following method.
  • a resin protective film is coated on an insulating substrate (insulating base material) (first step).
  • a groove and a through hole corresponding to the wiring pattern are drawn or formed on the insulating substrate coated with the protective film alone or simultaneously by machining or laser beam irradiation (second step).
  • an activation layer is formed on the entire surface of the insulating substrate (third step).
  • the protective film is peeled off, the activation layer on the insulating substrate is removed, and the activation layer is left only on the inner wall surface of the groove and the through hole (fourth step).
  • the insulating substrate is plated without using a plating protective film, and a conductive layer is selectively formed only on the inner surfaces of the activated grooves and through holes (fifth step).
  • Japanese Patent Application Laid-Open No. 58-186994 discloses that after a thermosetting resin is coated on an insulating substrate as a protective film and heated and cured, the protective film and the insulating substrate are cut according to a predetermined wiring pattern, It is described that the thermosetting resin on the surface of the insulating substrate is removed with a solvent (Japanese Patent Laid-Open No. 58-186994, page 2, lower left column, line 16 to lower right column, line 11).
  • thermosetting resin used as the protective film described in JP-A-58-186994 the type is not particularly described. Since general thermosetting resins have excellent solvent resistance, there is a problem that they are difficult to remove with a simple solvent. Also, such a thermosetting resin has too high adhesion to the resin substrate, and it is difficult to accurately remove only the protective film without leaving a fragment of the protective film on the surface of the resin substrate. there were. In addition, when a strong solvent is used for sufficient peeling or when the substrate is immersed for a long time, the plating catalyst on the surface of the substrate is also removed. In this case, the conductive layer is not formed in the portion where the plating catalyst is removed.
  • the protective film made of thermosetting resin may collapse so that the plating catalyst in the protective film is redispersed in the solvent. there were.
  • the plating catalyst redispersed in the solvent may be reattached to the surface of the resin base material, and an unnecessary plating film may be formed in that portion. Therefore, according to a method such as the method disclosed in Japanese Patent Application Laid-Open No. 58-186994, it is difficult to form a circuit having an accurate contour.
  • a relatively large LSI Large Scale Integration
  • LSI Large Scale Integration
  • Such an LSI is bonded to the land portion formed as a part of the circuit of the electric circuit board by solder bumps. Since the portable information terminal device is carried, there are many opportunities to receive an impact. When such an impact is applied, there is a risk that a force is applied to the mounted LSI and the metal wiring constituting the land portion is peeled off from the insulating base material.
  • the circuit wiring is widened, the metal wiring is reinforced, the contact area between the metal wiring and the insulating base is increased, and the metal wiring and the insulating base are in close contact with each other.
  • a method for improving the sex can be considered. However, such a method cannot increase the density of the circuit.
  • the present invention has been made in view of such circumstances, and even if the line width and the line interval of the electric circuit formed on the insulating substrate are narrow, the adhesion between the insulating substrate and the electric circuit is high, An object of the present invention is to provide a circuit board in which an electric circuit is hardly damaged. Moreover, it aims at providing the manufacturing method of the said circuit board.
  • the present inventors paid attention to the composition of the insulating base material in order to improve the adhesion between the insulating base material and the electric circuit.
  • an insulating base material that does not contain a filler it is considered that the surface of the circuit groove formed by laser processing or machining does not contain a filler, and therefore tends to be smooth.
  • a circuit groove with a smooth surface is considered to be easier to form an electric circuit, and a filler that can reduce the smoothness of the surface of the circuit groove formed by laser processing or machining is not included. It is done.
  • the present inventors may apply electroless plating after depositing a catalytic metal on the surface of a circuit groove formed on the insulating base material.
  • the present inventors have found that a phenomenon occurs in which a plating layer to be an electric circuit is not formed on a circuit groove or a formed plating layer is peeled off.
  • the insulating base material does not contain a filler, it was considered that the thermal expansion coefficient was large. Specifically, it was considered that the insulating base material was easily deformed due to temperature change, and the stress applied to the electric circuit due to the deformation exceeded the adhesive force between the electric circuit and the insulating base material.
  • the circuit groove is formed by laser processing or machining, since the insulating base material does not contain a filler, the heat resistance of the insulating base material is low, melting due to heat occurs, and the shape of the circuit groove is distorted. Thought to be. That is, it was considered that the stress applied to the electric circuit became non-uniform due to this irregular shape, and a portion where the stress applied to the electric circuit exceeded the adhesive force between the electric circuit and the insulating base was formed.
  • the present inventors have conceived the present invention as described below by intentionally containing a filler capable of reducing the smoothness of the surface of the circuit groove formed by laser processing or machining. It was.
  • a circuit board forms a resin film on a surface, and forms a circuit groove having a desired shape and depth by laser processing or machining from the outer surface side of the resin film, Applying a catalytic metal to the surface of the circuit groove and the surface of the resin coating, and applying the electroless plating to the insulating substrate formed by peeling the resin coating from the insulating substrate.
  • the insulating base material contains a filler.
  • the circuit between the insulating base material and the electric circuit has high adhesion and the electric circuit is not easily damaged.
  • a substrate is obtained.
  • the said electric circuit is specifically formed on the circuit groove
  • the surface of the formed circuit groove is formed with minute irregularities derived from the filler by performing laser processing or machining on the insulating substrate. And, it is considered that the catalyst metal deposited on the surface of the circuit groove can be sufficiently suppressed by the minute unevenness. Therefore, it is considered that the occurrence of defects in the electric circuit formed on the circuit groove can be sufficiently suppressed by electroless plating.
  • the adhesion between the electric circuit formed on the circuit groove of the insulating base material and the insulating base material can be enhanced by the anchor effect due to the minute unevenness.
  • the insulating base material contains a filler, the thermal expansion coefficient is small. Therefore, the insulating base material is not easily deformed by a temperature change, and stress applied to the formed electric circuit is reduced. Therefore, it is considered that peeling of the electric circuit due to the stress applied to the electric circuit due to the deformation can be suppressed.
  • the circuit groove is formed by laser processing or machining, since the insulating base material contains a filler, the heat resistance of the insulating base material is high, and melting due to heat hardly occurs. Therefore, it is considered that the shape of the formed circuit groove can be sufficiently suppressed. That is, since it is suppressed that the shape of the circuit groove is distorted, it is considered that the stress applied to the electric circuit becomes uniform and peeling of the electric circuit can be suppressed.
  • the content of the filler is 10 to 90% by mass with respect to the insulating base material. According to such a configuration, even if the line width and the line interval of the electric circuit are narrow, a circuit board with higher adhesion between the insulating base and the electric circuit can be obtained.
  • the average particle diameter of the filler is preferably 0.05 to 10 ⁇ m. According to such a configuration, even if the line width and the line interval of the electric circuit are narrow, a circuit board with higher adhesion between the insulating base and the electric circuit can be obtained.
  • the average particle diameter of the filler is 0.25 with respect to the minimum value among the width of the circuit groove, the depth of the circuit groove, and the width of the portion between adjacent circuit grooves. It is preferably ⁇ 50%. According to such a configuration, even if the line width and the line interval of the electric circuit are narrow, a circuit board with higher adhesion between the insulating base and the electric circuit can be obtained.
  • the filler is preferably inorganic fine particles. According to such a configuration, even if the line width and the line interval of the electric circuit are narrow, a circuit board with higher adhesion between the insulating base and the electric circuit can be obtained. This is considered to be able to make a larger contribution due to the fact that, among the above mechanisms, for example, the thermal expansion coefficient of the insulating base material can be made smaller. That is, the insulating base material is less likely to be deformed due to the temperature change, and the stress applied to the formed electric circuit is reduced. Therefore, it is considered that the peeling of the electric circuit due to the stress applied to the electric circuit due to the deformation can be further suppressed.
  • the electric circuit includes a portion having a line width of at least 5 to 30 ⁇ m.
  • a circuit board having a sufficiently dense circuit can be obtained.
  • the contact area between the electric circuit and the insulating substrate is narrow, the adhesion between the electric circuit and the insulating substrate is lowered, and the electric circuit is insulated from the insulating substrate. Easy to peel from the material.
  • a circuit board manufacturing method includes a film forming step of forming a resin film on the surface of an insulating base, and laser processing or mechanical processing on the insulating base from the outer surface side of the resin film.
  • the coating forming step contains a filler as the insulating substrate. It is characterized by using what to do.
  • the second embodiment of the present invention includes the following.
  • Item 2-1 A resin film is formed on the surface, and laser processing or machining is performed from the outer surface side of the resin film to form a circuit groove having a desired shape and depth, and on the surface of the circuit groove and the surface of the resin film An insulating substrate formed by depositing a catalytic metal and peeling the resin film from the insulating substrate; An electric circuit formed by applying electroless plating to the insulating base, The circuit board, wherein the insulating base material contains a filler.
  • Item 2-2 The circuit board according to Item 1, wherein a content of the filler is 10 to 90% by mass with respect to the insulating base material.
  • Item 2-3 The circuit board according to Item 2-1, wherein the filler has an average particle size of 0.05 to 10 ⁇ m.
  • the average particle diameter of the filler is a minimum value among the width of the circuit groove, the depth of the circuit groove, and the width of a portion between adjacent circuit grooves,
  • Item 2-5 The circuit board according to any one of Items 2-1 to 2-4, wherein the filler is inorganic fine particles.
  • Item 2-6 The circuit board according to any one of claims 2-1 to 2-5, wherein the electric circuit includes a portion having a line width of at least 5 to 30 ⁇ m.
  • the present invention it is possible to provide a circuit board having high adhesion between the insulating base material and the electric circuit even if the line width and line spacing of the electric circuit formed on the insulating base material are narrow.
  • a method for manufacturing the circuit board is also provided.
  • the circuit board according to the present embodiment forms a circuit groove having a desired shape and depth by forming a resin film on the surface and laser processing or machining from the outer surface side of the resin film. Formed by depositing a catalytic metal on the surface of the resin and the surface of the resin coating, and peeling the resin coating from the insulating substrate, and applying electroless plating to the insulating substrate And the insulating base material contains a filler.
  • FIG. 7 is a schematic cross-sectional view for explaining each step of manufacturing the circuit board according to the 2-1 embodiment.
  • a resin coating A2 is formed on the surface of the insulating base A1.
  • This process corresponds to a film forming process.
  • the insulating base A1 contains a filler. Specifically, for example, a base material containing a resin and a filler can be used.
  • a desired shape and depth are obtained by laser processing or machining the insulating base material A1 on which the resin coating A2 is formed from the outer surface side of the resin coating A2.
  • Circuit groove A3 is formed.
  • the laser processing or machining for forming the circuit groove A3 is performed by cutting beyond the thickness of the resin coating A2 with reference to the outer surface of the resin coating A2. Moreover, you may drill the hole for forming through-hole A4 in the said insulating base material A1 as needed. This step corresponds to a circuit groove forming step.
  • a catalyst metal (plating catalyst) A5 is deposited on the surface of the circuit groove A3 and the surface of the resin coating A2 where the circuit groove A3 is not formed.
  • the catalyst metal A5 is also deposited on the inner wall surface of the through hole A4. This step corresponds to a catalyst deposition step.
  • the resin coating A2 is peeled from the insulating base material A1.
  • the catalyst metal A5 can remain only on the surface of the insulating substrate A1 where the circuit groove A3 and the through hole A4 are formed.
  • the catalyst metal A5 deposited on the surface of the resin coating A2 is removed together with the resin coating A2 while being supported on the resin coating A2. This process corresponds to a film peeling process.
  • electroless plating is performed on the insulating base material A1 from which the resin film A2 has been peeled off.
  • the plating layer A6 is formed only in the portion where the catalyst metal A5 remains. That is, a plating layer A6 that becomes an electric circuit is formed in a portion where the circuit groove A3 and the through hole A4 are formed.
  • the electric circuit may be composed of the plating layer A6, or may be a film obtained by further applying electroless plating (fill-up plating) to the plating layer A6. .
  • an electric circuit composed of a plating layer A6 is formed so as to fill the entire circuit groove A3, and a step between the insulating base and the electric circuit is eliminated. You may do it. This process corresponds to a plating process.
  • the circuit board A10 as shown in FIG. 7E is formed by the above steps.
  • the circuit board A10 thus formed has high adhesion between the insulating substrate and the electric circuit even if the line width and the line interval of the electric circuit formed on the insulating substrate are narrow, and the electric circuit is damaged. Hateful.
  • FIG. 8 is a drawing for explaining the state of the insulating base A1 after the circuit groove forming step and during the plating step in the 2-1 embodiment.
  • FIG. 8A shows the state of the insulating base material A1 after the circuit groove forming step
  • FIG. 8B shows the state of the insulating base material A1 during the plating process.
  • the insulating substrate A1 after the circuit groove forming step is formed with a circuit groove A3 by subjecting the insulating substrate A1 to laser processing or machining. Further, as shown in FIG. 8A, the filler A11 contained in the insulating base A1 is partially exposed on the surface of the circuit groove A3, or a bulge based on the filler A11 is formed. It is thought that. Therefore, it is considered that minute irregularities derived from the filler A11 are formed on the surface of the circuit groove A3. Then, it is considered that the catalyst metal deposited on the surface of the circuit groove A3 by the catalyst deposition step is unlikely to fall off due to the minute unevenness.
  • an electrocircuit is formed on the circuit groove A3 as shown in FIG. 8B by performing electroless plating in the plating process.
  • a plating layer A7 is formed. This plating layer A7 is considered to be able to be formed while sufficiently suppressing the occurrence of defects since the dropping of the catalytic metal deposited on the surface of the circuit groove A3 is suppressed.
  • the adhesion between the electric circuit formed on the circuit groove of the insulating base material and the insulating base material can be enhanced by the anchor effect due to the minute unevenness.
  • the insulating base material contains a filler, the thermal expansion coefficient is small. Therefore, the insulating base material is not easily deformed by a temperature change, and stress applied to the formed electric circuit is reduced. Therefore, it is considered that peeling of the electric circuit due to the stress applied to the electric circuit due to the deformation can be suppressed.
  • the circuit groove is formed by laser processing or machining, since the insulating base material contains a filler, the heat resistance of the insulating base material is high, and melting due to heat hardly occurs. Therefore, it is considered that the shape of the formed circuit groove can be sufficiently suppressed. That is, since it is suppressed that the shape of the circuit groove is distorted, it is considered that the stress applied to the electric circuit becomes uniform and peeling of the electric circuit can be suppressed.
  • the insulating base material A21 containing no filler when used, even if the electric circuit is formed by the same method as in this embodiment, the plating layer that becomes the electric circuit is formed on the circuit groove.
  • the present inventors have found that there is a phenomenon in which no part or formed plating layer is peeled off. It is assumed that it is as follows.
  • FIG. 9 is drawing for demonstrating the state of insulating base material A21 at the time of using insulating base material A21 which does not contain a filler.
  • FIG. 9A and FIG. 9B are drawings corresponding to FIG. 8A and FIG. 8B, respectively.
  • the surface of the circuit groove A23 formed in the insulating base A21 is smooth by laser processing or machining, even if a catalyst metal is applied to the surface of the circuit groove A23, it is not sufficiently applied. , Is considered to fall out.
  • the circuit is caused by a portion where the catalytic metal is not deposited on the surface of the circuit groove A23 as shown in FIG. 9B. It is considered that a portion 23a where the plating layer A25 serving as an electric circuit is not formed is formed on the groove A23.
  • the insulating base material A21 does not contain a filler, the coefficient of thermal expansion is increased. Therefore, the insulating base material A21 is easily deformed due to the temperature change, and the stress applied to the plating layer A25 by the deformation exceeds the adhesive force between the plating layer A25 and the insulating base material A21, and the portion where the plating layer A25 is peeled off. It is considered that A25a is formed.
  • the circuit groove A23 is formed by laser processing or machining, since the insulating base material A21 does not contain a filler, the heat resistance of the insulating base material A21 is low and melting due to heat occurs, so that the circuit groove A23 is formed. The shape of this is thought to be distorted. Therefore, the stress applied to the plating layer A25 becomes non-uniform due to this irregular shape, and a portion where the stress applied to the plating layer A25 exceeds the adhesion between the plating layer A25 and the insulating base A21 can be formed. It is considered that a portion 25a from which A25 has been peeled is formed.
  • the plating layer A25 serving as an electric circuit is not formed on the circuit groove A23 of the insulating base material A21 or peels off. That is, when fill-up plating is further applied to the plating layer A25, the obtained electric circuit is considered to be more easily peeled off from the insulating base material A21.
  • the insulating base material A1 contains a filler. Specifically, for example, a base material containing a resin and a filler can be used.
  • the resin can be used without particular limitation as long as it is a resin constituting various organic substrates that can be used in the manufacture of circuit boards.
  • an epoxy resin an acrylic resin, a polycarbonate resin, a polyimide resin, a polyphenylene sulfide resin, and the like can be given.
  • the epoxy resin is not particularly limited as long as it is an epoxy resin constituting various organic substrates that can be used for manufacturing a circuit board.
  • bisphenol A type epoxy resin bisphenol F type epoxy resin, bisphenol S type epoxy resin, aralkyl epoxy resin, phenol novolac type epoxy resin, alkylphenol novolac type epoxy resin, biphenol type epoxy resin, naphthalene type epoxy resin , Dicyclopentadiene type epoxy resins, epoxidized products of condensates of phenols and aromatic aldehydes having phenolic hydroxyl groups, triglycidyl isocyanurate, finger ring type epoxy resins and the like.
  • the above-mentioned epoxy resin or the like that is brominated or phosphorus-modified is also included.
  • said epoxy resin said each epoxy resin may be used independently, and may be used in combination of 2 or more type.
  • a curing agent is contained for curing.
  • the curing agent is not particularly limited as long as it can be used as a curing agent. Specific examples include dicyandiamide, phenolic curing agents, acid anhydride curing agents, aminotriazine novolac curing agents, and the like.
  • curing agent a novolak type, an aralkyl type, a terpene type etc. are mentioned, for example.
  • curing agent said each hardening
  • the filler may be inorganic fine particles or organic fine particles, and is not particularly limited.
  • the material constituting the inorganic fine particles include aluminum oxide (Al 2 O 3 ), magnesium oxide (MgO), boron nitride (BN), aluminum nitride (AlN), silica (SiO 2 ), High dielectric constant fillers such as barium titanate (BaTiO 3 ) and titanium oxide (TiO 2 ); magnetic fillers such as hard ferrite; magnesium hydroxide (Mg (OH) 2 ), aluminum hydroxide (Al (OH) 2 ), Antimony trioxide (Sb 2 O 3 ), antimony pentoxide (Sb 2 O 5 ), guanidine salts, zinc borate, molybdate compounds, zinc stannate, and other inorganic flame retardants; talc (Mg 3 (Si 4 O 10) (OH) 2), barium sulfate (BaSO 4), calcium carbonate (CaCO 3), mica, and the like.
  • Al 2 O 3 magnesium oxide
  • MgO magnesium oxide
  • BN boro
  • the said inorganic fine particle may be used independently, and may be used in combination of 2 or more type. Since these inorganic fine particles have high thermal conductivity, relative dielectric constant, flame retardancy, particle size distribution, color tone freedom, etc., when selectively exerting a desired function, appropriate blending and particle size design should be performed. And high filling can be easily performed.
  • the inorganic fine particles may be surface-treated with a silane coupling agent in order to enhance dispersibility in the insulating base material.
  • the insulating base material may contain a silane coupling agent in order to increase the dispersibility of the inorganic fine particles in the insulating base material.
  • Specific examples of the silane coupling agent include epoxy silane, mercapto silane, amino silane, vinyl silane, styryl silane, methacryloxy silane, acryloxy silane, titanate silane couplings, and the like. Agents and the like.
  • the said silane coupling agent may be used independently, and may be used in combination of 2 or more type.
  • the insulating base material may contain a dispersant in order to improve the dispersibility of the inorganic fine particles in the insulating base material.
  • a dispersant include alkyl ether-based, sorbitan ester-based, alkyl polyether amine-based, polymer-based dispersants, and the like.
  • the said dispersing agent may be used independently, and may be used in combination of 2 or more type.
  • organic fine particles include rubber fine particles.
  • the filler is preferable among the above fillers because the inorganic fine particles can easily achieve high filling and can exhibit an anchor effect due to the uneven shape. Furthermore, among these, in addition to the above effects, silica fine particles can exhibit low expansion, low moisture absorption, low dielectric constant, low dielectric loss tangent, high strength, high elastic modulus, etc., and increase heat resistance. It is preferable because it can be used. Moreover, when it is necessary to improve the heat dissipation of the circuit board obtained, it is preferable to contain not only silica particles but also alumina particles and aluminum hydroxide particles together with silica particles.
  • the content of the filler is preferably 10 to 90% by mass, preferably 30 to 90% by mass, and preferably 60 to 90% by mass with respect to the insulating base material.
  • the content of the filler is within the above range, it approaches the linear expansion coefficient of an electric circuit, for example, an electric circuit made of Cu, and low warpage and low stress can be realized.
  • there is too little content of the said filler there exists a tendency which cannot fully suppress generation
  • the smoothness of an insulation base material will fall, Therefore, when peeling the resin film in a film peeling process, malfunctions, such as damaging an insulation base material, generate
  • the average particle size of the filler is preferably 0.05 to 10 ⁇ m, and more preferably 0.1 to 7 ⁇ m.
  • the average particle diameter of the filler is 0 with respect to the minimum value among the width W of the circuit groove, the depth D of the circuit groove, and the width of the portion between adjacent circuit grooves. It is preferably 25 to 50%, more preferably 0.5 to 40%.
  • the average particle diameter means a volume average particle diameter, and can be measured using a general particle size meter, for example, a particle size meter (SALD2100 manufactured by Shimadzu Corporation).
  • the filler If the filler is too small, there is a tendency that generation of a portion where the plating layer is not formed and peeling of the plating layer cannot be sufficiently suppressed. This is considered to be due to the fact that the fine irregularities derived from the filler as described above are hardly formed on the surface of the circuit groove or the through hole. On the other hand, if the filler is too large, there is a tendency that a desired circuit groove cannot be formed when forming a circuit with higher density, for example, a circuit having a line width and a line interval of 10 ⁇ m or less. Furthermore, there is a tendency that generation of a portion where the plating layer is not formed and peeling of the plating layer cannot be sufficiently suppressed. This is considered to be because if the filler is too large, the fine irregularities derived from the filler as described above are hardly formed.
  • the average particle diameter of the filler is preferably 0.05 to 3 ⁇ m when the circuit groove width (trench width) is 10 ⁇ m or less, and 0.05 to 3 ⁇ m when the trench width exceeds 10 ⁇ m and 20 ⁇ m or less. It is preferably 5 ⁇ m.
  • the trench width exceeds 20 ⁇ m and is 30 ⁇ m or less, it is preferably 0.05 to 7 ⁇ m, and when the trench width exceeds 30 ⁇ m, it is preferably 0.05 to 10 ⁇ m.
  • the same relationship as the trench width is satisfied with respect to the width (inter-trench width) of the portion between adjacent circuit grooves and the depth of the circuit groove (trench depth).
  • the minimum value among the trench width, the inter-trench width, and the trench depth determines a suitable range of the average particle diameter of the filler. Specifically, for example, when all of the trench width, the inter-trench width, and the trench depth are 20 ⁇ m, a filler having an average particle diameter of 0.05 to 5 ⁇ m is preferably used. On the other hand, even if the trench width and the inter-trench width are both 20 ⁇ m, if the trench depth is 10 ⁇ m, a filler having an average particle diameter of 0.05 to 3 ⁇ m is preferably used.
  • the form of the insulating substrate is not particularly limited. Specifically, a sheet
  • the thickness of the insulating substrate A1 is not particularly limited. Specifically, in the case of sheets, films and prepregs, for example, the thickness is preferably 10 to 200 ⁇ m, more preferably about 20 to 100 ⁇ m.
  • the resin film A2 is not particularly limited as long as it can be removed in the film peeling process.
  • a soluble resin that can be easily dissolved by an organic solvent or an alkaline solution a resin film made of a swellable resin that can be swollen by a predetermined liquid (swelling liquid) described later, and the like.
  • a swellable resin film is particularly preferable because accurate removal is easy.
  • the swellable resin film include a resin film that does not substantially dissolve in a predetermined liquid (swelling liquid), which will be described later, and easily peels from the surface of the insulating base material A1 by swelling. .
  • the method for forming the resin coating A2 is not particularly limited. Specifically, for example, a liquid material is applied to the main surface of the insulating base A1 and then dried, or a resin coating A2 such as a resin film formed in advance on the main surface of the insulating base A1. The method of bonding what is obtained is mentioned.
  • the method for applying the liquid material is not particularly limited. Specifically, for example, conventionally known spin coating method, bar coater method and the like can be mentioned.
  • the thickness of the resin coating A2 is preferably 10 ⁇ m or less, and more preferably 5 ⁇ m or less. On the other hand, the thickness of the resin coating A2 is preferably 0.1 ⁇ m or more, and more preferably 1 ⁇ m or more. When the thickness of the resin coating A2 is too thick, the accuracy of grooves and holes formed by laser processing or machining tends to decrease. Moreover, when the thickness of the resin coating A2 is too thin, it tends to be difficult to form a resin coating with a uniform thickness.
  • a resin film having a swelling degree of 50% or more with respect to the swelling liquid can be preferably used. Further, a resin film having a degree of swelling with respect to the swelling liquid of 100% or more is more preferable, and a resin film having 1000% or less is more preferable.
  • a resin film having 1000% or less is more preferable.
  • the said swelling degree is too low, there exists a tendency for a swelling resin film to become difficult to peel in the said film peeling process.
  • the said swelling degree is too high, there exists a tendency for peeling to become difficult by tearing at the time of peeling, etc., when the film strength falls.
  • the method for forming the swellable resin film is not particularly limited. Specifically, for example, a liquid material capable of forming a swellable resin film is applied to the main surface of the insulating base A1 and then dried, or the liquid material is applied to a support substrate and then dried. For example, a method of transferring a film formed by this onto the main surface of the insulating base A1 can be used.
  • liquid material that can form the swellable resin film examples include an elastomer suspension or an emulsion.
  • the elastomer include a diene elastomer such as a styrene-butadiene copolymer, an acrylic elastomer such as an acrylate ester copolymer, and a polyester elastomer. According to such an elastomer, it is possible to easily form a swellable resin film having a desired degree of swelling by adjusting the degree of crosslinking or gelation of the elastomer resin particles dispersed as a suspension or emulsion.
  • the swellable resin film is particularly preferably a film whose degree of swelling changes depending on the pH of the swelling liquid.
  • the liquid condition in the catalyst deposition step is different from the liquid condition in the coating stripping step, so that a swellable resin can be obtained at the pH in the catalyst deposition step.
  • the coating maintains high adhesion to the insulating substrate, and the swellable resin coating can be easily peeled off at the pH in the coating peeling step.
  • the catalyst deposition step includes a step of treating in an acidic catalyst metal colloid solution having a pH range of 1 to 3, for example, and the film peeling step is performed in an alkaline solution having a pH range of 12 to 14.
  • the swellable resin film has a swelling degree with respect to the acidic catalyst metal colloid solution of 25% or less, further 10% or less, and a swelling degree with respect to the alkaline solution. It is preferable that the resin film has a thickness of 50% or more, more preferably 100% or more, and even more preferably 500% or more.
  • Examples of such a swellable resin film include photocuring used for a sheet formed from an elastomer having a predetermined amount of carboxyl groups, a dry film resist (hereinafter also referred to as DFR) for patterning printed wiring boards, and the like. And a sheet obtained by curing the entire surface of a curable alkali-developing resist, and thermosetting or alkali-developing sheet.
  • the elastomer having a carboxyl group examples include diene elastomers such as a styrene-butadiene copolymer having a carboxyl group in the molecule by containing a monomer unit having a carboxyl group as a copolymerization component; acrylic acid Examples include acrylic elastomers such as ester copolymers; and polyester elastomers. According to such an elastomer, a swellable resin film having a desired alkali swelling degree can be formed by adjusting the acid equivalent, the degree of crosslinking or the degree of gelation of the elastomer dispersed as a suspension or emulsion. .
  • the carboxyl group in the elastomer swells the swellable resin film with respect to the alkaline aqueous solution and acts to peel the swellable resin film from the surface of the insulating substrate.
  • the acid equivalent is the polymer weight per equivalent of carboxyl groups.
  • the monomer unit having a carboxyl group examples include (meth) acrylic acid, fumaric acid, cinnamic acid, crotonic acid, itaconic acid, maleic anhydride, and the like.
  • the content ratio of the carboxyl group in the elastomer having such a carboxyl group is preferably 100 to 2000, more preferably 100 to 800 in terms of acid equivalent.
  • the acid equivalent is too small, the compatibility with the solvent or other composition tends to decrease, whereby the resistance to the plating pretreatment liquid tends to decrease.
  • an acid equivalent is too small, there exists a tendency for the peelability with respect to aqueous alkali solution to fall.
  • the molecular weight of the elastomer is preferably 10,000 to 1,000,000, more preferably 20,000 to 60,000.
  • the molecular weight of the elastomer is too large, the releasability tends to decrease, and when it is too small, the viscosity decreases, so that it is difficult to maintain a uniform thickness of the swellable resin film, and plating pretreatment The resistance to the liquid also tends to deteriorate.
  • a sheet of a resin composition can be used.
  • a dry film of a photopolymerizable resin composition as disclosed in JP 2000-231190 A, JP 2001-201851 A, and JP 11-212262 A is used. Sheets obtained by curing, and commercially available as an alkali development type DFR, for example, UFG series manufactured by Asahi Kasei Corporation can be mentioned.
  • a resin containing a carboxyl group and containing rosin as a main component for example, “NAZDAR229” manufactured by Yoshikawa Chemical Co., Ltd.
  • a resin containing phenol as a main component for example, LEKTRACHEM “104F”
  • a swellable resin film is formed on a surface of an insulating substrate by applying a resin suspension or emulsion on the surface of the insulating substrate using a conventionally known application method such as a spin coat method or a bar coater method, and then drying it.
  • the bonded DFR can be easily formed by pasting the DFR on the surface of the insulating substrate using a vacuum laminator or the like and then curing the entire surface.
  • the width of the circuit groove formed in the circuit groove forming step is not particularly limited. Specifically, for example, it is preferable that the circuit groove includes a line width portion of at least 5 to 30 ⁇ m.
  • the circuit groove A3 defines a portion where a plating layer is formed by electroless plating, that is, a portion where an electric circuit is formed.
  • the width of the circuit groove formed here is the line width of the electric circuit formed in the present embodiment. That is, in the case of such an electric circuit with a narrow line width, a circuit board having a sufficiently high density circuit can be obtained.
  • the depth of the circuit groove is the depth of the electric circuit formed in this embodiment when a step is eliminated between the electric circuit and the insulating base material by fill-up plating.
  • a fine circuit having a line width of 20 ⁇ m or less can be easily formed.
  • the plating catalyst 5 is a catalyst applied to form a plating layer only in a portion where it is desired to form a plating layer by electroless plating in the plating process.
  • Any plating catalyst can be used without particular limitation as long as it is known as a catalyst for electroless plating.
  • a plating catalyst precursor may be deposited in advance, and the plating catalyst may be generated after the resin film is peeled off.
  • Specific examples of the plating catalyst include, for example, metal palladium (Pd), platinum (Pt), silver (Ag), etc., or a precursor that generates these.
  • Examples of the method of depositing the plating catalyst 5 include a method of treating with an acidic Pd—Sn colloid solution treated under acidic conditions of pH 1 to 3 and then treating with an acid solution. Specific examples include the following methods.
  • the oil adhering to the surface of the insulating base material A1 in which the circuit groove A3 and the through hole A4 are formed is washed with hot water in a surfactant solution (cleaner / conditioner) for a predetermined time.
  • a surfactant solution cleaning / conditioner
  • a soft etching treatment is performed with a sodium persulfate-sulfuric acid based soft etching agent.
  • an acidic solution such as a sulfuric acid aqueous solution or a hydrochloric acid aqueous solution having a pH of 1 to 2.
  • a pre-dip treatment is performed in which a chloride ion is adsorbed on the surface of the insulating base material A1 by immersing in a pre-dip solution mainly containing a stannous chloride aqueous solution having a concentration of about 0.1%.
  • Pd and Sn are aggregated and adsorbed by further immersing in an acidic catalytic metal colloid solution such as acidic Pd—Sn colloid having a pH of 1 to 3 containing stannous chloride and palladium chloride.
  • an oxidation-reduction reaction SnCl 2 + PdCl 2 ⁇ SnCl 4 + Pd ⁇
  • the metal palladium which is a plating catalyst precipitates.
  • the acidic catalyst metal colloid solution a known acidic Pd—Sn colloid catalyst solution or the like can be used, and a commercially available plating process using an acidic catalyst metal colloid solution may be used. Such a process is systematized and sold by Rohm & Haas Electronic Materials Co., Ltd., for example.
  • the resin film A2 is dissolved or removed by swelling by immersing the insulating substrate A1 coated with the resin film A2 in a liquid such as an alkaline solution for a predetermined time.
  • a liquid such as an alkaline solution for a predetermined time.
  • an alkaline solution for example, an aqueous sodium hydroxide solution having a concentration of about 1 to 10% can be used.
  • the swellable resin film A2 can be easily obtained without substantially decomposing or dissolving the insulating base material A1, the swellable resin film A2, and the plating catalyst 5. Any liquid that can be swollen to such an extent that it can be peeled can be used without particular limitation. Such a swelling liquid can be appropriately selected depending on the type and thickness of the swellable resin film A2.
  • the swellable resin film is formed of an elastomer such as a diene elastomer, an acrylic elastomer, and a polyester elastomer, for example, sodium hydroxide having a concentration of about 1 to 10%
  • an aqueous alkali solution such as an aqueous solution can be preferably used.
  • the swelling resin film A2 has a swelling degree of 10% or less under acidic conditions, and under alkaline conditions. It is preferably formed from an elastomer such as a diene elastomer, an acrylic elastomer, and a polyester elastomer having a degree of swelling of 50% or more.
  • an elastomer such as a diene elastomer, an acrylic elastomer, and a polyester elastomer having a degree of swelling of 50% or more.
  • Such a swellable resin film easily swells and peels off with an alkaline aqueous solution having a pH of 12 to 14, for example, a sodium hydroxide aqueous solution having a concentration of about 1 to 10%.
  • Examples of the method for swelling the swellable resin film A2 include a method of immersing the insulating base material A1 coated with the swellable resin film A2 in a swelling liquid for a predetermined time. Moreover, in order to improve peelability, it is particularly preferable to irradiate with ultrasonic waves during immersion. In addition, when not peeling only by swelling, you may peel off with a light force as needed.
  • the insulating substrate A1 partially coated with the plating catalyst 5 is immersed in an electroless plating solution, and only the portion where the plating catalyst 5 is deposited is electroless plated film.
  • a method of depositing (plating layer) may be used.
  • Examples of the metal used for electroless plating include copper (Cu), nickel (Ni), cobalt (Co), and aluminum (Al).
  • the plating which has Cu as a main component is preferable from the point which is excellent in electroconductivity.
  • Ni is included, it is preferable from the point which is excellent in corrosion resistance and adhesiveness with a solder.
  • the film thickness of the electroless plating film 6 is not particularly limited. Specifically, for example, it is preferably about 0.1 to 10 ⁇ m, more preferably about 1 to 5 ⁇ m. In particular, by increasing the depth of the circuit groove A3, it is possible to easily form a metal wiring having a large thickness and a large cross-sectional area. In this case, it is preferable because the strength of the metal wiring can be improved.
  • the electroless plating film is deposited only on the portion where the plating catalyst 5 remains on the surface of the insulating base A1. Therefore, it is possible to accurately form the conductive layer only in the portion where the circuit groove is to be formed. On the other hand, the deposition of the electroless plating film on the portion where the circuit groove is not formed can be suppressed. Therefore, even when a plurality of fine circuits having a narrow line width with a narrow pitch interval are formed, an unnecessary plating film does not remain between adjacent circuits. Therefore, the occurrence of a short circuit and the occurrence of migration can be suppressed.
  • the circuit board obtained by forming an electric circuit on a flat insulating base material has been described, but the present invention is not particularly limited thereto. Specifically, even when a three-dimensional insulating base material having a stepped three-dimensional surface is used as the insulating base material, a circuit board (stereoscopic circuit board) having an accurate electric circuit of wiring can be obtained.
  • FIG. 10 is a schematic cross-sectional view for explaining each step of manufacturing the three-dimensional circuit board according to the 2-2 embodiment.
  • a resin coating A2 is formed on the surface of a three-dimensional insulating base A51 having a stepped portion. This process corresponds to a film forming process.
  • various resin molded bodies that can be used for manufacturing a conventionally known three-dimensional circuit board can be used without any particular limitation. It is preferable from the viewpoint of production efficiency that such a molded body is obtained by injection molding.
  • Specific examples of the resin material for obtaining the resin molding include polycarbonate resin, polyamide resin, various polyester resins, polyimide resin, polyphenylene sulfide resin, and the like.
  • the method for forming the resin coating A2 is not particularly limited. Specifically, for example, the same formation method as in the case of the above-mentioned 2-1 embodiment and the like can be mentioned.
  • a desired shape and depth are obtained by laser processing or machining the three-dimensional insulating base material A51 on which the resin coating A2 is formed from the outer surface side of the resin coating A2.
  • the circuit groove A3 is formed.
  • the laser processing or machining for forming the circuit groove A3 is performed by cutting beyond the thickness of the resin coating A2 with reference to the outer surface of the resin coating A2. This step corresponds to a circuit groove forming step.
  • the circuit groove A3 defines a portion where a plating layer is formed by electroless plating, that is, a portion where an electric circuit is formed.
  • a catalytic metal (plating catalyst) 5 is deposited on the surface of the circuit groove A3 and the surface of the resin coating A2 where the circuit groove A3 is not formed.
  • This step corresponds to a catalyst deposition step.
  • the catalyst metal A5 can be deposited on the surface of the circuit groove A3 and the surface of the resin coating A2.
  • the resin coating A2 is peeled from the three-dimensional insulating base material A51.
  • the catalyst metal A5 can be left only on the surface of the portion of the three-dimensional insulating base A51 where the circuit groove A3 is formed.
  • the catalyst metal A5 deposited on the surface of the resin coating A2 is removed together with the resin coating A2 while being supported on the resin coating A2. This process corresponds to a film peeling process.
  • electroless plating is applied to the three-dimensional insulating substrate A51 from which the resin film A2 has been peeled off.
  • the plating layer A6 is formed only in the portion where the catalyst metal A5 remains. That is, a plating layer A6 that becomes an electric circuit is formed in a portion where the circuit groove A3 and the through hole A4 are formed. This process corresponds to a plating process.
  • a circuit board A60 in which an electric circuit A6 is formed on a three-dimensional solid insulating base A51 as shown in FIG. 10 (E) is formed.
  • the circuit board A60 thus formed has high adhesion between the insulating base and the electric circuit even if the line width and line spacing of the electric circuit formed on the insulating base are narrow, and the electric circuit is damaged. Hateful.
  • the circuit board according to the present embodiment is also accurately and easily formed on the surface of the three-dimensional circuit board having the stepped portion.
  • the present invention further relates to a method for manufacturing a multilayer circuit board using the additive method, and to a multilayer circuit board manufactured by the manufacturing method, which belongs to the technical field of multilayer circuit boards.
  • a subtractive method and an additive method are known as a method of forming a circuit on a circuit board.
  • the subtractive method is a method of forming a circuit by removing (subtractive) a metal foil other than a portion where a circuit is desired to be formed on the surface of the metal foil-clad laminate.
  • the additive method is a method of forming a circuit by performing electroless plating only on a portion on the insulating base material where the circuit is to be formed.
  • the subtractive method is a method in which a metal foil is left only in a circuit formation portion by etching a thick metal foil. According to this method, a portion of the metal to be removed is wasted. On the other hand, the additive method does not waste metal because the electroless plating film can be formed only on the portion where the metal wiring is to be formed. Also in this respect, the additive method is a preferable circuit forming method.
  • the full additive method which is one of the conventional representative additive methods, is performed as follows, for example. First, a plating catalyst is deposited on the surface of the insulating substrate. Next, a photoresist layer is formed on the plating catalyst. Next, the surface of the photoresist layer is exposed through a photomask on which a predetermined circuit pattern is formed. Next, the circuit pattern is developed. Then, by applying electroless plating to the surface of the circuit pattern formed by development, metal wiring is formed on the circuit pattern portion. An electric circuit is formed on the insulating base material by such a process.
  • the plating catalyst is deposited on the entire surface of the insulating base material.
  • the plating film can be formed only on the portion not protected by the photoresist.
  • a plating film may be unnecessarily formed in a portion where a circuit is not originally desired to be formed. This occurs because the plating catalyst is deposited on the entire surface of the insulating substrate. Unnecessarily formed plating films cause short circuits and migration between adjacent circuits. Such a short circuit or migration is more likely to occur when a circuit having a narrow line width and line interval is formed.
  • a protective film of resin is coated on the insulating substrate.
  • grooves and through holes corresponding to the circuit pattern are drawn and formed on the insulating substrate coated with the protective film by machining or laser beam irradiation.
  • an activation layer is formed on the entire surface of the insulating substrate.
  • the activation layer is left only on the inner wall surface of the groove and the through hole by peeling off the resin protective film.
  • a conductive layer is selectively formed only on the inner surfaces of the activated grooves and through holes.
  • the applicant of the present invention relates to an invention in which a plating catalyst for electroless plating is left with high accuracy only on a portion where electroless plating is desired, such as a circuit pattern portion or an inner wall surface of a through hole.
  • Patent applications have already been filed (Japanese Patent Application No. 2008-118818 and Japanese Patent Application No. 2009-104086 based on this). A circuit forming method according to this patent application will be described with reference to FIG.
  • a resin film b is coated on the surface of the insulating base material a.
  • a groove c or a through hole d having a desired circuit pattern is formed on the insulating base material a coated with the resin film b.
  • the bottom surface of the groove c coincides with the surface of the insulating base material a, but the groove c may be dug deeper than the surface of the insulating base material a.
  • a plating catalyst e is deposited on the surface of the groove c and the through hole d and the surface of the resin film b.
  • the plating catalyst is a concept including its precursor.
  • the plating film e is left only on the surfaces of the groove c and the through hole d by peeling off the resin film b.
  • the electroless plating film f is formed only on the portion where the plating catalyst e is left, so that the conductive layer is accurately formed only on the inner wall surface of the groove c and the through hole d.
  • a substrate x is obtained.
  • a circuit board g on which a first electric circuit h is formed is prepared.
  • the circuit h is mounted on the upper surface of the circuit board g, but may be embedded in the upper surface of the circuit board g.
  • the method for forming the first circuit h is not limited here.
  • an insulating layer i is formed on the upper surface of the circuit board g on which the first circuit h is formed.
  • a resin film j is formed on the upper surface (outer surface) of the insulating layer i.
  • a laser processing is performed from the outer surface of the formed resin film j, thereby forming a circuit pattern k having a depth greater than the thickness of the resin film j and an interlayer connection hole m.
  • the circuit pattern k includes a wiring groove, an electrode pad hole, and the like.
  • the interlayer connection hole m reaches the first circuit h of the circuit board g and exposes the first circuit h.
  • a plating catalyst n is deposited on the surface of the resin film j, the surface of the circuit pattern k, the surface of the interlayer connection hole m, and the exposed surface of the first circuit h. From the viewpoint of electroless plating, which will be described later, it is not necessary to apply the plating catalyst n to the surface of the first circuit h, but the work can be facilitated by applying the plating catalyst n to the entire insulating layer i. Is achieved.
  • the resin film j is removed from the insulating layer i. Then, as shown in FIG.
  • the wiring groove in the circuit portion has a fine line width and a shallow depth. Since the hole for the part is also shallow, both of them complete the conductor formation in a short time, but the hole for the interlayer connection is larger than the line width of the wiring groove and the depth is deeper than the circuit part. It takes a long time to fill with plating metal. Therefore, when the electroless plating is completed at the time when the conductor formation of the circuit portion is completed, as illustrated in FIG. 18G, the metal filling of the interlayer connection hole becomes insufficient, and the connection between the circuit and the interlayer connection hole is poor. Cause.
  • the conductor formation in the circuit portion becomes excessive and short circuits or the like are likely to occur.
  • the depth of the interlayer connection hole can be reduced, or the interlayer connection hole can be reduced. It is proposed to reduce the diameter of the.
  • the former is often difficult in designing a circuit board and is difficult to realize. In the latter, the contact area between the interlayer connection hole and the circuit is reduced, and the reliability of the interlayer connection is lowered.
  • the metal filling is completed in a short time. In addition to growing from the bottom, it also grows from the circuit pattern side, so voids are easily generated inside the metal pillar.
  • the present invention is intended to solve the above-described problems when the additive method is applied when manufacturing a multilayer circuit board by the build-up method, and even if a fine circuit pattern and interlayer connection holes are mixed.
  • Another object of the present invention is to provide a method for manufacturing a multilayer circuit board, in which the metal filling of the interlayer connection holes is sufficiently and satisfactorily performed and excessive conductor formation in the circuit portion can be avoided.
  • the method for manufacturing a multilayer circuit board according to the present invention is a method for manufacturing a multilayer circuit board having interconnected electrical circuits and interlayer connection holes, and the circuit board circuit on which the first electrical circuit is formed.
  • the first insulating layer forming step, the hole forming step, and the metal pillar forming step before forming the circuit pattern are previously filled with the plated metal only in the interlayer connection hole. Without worrying about conductor formation, the metal filling of the interlayer connection holes can be sufficiently performed over time. In addition, since the circuit pattern is not yet formed, the plating film does not grow from the circuit pattern side, and good metal filling with suppressed generation of voids is realized. Then, after the metal filling of the interlayer connection holes is completed, the second insulating layer forming process, the film forming process, the circuit pattern forming process, the catalyst deposition process, the film removing process, and the plating process are performed.
  • the conductor formation of the circuit portion is performed by the additive method as described, a fine conductor can be accurately formed in a short time, and excessive formation of the conductor in the circuit portion is avoided. As described above, even when a fine circuit pattern and interlayer connection holes are mixed, a multilayer circuit board can be produced without any problem by the build-up method while applying the additive method satisfactorily.
  • the “metal pillar” formed in the metal pillar forming step is not limited as long as it has a thickness larger than that of the conductor layer constituting the electric circuit and is a conductive convex portion protruding substantially perpendicular to the electric circuit. Is not particularly limited. For example, in addition to a columnar shape having a constant cross-sectional shape such as a cylinder or a prism, a truncated cone shape or a truncated pyramid shape whose cross-sectional shape changes in the length direction is also included.
  • the “groove” of the circuit pattern formed in the circuit pattern forming step is mainly a wiring groove, and the “hole” is, for example, a hole for an electrode pad portion. However, depending on the situation, it may be an interlayer connection hole (an interlayer connection hole different from the one that has been previously filled with metal).
  • the second insulating layer is formed on the outer surface of the first insulating layer
  • the resin film is formed on the outer surface of the second insulating layer
  • at least the thickness of the resin film and the thickness of the second insulating layer Since the resin film is removed after the circuit pattern having a depth equal to or greater than the total value is formed, the second insulating layer is always processed and removed. Therefore, the bottom surface of the circuit pattern is located at a position dug down from the outer surface of the second insulating layer, and the conductor layer constituting the electric circuit is partially or entirely embedded in the outer surface of the second insulating layer. .
  • the thickness of the conductor layer can be increased, and the mechanical strength of the circuit can be ensured.
  • the amount of protrusion of the conductor layer from the second insulating layer can be eliminated or reduced to protect the circuit, suppress the falling of the circuit from the insulating layer, and eliminate or reduce irregularities generated on the circuit formation surface. It becomes possible.
  • the circuit pattern in the circuit pattern forming step, is formed so that the top of the metal pillar is exposed and protrudes from the bottom surface of the circuit pattern, and the second electric circuit formed so as to cover the top of the metal pillar It is preferable that this part is an electrode pad part. This is because the top portion of the metal pillar bites into the conductor layer of the pad portion, and the drop-off of the pad portion is effectively suppressed by the anchor effect, and a pad portion that can sufficiently withstand the weight of the mounted component is obtained.
  • the circuit pattern in the circuit pattern forming step, may be formed so that the top of the metal pillar is exposed and does not protrude from the bottom surface of the circuit pattern. In this case, it is possible to avoid the conductor layer formed on the top of the metal pillar from protruding from the outer surface of the insulating layer, and it is possible to eliminate the unevenness generated on the circuit forming surface.
  • the metal pillar may be grown to the outer surface of the first insulating layer.
  • the metal pillar is not grown to the outer surface of the first insulating layer, but is grown at a height earlier than that. It stops. Thereby, it can be easily achieved that the top of the metal pillar does not protrude from the bottom surface of the circuit pattern at the stage of the metal pillar forming process prior to the circuit pattern forming process.
  • the top of the metal pillar can be removed to the position that becomes the bottom surface of the circuit pattern, so that the top of the metal pillar can be exposed and not protruded in the circuit pattern forming process. It is. Accordingly, it is possible to reliably achieve the correction of the position of the top of the metal column so that the top of the metal column does not protrude from the bottom surface of the circuit pattern.
  • the hole in the metal column forming step, can be filled with the plated metal by growing the plated film from the exposed first electric circuit by electroless plating. Since the electric circuit which is a conductor is used as a plating nucleus of electroless plating, a metal column can be rationally formed.
  • a plating catalyst is deposited on the surface of the first insulating layer, the inner wall surface of the hole, and the exposed surface of the first electric circuit.
  • electrolytic plating is performed to fill the holes with plating metal, and then the plating metal deposited on the outer surface side of the first insulating layer including the surface of the first insulating layer can be removed. Good. Since the electroless plating layer formed on the outer surface side of the first insulating layer including the surface of the first insulating layer is used as a power feeding layer necessary for electrolytic plating, a metal column can be rationally formed.
  • the resin film is preferably a resin film that can be dissolved or removed from the insulating layer by dissolving or swelling with a predetermined liquid.
  • the resin film can be easily and satisfactorily removed from the surface of the insulating layer. If the resin film is collapsed when removing the resin film, the plating catalyst deposited on the resin film will be scattered, and the scattered plating catalyst will be re-deposited on the insulating layer, and an unnecessary plating film will be formed on that part. There is a problem. Such a problem can be prevented because the resin film can be easily and satisfactorily removed from the surface of the insulating layer.
  • the multilayer circuit board of this invention is a multilayer circuit board manufactured by the above manufacturing methods. Therefore, even if a fine circuit pattern and an interlayer connection hole are mixed, the metal filling of the interlayer connection hole is sufficiently and satisfactorily performed, and the connection between the circuit and the interlayer connection hole is good. Excessive conductor formation in the portion is avoided, and a multilayer circuit board in which a short circuit or the like hardly occurs is obtained.
  • the third embodiment of the present invention includes the following.
  • Item 3-1 A method of manufacturing a multilayer circuit board having electrical circuits and interlayer connection holes connected to each other, A first insulating layer forming step of forming a first insulating layer on a circuit forming surface of a circuit board on which the first electric circuit is formed; Forming a hole from the outer surface in the first insulating layer and exposing the first electric circuit; A metal column forming step of filling the hole with plating metal from the exposed first electric circuit to form a metal column; A second insulating layer forming step of forming a second insulating layer on the outer surface of the first insulating layer and the top of the metal pillar; A film forming step of forming a resin film on the outer surface of the second insulating layer; A circuit pattern is formed by forming a groove and / or a hole having a predetermined depth and a predetermined shape at least equal to or greater than the total value of the thickness of the resin film and the thickness of the second insulating layer from the outer surface of the resin film.
  • Circuit pattern forming step to be formed A catalyst deposition step of depositing a plating catalyst on the surface of the resin film and the surface of the circuit pattern; A film removing step of removing the resin film from the second insulating layer; and By performing electroless plating on the first insulating layer and the second insulating layer, a plating film is formed on the portion of the circuit pattern where the plating catalyst remains and on the exposed portion of the metal pillar, and the first insulating layer and the second insulating layer A plating step of forming a second electric circuit in the second insulating layer and inter-connecting the second electric circuit of the insulating layer and the first electric circuit of the circuit board via the metal pillar; A method for manufacturing a multilayer circuit board.
  • Item 3-2 In the circuit pattern forming step, the top of the metal column is exposed from the bottom surface of the circuit pattern and the circuit pattern is formed so as to protrude, and the portion of the second electric circuit formed so as to cover the top of the metal column is an electrode.
  • Item 3 A manufacturing method of a multilayer circuit board according to Item 3-1, which is used as a pad part.
  • Item 3-3 The method for manufacturing a multilayer circuit board according to Item 3-1, wherein in the circuit pattern forming step, the circuit pattern is formed so that the top of the metal pillar is exposed from the bottom surface of the circuit pattern and does not protrude.
  • Item 3-4 The multilayer according to Item 3-3, wherein the top of the metal pillar is exposed and does not protrude in the circuit pattern forming process by filling the metal pattern with the plating metal up to a position that becomes a bottom surface of the circuit pattern in the metal pillar forming process.
  • the top of the metal column is removed to a position that becomes the bottom surface of the circuit pattern, so that the top of the metal column is exposed and does not protrude in the circuit pattern forming step.
  • the manufacturing method of the multilayer circuit board as described.
  • Item 3-6 The metal column forming process according to any one of Items 3-1 to 3-5, wherein the hole is filled with a plating metal by growing a plating film by electroless plating from the exposed first electric circuit.
  • the metal column forming step after the plating catalyst is deposited on the surface of the first insulating layer, the inner wall surface of the hole, and the exposed surface of the first electric circuit, electroless plating is performed on the plating catalyst deposition portion.
  • electrolytic plating By applying electrolytic plating, the holes are filled with plating metal, and then the plating metal deposited on the outer surface side of the first insulating layer including the surface of the first insulating layer is removed.
  • Item 3-8 The method for producing a multilayer circuit board according to any one of Items 3-1 to 7, wherein the resin film is a resin film that can be dissolved or removed from the insulating layer by dissolving or swelling with a predetermined liquid.
  • Item 9 A multilayer circuit board manufactured by the manufacturing method according to any one of Items 3-1 to 3-8.
  • a multilayer circuit board can be produced without any problem by the build-up method while applying the additive method satisfactorily.
  • an electric circuit embedded in the insulating layer can be obtained, it is possible to secure the mechanical strength of the circuit, protect the circuit, suppress the falling off of the circuit from the insulating layer, suppress unevenness generated on the circuit forming surface, etc. It is done.
  • FIG. 13 is a partial plan view for illustrating the configuration of the electric circuit F27 and the arrangement of the interlayer connection holes F21 (or the metal pillars F22) in the multilayer circuit board F1 according to the present embodiment.
  • the multilayer circuit board F1 in which the electric circuit F27 and the via hole which is the interlayer connection hole F21 are connected to each other is manufactured.
  • the circuit F27 includes a fine line width wiring F27a and an electrode pad portion F27b.
  • the electrode pad portion F27b is provided so as to overlap the interlayer connection hole F21.
  • reference numeral F10 is a circuit board
  • reference numeral F11 is a first electric circuit
  • reference numeral F20 is a first insulating layer
  • reference numeral F21 is an interlayer connection hole
  • reference numeral F22 is a metal pillar
  • reference numeral F23 is a second insulating layer
  • reference numeral F24 is a resin film
  • symbol F25 is a circuit pattern
  • symbol F26 is a plating catalyst
  • symbol F27 is a second electric circuit
  • symbol F30 is an entire insulating layer including the first insulating layer F20 and the second insulating layer F23.
  • the first electric circuit F11 formed on the circuit board F10 and the insulating layer F30 (the first insulating layer F20 and the second insulating layer F20 stacked on the circuit board F10).
  • the second electric circuit F27 formed in the insulating layer F23) is interlayer-connected through an interlayer connection hole F21 (or metal pillar F22) formed in the first insulating layer F20.
  • a circuit board F10 on which the first electric circuit F11 is formed is prepared (circuit board preparation step).
  • the first circuit F11 is mounted on the upper surface of the circuit board F10, but may be embedded in the upper surface of the circuit board F10.
  • the formation method of the first circuit F11 is not limited here. For example, it may be formed by a conventionally known circuit forming method such as a subtractive method or an additive method. Further, the circuit board may be formed on only one side or may be formed on both sides. A multilayer circuit board may also be used.
  • circuit board F10 various organic substrates conventionally used for manufacturing multilayer circuit boards can be used without any particular limitation.
  • the organic substrate include substrates made of epoxy resin, acrylic resin, polycarbonate resin, polyimide resin, polyphenylene sulfide resin, polyphenylene ether resin, cyanate resin, benzoxazine resin, bismaleimide resin, and the like.
  • the form of the circuit board F10 is not particularly limited, such as a sheet, a film, a prepreg, and a three-dimensional molded body.
  • the thickness of the circuit board F10 is not particularly limited. For example, in the case of a sheet, film, prepreg, etc., the thickness is about 10 to 500 ⁇ m, preferably about 20 to 200 ⁇ m.
  • the detailed description of the circuit board F10 is the same as the detailed description of the first insulating layer F20 described below.
  • a first insulating layer F20 is formed on the upper surface (circuit forming surface) of the circuit board F10 on which the first circuit F11 is formed (first insulating layer forming step).
  • the form of the first insulating layer F20 is not particularly limited. Specific examples include a sheet, a film, a prepreg, and a three-dimensional molded article formed by applying a resin solution.
  • the thickness of the first insulating layer F20 is not particularly limited. Specifically, in the case of sheets, films and prepregs, for example, the thickness is preferably 10 to 200 ⁇ m, more preferably about 20 to 100 ⁇ m.
  • the first insulating layer F20 may contain inorganic fine particles such as silica particles.
  • the first insulating layer F20 can be formed by, for example, laminating a sheet, a film, or a prepreg on the upper surface of the circuit board F10, pressing and bonding them, and then curing, or by curing by heating and pressing. it can.
  • the first insulating layer F20 can also be formed by applying a resin solution to the upper surface of the circuit board F10 and then curing it.
  • a material to be an insulating layer may be put in using a mold and a frame mold, and pressed and cured to form a three-dimensional molded body, or a sheet, film, or prepreg is punched out.
  • the three-dimensional shaped molded body or the like may be formed by laminating the hollowed material on the upper surface of the circuit board F10 and pressurizing and then curing, or curing by heating and pressing.
  • organic substrates conventionally used for manufacturing multilayer circuit boards can be used without any particular limitation.
  • organic substrates include those conventionally used in the production of multilayer circuit boards, such as epoxy resins, acrylic resins, polycarbonate resins, polyimide resins, polyphenylene sulfide resins, polyphenylene ether resins, cyanate resins, benzoxazine resins, bis Examples include a substrate made of maleimide resin or the like.
  • the epoxy resin is not particularly limited as long as it is an epoxy resin constituting various organic substrates that can be used for manufacturing a circuit board.
  • bisphenol A type epoxy resin bisphenol F type epoxy resin, bisphenol S type epoxy resin, aralkyl epoxy resin, phenol novolac type epoxy resin, alkylphenol novolac type epoxy resin, biphenol type epoxy resin, naphthalene type epoxy resin , Dicyclopentadiene type epoxy resins, epoxidized products of condensates of phenols and aromatic aldehydes having a phenolic hydroxyl group, triglycidyl isocyanurate, alicyclic epoxy resins, and the like.
  • epoxy resin nitrogen-containing resin, and silicone-containing resin that are brominated or phosphorus-modified to impart flame retardancy are also included.
  • said epoxy resin and resin said each epoxy resin and resin may be used independently, and may be used in combination of 2 or more type.
  • a curing agent is contained for curing.
  • the curing agent is not particularly limited as long as it can be used as a curing agent. Specific examples include dicyandiamide, phenolic curing agents, acid anhydride curing agents, aminotriazine novolac curing agents, and cyanate resins.
  • phenolic curing agent examples include novolak type, aralkyl type, and terpene type. Further examples include phosphorus-modified phenolic resins or phosphorus-modified cyanate resins for imparting flame retardancy.
  • curing agent may be used independently, and may be used in combination of 2 or more type.
  • a resin or the like having good laser light absorption in the wavelength region of 100 nm to 400 nm because a circuit pattern is formed by laser processing is preferable to use.
  • a polyimide resin or the like can be given.
  • the insulating base material may contain a filler.
  • the filler may be inorganic fine particles or organic fine particles, and is not particularly limited. By containing the filler, the filler is exposed in the laser processed part, and it is possible to improve the adhesion between the plating due to the unevenness of the filler and the resin.
  • the material constituting the inorganic fine particles include aluminum oxide (Al 2 O 3 ), magnesium oxide (MgO), boron nitride (BN), aluminum nitride (AlN), silica (SiO 2 ), High dielectric constant fillers such as barium titanate (BaTiO 3 ) and titanium oxide (TiO 2 ); magnetic fillers such as hard ferrite; magnesium hydroxide (Mg (OH) 2 ), aluminum hydroxide (Al (OH) 2 ), Antimony trioxide (Sb 2 O 3 ), antimony pentoxide (Sb 2 O 5 ), guanidine salts, zinc borate, molybdate compounds, zinc stannate, and other inorganic flame retardants; talc (Mg 3 (Si 4 O 10) (OH) 2), barium sulfate (BaSO 4), calcium carbonate (CaCO 3), mica, and the like.
  • Al 2 O 3 magnesium oxide
  • MgO magnesium oxide
  • BN boro
  • the said inorganic fine particle may be used independently, and may be used in combination of 2 or more type. Since these inorganic fine particles have high thermal conductivity, relative dielectric constant, flame retardancy, particle size distribution, color tone freedom, etc., when selectively exerting a desired function, appropriate blending and particle size design should be performed. And high filling can be easily performed. Although not particularly limited, it is preferable to use a filler having an average particle diameter equal to or less than the thickness of the insulating layer, more preferably 0.01 ⁇ m to 10 ⁇ m, and still more preferably a filler having an average particle diameter of 0.05 ⁇ m to 5 ⁇ m. It is good.
  • the inorganic fine particles may be surface-treated with a silane coupling agent in order to enhance dispersibility in the insulating base material.
  • the insulating base material may contain a silane coupling agent in order to increase the dispersibility of the inorganic fine particles in the insulating base material.
  • the silane coupling agent is not particularly limited. Specific examples include silane coupling agents such as epoxy silane, mercapto silane, amino silane, vinyl silane, styryl silane, methacryloxy silane, acryloxy silane, and titanate.
  • the said silane coupling agent may be used independently, and may be used in combination of 2 or more type.
  • the insulating base material may contain a dispersant in order to improve the dispersibility of the inorganic fine particles in the insulating base material.
  • the dispersant is not particularly limited. Specific examples include dispersants such as alkyl ether, sorbitan ester, alkyl polyether amine, and polymer.
  • the said dispersing agent may be used independently, and may be used in combination of 2 or more type.
  • organic fine particles include rubber fine particles.
  • the first insulating layer F20 is overlaid on the upper surface (circuit formation surface) of the circuit board F10, and is laminated and cured by heat pressing. May be.
  • the types of materials and resins that form the circuit board F10 may differ from the types of materials and resins that form the first insulating layer F20. However, from the viewpoint of satisfactorily adhering and laminating the circuit board F10 and the first insulating layer F20, it is preferable that the types be familiar with each other, and it is more preferable that the types are typically the same.
  • a smear (not shown) that is a resin residue of the first insulating layer F20 remains on the first circuit F11 exposed by laser processing. Since smear causes conduction failure, it is preferably removed by desmear treatment.
  • desmear treatment for example, a known method such as dissolving and removing smear by dipping in a permanganic acid solution is used without limitation. However, the desmear process can be omitted depending on the situation.
  • the interlayer connection hole F21 is filled with a plated metal from the exposed first circuit F11 by electroless plating or electrolytic plating, and the metal column F22 is filled in the interlayer connection hole F21.
  • the first circuit F11 functions as a plating nucleus, and a plating film grows from the first circuit F11.
  • a plating catalyst is deposited on the surface of the first insulating layer F20, the inner wall surface of the hole F21, and the exposed surface of the first circuit F11, and electroless plating is applied to the plating catalyst deposition portion. After the application, electrolytic plating is performed to fill the hole F21 with a plating metal, and thereafter, the plating metal deposited on the outer surface side of the first insulating layer F20 including the surface of the first insulating layer F20 is removed.
  • the shape, size, interval, etc. of the metal pillar F22 are not particularly limited. Specifically, for example, a metal column F22 having a substantially cylindrical shape, a height of about 5 to 200 ⁇ m, and a bottom surface diameter of about 10 to 500 ⁇ m can be preferably realized. A metal column F22 having a prismatic shape, a truncated cone shape, or a truncated pyramid shape may be used.
  • FIG. 14D shows a case where the metal column F22 has grown to the height of the outer surface (upper surface) of the first insulating layer F20 in this metal column forming step.
  • the first circuit F11, the second circuit F26, The interlayer connection hole F21 for connecting the layers to each other can be formed by filling a sufficient amount of a good metal column F22 in which generation of voids is suppressed.
  • a second insulating layer F23 is formed on the outer surface of the first insulating layer F20 and the top of the metal column F22 (second insulating layer forming step).
  • the second insulating layer F23 is the same as that of the first insulating layer F20.
  • examples of the second insulating layer F23 include a sheet, a film, a prepreg, and a three-dimensional molded body formed by applying a resin solution.
  • the thickness of the second insulating layer F23 is not particularly limited.
  • the thickness is preferably 3 to 50 ⁇ m, and more preferably about 5 to 40 ⁇ m.
  • the second insulating layer F23 may contain inorganic fine particles such as silica particles.
  • the second insulating layer F23 may be formed, for example, by laminating a sheet, a film, and a prepreg on the outer surface of the first insulating layer F20, press-bonding them, and then curing the first insulating layer F23.
  • the resin solution may be applied to the outer surface of F20 and then cured.
  • a three-dimensional shaped molded body or the like may be formed by putting a material to be the second insulating layer F23 using a mold, a frame mold, or the like, and applying pressure and curing.
  • organic substrates conventionally used for manufacturing a multilayer circuit board can be used without any particular limitation.
  • organic substrates include those conventionally used in the production of multilayer circuit boards, such as epoxy resins, acrylic resins, polycarbonate resins, polyimide resins, polyphenylene sulfide resins, polyphenylene ether resins, cyanate resins, benzoxazine resins, bis Examples include a substrate made of maleimide resin or the like.
  • the detailed description of the second insulating layer F23 is the same as the detailed description of the first insulating layer F20 described above.
  • the types of materials and resins that constitute the first insulating layer F20 may differ from the types of materials and resins that constitute the second insulating layer F23. However, from the viewpoint of satisfactorily adhering and laminating the first insulating layer F20 and the second insulating layer F23, it is preferable that the types be familiar with each other, and typically the same types are more preferable. .
  • a resin film F24 is formed on the outer surface of the second insulating layer F23 (film formation process).
  • the resin film (resist) F24 is not particularly limited as long as it can be removed in a film removal process described later.
  • the resin film F24 is preferably a resin film that can be easily dissolved or removed from the surface of the second insulating layer F23 by dissolving or swelling with a predetermined liquid.
  • a film made of a soluble resin that can be easily dissolved by an organic solvent or an alkaline solution a film made of a swellable resin that can swell with a predetermined liquid (swelling liquid), and the like can be given.
  • the swellable resin film does not substantially dissolve in a predetermined liquid, and not only a resin film that easily peels off from the surface of the second insulating layer F23 by swelling, but also in a predetermined liquid.
  • a resin film that easily peels from the surface of F23 is also included. By using such a resin film, the resin film can be easily and satisfactorily removed from the surface of the insulating layer.
  • the plating catalyst deposited on the resin film will be scattered, and the scattered plating catalyst will be re-deposited on the insulating layer, and an unnecessary plating film will be formed on that part. There is a problem. Such a problem can be prevented because the resin film can be easily and satisfactorily removed from the surface of the insulating layer.
  • the formation method of the resin film F24 is not particularly limited. Specifically, for example, after applying a liquid material capable of forming the resin film F24 on the outer surface (upper surface) of the second insulating layer F23, a method of drying, or after applying the liquid material to the support substrate, Examples thereof include a method of transferring a resin film formed by drying onto the surface of the second insulating layer F23. Moreover, as another method, the method etc. which bond the resin film which consists of the resin film F24 formed beforehand on the outer surface (upper surface) of the 2nd insulating layer F23 are mentioned.
  • the method for applying the liquid material is not particularly limited. Specifically, for example, conventionally known spin coating method, bar coater method and the like can be mentioned.
  • any resin that can be easily dissolved or removed from the surface of the second insulating layer F23 by dissolving or swelling with a predetermined liquid can be used without particular limitation.
  • a resin having a degree of swelling with respect to a predetermined liquid is 50% or more, more preferably 100% or more, and still more preferably 500% or more.
  • the degree of swelling is too low, the resin film tends to be difficult to peel.
  • Such a resin film is formed by applying an elastomer suspension or emulsion to the surface of the second insulating layer F23 and then drying, or by applying an elastomer suspension or emulsion to the support substrate and then drying.
  • the film can be easily formed by a method of transferring the film to the surface of the second insulating layer F23.
  • the elastomer examples include diene elastomers such as a styrene-butadiene copolymer, acrylic elastomers such as an acrylate ester copolymer, and polyester elastomers. According to such an elastomer, a resin film having a desired swelling degree can be easily formed by adjusting the degree of crosslinking or gelation of the elastomer resin particles dispersed as a suspension or emulsion.
  • such a resin film is particularly preferably a film whose degree of swelling changes depending on the pH of the swelling liquid.
  • the liquid condition in the catalyst deposition process described later is different from the liquid condition in the film removal process described later, so that the resin is used at the pH in the catalyst deposition process.
  • the film F24 maintains high adhesion to the second insulating layer F23, and the resin film F24 can be easily peeled and removed at the pH in the film removal step.
  • a catalyst deposition step described later includes a step of treating in an acidic catalyst metal colloid solution having a pH range of 1 to 3, for example, and a film removal step described later is alkaline in a pH range of 12 to 14.
  • the resin film has a swelling degree of 60% or less, further 40% or less with respect to the acidic catalyst metal colloid solution, and a swelling degree with respect to the alkaline solution of 50% or less. % Or more, preferably 100% or more, and more preferably 500% or more.
  • Examples of such a resin film are used for a sheet formed from an elastomer having a predetermined amount of carboxyl groups, a dry film resist for patterning a printed wiring board (hereinafter sometimes referred to as “DFR”), and the like.
  • Examples thereof include a sheet obtained by completely curing a photocurable alkali-developing resist, a thermosetting or alkali-developing sheet, and the like.
  • the elastomer having a carboxyl group examples include diene elastomers such as a styrene-butadiene copolymer having a carboxyl group in the molecule by containing a monomer unit having a carboxyl group as a copolymerization component, and acrylic.
  • examples include acrylic elastomers such as acid ester copolymers, and polyester elastomers. According to such an elastomer, a resin film having a desired degree of alkali swelling can be formed by adjusting the acid equivalent, the degree of crosslinking or the degree of gelation of the elastomer dispersed as a suspension or emulsion.
  • the swelling degree with respect to the predetermined liquid used in a film removal process can be increased, and a resin film that dissolves in the liquid can be easily formed.
  • the carboxyl group in the elastomer swells the resin film with respect to the alkaline aqueous solution and acts to peel the resin film from the surface of the second insulating layer F23.
  • the acid equivalent is the polymer molecular weight per carboxyl group.
  • the monomer unit having a carboxyl group examples include (meth) acrylic acid, fumaric acid, cinnamic acid, crotonic acid, itaconic acid, maleic anhydride, and the like.
  • the content ratio of the carboxyl group in the elastomer having such a carboxyl group is preferably 100 to 2000, more preferably 100 to 800 in terms of acid equivalent.
  • the acid equivalent is too small (when the number of carboxyl groups is relatively large), the compatibility with a pretreatment solution for electroless plating is reduced due to a decrease in compatibility with a solvent or other composition. Tend.
  • the acid equivalent is too large (when the number of carboxyl groups is relatively small), the peelability with respect to the alkaline aqueous solution tends to decrease.
  • the molecular weight of the elastomer is preferably 10,000 to 1,000,000, more preferably 20,000 to 500,000, and more preferably 20,000 to 60,000.
  • the molecular weight of the elastomer is too large, the peelability tends to decrease.
  • the molecular weight is too small, the viscosity decreases and it becomes difficult to maintain a uniform thickness of the resin film. There is also a tendency that the resistance to the treatment liquid also decreases.
  • DFR for example, an acrylic resin, an epoxy resin, a styrene resin, a phenol resin, a urethane resin, or the like containing a predetermined amount of a carboxyl group is used as a resin component, and a photopolymerization initiator is included.
  • a sheet of curable resin composition may be used.
  • Specific examples of such DFR include a dry film of a photopolymerizable resin composition as disclosed in JP-A-2000-231190, JP-A-2001-201851, and JP-A-11-212262. Sheets obtained by curing, and commercially available as an alkali development type DFR, for example, UFG series manufactured by Asahi Kasei Kogyo Co., Ltd. may be mentioned.
  • a resin containing a carboxyl group and containing rosin as a main component for example, “NAZDAR229” manufactured by Yoshikawa Chemical Co., Ltd.
  • a resin containing phenol as a main component for example, LEKTRACHEM
  • the resin film F24 may be formed by applying a resin suspension or emulsion on the surface of the second insulating layer F23 using a conventionally known application method such as a spin coat method or a bar coater method, and drying. After the DFR formed in (1) is bonded to the surface of the second insulating layer F23 using a vacuum laminator or the like, it can be easily formed by curing the entire surface.
  • the thickness of the resin film F24 is preferably 10 ⁇ m or less, and more preferably 5 ⁇ m or less. Moreover, 0.1 micrometer or more is preferable and 1 micrometer or more is further more preferable. When the thickness is too thick, the accuracy tends to decrease when the fine circuit pattern F25 is formed by laser processing, machining, or the like. Moreover, when the thickness is too thin, it tends to be difficult to form the resin film F24 having a uniform film thickness.
  • the resin film F24 for example, a resin film mainly composed of a resin made of an acrylic resin having a carboxyl group with an acid equivalent of about 100 to 800 (carboxyl group-containing acrylic resin) can be preferably used. .
  • the following is also suitable as the resin film F23. That is, as a characteristic required for the resist material constituting the resin film, for example, (1) an insulating base material (circuit board, insulating layer, etc.) on which the resin film is formed is immersed in a catalyst deposition process described later. High resistance to liquid (plating nucleation chemical), (2) Easily remove resin film (resist) by the film removal process described later, for example, the process of immersing the insulating substrate on which the resin film is formed in alkali (3) High film formability, (4) Easy dry film (DFR) formation, (5) High storage stability, and the like.
  • a characteristic required for the resist material constituting the resin film for example, (1) an insulating base material (circuit board, insulating layer, etc.) on which the resin film is formed is immersed in a catalyst deposition process described later. High resistance to liquid (plating nucleation chemical), (2) Easily remove resin film (resist) by the film removal process described later, for example, the process of immersing
  • the plating nucleation chemical solution is an acidic (eg, pH 1 to 3) aqueous solution.
  • the catalyst imparting activator is a weak alkali (pH 8 to 12), and the others are acidic. From the above, it is necessary to withstand pH 1 to 11, preferably pH 1 to 12, as the resistance to the plating nucleating solution. In addition, being able to withstand is that when a sample on which a resist is formed is immersed in a chemical solution, swelling and dissolution of the resist are sufficiently suppressed, and the resist plays a role as a resist.
  • the immersion temperature is from room temperature to 60 ° C.
  • the immersion time is from 1 to 10 minutes
  • the resist film thickness is from about 1 to 10 ⁇ m, but is not limited thereto.
  • the alkali stripping chemical used in the film removal step is generally an aqueous NaOH solution or an aqueous sodium carbonate solution. Its pH is 11 to 14, and it is desirable that the resist film can be easily removed preferably at pH 12 to 14.
  • the concentration of the aqueous NaOH solution is about 1 to 10%
  • the processing temperature is room temperature to 50 ° C.
  • the processing time is 1 to 10 minutes
  • the immersion or spray treatment is generally performed, but is not limited thereto. Since a resist is formed on an insulating material, film formability is also important.
  • a uniform film formation without repelling or the like is necessary.
  • a dry film resist is pasted on the insulating material with a laminator (roll, vacuum).
  • the pasting temperature is room temperature to 160 ° C., and the pressure and time are arbitrary.
  • adhesiveness is required at the time of pasting.
  • the resist formed into a dry film is generally used as a three-layer structure sandwiched by a carrier film and a cover film to prevent dust from adhering, but is not limited thereto.
  • the best preservation is that it can be stored at room temperature, but it must also be refrigerated or frozen. As described above, it is necessary to prevent the composition of the dry film from being separated at low temperatures or to be cracked due to a decrease in flexibility.
  • the resin film F24 (a) at least one monomer of carboxylic acid or acid anhydride having at least one polymerizable unsaturated group in the molecule, and (b) ( It may be a polymer resin obtained by polymerizing a) at least one monomer that can be polymerized with a monomer, or a resin composition containing this polymer resin.
  • Known techniques include JP-A-7-281437, JP-A-2000-231190, JP-A-2001-201851, and the like.
  • (A) As an example of the monomer, (meth) acrylic acid, fumaric acid, cinnamic acid, crotonic acid, itaconic acid, maleic anhydride, maleic acid half ester, butyl acrylate, etc. may be mentioned alone or Two or more types may be combined.
  • Examples of the monomer (b) are generally non-acidic and have (1) a polymerizable unsaturated group in the molecule, but are not limited thereto. It is selected so as to maintain various properties such as resistance in the plating process and flexibility of the cured film.
  • esters of vinyl alcohol such as vinyl acetate, (meth) acrylonitrile, styrene or polymerizable styrene derivatives.
  • a monomer having a plurality of unsaturated groups can be selected as the monomer used for the polymer so that three-dimensional crosslinking can be performed.
  • reactive functional groups such as epoxy groups, hydroxyl groups, amino groups, amide groups, and vinyl groups can be introduced into the molecular skeleton.
  • the amount of the carboxyl group contained in the resin is preferably 100 to 2000, preferably 100 to 800, and more preferably 100 to 600 in terms of acid equivalent. If the acid equivalent is too low, the compatibility with the solvent or other composition is lowered and the resistance to the plating pretreatment solution is lowered. If the acid equivalent is too high, the peelability is lowered.
  • the composition ratio of the monomer (a) is preferably 5 to 70% by mass.
  • the resin composition may contain the polymer resin as an essential component as a main resin (binder resin), and may contain at least one of oligomers, monomers, fillers, and other additives.
  • the main resin is preferably a linear polymer having thermoplastic properties. In order to control fluidity and crystallinity, it may be branched by grafting.
  • the molecular weight is about 1,000 to 500,000 in terms of weight average molecular weight, and preferably 5,000 to 50,000. When the weight average molecular weight is small, the flexibility of the film and the resistance to the plating nucleation solution (acid resistance) are lowered. On the other hand, when the molecular weight is large, the alkali peelability and the sticking property when a dry film is formed deteriorate.
  • a crosslinking point may be introduced to improve resistance to plating nucleus chemicals, suppress thermal deformation during laser processing, and control flow.
  • Any monomer or oligomer may be used as long as it is resistant to plating nucleation chemicals and can be easily removed with alkali. Further, in order to improve the sticking property of the dry film (DFR), it can be considered that it is used as a tackifier as a plasticizer. Further, it is conceivable to add a crosslinking agent in order to increase various resistances.
  • esters of vinyl alcohol such as vinyl acetate, (meth) acrylonitrile, styrene or polymerizable styrene derivatives.
  • Examples of monomers include 1,6-hexanediol di (meth) acrylate, 1,4-cyclohexanediol di (meth) acrylate, polypropylene glycol di (meth) acrylate, polyethylene glycol di (meth) acrylate, polyoxyethylene Polyoxyalkylene glycol di (meth) acrylate such as polyoxypropylene glycol di (meth) acrylate, 2-di (p-hydroxyphenyl) propane di (meth) acrylate, glycerol tri (meth) acrylate, dipentaerythritol penta (meth) Acrylate, trimethylolpropane triglycidyl ether tri (meth) acrylate, bisphenol A diglycidyl ether tri (meth) acrylate, 2,2-bis (4-methacryloxy) Pointer ethoxyphenyl) propane, there is a polyfunctional (meth) acrylate containing urethane groups. Any
  • the filler is not particularly limited, but silica, aluminum hydroxide, magnesium hydroxide, calcium carbonate, clay, kaolin, titanium oxide, barium sulfate, alumina, zinc oxide, talc, mica, glass, potassium titanate, wollastonite, sulfuric acid Magnesium, aluminum borate, an organic filler, etc. are mentioned. Further, since the preferable thickness of the resist is as thin as 0.1 to 10 ⁇ m, it is preferable that the resist has a small filler size. Although it is preferable to use a material having a small average particle size and cut coarse particles, the coarse particles can be crushed during dispersion or removed by filtration.
  • additives include photopolymerizable resins (photopolymerization initiators), polymerization inhibitors, colorants (dyes, pigments, coloring pigments), thermal polymerization initiators, and crosslinking agents such as epoxy and urethane.
  • the resin film F23 is subjected to laser processing or the like, and therefore it is necessary to impart a laser ablation property to the resist material.
  • the laser processing machine for example, a carbon dioxide laser, an excimer laser, a UV-YAG laser, or the like is selected. These laser processing machines have various intrinsic wavelengths, and productivity can be improved by using a material having a high UV absorption rate for these wavelengths.
  • the UV-YAG laser is suitable for microfabrication, and the laser wavelength is 3rd harmonic 355 nm and 4th harmonic 266 nm. Therefore, as a resist material (material for the resin film F24), Therefore, it is desirable that the UV absorption rate is relatively high.
  • the processing of the resist F24 is finished finer, and the productivity can be improved.
  • the present invention is not limited to this, and it may be better to select a resist material having a relatively low UV absorption rate.
  • the UV absorption rate decreases, the UV light passes through the resist F24, so that the UV energy can be concentrated on the processing of the second insulating layer F23 and the first insulating layer F20 therebelow, and the insulating layers F20, 23 are processed. Particularly favorable results can be obtained when the material is difficult to form.
  • a total value (hereinafter referred to as “total thickness”) of at least the thickness of the resin film F24 and the thickness of the second insulating layer F23 from the upper surface (outer surface) of the resin film F24.
  • a circuit pattern F25 is formed by forming grooves and / or holes having the above predetermined depth and predetermined shape (circuit pattern forming step).
  • the circuit pattern F25 is formed by laser processing, cutting processing, embossing processing, or the like.
  • the groove of the circuit pattern F25 is mainly a groove for the wiring F27a (see FIG.
  • the hole of the circuit pattern F25 is, for example, a hole for the electrode pad portion F27b (see FIG. 13).
  • the circuit pattern F25 may include an interlayer connection hole (an interlayer connection hole different from the hole F21 in which the metal column F22 has already been formed in the metal column forming step).
  • the circuit pattern F25 is formed by the total thickness, as shown in FIG. 14F, the first insulating layer F20 is not dug and the circuit pattern F25 is formed on the outer surface (upper surface) of the first insulating layer F20. Will be put on.
  • the circuit pattern F25 is formed exceeding the total thickness, the first insulating layer F20 is dug as shown in FIG. 15F of the 3-2 embodiment and FIG. 16F of the 3-3 embodiment. As a result, the circuit pattern F25 is embedded in the outer surface (upper surface) of the first insulating layer F20.
  • the width of the groove for the wiring F27a in the circuit pattern F25 is not particularly limited. When laser processing is used, a fine groove having a line width of 20 ⁇ m or less can be easily formed.
  • the method for forming the circuit pattern F25 is not particularly limited. Specifically, cutting by laser processing, dicing processing, etc., embossing, etc. are used. In order to form a highly accurate fine circuit pattern F25, laser processing is preferable. According to laser processing, the digging depth and the like of the first insulating layer F20 can be easily adjusted by controlling the output (energy or power) of the laser.
  • embossing for example, embossing with a fine resin mold used in the field of nanoimprinting can be preferably used.
  • the predetermined circuit pattern F25 a portion where the electroless plating film is provided later and the second electric circuit F27 is formed is defined.
  • FIG. 15F showing the third to second embodiment shows that the top of the metal column F22 formed in the previous metal column forming step is exposed and protrudes from the bottom surface of the circuit pattern F25 in this circuit pattern forming step. As shown, the circuit pattern F25 is formed.
  • the resin or the like constituting the first insulating layer F20 can be easily removed, but the plating metal constituting the metal pillar F22 is Caused by being difficult to remove.
  • a plating catalyst F26 is deposited on the surface of the resin film F24 and the surface of the circuit pattern F25 (catalyst deposition step). That is, the plating catalyst F26 is deposited on the entire surface of the resin film F24 and the insulating layer F30 on which the circuit pattern F25 is formed and on the entire surface of the resin film F24 and the insulating layer F30 on which the circuit pattern F25 is not formed. From the viewpoint of electroless plating described later, it is not necessary to apply the plating catalyst F26 to the surface of the metal column F22. However, the plating catalyst F26 is applied to the entire resin film F24 and the insulating layer F30. The work is facilitated.
  • the plating catalyst F26 is a concept including its precursor.
  • the plating catalyst F26 is a catalyst that is applied in advance in order to form the plating film only on the portion where the electroless plating film is desired to be formed in the plating process described later.
  • the plating catalyst F26 can be used without particular limitation as long as it is known as a catalyst for electroless plating.
  • the precursor of the plating catalyst F26 may be deposited in advance, and the plating catalyst F26 may be generated after the resin film F24 is removed.
  • Specific examples of the plating catalyst F26 include, for example, metal palladium (Pd), platinum (Pt), silver (Ag), and the like, and precursors that generate these.
  • Examples of the method of depositing the plating catalyst F26 include a method of treating with an acidic Pd—Sn colloid solution treated under acidic conditions of pH 1 to 3 and then treating with an acid solution. More specifically, the following methods can be mentioned.
  • the oil and the like adhering to the surfaces of the resin film F24 on which the circuit pattern F25 is formed and the insulating layer F30 are washed in a surfactant solution (cleaner / conditioner) for a predetermined time.
  • a surfactant solution cleaning / conditioner
  • a soft etching treatment is performed with a sodium persulfate-sulfuric acid based soft etching agent.
  • an acidic solution such as a sulfuric acid aqueous solution or a hydrochloric acid aqueous solution having a pH of 1 to 2.
  • a pre-dip treatment is performed in which chloride ions are adsorbed on the surfaces of the resin film F24 and the insulating layer F30 by immersing in a pre-dip solution mainly composed of a stannous chloride aqueous solution having a concentration of about 0.1%.
  • Pd and Sn are aggregated and adsorbed by further immersing in an acidic catalytic metal colloid solution such as acidic Pd—Sn colloid having a pH of 1 to 3 containing stannous chloride and palladium chloride.
  • an oxidation-reduction reaction (SnCl 2 + PdCl 2 ⁇ SnCl 4 + Pd ⁇ ) is caused between the adsorbed stannous chloride and palladium chloride.
  • the metal palladium which is the plating catalyst F26 is deposited.
  • the acidic catalyst metal colloid solution a known acidic Pd—Sn colloid catalyst solution or the like can be used, and a commercially available plating process using an acidic catalyst metal colloid solution may be used. Such a process is systematized and sold by, for example, Rohm & Haas Electronic Materials.
  • the plating catalyst F26 can be deposited on the surface of the resin film F24 and the surface of the circuit pattern F25.
  • the resin film F24 is removed from the insulating layer F30 (more specifically, the second insulating layer F23) (film removal step). That is, when the resin film F24 is made of a soluble resin, the resin film F24 is dissolved using an organic solvent or an alkaline solution and removed from the surface of the insulating layer F30. When the resin film F24 is made of a swellable resin, the resin film F24 is swollen using a predetermined liquid, and is peeled off from the surface of the insulating layer F30 and removed.
  • the plating catalyst F26 can remain only on the surface of the insulating layer F30 where the circuit pattern F25 is formed.
  • the plating catalyst F26 deposited on the surface of the resin film F24 is removed from the insulating layer F30 together with the resin film F24.
  • the resin film F24 collapses apart when removed from the insulating layer F30. It is preferable that the whole can be removed without being continuous.
  • the resin film F24 As the liquid for dissolving or swelling the resin film F24, the resin film F24 is easily dissolved or removed from the insulating layer F30 without substantially decomposing or dissolving the circuit board F10, the insulating layer F30, and the plating catalyst F26. Any liquid that can be dissolved or swollen to the extent possible can be used without particular limitation. Such a resin film removing liquid can be appropriately selected depending on the type and thickness of the resin film F24. Specifically, for example, when a photocurable epoxy resin is used as the resist resin, an organic solvent, a resist remover in an alkaline aqueous solution, or the like is used.
  • the resin film F24 is formed from an elastomer such as a diene elastomer, an acrylic elastomer, and a polyester elastomer, or as the resin film F24, (a) a polymerizable unsaturated group is included in the molecule. It is obtained by polymerizing at least one monomer of carboxylic acid or acid anhydride having at least one and at least one monomer that can be polymerized with (b) (a) monomer.
  • an elastomer such as a diene elastomer, an acrylic elastomer, and a polyester elastomer
  • a polymerizable unsaturated group is included in the molecule. It is obtained by polymerizing at least one monomer of carboxylic acid or acid anhydride having at least one and at least one monomer that can be polymerized with (b) (a) monomer.
  • aqueous alkali solution such as an aqueous sodium solution can be preferably used.
  • the resin film F24 has a swelling degree of 60% or less, preferably 40% or less under acidic conditions. It is formed of an elastomer such as a diene elastomer, an acrylic elastomer, and a polyester elastomer that has a degree of swelling of 50% or more under alkaline conditions, or (a) polymerizable in the molecule.
  • an elastomer such as a diene elastomer, an acrylic elastomer, and a polyester elastomer that has a degree of swelling of 50% or more under alkaline conditions, or (a) polymerizable in the molecule.
  • a resin film can be easily dissolved or swollen by immersing it in an alkaline aqueous solution having a pH of 11 to 14, preferably a pH of 12 to 14, such as an aqueous sodium hydroxide solution having a concentration of about 1 to 10%. Then, it is removed by dissolution or peeling.
  • Examples of the method of removing the resin film F24 include a method of immersing the insulating layer F30 coated with the resin film F24 in a resin film removal liquid for a predetermined time. Moreover, in order to improve peeling removal property or melt
  • Electroless plating is performed on the insulating layer F30 to form an electroless plating film on the portion of the circuit pattern F25 where the plating catalyst F26 remains and on the exposed portion of the metal pillar F22.
  • a second electric circuit F27 is formed on the insulating layer F30 (that is, the first insulating layer F20 and the second insulating layer F23).
  • the second circuit F27 of the insulating layer F30 and the first circuit F11 of the circuit board F10 are interlayer-connected through the metal pillar F22 (plating process).
  • an insulating layer F30 partially coated with a plating catalyst F26 is immersed in an electroless plating solution, and an electroless plating film is deposited only on the portion where the plating catalyst F26 is deposited.
  • Such a method can be used.
  • Examples of the metal used for electroless plating include copper (Cu), nickel (Ni), cobalt (Co), aluminum (Al), and the like. Of these, plating mainly composed of Cu is preferable because of its excellent conductivity. Moreover, when Ni is included, it is preferable from the point which is excellent in corrosion resistance and adhesiveness with a solder.
  • the film thickness of the electroless plating film is not particularly limited. Specifically, for example, it is preferably about 0.1 to 10 ⁇ m, more preferably about 1 to 5 ⁇ m.
  • an electroless plating film is deposited only on the portion of the surface of the insulating layer F30 where the plating catalyst F26 remains. Therefore, the conductor layer can be formed with high precision only in the portion where the second circuit F27 is to be formed.
  • the deposition of the electroless plating film on the portion where the circuit pattern F25 is not formed can be suppressed. Therefore, even when a plurality of fine wirings F27a having a narrow line width at a narrow pitch interval are formed, an unnecessary plating film does not remain between the adjacent wirings F27a. Therefore, the occurrence of a short circuit and the occurrence of migration can be suppressed.
  • an electroless plating film can be deposited only on the laser-processed portion of the surface of the insulating layer F30.
  • a second circuit F27 is newly formed on the surface of the insulating layer F30, and the second circuit F27 of the insulating layer F30 and the first circuit F11 of the circuit board F10 are connected to the interlayer connection hole F21 or the metal pillar. Interlayer connection is made via F22.
  • the multilayer circuit board F1 having the second circuit F27 on the surface of the insulating layer F30 as shown in FIG. 13 is manufactured.
  • the electrical circuits F11, 27 and the interlayer connection holes F21 are connected to each other in each layer, and the electrical circuits F11, 27 in each layer are connected to each other via the interlayer connection holes F21. Interlayer connection.
  • the film thickness and depth of the second circuit F27 can be freely adjusted by adjusting the depth of the circuit pattern F25 with respect to the insulating layer F30.
  • the second circuit F27 can be formed in a deep portion of the insulating layer F30, or the plurality of second circuits F27 can be formed at positions having different depths. Further, by forming the second circuit F27 in a deep portion of the insulating layer F30, a thick circuit F27 can be formed.
  • a thick film circuit has a high cross-sectional area, and thus has high strength and electric capacity.
  • the interlayer connection hole F21 is filled with the plating metal in advance by the first insulating layer forming step, the hole forming step, and the metal column forming step before forming the circuit pattern F25. Without worrying about excessive conductor formation in the second circuit F27, the metal filling of the interlayer connection hole F21 can be sufficiently performed over time. In addition, when the metal is filled in the interlayer connection hole F21, the circuit pattern F25 is not yet formed. Therefore, the plating film does not grow from the circuit pattern side, and good metal filling with suppressed generation of voids is achieved. Realize.
  • the second insulating layer forming process, the film forming process, the circuit pattern forming process, the catalyst deposition process, the film removing process, and the plating process are performed by the additive method. Since the conductor formation of the circuit F27 is performed, a fine conductor can be accurately formed in a short time, and excessive formation of the conductor in the second circuit F27 is avoided. As described above, even when the fine circuit pattern F25 and the interlayer connection hole F21 are mixed, the multilayer circuit board F1 can be manufactured without any problem by the build-up method while applying the additive method satisfactorily.
  • the second insulating layer F23 is formed on the outer surface of the first insulating layer F20, the resin film F24 is formed on the outer surface of the second insulating layer F23, and at least the thickness of the resin film F24 is determined. Since the resin film F24 is removed after the circuit pattern F25 having a depth equal to or greater than the total value of the thickness of the second insulating layer F23 is formed, the portion of the circuit pattern F25 is always removed by processing the second insulating layer F23. Will be.
  • the bottom surface of the circuit pattern F25 is located at a position dug down from the outer surface of the second insulating layer F23, and the conductor layer constituting the second circuit F27 is partially or entirely embedded in the outer surface of the second insulating layer F23. It will be in a state to be. As a result, the thickness of the conductor layer can be increased, and the mechanical strength of the second circuit F27 can be ensured. Further, the amount of protrusion of the conductor layer from the second insulating layer F23 can be eliminated or reduced, the second circuit F27 is protected, the second circuit F27 is prevented from falling off the insulating layer F30, and the circuit is formed. It is possible to eliminate or reduce the unevenness generated on the surface.
  • the interlayer connection hole F21 can be filled with plating metal by growing a plating film from the exposed first electric circuit F11 by electroless plating in the metal column forming step. it can. Since the electric circuit F11 that is a conductor is used as a plating nucleus of electroless plating, the metal pillar F22 can be reasonably formed.
  • the plating catalyst F25 is formed on the surface of the first insulating layer F20, the inner wall surface of the interlayer connection hole F21, and the exposed surface of the first electric circuit F11 in the metal column forming step.
  • the electroplating is performed to fill the interlayer connection hole F21 with the plating metal, and then, the first insulating layer F20 including the surface of the first insulating layer F20.
  • the plating metal deposited on the outer surface side of the one insulating layer F20 may be removed. Since the electroless plating layer formed on the outer surface side of the first insulating layer F20 including the surface of the first insulating layer F20 is used as a power feeding layer necessary for electrolytic plating, the metal pillar F22 can be rationally formed.
  • the resin film F24 is a resin film that can be dissolved or removed from the second insulating layer F23 (or the insulating layer F30) by dissolving or swelling with a predetermined liquid. preferable.
  • the resin film F24 can be easily and satisfactorily removed or removed from the surface of the second insulating layer F23. If the resin film F24 is collapsed when the resin film F24 is removed, the plating catalyst F26 deposited on the resin film F24 is scattered, and the scattered plating catalyst F26 is re-deposited on the insulating layer F30 and is unnecessary in that portion. There is a problem that a thick plating film is formed. Since the resin film F24 can be easily and satisfactorily removed from the surface of the insulating layer F30, such a problem can be prevented.
  • the multilayer circuit board F1 manufactured by the manufacturing method of the present embodiment even when the fine circuit pattern F25 and the interlayer connection hole F21 are mixed, the metal filling of the interlayer connection hole F21 is sufficiently and satisfactorily performed. Thus, the connection between the circuits F11, 27 and the interlayer connection hole F21 is good, and excessive conductor formation in the circuit F27 portion is avoided, so that a multilayer circuit board F1 in which a short circuit or the like hardly occurs is obtained. Therefore, the multilayer circuit board F1 can be manufactured without any problem by the build-up method while applying the additive method satisfactorily. As a result, the multilayer circuit board F1 on which the electric circuit F27 with high shape accuracy is formed is provided.
  • the multilayer circuit board F1 used for applications such as an IC substrate, a printed wiring board for mobile phones, a three-dimensional circuit board, etc., in which the width of the wiring F27a and the distance between the wirings F27a are narrow. Can be manufactured.
  • the fluorescent substance by irradiating an ultraviolet-ray or near-ultraviolet light to a test object surface after the film removal process mentioned above by making the resin film F24 contain a fluorescent substance.
  • the film removal failure can be inspected using the luminescence from.
  • the metal wiring F27a in which the line width of the wiring F27a and the interval between the wirings F27a are extremely small can be formed. In such a case, for example, there is a concern that the resin film F24 between the adjacent metal wirings F27a may remain without being completely removed.
  • the resin film F24 When the resin film F24 remains between the metal wirings F27a, a plating film is formed in that portion, which may cause migration or a short circuit.
  • the resin film F24 is made to contain a fluorescent substance, and after the film removal step, the film removal surface is irradiated with a predetermined light emission source so that only the portion where the film F24 remains is caused to emit light. By this, the presence or absence of a film removal defect and the location of a film removal defect can be inspected.
  • the fluorescent substance that can be contained in the resin film F24 used in the inspection process is not particularly limited as long as it exhibits light emission characteristics when irradiated with light from a predetermined light source. Specific examples thereof include Fluoresceine, Eosine, Pyroline G, and the like.
  • the part where the light emission from the fluorescent material is detected by this inspection process is the part where the resin film F24 remains. Therefore, by removing the portion where light emission is detected, it is possible to suppress the formation of a plating film on that portion. Thereby, generation
  • the circuit exceeds the total value of the thickness of the resin film F24 and the thickness of the second insulating layer F23 from the outer surface of the resin film F24.
  • a pattern F25 is formed.
  • the first insulating layer F20 is dug, and the bottom surface of the circuit pattern F25 is the first insulating layer F20. Located inward from the outer surface.
  • the circuit pattern F25 is formed. This is because when the first insulating layer F20 is dug by laser processing, the resin or the like constituting the first insulating layer F20 is easily removed, but the plating metal constituting the metal pillar F22 is difficult to remove. To happen.
  • the circuit pattern F25 is formed so that the top of the metal pillar F22 protrudes from the bottom surface of the circuit pattern F25, and the top of the metal pillar F22 is covered.
  • the portion of the second electric circuit F27 (see FIG. 15I) is preferably used as an electrode pad portion F27b (see FIG. 13).
  • the top portion of the metal pillar F22 bites into the conductor layer of the pad portion F27b, and the drop off of the pad portion F27b from the insulating layer F30 is effectively suppressed by the anchor effect, and the pad portion F27b that can sufficiently withstand the weight of the mounted component is obtained. Because.
  • the metal pillar F22 does not grow to the height of the outer surface of the first insulating layer F20 in the metal pillar forming step.
  • the metal pillar F22 is configured by growing a plating film up to a position (see FIG. 16F) which becomes the bottom surface of the circuit pattern F25. That is, the metal column F22 is not grown up to the outer surface of the first insulating layer F20, but is stopped at a height before that. Thereby, it can be easily achieved that the top of the metal pillar F22 does not protrude from the bottom surface of the circuit pattern F25 at the stage of the metal pillar forming process prior to the circuit pattern forming process. Then, as shown in FIG.
  • the circuit pattern F25 is formed so that the top of the metal pillar F22 does not protrude from the bottom surface of the circuit pattern F25.
  • the conductor layer formed on the top of the metal pillar F22 can be prevented from protruding from the outer surface of the second insulating layer F23, and the circuit F27 of the insulating layer F30 can be avoided. It is possible to eliminate or reduce the unevenness generated on the formation surface. Therefore, even if the number of stacked layers increases, the unevenness generated on the circuit formation surface does not increase, and a fine circuit can be formed.
  • the position becomes the bottom surface of the circuit pattern F25.
  • the circuit pattern F25 is formed so that the top of the metal pillar F22 does not protrude from the bottom surface of the circuit pattern F25. It is also possible to form. Accordingly, it is possible to reliably achieve the correction of the position of the top of the metal column F22 so that the top of the metal column F22 does not protrude from the bottom surface of the circuit pattern F25.
  • the present invention belongs to the technical field of multilayer circuit boards, and relates to a method of manufacturing a multilayer circuit board using an additive method and a multilayer circuit board manufactured by the manufacturing method.
  • a subtractive method and an additive method are known as a method of forming a circuit on a circuit board.
  • the subtractive method is a method of forming a circuit by removing (subtractive) a metal foil other than a portion where a circuit is desired to be formed on the surface of the metal foil-clad laminate.
  • the additive method is a method of forming a circuit by performing electroless plating only on a portion on the insulating base material where the circuit is to be formed.
  • the subtractive method is a method in which a metal foil is left only in a circuit formation portion by etching a thick metal foil. According to this method, a portion of the metal to be removed is wasted. On the other hand, the additive method does not waste metal because the electroless plating film can be formed only on the portion where the metal wiring is to be formed. Also in this respect, the additive method is a preferable circuit forming method.
  • the full additive method which is one of the conventional representative additive methods, is performed as follows, for example. First, a plating catalyst is deposited on the surface of the insulating substrate. Next, a photoresist layer is formed on the plating catalyst. Next, the surface of the photoresist layer is exposed through a photomask on which a predetermined circuit pattern is formed. Next, the circuit pattern is developed. Then, by applying electroless plating to the surface of the circuit pattern formed by development, metal wiring is formed on the circuit pattern portion. An electric circuit is formed on the insulating base material by such a process.
  • the plating catalyst is deposited on the entire surface of the insulating base material.
  • the plating film can be formed only on the portion not protected by the photoresist.
  • a plating film may be unnecessarily formed in a portion where a circuit is not originally desired to be formed. This occurs because the plating catalyst is deposited on the entire surface of the insulating substrate. Unnecessarily formed plating films cause short circuits and migration between adjacent circuits. Such a short circuit or migration is more likely to occur when a circuit having a narrow line width and line interval is formed.
  • a protective film of resin is coated on the insulating substrate.
  • grooves and through holes corresponding to the circuit pattern are drawn and formed on the insulating substrate coated with the protective film by machining or laser beam irradiation.
  • an activation layer is formed on the entire surface of the insulating substrate.
  • the activation layer is left only on the inner wall surface of the groove and the through hole by peeling off the resin protective film.
  • a conductive layer is selectively formed only on the inner surfaces of the activated grooves and through holes.
  • the applicant of the present invention relates to an invention in which a plating catalyst for electroless plating is left with high accuracy only on a portion where electroless plating is desired, such as a circuit pattern portion or an inner wall surface of a through hole.
  • Patent applications have already been filed (Japanese Patent Application No. 2008-118818 and Japanese Patent Application No. 2009-104086 based on this). A circuit forming method according to this patent application will be described with reference to FIG.
  • a resin film b is coated on the surface of the insulating base material a.
  • a groove c or a through hole d having a desired circuit pattern is formed on the insulating base material a coated with the resin film b.
  • the bottom surface of the groove c coincides with the surface of the insulating base material a, but the groove c may be dug deeper than the surface of the insulating base material a.
  • a plating catalyst e is deposited on the surface of the groove c and the through hole d and the surface of the resin film b.
  • the plating catalyst is a concept including its precursor.
  • the plating film e is left only on the surfaces of the groove c and the through hole d by peeling off the resin film b.
  • the electroless plating film f is formed only on the portion where the plating catalyst e is left, so that the conductive layer is accurately formed only on the inner wall surface of the groove c and the through hole d.
  • a substrate x is obtained.
  • a circuit board g on which a first electric circuit h is formed is prepared.
  • the circuit h is mounted on the upper surface of the circuit board g, but may be embedded in the upper surface of the circuit board g.
  • the method for forming the first circuit h is not limited here.
  • an insulating layer i is formed on the upper surface of the circuit board g on which the first circuit h is formed.
  • a resin film j is formed on the upper surface (outer surface) of the insulating layer i.
  • a laser processing is performed from the outer surface of the formed resin film j to form a circuit pattern k having a depth greater than the thickness of the resin film j and an interlayer connection hole m.
  • the circuit pattern k includes a wiring groove, an electrode pad hole, and the like.
  • the interlayer connection hole m reaches the first circuit h of the circuit board g and exposes the first circuit h.
  • a plating catalyst n is deposited on the surface of the resin film j, the surface of the circuit pattern k, the surface of the interlayer connection hole m, and the exposed surface of the first circuit h. From the viewpoint of electroless plating, which will be described later, it is not necessary to apply the plating catalyst n to the surface of the first circuit h, but the work can be facilitated by applying the plating catalyst n to the entire insulating layer i. Is achieved.
  • the resin film j is removed from the insulating layer i. Then, as shown in FIG.
  • the wiring groove in the circuit portion has a fine line width and a shallow depth. Since the hole for the part is also shallow, both of them complete the conductor formation in a short time, but the hole for the interlayer connection is larger than the line width of the wiring groove and the depth is deeper than the circuit part. It takes a long time to fill with plating metal. Therefore, when the electroless plating is completed when the conductor formation of the circuit portion is completed, as illustrated in FIG. 24G, the metal filling of the interlayer connection hole is insufficient, and the connection between the circuit and the interlayer connection hole is poor. Cause.
  • the conductor formation in the circuit portion becomes excessive and short circuits or the like are likely to occur.
  • the depth of the interlayer connection hole can be reduced, or the interlayer connection hole can be reduced. It is proposed to reduce the diameter of the.
  • the former is often difficult in designing a circuit board and is difficult to realize. In the latter, the contact area between the interlayer connection hole and the circuit is reduced, and the reliability of the interlayer connection is lowered.
  • the metal filling is completed in a short time. In addition to growing from the bottom, it also grows from the circuit pattern side, so voids are easily generated inside the metal pillar.
  • the present invention is intended to solve the above-described problems when the additive method is applied when manufacturing a multilayer circuit board by the build-up method, and even if a fine circuit pattern and interlayer connection holes are mixed.
  • Another object of the present invention is to provide a method for manufacturing a multilayer circuit board, in which the metal filling of the interlayer connection holes is sufficiently and satisfactorily performed and excessive conductor formation in the circuit portion can be avoided.
  • the method for manufacturing a multilayer circuit board according to the present invention is a method for manufacturing a multilayer circuit board having interconnected electrical circuits and interlayer connection holes, and the circuit board circuit on which the first electrical circuit is formed.
  • a circuit pattern forming step of forming a circuit pattern by forming a groove and / or a hole having a predetermined depth and a predetermined shape, and a plating catalyst is deposited on the surface of the resin film and the surface of the circuit pattern.
  • a catalyst deposition step a film removal step of removing the resin film from the insulating layer, and an electroless plating on the insulating layer, thereby leaving a portion of the circuit pattern where the plating catalyst remains and an exposed portion of the metal pillar
  • a plating film is formed on the insulating layer to form a second electric circuit, and the second electric circuit of the insulating layer and the first electric circuit of the circuit board are connected to each other through the metal pillars.
  • the insulating layer forming step, the hole forming step, and the metal pillar forming step before forming the circuit pattern are filled in advance with the plated metal in the interlayer connection hole, excessive conductor formation in the circuit portion is performed. Without worrying about the above, it is possible to sufficiently fill the metal for the interlayer connection hole with time.
  • the plating film does not grow from the circuit pattern side, and good metal filling with suppressed generation of voids is realized. Then, after the metal filling of the interlayer connection holes is completed, an additive method as described with reference to FIGS.
  • 23A to 23E is performed by a film formation process, a circuit pattern formation process, a catalyst deposition process, a film removal process, and a plating process. Since the conductor formation of the circuit portion is performed, a fine conductor can be formed with high accuracy in a short time, and excessive formation of the conductor in the circuit portion is avoided. As described above, even when a fine circuit pattern and interlayer connection holes are mixed, a multilayer circuit board can be produced without any problem by the build-up method while applying the additive method satisfactorily.
  • the “metal pillar” formed in the metal pillar forming step is not limited as long as it has a thickness larger than that of the conductor layer constituting the electric circuit and is a conductive convex portion protruding substantially perpendicular to the electric circuit. Is not particularly limited. For example, in addition to a columnar shape having a constant cross-sectional shape such as a cylinder or a prism, a truncated cone shape or a truncated pyramid shape whose cross-sectional shape changes in the length direction is also included.
  • the “groove” of the circuit pattern formed in the circuit pattern forming step is mainly a wiring groove, and the “hole” is, for example, a hole for an electrode pad portion. However, depending on the situation, it may be an interlayer connection hole (an interlayer connection hole different from the one that has been previously filled with metal).
  • the circuit pattern stays on the outer surface of the insulating layer, so that the conductor layer constituting the electric circuit is the insulating layer. It will be on the outer surface.
  • a part or all of the circuit pattern is located at a position dug down from the outer surface of the insulating layer, so that an electric circuit is formed.
  • the conductor layer is in a state where part or all of the conductor layer is embedded in the outer surface of the insulating layer. In the latter case, the thickness of the conductor layer can be increased, and the mechanical strength of the circuit can be ensured.
  • the circuit pattern in the circuit pattern forming step, is formed so that the top of the metal pillar is exposed and protrudes from the bottom surface of the circuit pattern, and the second electric circuit formed so as to cover the top of the metal pillar It is preferable that this part is an electrode pad part. This is because the top portion of the metal pillar bites into the conductor layer of the pad portion, and the drop-off of the pad portion is effectively suppressed by the anchor effect, and a pad portion that can sufficiently withstand the weight of the mounted component is obtained.
  • the circuit pattern in the circuit pattern forming step, may be formed so that the top of the metal pillar is exposed and does not protrude from the bottom surface of the circuit pattern. In this case, it is possible to avoid the conductor layer formed on the top of the metal pillar from protruding from the outer surface of the insulating layer, and it is possible to eliminate the unevenness generated on the circuit forming surface.
  • the top of the metal pillar can be removed to the position that becomes the bottom surface of the circuit pattern, so that the top of the metal pillar can be exposed and not protruded in the circuit pattern forming process. It is. Accordingly, it is possible to reliably achieve the correction of the position of the top of the metal column so that the top of the metal column does not protrude from the bottom surface of the circuit pattern.
  • Another aspect of the method for manufacturing a multilayer circuit board according to the present invention is a method for manufacturing a multilayer circuit board having an electrical circuit and an interlayer connection hole connected to each other, wherein the first electrical circuit is formed.
  • An insulating layer forming step of forming an insulating layer on the circuit forming surface of the circuit board, a hole forming step of forming a hole in the insulating layer from the outer surface and exposing the first electric circuit, and an exposed first electric circuit A metal column forming step of filling the hole with a plated metal to form a metal column, a film forming step of forming a resin film on the outer surface of the insulating layer and the top of the metal column, at least from the outer surface of the resin film
  • the top of the metal column does not protrude from the bottom surface of the circuit pattern in the circuit pattern forming step by filling the plating metal up to a position that does not reach the position that becomes the bottom surface of the circuit pattern.
  • the resin film is removed so that the top of the metal pillar is exposed at a position retracted from the bottom surface of the circuit pattern.
  • the distance from the outer surface to the bottom surface of the circuit pattern d1 the distance from the bottom surface of the circuit pattern to the top of the metal pillar when the d2, is 0 ⁇ d2 ⁇ d1 ⁇ 30%.
  • the circuit pattern is formed so that the top of the metal pillar does not protrude from the bottom surface of the circuit pattern.
  • the resin film is removed so that the top of the metal pillar is exposed at a position retracted from the bottom surface of the circuit pattern. Also in this case, it is possible to avoid the conductor layer formed on the top of the metal pillar from protruding from the outer surface of the insulating layer, and it is possible to eliminate the unevenness generated on the circuit forming surface.
  • the distance from the outer surface of the insulating layer to the bottom surface of the circuit pattern is d1
  • the distance from the bottom surface of the circuit pattern to the top portion of the metal column is from the bottom surface of the circuit pattern.
  • the plating metal is filled up to the position that does not reach the position that becomes the bottom of the circuit pattern, so that the top of the metal pillar does not protrude from the bottom of the circuit pattern in the circuit pattern forming process, and the film is removed.
  • the top of the metal pillar is exposed at a position retreated from the bottom surface of the circuit pattern. Therefore, the top of the metal pillar is the circuit pattern at the stage of the metal pillar forming process before the circuit pattern forming process and the film removing process. It can be easily achieved that it does not protrude from the bottom surface.
  • the hole in the metal column forming step, can be filled with the plated metal by growing the plated film from the exposed first electric circuit by electroless plating. Since the electric circuit which is a conductor is used as a plating nucleus of electroless plating, a metal column can be rationally formed.
  • a plating catalyst is deposited on the surface of the insulating layer, the inner wall surface of the hole, and the exposed surface of the first electric circuit, and electroless plating is performed on the plating catalyst deposition portion.
  • the holes may be filled with plating metal by electrolytic plating, and then the plating metal deposited on the outer surface side of the insulating layer including the surface of the insulating layer may be removed. Since the electroless plating layer formed on the outer surface side of the insulating layer including the surface of the insulating layer is used as a power feeding layer necessary for electrolytic plating, a metal column can be rationally formed.
  • the resin film is preferably a resin film that can be dissolved or removed from the insulating layer by dissolving or swelling with a predetermined liquid.
  • the resin film can be easily and satisfactorily removed from the surface of the insulating layer. If the resin film is collapsed when removing the resin film, the plating catalyst deposited on the resin film will be scattered, and the scattered plating catalyst will be re-deposited on the insulating layer, and an unnecessary plating film will be formed on that part. There is a problem. Such a problem can be prevented because the resin film can be easily and satisfactorily removed from the surface of the insulating layer.
  • the multilayer circuit board of this invention is a multilayer circuit board manufactured by the above manufacturing methods. Therefore, even if a fine circuit pattern and an interlayer connection hole are mixed, the metal filling of the interlayer connection hole is sufficiently and satisfactorily performed, and the connection between the circuit and the interlayer connection hole is good. Excessive conductor formation in the portion is avoided, and a multilayer circuit board in which a short circuit or the like hardly occurs is obtained.
  • the fourth embodiment of the present invention includes the following.
  • Item 4-1 A method of manufacturing a multilayer circuit board having electrical circuits and interlayer connection holes connected to each other, An insulating layer forming step of forming an insulating layer on the circuit forming surface of the circuit board on which the first electric circuit is formed; Forming a hole from the outer surface in the insulating layer and exposing the first electric circuit; A metal column forming step of filling the hole with plating metal from the exposed first electric circuit to form a metal column; A film forming step of forming a resin film on the outer surface of the insulating layer and the top of the metal column; A circuit pattern forming step of forming a circuit pattern by forming grooves and / or holes having a predetermined depth and a predetermined shape at least equal to or greater than the thickness of the resin film from the outer surface of the resin film; A catalyst deposition step of depositing a plating catalyst on the surface of the resin film and the surface of the circuit pattern; A film removing step of removing the resin film from the insulating layer; and By performing electroless plating
  • the top of the metal column is exposed from the bottom surface of the circuit pattern and the circuit pattern is formed so as to protrude, and the portion of the second electric circuit formed so as to cover the top of the metal column is an electrode.
  • Item 4. The method for producing a multilayer circuit board according to Item 4-1, wherein the pad portion is a pad portion.
  • Item 4-3 The method for producing a multilayer circuit board according to Item 4-1, wherein in the circuit pattern forming step, the circuit pattern is formed so that the top of the metal pillar is exposed from the bottom surface of the circuit pattern and does not protrude.
  • Item 4-4 The multilayer according to Item 4-3, wherein in the circuit pattern forming step, the top of the metal column is exposed and does not protrude by filling the plated metal to a position that becomes the bottom surface of the circuit pattern in the metal column forming step.
  • the top of the metal column is removed to a position that becomes the bottom surface of the circuit pattern, so that the top of the metal column is exposed and does not protrude in the circuit pattern forming step.
  • the manufacturing method of the multilayer circuit board as described.
  • Item 4-6 A method of manufacturing a multilayer circuit board having electrical circuits and interlayer connection holes connected to each other, An insulating layer forming step of forming an insulating layer on the circuit forming surface of the circuit board on which the first electric circuit is formed; Forming a hole from the outer surface in the insulating layer and exposing the first electric circuit; A metal column forming step of filling the hole with plating metal from the exposed first electric circuit to form a metal column; A film forming step of forming a resin film on the outer surface of the insulating layer and the top of the metal column; A circuit pattern forming step of forming a circuit pattern by forming grooves and / or holes having a predetermined depth and a predetermined shape at least equal to or greater than the thickness of the resin film from the outer surface of the resin film; A catalyst deposition step of depositing a plating catalyst on the surface of the resin film and the surface of the circuit pattern; A film removing step of removing the resin film from the insulating layer; and By performing electroless plating
  • the circuit pattern is formed so that the top of the metal column does not protrude from the bottom surface of the circuit pattern by filling the plating metal up to a position that does not reach the position to be the bottom surface of the circuit pattern.
  • the resin film is removed so that the top of the metal pillar is exposed at a position retracted from the bottom surface of the circuit pattern, Production of multilayer circuit board where 0 ⁇ d2 ⁇ d1 ⁇ 30%, where d1 is the distance from the outer surface of the insulating layer to the bottom surface of the circuit pattern and d2 is the distance from the bottom surface of the circuit pattern to the top of the metal pillar Method.
  • Item 4-7 The metal column forming process according to any one of Items 4-1 to 4-6, wherein the hole is filled with a plating metal by growing a plating film from the exposed first electric circuit by electroless plating. A method of manufacturing a multilayer circuit board.
  • Item 4-8 In the metal column forming step, a plating catalyst is deposited on the surface of the insulating layer, the inner wall surface of the hole, and the exposed surface of the first electric circuit, and electroless plating is performed on the plating catalyst deposition portion, followed by electrolysis.
  • the hole is filled with a plating metal, and then the plating metal deposited on the outer surface side of the insulating layer including the surface of the insulating layer is removed. The manufacturing method of the multilayer circuit board as described.
  • Item 9 The multilayer circuit board according to any one of Items 4-1 to 4-8, wherein the resin film is a resin film that can be dissolved or removed from the insulating layer by dissolving or swelling with a predetermined liquid. Method.
  • Item 4-10 A multilayer circuit board manufactured by the manufacturing method according to any one of Items 4-1 to 4-9.
  • a multilayer circuit board can be produced without any problem by the build-up method while applying the additive method satisfactorily.
  • FIG. 19 is a partial plan view for illustrating the configuration of the electric circuit G26, the arrangement of the interlayer connection holes G21 (or the metal pillars G22), and the like in the multilayer circuit board G1 according to the present embodiment.
  • a multilayer circuit board G1 in which the electric circuit G26 and the via hole which is the interlayer connection hole G21 are connected to each other is manufactured.
  • the circuit G26 includes a wiring G26a having a fine line width and an electrode pad portion G26b.
  • the electrode pad portion G26b is provided so as to overlap the interlayer connection hole G21.
  • FIG. 20 The II line in FIG. 19 shows the cut part of the end views of FIGS.
  • reference numeral 10 is a circuit board
  • reference numeral 11 is a first electric circuit
  • reference numeral G20 is an insulating layer
  • reference numeral G21 is an interlayer connection hole
  • reference numeral G22 is a metal pillar
  • reference numeral G23 is a resin film
  • reference numeral G24 is a circuit pattern
  • Reference numeral G25 indicates a plating catalyst
  • reference numeral G26 indicates a second electric circuit.
  • the first electric circuit G11 formed on the circuit board G10 and the second electric circuit G26 formed on the insulating layer G20 stacked on the circuit board G10. Are connected to each other through an interlayer connection hole G21 (or metal pillar G22) formed in the insulating layer G20.
  • a circuit board G10 on which the first electric circuit G11 is formed is prepared (circuit board preparation step).
  • the first circuit G11 is mounted on the upper surface of the circuit board G10, but may be embedded in the upper surface of the circuit board G10.
  • the method for forming the first circuit G11 is not limited here. For example, it may be formed by a conventionally known circuit forming method such as a subtractive method or an additive method. Further, the circuit board may be formed on only one side or may be formed on both sides. A multilayer circuit board may also be used.
  • circuit board G10 various organic substrates conventionally used for manufacturing multilayer circuit boards can be used without any particular limitation.
  • the organic substrate include substrates made of epoxy resin, acrylic resin, polycarbonate resin, polyimide resin, polyphenylene sulfide resin, polyphenylene ether resin, cyanate resin, benzoxazine resin, bismaleimide resin, and the like.
  • the form of the circuit board G10 is not particularly limited, such as a sheet, a film, a prepreg, or a three-dimensional molded body.
  • the thickness of the circuit board G10 is not particularly limited. For example, in the case of a sheet, film, prepreg, etc., the thickness is about 10 to 500 ⁇ m, preferably about 20 to 200 ⁇ m.
  • the detailed description of the circuit board G10 is the same as the detailed description of the insulating layer G20 described below.
  • an insulating layer G20 is formed on the upper surface (circuit forming surface) of the circuit board G10 on which the first circuit G11 is formed (insulating layer forming step).
  • the form of the insulating layer G20 is not particularly limited. Specific examples include a sheet, a film, a prepreg, and a three-dimensional molded article formed by applying a resin solution.
  • the thickness of the insulating layer G20 is not particularly limited. Specifically, in the case of sheets, films and prepregs, for example, the thickness is preferably 10 to 200 ⁇ m, more preferably about 20 to 100 ⁇ m.
  • the insulating layer G20 may contain inorganic fine particles such as silica particles.
  • the insulating layer G20 can be formed by, for example, laminating a sheet, a film, or a prepreg on the upper surface of the circuit board G10, pressurizing them, and curing them, or by curing them by heating and pressing.
  • the insulating layer G20 can also be formed by applying a resin solution to the upper surface of the circuit board G10 and then curing it.
  • a material to be an insulating layer may be put in using a mold and a frame mold, and pressed and cured to form a three-dimensional molded body, or a sheet, film, or prepreg is punched out.
  • the three-dimensional molded body or the like may be formed by laminating the hollowed material on the upper surface of the circuit board G10 and pressurizing them, followed by curing, or curing by heating and pressing.
  • organic substrates conventionally used for manufacturing a multilayer circuit board can be used without any particular limitation.
  • organic substrates include those conventionally used in the production of multilayer circuit boards, such as epoxy resins, acrylic resins, polycarbonate resins, polyimide resins, polyphenylene sulfide resins, polyphenylene ether resins, cyanate resins, benzoxazine resins, bis Examples include a substrate made of maleimide resin or the like.
  • the epoxy resin is not particularly limited as long as it is an epoxy resin constituting various organic substrates that can be used for manufacturing a circuit board.
  • bisphenol A type epoxy resin bisphenol F type epoxy resin, bisphenol S type epoxy resin, aralkyl epoxy resin, phenol novolac type epoxy resin, alkylphenol novolac type epoxy resin, biphenol type epoxy resin, naphthalene type epoxy resin , Dicyclopentadiene type epoxy resins, epoxidized products of condensates of phenols and aromatic aldehydes having a phenolic hydroxyl group, triglycidyl isocyanurate, alicyclic epoxy resins, and the like.
  • epoxy resin nitrogen-containing resin, and silicone-containing resin that are brominated or phosphorus-modified to impart flame retardancy are also included.
  • said epoxy resin and resin said each epoxy resin and resin may be used independently, and may be used in combination of 2 or more type.
  • a curing agent is contained for curing.
  • the curing agent is not particularly limited as long as it can be used as a curing agent. Specific examples include dicyandiamide, phenolic curing agents, acid anhydride curing agents, aminotriazine novolac curing agents, and cyanate resins.
  • phenolic curing agent examples include novolak type, aralkyl type, and terpene type. Further examples include phosphorus-modified phenolic resins or phosphorus-modified cyanate resins for imparting flame retardancy.
  • curing agent may be used independently, and may be used in combination of 2 or more type.
  • a resin or the like having good laser light absorption in the wavelength region of 100 nm to 400 nm because a circuit pattern is formed by laser processing is preferable to use.
  • a polyimide resin or the like can be given.
  • the insulating base material may contain a filler.
  • the filler may be inorganic fine particles or organic fine particles, and is not particularly limited. By containing the filler, the filler is exposed in the laser processed part, and it is possible to improve the adhesion between the plating due to the unevenness of the filler and the resin.
  • the material constituting the inorganic fine particles include aluminum oxide (Al 2 O 3 ), magnesium oxide (MgO), boron nitride (BN), aluminum nitride (AlN), silica (SiO 2 ), High dielectric constant fillers such as barium titanate (BaTiO 3 ) and titanium oxide (TiO 2 ); magnetic fillers such as hard ferrite; magnesium hydroxide (Mg (OH) 2 ), aluminum hydroxide (Al (OH) 2 ), Antimony trioxide (Sb 2 O 3 ), antimony pentoxide (Sb 2 O 5 ), guanidine salts, zinc borate, molybdate compounds, zinc stannate, and other inorganic flame retardants; talc (Mg 3 (Si 4 O 10) (OH) 2), barium sulfate (BaSO 4), calcium carbonate (CaCO 3), mica, and the like.
  • Al 2 O 3 magnesium oxide
  • MgO magnesium oxide
  • BN boro
  • the said inorganic fine particle may be used independently, and may be used in combination of 2 or more type. Since these inorganic fine particles have high thermal conductivity, relative dielectric constant, flame retardancy, particle size distribution, color tone freedom, etc., when selectively exerting a desired function, appropriate blending and particle size design should be performed. And high filling can be easily performed. Although not particularly limited, it is preferable to use a filler having an average particle diameter equal to or less than the thickness of the insulating layer, more preferably 0.01 ⁇ m to 10 ⁇ m, and still more preferably a filler having an average particle diameter of 0.05 ⁇ m to 5 ⁇ m. It is good.
  • the inorganic fine particles may be surface-treated with a silane coupling agent in order to enhance dispersibility in the insulating base material.
  • the insulating base material may contain a silane coupling agent in order to increase the dispersibility of the inorganic fine particles in the insulating base material.
  • the silane coupling agent is not particularly limited. Specific examples include silane coupling agents such as epoxy silane, mercapto silane, amino silane, vinyl silane, styryl silane, methacryloxy silane, acryloxy silane, and titanate.
  • the said silane coupling agent may be used independently, and may be used in combination of 2 or more type.
  • the insulating base material may contain a dispersant in order to improve the dispersibility of the inorganic fine particles in the insulating base material.
  • the dispersant is not particularly limited. Specific examples include dispersants such as alkyl ether, sorbitan ester, alkyl polyether amine, and polymer.
  • the said dispersing agent may be used independently, and may be used in combination of 2 or more type.
  • organic fine particles include rubber fine particles.
  • the insulating layer G20 may be superposed on the upper surface (circuit forming surface) of the circuit board G10 and stacked and cured by heating and pressing.
  • the types of materials and resins that constitute the circuit board G10 may differ from the types of materials and resins that constitute the insulating layer G20. However, from the viewpoint of satisfactorily adhering and laminating the circuit board G10 and the insulating layer G20, it is preferable that the types are familiar to each other, and it is more preferable that the types are typically the same.
  • an interlayer connection hole G21 is formed in the insulating layer G20 by laser processing from the upper surface (outer surface) of the insulating layer G20 (hole forming step). At this time, the interlayer connection hole G21 reaches the first circuit G11 of the circuit board G10 and exposes the first circuit G11.
  • the detailed description of the laser processing and the peripheral technology is the same as the detailed description of the laser processing and the peripheral technology described in other steps.
  • a smear (not shown) that is a resin residue of the insulating layer G20 remains on the first circuit G11 exposed by laser processing. Since smear causes conduction failure, it is preferably removed by desmear treatment.
  • desmear treatment for example, a known method such as dissolving and removing smear by dipping in a permanganic acid solution is used without limitation. However, the desmear process can be omitted depending on the situation.
  • the interlayer connection hole G21 is filled with plating metal from the exposed first circuit G11 by electroless plating or electrolytic plating, and the metal column G22 is filled in the interlayer connection hole G21.
  • the first circuit G11 functions as a plating nucleus, and a plating film grows from the first circuit G11.
  • a plating catalyst is deposited on the surface of the insulating layer G20, the inner wall surface of the hole G21, and the exposed surface of the first circuit G11, and electroless plating is applied to the plating catalyst deposition portion. Thereafter, electrolytic plating is performed to fill the hole G21 with a plating metal, and thereafter, the plating metal deposited on the outer surface side of the insulating layer G20 including the surface of the insulating layer G20 is removed.
  • the shape, size, interval, etc. of the metal pillar G22 are not particularly limited. Specifically, for example, a metal column G22 having a substantially columnar shape with a height of about 5 to 200 ⁇ m and a bottom surface diameter of about 10 to 500 ⁇ m can be preferably realized. A metal column G22 having a prism shape, a truncated cone shape, or a truncated pyramid shape may be used.
  • 20D shows a case where the metal column G22 has grown to the height of the upper surface (outer surface) of the insulating layer G20 in this metal column forming step.
  • the present invention is not limited to this, and the metal column G22 may be grown to a position where it does not reach the upper surface of the insulating layer G20 in the metal column forming step. However, it is a condition that the metal pillar G22 grows beyond the position that becomes the bottom surface of the circuit pattern G24 formed in the circuit pattern forming process described later.
  • the generation of voids is suppressed in the interlayer connection hole G21 connecting the first circuit G11 and the second circuit G26. It can be formed by filling a sufficient amount of a good metal column G22.
  • a resin film G23 is formed on the outer surface of the insulating layer G20 and the top of the metal column G22 (film formation process).
  • the resin film (resist) G23 is not particularly limited as long as it can be removed in a film removal step described later.
  • the resin film G23 is preferably a resin film that can be easily dissolved or removed from the upper surface of the insulating layer G20 by dissolving or swelling with a predetermined liquid.
  • a film made of a soluble resin that can be easily dissolved by an organic solvent or an alkaline solution a film made of a swellable resin that can swell with a predetermined liquid (swelling liquid), and the like can be given.
  • the swellable resin film does not substantially dissolve in a predetermined liquid and swells in a predetermined liquid as well as a resin film that easily peels off from the surface of the insulating layer G20 due to swelling.
  • at least a part of the resin film is dissolved and easily dissolved from the surface of the insulating layer G20 by swelling or dissolution, or dissolved in a predetermined liquid, and easily dissolved from the surface of the insulating layer G20 by dissolution.
  • a resin film that peels off is also included.
  • the resin film can be easily and satisfactorily removed from the surface of the insulating layer. If the resin film is collapsed when removing the resin film, the plating catalyst deposited on the resin film will be scattered, and the scattered plating catalyst will be re-deposited on the insulating layer, and an unnecessary plating film will be formed on that part. There is a problem. Such a problem can be prevented because the resin film can be easily and satisfactorily removed from the surface of the insulating layer.
  • the formation method of the resin film G23 is not particularly limited. Specifically, for example, a liquid material capable of forming the resin film G23 is applied to the upper surface (outer surface) of the insulating layer G20 and then dried, or the liquid material is applied to a support substrate and then dried. And a method of transferring the resin film formed on the surface of the insulating layer G20. Another method includes a method of bonding a resin film made of a resin film G23 formed in advance on the upper surface (outer surface) of the insulating layer G20.
  • the method for applying the liquid material is not particularly limited. Specifically, for example, conventionally known spin coating method, bar coater method and the like can be mentioned.
  • any resin can be used without particular limitation as long as it can be easily dissolved or removed from the surface of the insulating layer G20 by dissolving or swelling with a predetermined liquid.
  • a resin having a degree of swelling with respect to a predetermined liquid is 50% or more, more preferably 100% or more, and still more preferably 500% or more.
  • the degree of swelling is too low, the resin film tends to be difficult to peel.
  • Such a resin film is formed by applying an elastomer suspension or emulsion to the surface of the insulating layer G20 and then drying, or by applying an elastomer suspension or emulsion to a support substrate and then drying. Can be easily formed by a method of transferring the film to the surface of the insulating layer G20.
  • the elastomer examples include diene elastomers such as a styrene-butadiene copolymer, acrylic elastomers such as an acrylate ester copolymer, and polyester elastomers. According to such an elastomer, a resin film having a desired swelling degree can be easily formed by adjusting the degree of crosslinking or gelation of the elastomer resin particles dispersed as a suspension or emulsion.
  • such a resin film is particularly preferably a film whose degree of swelling changes depending on the pH of the swelling liquid.
  • the liquid condition in the catalyst deposition process described later is different from the liquid condition in the film removal process described later, so that the resin is used at the pH in the catalyst deposition process.
  • the film G23 maintains high adhesion to the insulating layer G20, and the resin film G23 can be easily removed at the pH in the film removal process.
  • a catalyst deposition step described later includes a step of treating in an acidic catalyst metal colloid solution having a pH range of 1 to 3, for example, and a film removal step described later is alkaline in a pH range of 12 to 14.
  • the resin film has a swelling degree of 60% or less, further 40% or less with respect to the acidic catalyst metal colloid solution, and a swelling degree with respect to the alkaline solution of 50% or less. % Or more, preferably 100% or more, and more preferably 500% or more.
  • Examples of such a resin film are used for a sheet formed from an elastomer having a predetermined amount of carboxyl groups, a dry film resist for patterning a printed wiring board (hereinafter sometimes referred to as “DFR”), and the like.
  • Examples thereof include a sheet obtained by curing the entire surface of a photocurable alkali-developing resist, a thermosetting or alkali-developing sheet, and the like.
  • the elastomer having a carboxyl group examples include diene elastomers such as a styrene-butadiene copolymer having a carboxyl group in the molecule by containing a monomer unit having a carboxyl group as a copolymerization component, and acrylic.
  • examples include acrylic elastomers such as acid ester copolymers, and polyester elastomers. According to such an elastomer, a resin film having a desired degree of alkali swelling can be formed by adjusting the acid equivalent, the degree of crosslinking or the degree of gelation of the elastomer dispersed as a suspension or emulsion.
  • the swelling degree with respect to the predetermined liquid used in a film removal process can be increased, and a resin film that dissolves in the liquid can be easily formed.
  • the carboxyl group in the elastomer swells the resin film with respect to the alkaline aqueous solution and acts to peel the resin film from the surface of the insulating layer G20.
  • the acid equivalent is the polymer molecular weight per carboxyl group.
  • the monomer unit having a carboxyl group examples include (meth) acrylic acid, fumaric acid, cinnamic acid, crotonic acid, itaconic acid, maleic anhydride, and the like.
  • the content ratio of the carboxyl group in the elastomer having such a carboxyl group is preferably 100 to 2000, more preferably 100 to 800 in terms of acid equivalent.
  • the acid equivalent is too small (when the number of carboxyl groups is relatively large), the compatibility with a pretreatment solution for electroless plating is reduced due to a decrease in compatibility with a solvent or other composition. Tend.
  • the acid equivalent is too large (when the number of carboxyl groups is relatively small), the peelability with respect to the alkaline aqueous solution tends to decrease.
  • the molecular weight of the elastomer is preferably 10,000 to 1,000,000, more preferably 20,000 to 500,000, and more preferably 20,000 to 60,000.
  • the molecular weight of the elastomer is too large, the peelability tends to decrease.
  • the molecular weight is too small, the viscosity decreases and it becomes difficult to maintain a uniform thickness of the resin film. There is also a tendency that the resistance to the treatment liquid also decreases.
  • DFR for example, an acrylic resin, an epoxy resin, a styrene resin, a phenol resin, a urethane resin, or the like containing a predetermined amount of a carboxyl group is used as a resin component, and a photopolymerization initiator is included.
  • a sheet of curable resin composition may be used.
  • Specific examples of such DFR include a dry film of a photopolymerizable resin composition as disclosed in JP-A-2000-231190, JP-A-2001-201851, and JP-A-11-212262. Sheets obtained by curing, and commercially available as an alkali development type DFR, for example, UFG series manufactured by Asahi Kasei Kogyo Co., Ltd. may be mentioned.
  • a resin containing a carboxyl group and containing rosin as a main component for example, “NAZDAR229” manufactured by Yoshikawa Chemical Co., Ltd.
  • a resin containing phenol as a main component eg, LEKTRACHEM
  • the resin film G23 is formed on the surface of the insulating layer G20 by applying a resin suspension or emulsion using a conventionally known application method such as a spin coating method or a bar coater method, and then drying the resin coating G23.
  • the bonded DFR can be easily formed by bonding the entire surface of the insulating layer G20 to the surface of the insulating layer G20 using a vacuum laminator or the like and then curing the entire surface.
  • the thickness of the resin film G23 is, for example, preferably 10 ⁇ m or less, and more preferably 5 ⁇ m or less. Moreover, 0.1 micrometer or more is preferable and 1 micrometer or more is further more preferable. If the thickness is too thick, the accuracy tends to decrease when the fine circuit pattern G24 is formed by laser processing, machining, or the like. Moreover, when the thickness is too thin, it tends to be difficult to form the resin film G23 having a uniform film thickness.
  • the resin film G23 for example, a resin film mainly composed of a resin composed of an acrylic resin having a carboxyl group with an acid equivalent of about 100 to 800 (carboxyl group-containing acrylic resin) can be preferably used.
  • the following is also suitable as the resin film G23. That is, as a characteristic required for the resist material constituting the resin film, for example, (1) an insulating base material (circuit board, insulating layer, etc.) on which the resin film is formed is immersed in a catalyst deposition process described later. High resistance to liquid (plating nucleation chemical), (2) Easily remove resin film (resist) by the film removal process described later, for example, the process of immersing the insulating substrate on which the resin film is formed in alkali (3) High film formability, (4) Easy dry film (DFR) formation, (5) High storage stability, and the like.
  • a characteristic required for the resist material constituting the resin film for example, (1) an insulating base material (circuit board, insulating layer, etc.) on which the resin film is formed is immersed in a catalyst deposition process described later. High resistance to liquid (plating nucleation chemical), (2) Easily remove resin film (resist) by the film removal process described later, for example, the process of immersing
  • the plating nucleation chemical solution is an acidic (eg, pH 1 to 3) aqueous solution.
  • the catalyst imparting activator is a weak alkali (pH 8 to 12), and the others are acidic. From the above, it is necessary to withstand pH 1 to 11, preferably pH 1 to 12, as the resistance to the plating nucleating solution. In addition, being able to withstand is that when a sample on which a resist is formed is immersed in a chemical solution, swelling and dissolution of the resist are sufficiently suppressed, and the resist plays a role as a resist.
  • the immersion temperature is from room temperature to 60 ° C.
  • the immersion time is from 1 to 10 minutes
  • the resist film thickness is from about 1 to 10 ⁇ m, but is not limited thereto.
  • the alkali stripping chemical used in the film removal step is generally an aqueous NaOH solution or an aqueous sodium carbonate solution. Its pH is 11 to 14, and it is desirable that the resist film can be easily removed preferably at pH 12 to 14.
  • the concentration of the aqueous NaOH solution is about 1 to 10%
  • the processing temperature is room temperature to 50 ° C.
  • the processing time is 1 to 10 minutes
  • the immersion or spray treatment is generally performed, but is not limited thereto. Since a resist is formed on an insulating material, film formability is also important.
  • a uniform film formation without repelling or the like is necessary.
  • a dry film resist is pasted on the insulating material with a laminator (roll, vacuum).
  • the pasting temperature is room temperature to 160 ° C., and the pressure and time are arbitrary.
  • adhesiveness is required at the time of pasting.
  • the resist formed into a dry film is generally used as a three-layer structure sandwiched by a carrier film and a cover film to prevent dust from adhering, but is not limited thereto.
  • the best preservation is that it can be stored at room temperature, but it must also be refrigerated or frozen. As described above, it is necessary to prevent the composition of the dry film from being separated at low temperatures or to be cracked due to a decrease in flexibility.
  • the resin film G23 (a) at least one monomer of carboxylic acid or acid anhydride having at least one polymerizable unsaturated group in the molecule, and (b) ( It may be a polymer resin obtained by polymerizing a) at least one monomer that can be polymerized with a monomer, or a resin composition containing this polymer resin.
  • Known techniques include JP-A-7-281437, JP-A-2000-231190, JP-A-2001-201851, and the like.
  • (A) As an example of the monomer, (meth) acrylic acid, fumaric acid, cinnamic acid, crotonic acid, itaconic acid, maleic anhydride, maleic acid half ester, butyl acrylate, etc. may be mentioned alone or Two or more types may be combined.
  • Examples of the monomer (b) are generally non-acidic and have (1) a polymerizable unsaturated group in the molecule, but are not limited thereto. It is selected so as to maintain various properties such as resistance in the plating process and flexibility of the cured film.
  • esters of vinyl alcohol such as vinyl acetate, (meth) acrylonitrile, styrene or polymerizable styrene derivatives.
  • a monomer having a plurality of unsaturated groups can be selected as the monomer used for the polymer so that three-dimensional crosslinking can be performed.
  • reactive functional groups such as epoxy groups, hydroxyl groups, amino groups, amide groups, and vinyl groups can be introduced into the molecular skeleton.
  • the amount of the carboxyl group contained in the resin is preferably 100 to 2000, preferably 100 to 800, and more preferably 100 to 600 in terms of acid equivalent. If the acid equivalent is too low, the compatibility with the solvent or other composition is lowered and the resistance to the plating pretreatment solution is lowered. If the acid equivalent is too high, the peelability is lowered.
  • the composition ratio of the monomer (a) is preferably 5 to 70% by mass.
  • the resin composition may contain the polymer resin as an essential component as a main resin (binder resin), and may contain at least one of oligomers, monomers, fillers, and other additives.
  • the main resin is preferably a linear polymer having thermoplastic properties. In order to control fluidity and crystallinity, it may be branched by grafting.
  • the molecular weight is about 1,000 to 500,000 in terms of weight average molecular weight, and preferably 5,000 to 50,000. When the weight average molecular weight is small, the flexibility of the film and the resistance to the plating nucleation solution (acid resistance) are lowered. On the other hand, when the molecular weight is large, the alkali peelability and the sticking property when a dry film is formed deteriorate.
  • a crosslinking point may be introduced to improve resistance to plating nucleus chemicals, suppress thermal deformation during laser processing, and control flow.
  • Any monomer or oligomer may be used as long as it is resistant to plating nucleation chemicals and can be easily removed with alkali. Further, in order to improve the sticking property of the dry film (DFR), it can be considered that it is used as a tackifier as a plasticizer. Further, it is conceivable to add a crosslinking agent in order to increase various resistances.
  • esters of vinyl alcohol such as vinyl acetate, (meth) acrylonitrile, styrene or polymerizable styrene derivatives.
  • Examples of monomers include 1,6-hexanediol di (meth) acrylate, 1,4-cyclohexanediol di (meth) acrylate, polypropylene glycol di (meth) acrylate, polyethylene glycol di (meth) acrylate, polyoxyethylene Polyoxyalkylene glycol di (meth) acrylate such as polyoxypropylene glycol di (meth) acrylate, 2-di (p-hydroxyphenyl) propane di (meth) acrylate, glycerol tri (meth) acrylate, dipentaerythritol penta (meth) Acrylate, trimethylolpropane triglycidyl ether tri (meth) acrylate, bisphenol A diglycidyl ether tri (meth) acrylate, 2,2-bis (4-methacryloxy) Pointer ethoxyphenyl) propane, there is a polyfunctional (meth) acrylate containing urethane groups. Any
  • the filler is not particularly limited, but silica, aluminum hydroxide, magnesium hydroxide, calcium carbonate, clay, kaolin, titanium oxide, barium sulfate, alumina, zinc oxide, talc, mica, glass, potassium titanate, wollastonite, sulfuric acid Magnesium, aluminum borate, an organic filler, etc. are mentioned. Further, since the preferable thickness of the resist is as thin as 0.1 to 10 ⁇ m, it is preferable that the resist has a small filler size. Although it is preferable to use a material having a small average particle size and cut coarse particles, the coarse particles can be crushed during dispersion or removed by filtration.
  • additives include photopolymerizable resins (photopolymerization initiators), polymerization inhibitors, colorants (dyes, pigments, coloring pigments), thermal polymerization initiators, and crosslinking agents such as epoxy and urethane.
  • the resin film G23 is subjected to laser processing or the like, and therefore it is necessary to impart a laser ablation property to the resist material.
  • the laser processing machine for example, a carbon dioxide laser, an excimer laser, a UV-YAG laser, or the like is selected. These laser processing machines have various intrinsic wavelengths, and productivity can be improved by using a material having a high UV absorption rate for these wavelengths.
  • the UV-YAG laser is suitable for microfabrication, and the laser wavelength is 3rd harmonic 355 nm and 4th harmonic 266 nm. Therefore, as a resist material (material for the resin film G23), Therefore, it is desirable that the UV absorption rate is relatively high.
  • the present invention is not limited to this, and it may be better to select a resist material having a relatively low UV absorption rate.
  • the lower the UV absorption rate the more UV light passes through the resist G23, so that the UV energy can be concentrated on the processing of the underlying insulating layer G20, which is particularly preferable when the insulating layer G20 is a material that is difficult to process. Results are obtained.
  • a circuit is formed by forming grooves and / or holes having a predetermined depth and a predetermined shape at least equal to or greater than the thickness of the resin film G23 from the upper surface (outer surface) of the resin film G23.
  • a pattern G24 is formed (circuit pattern forming step).
  • the circuit pattern G24 is formed by laser processing, cutting processing, embossing processing, or the like.
  • the groove of the circuit pattern G24 is mainly a groove for the wiring G26a (see FIG. 19), and the hole of the circuit pattern G24 is, for example, a hole for the electrode pad portion G26b (see FIG. 19).
  • the circuit pattern G24 may include an interlayer connection hole (an interlayer connection hole different from the hole G21 in which the metal column G22 has already been formed in the metal column forming step).
  • the circuit pattern G24 is formed by the thickness of the resin film G23, the insulating layer G20 is not dug as shown by the left metal column G22 in FIG. ) Is placed on the circuit pattern G24.
  • the circuit pattern G24 is formed exceeding the thickness of the resin film G23, the insulating layer G20 is dug as shown in the right and center metal pillars G22 and G22 in FIG.
  • the circuit pattern G24 is embedded in the upper surface (outer surface) of G20.
  • the width of the groove for the wiring G26a in the circuit pattern G24 is not particularly limited. When laser processing is used, a fine groove having a line width of 20 ⁇ m or less can be easily formed.
  • the method for forming the circuit pattern G24 is not particularly limited. Specifically, cutting by laser processing, dicing processing, etc., embossing, etc. are used. In order to form a highly accurate fine circuit pattern G24, laser processing is preferable. According to laser processing, the digging depth of the insulating layer G20 can be easily adjusted by controlling the output (energy or power) of the laser.
  • embossing for example, embossing with a fine resin mold used in the field of nanoimprinting can be preferably used.
  • the circuit pattern G24 is formed so that the top of the metal column G22 formed in the previous metal column forming step is exposed and protrudes from the bottom surface of the circuit pattern G24. Shows the case. As will be described later, when the insulating layer G20 is dug by laser processing, the resin or the like constituting the insulating layer G20 can be easily removed, but the plating metal constituting the metal pillar G22 is difficult to remove. Caused by.
  • a plating catalyst G25 is deposited on the surface of the resin film G23 and the surface of the circuit pattern G24 (catalyst deposition step). That is, the plating catalyst G25 is deposited on the entire surface where the circuit pattern G24 is formed and the entire surface where the circuit pattern G24 is not formed. From the viewpoint of electroless plating described later, it is not necessary to apply the plating catalyst G25 to the surface of the metal column G22. However, the work can be facilitated by applying the plating catalyst G25 to the entire insulating layer G20. Is planned.
  • the plating catalyst G25 is a concept including its precursor.
  • the plating catalyst G25 is a catalyst that is applied in advance in order to form the plating film only on the portion where the electroless plating film is desired to be formed in the plating process described later.
  • the plating catalyst G25 can be used without particular limitation as long as it is known as a catalyst for electroless plating.
  • the precursor of the plating catalyst G25 may be deposited in advance, and the plating catalyst G25 may be generated after the resin film G23 is removed.
  • Specific examples of the plating catalyst G25 include, for example, metal palladium (Pd), platinum (Pt), silver (Ag), and the like, and precursors that generate these.
  • Examples of the method of depositing the plating catalyst G25 include a method of treating with an acidic Pd—Sn colloidal solution treated under acidic conditions of pH 1 to 3 and then treating with an acid solution. More specifically, the following methods can be mentioned.
  • an oil component or the like adhering to the surface of the insulating layer G20 on which the circuit pattern G24 is formed is washed with hot water in a surfactant solution (cleaner / conditioner) for a predetermined time.
  • a soft etching treatment is performed with a sodium persulfate-sulfuric acid based soft etching agent.
  • an acidic solution such as a sulfuric acid aqueous solution or a hydrochloric acid aqueous solution having a pH of 1 to 2.
  • a pre-dip treatment is performed in which chloride ions are adsorbed on the surface of the insulating layer G20 by dipping in a pre-dip solution mainly containing a stannous chloride aqueous solution having a concentration of about 0.1%.
  • Pd and Sn are aggregated and adsorbed by further immersing in an acidic catalytic metal colloid solution such as acidic Pd—Sn colloid having a pH of 1 to 3 containing stannous chloride and palladium chloride.
  • an oxidation-reduction reaction SnCl 2 + PdCl 2 ⁇ SnCl 4 + Pd ⁇
  • the metal palladium which is the plating catalyst G25 is deposited.
  • the acidic catalyst metal colloid solution a known acidic Pd—Sn colloid catalyst solution or the like can be used, and a commercially available plating process using an acidic catalyst metal colloid solution may be used. Such a process is systematized and sold by, for example, Rohm & Haas Electronic Materials.
  • the plating catalyst G25 can be deposited on the surface of the resin film G23 and the surface of the circuit pattern G24.
  • the resin film G23 is removed from the insulating layer G20 (film removal step). That is, when the resin film G23 is made of a soluble resin, the resin film G23 is dissolved using an organic solvent or an alkaline solution and removed from the surface of the insulating layer G20. When the resin film G23 is made of a swellable resin, the resin film G23 is swollen using a predetermined liquid, and is peeled off from the surface of the insulating layer G20.
  • the plating catalyst G25 can remain only on the surface of the insulating layer G20 where the circuit pattern G24 is formed.
  • the plating catalyst G25 deposited on the surface of the resin film G23 is removed from the insulating layer G20 together with the resin film G23.
  • the resin film G23 collapses apart when removed from the insulating layer G20. It is preferable that the whole can be removed without being continuous.
  • the resin film G23 can be easily dissolved or removed from the insulating layer G20 without substantially decomposing or dissolving the circuit board G10, the insulating layer G20, and the plating catalyst G25. Any liquid that can be dissolved or swollen to the extent possible can be used without particular limitation.
  • a resin film removing liquid can be appropriately selected depending on the type and thickness of the resin film G23. Specifically, for example, when a photocurable epoxy resin is used as the resist resin, an organic solvent, a resist remover in an alkaline aqueous solution, or the like is used.
  • the resin film G23 is formed from an elastomer such as a diene elastomer, an acrylic elastomer, and a polyester elastomer, or as the resin film G23, (a) a polymerizable unsaturated group is included in the molecule. It is obtained by polymerizing at least one monomer of carboxylic acid or acid anhydride having at least one and at least one monomer that can be polymerized with (b) (a) monomer.
  • an elastomer such as a diene elastomer, an acrylic elastomer, and a polyester elastomer
  • a polymerizable unsaturated group is included in the molecule. It is obtained by polymerizing at least one monomer of carboxylic acid or acid anhydride having at least one and at least one monomer that can be polymerized with (b) (a) monomer.
  • aqueous alkali solution such as an aqueous sodium solution can be preferably used.
  • the resin film G23 has a swelling degree of 60% or less, preferably 40% or less under acidic conditions, It is formed of an elastomer such as a diene elastomer, an acrylic elastomer, and a polyester elastomer that has a degree of swelling of 50% or more under alkaline conditions, or (a) polymerizable in the molecule.
  • an elastomer such as a diene elastomer, an acrylic elastomer, and a polyester elastomer that has a degree of swelling of 50% or more under alkaline conditions, or (a) polymerizable in the molecule.
  • a resin film can be easily dissolved or swollen by immersing it in an alkaline aqueous solution having a pH of 11 to 14, preferably a pH of 12 to 14, such as an aqueous sodium hydroxide solution having a concentration of about 1 to 10%. Then, it is removed by dissolution or peeling.
  • Examples of the method of removing the resin film G23 include a method of immersing the insulating layer G20 coated with the resin film G23 in a resin film removal liquid for a predetermined time. Moreover, in order to improve dissolution removal property or peeling removal property, it is particularly preferable to irradiate ultrasonic waves during immersion. In addition, when it is difficult to remove or remove, for example, it may be peeled off with a light force as necessary.
  • Electroless plating is performed on the insulating layer G20 to form an electroless plating film on the portion of the circuit pattern G24 where the plating catalyst G25 remains and the exposed portion of the metal pillar G22.
  • a second electric circuit G26 is formed in the insulating layer G20.
  • the second circuit G26 of the insulating layer G20 and the first circuit G11 of the circuit board G10 are interlayer-connected via the metal pillar G22 (plating step).
  • an insulating layer G20 partially coated with a plating catalyst G25 is immersed in an electroless plating solution, and an electroless plated film is deposited only on a portion where the plating catalyst G25 is deposited. Such a method can be used.
  • Examples of the metal used for electroless plating include copper (Cu), nickel (Ni), cobalt (Co), aluminum (Al), and the like. Of these, plating mainly composed of Cu is preferable because of its excellent conductivity. Moreover, when Ni is included, it is preferable from the point which is excellent in corrosion resistance and adhesiveness with a solder.
  • the film thickness of the electroless plating film is not particularly limited. Specifically, for example, it is preferably about 0.1 to 10 ⁇ m, more preferably about 1 to 5 ⁇ m.
  • an electroless plating film is deposited only on the portion of the surface of the insulating layer G20 where the plating catalyst G25 remains. Therefore, the conductor layer can be formed with high precision only in the portion where the second circuit G26 is to be formed. On the other hand, it is possible to suppress the deposition of the electroless plating film on the portion where the circuit pattern G24 is not formed. Accordingly, even when a plurality of fine wirings G26a having a narrow line width and a narrow pitch are formed, an unnecessary plating film does not remain between the adjacent wirings G26a. Therefore, the occurrence of a short circuit and the occurrence of migration can be suppressed.
  • the electroless plating film can be deposited only on the laser-processed portion of the surface of the insulating layer G20.
  • a second circuit G26 is newly formed on the surface of the insulating layer G20, and the second circuit G26 of the insulating layer G20 and the first circuit G11 of the circuit board G10 are connected to the interlayer connection hole G21 or the metal pillar. Interlayer connection is made via G22.
  • the multilayer circuit board G1 having the second circuit G26 on the surface of the insulating layer G20 as shown in FIG. 19 is manufactured.
  • the electrical circuits G11, 26 and the interlayer connection hole G21 are connected to each other in each layer, and the electrical circuits G11, 26 in each layer are connected to each other via the interlayer connection hole G21. Interlayer connection.
  • the film thickness and depth of the second circuit G26 can be freely adjusted by adjusting the depth of the circuit pattern G24 with respect to the insulating layer G20.
  • the second circuit G26 can be formed in a deep portion of the insulating layer G20, or the plurality of second circuits G26 can be formed at positions having different depths. Further, by forming the second circuit G26 in a deep portion of the insulating layer G20, a thick circuit G26 can be formed.
  • a thick film circuit has a high cross-sectional area, and thus has high strength and electric capacity.
  • the interlayer connection hole G21 is filled in advance with the plating metal by the insulating layer forming step, the hole forming step, and the metal column forming step before the circuit pattern G24 is formed. Without worrying about excessive conductor formation in the circuit G26, the metal filling of the interlayer connection hole G21 can be sufficiently performed over time. In addition, since the circuit pattern G24 is not yet formed when the interlayer connection hole G21 is filled with metal, the plating film does not grow from the circuit pattern side, and good metal filling with suppressed generation of voids is achieved. Realize.
  • the conductor formation of the second circuit G26 is performed by an additive method by the film formation process, the circuit pattern formation process, the catalyst deposition process, the film removal process, and the plating process. Therefore, a fine conductor can be accurately formed in a short time, and excessive formation of the conductor in the second circuit G26 is avoided. As described above, even if the fine circuit pattern G24 and the interlayer connection hole G21 are mixed, the multilayer circuit board G1 can be manufactured without any problem by the build-up method while applying the additive method satisfactorily.
  • the circuit pattern G24 is formed so that the top of the metal column G22 protrudes from the bottom surface of the circuit pattern G24 (see FIG. 20F), and the top of the metal column G22 is formed.
  • the part of the second electric circuit G26 formed so as to cover is preferably used as an electrode pad part G26b (see FIG. 19).
  • the top part of the metal pillar G22 bites into the conductor layer of the pad part G26b, and the drop off of the pad part G26b from the insulating layer G20 is effectively suppressed by the anchor effect, and the pad part G26b that can sufficiently withstand the weight of the mounted component is obtained. Because.
  • the interlayer connection hole G21 can be filled with plating metal by growing a plating film from the exposed first electric circuit G11 by electroless plating in the metal column forming step. it can. Since the electric circuit G11 which is a conductor is used as a plating nucleus for electroless plating, the metal pillar G22 can be reasonably formed.
  • the plating catalyst G25 is coated on the surface of the insulating layer G20, the inner wall surface of the interlayer connection hole G21, and the exposed surface of the first electric circuit G11 in the metal column forming step.
  • the interlayer connection hole G21 is filled with a plating metal by performing electroplating, and then the outside of the insulating layer G20 including the surface of the insulating layer G20.
  • the plated metal deposited on the surface side may be removed. Since the electroless plating layer formed on the outer surface side of the insulating layer G20 including the surface of the insulating layer G20 is used as a power feeding layer necessary for electrolytic plating, the metal pillar G22 can be reasonably formed.
  • the resin film G23 is preferably a resin film that can be dissolved or removed from the insulating layer G20 by dissolving or swelling with a predetermined liquid.
  • the resin film G23 can be easily and satisfactorily removed or removed from the surface of the insulating layer G20. If the resin film G23 is destroyed when the resin film G23 is removed, the plating catalyst G25 deposited on the resin film G23 scatters, and the scattered plating catalyst G25 is re-deposited on the insulating layer G20 and is unnecessary in that portion. There is a problem that a thick plating film is formed. Since the resin film G23 can be easily and satisfactorily removed from the surface of the insulating layer G20, such a problem can be prevented.
  • the multilayer circuit board G1 manufactured by the manufacturing method of the present embodiment even when the fine circuit pattern G24 and the interlayer connection hole G21 are mixed, the metal filling of the interlayer connection hole G21 is sufficiently and satisfactorily performed. Thus, the connection between the circuits G11 and G26 and the interlayer connection hole G21 is good, and the formation of excessive conductors in the circuit portion is avoided, so that a multilayer circuit board G1 in which a short circuit or the like hardly occurs is obtained. Therefore, the multilayer circuit board G1 can be manufactured without any trouble by the build-up method while applying the additive method satisfactorily. As a result, the multilayer circuit board G1 on which the electric circuit G26 with high shape accuracy is formed is provided.
  • the multilayer circuit board G1 used for applications such as IC substrates, printed wiring boards for mobile phones, and three-dimensional circuit boards in which the width of the wiring G26a and the distance between the wirings G26a are narrow. Can be manufactured.
  • the fluorescent material is obtained by irradiating the surface to be inspected with ultraviolet light or near ultraviolet light after the above-described film removal step by adding a fluorescent material to the resin film G23.
  • the film removal failure can be inspected using the luminescence from
  • the resin film G23 When the resin film G23 remains between the metal wirings G26a, a plating film is formed in that portion, which may cause migration or short circuit.
  • the resin film G23 contains a fluorescent substance, and after the film removal step, the film removal surface is irradiated with a predetermined light emission source so that only the portion where the film G23 remains is emitted by the fluorescent substance. Thus, it is possible to inspect the presence or absence of film removal failure and the location of film removal failure.
  • the fluorescent substance that can be contained in the resin film G23 used in the inspection process is not particularly limited as long as it exhibits light emission characteristics when irradiated with light from a predetermined light source. Specific examples thereof include Fluoresceine, Eosine, Pyroline G, and the like.
  • the part where the light emission from the fluorescent substance is detected by this inspection process is the part where the resin film G23 remains. Therefore, by removing the portion where light emission is detected, it is possible to suppress the formation of a plating film on that portion. Thereby, generation
  • the metal column G22 is not grown to the height of the upper surface of the insulating layer G20 in the metal column forming step.
  • the metal pillar G22 is configured by growing a plating film up to a position which becomes the bottom surface of the circuit pattern G24. That is, the metal pillar G22 is not grown to the outer surface of the insulating layer G20, but is stopped at a height before that. Thereby, at the stage of the metal column forming process prior to the circuit pattern forming process, the top of the metal column G22 is easily exposed and prevented from protruding from the bottom surface of the circuit pattern G24. Then, as shown in FIG.
  • the circuit pattern G24 is formed so that the top of the metal pillar G22 is exposed from the bottom surface of the circuit pattern G24 and does not protrude.
  • FIG. 21I it is possible to avoid the conductor layer formed on the top of the metal pillar G22 from protruding from the upper surface (outer surface) of the insulating layer G20 in the plating step, and the circuit of the insulating layer G20. It is possible to eliminate or reduce the unevenness generated on the G26 forming surface. Therefore, even if the number of stacked layers increases, the unevenness generated on the circuit formation surface does not increase, and a fine circuit can be formed.
  • the metal column G22 is grown to the height of the top surface of the insulating layer G20 in the metal column forming step, the metal is formed to the position where it becomes the bottom surface of the circuit pattern G24.
  • the circuit pattern G24 is formed so that the top of the metal pillar G22 does not protrude from the bottom surface of the circuit pattern G24. It is also possible. Accordingly, it is possible to reliably achieve the correction of the position of the top of the metal column G22 so that the top of the metal column G22 does not protrude from the bottom surface of the circuit pattern G24.
  • the circuit pattern G24 is formed on the insulating layer G20. Not dug from the top. Instead, the bottom surface of the circuit pattern G24 is made to coincide with the top surface of the insulating layer G20. As a result, as shown in FIG. 22I, the second circuit G26 is placed on the upper surface of the insulating layer G20 in the plating step.
  • the present invention is such that even when the fine circuit pattern G24 and the interlayer connection hole G21 are mixed, the multilayer circuit board G1 can be manufactured without any trouble by the build-up method while applying the additive method satisfactorily. The features of are not affected at all.
  • Circuit board preparation process In the manufacturing method of the present embodiment, first, as shown in FIG. 25A, a circuit board G10 on which the first electric circuit G11 is formed is prepared (circuit board preparation step).
  • an insulating layer G20 is formed on the upper surface (circuit forming surface) of the circuit board G10 on which the first circuit G11 is formed (insulating layer forming step).
  • an interlayer connection hole G21 is formed in the insulating layer G20 by laser processing from the upper surface (outer surface) of the insulating layer G20 (hole forming step). At this time, the interlayer connection hole G21 reaches the first circuit G11 of the circuit board G10 and exposes the first circuit G11.
  • the interlayer connection hole G21 is filled with plating metal from the exposed first circuit G11 by electroless plating or electrolytic plating, and the metal column G22 is filled in the interlayer connection hole G21. (Metal pillar forming step).
  • the metal column G22 does not grow up to the height of the upper surface of the insulating layer G20.
  • the plated metal is filled up to a position that does not reach the position that becomes the bottom surface of the circuit pattern G24 formed in the circuit pattern forming step.
  • a resin film G23 is formed on the outer surface of the insulating layer G20 and the top of the metal column G22 (film formation process).
  • a circuit is formed by forming grooves and / or holes having a predetermined depth and a predetermined shape at least greater than the thickness of the resin film G23 from the upper surface (outer surface) of the resin film G23.
  • a pattern G24 is formed (circuit pattern forming step).
  • the circuit pattern G24 is formed by laser processing, cutting processing, embossing processing, or the like.
  • the resin film G23 remains on the metal pillar G22 in the circuit pattern forming process. That is, in the metal column forming step, the metal column G22 remains because it has not grown to a position that becomes the bottom surface of the circuit pattern G24. This remaining resin film G23 is removed in a subsequent film removal step. Thereby, in this circuit pattern formation process, circuit pattern G24 is formed so that the top part of metal pillar G22 may not protrude from the bottom of circuit pattern G24. Alternatively, in the circuit pattern forming step, the resin film G23 covering the metal pillar G22 may be removed until the top of the metal pillar G22 is exposed.
  • the resin film G23 is dug deeper than the bottom surface of the circuit pattern G24. Also in this circuit pattern forming step, the top of the metal pillar G22 does not protrude from the bottom surface of the circuit pattern G24, and the top of the metal pillar G22 is exposed at a position retracted from the bottom surface of the circuit pattern G24. Will be formed. Any of the fourth to fourth embodiments may be used.
  • a plating catalyst G25 is deposited on the surface of the resin film G23 and the surface of the circuit pattern G24 (catalyst deposition step).
  • Electroless plating is performed on the insulating layer G20 to form an electroless plating film on the portion of the circuit pattern G24 where the plating catalyst G25 remains and on the exposed portion of the metal pillar G22.
  • a second electric circuit G26 is formed in the insulating layer G20.
  • the plating catalyst G25 does not remain on the exposed portion of the metal column G22, an electroless plating film is formed and grows starting from the metal of the metal column G22.
  • the second circuit G26 of the insulating layer G20 and the first circuit G11 of the circuit board G10 are interlayer-connected via the metal pillar G22 (plating step).
  • the circuit pattern G24 is formed in the circuit pattern forming step so that the top of the metal pillar G22 does not protrude from the bottom surface of the circuit pattern G24. Further, in the film removal step, the resin film is removed so that the top of the metal pillar G22 is exposed at a position retracted from the bottom surface of the circuit pattern G24. As a result, as shown in FIG. 25I, it can be avoided that the conductor layer formed on the top of the metal column G22 protrudes from the outer surface of the insulating layer G20, and unevenness generated on the circuit G26 forming surface of the insulating layer G20. It can be eliminated or reduced.
  • the distance from the outer surface of the insulating layer G20 to the bottom surface of the circuit pattern G24 is d1
  • the metal pillar G22 from the bottom surface of the circuit pattern G24 0 ⁇ d2 ⁇ d1 ⁇ 30%, where d2 is the distance to the top of (i.e., the depth at which the top of the metal column G22 has receded from the bottom of the circuit pattern G24).
  • the distance from the outer surface of the insulating layer G20 to the bottom surface of the circuit pattern G24 is d1
  • the distance from the bottom surface of the circuit pattern G24 to the top of the metal pillar G22 (retreat depth). Since d ⁇ 2 is 0 ⁇ d2 ⁇ d1 ⁇ 30%, the receding depth d2 is smaller than the depth d1 of the circuit pattern G24. Therefore, the conductor formation of the circuit G26 portion and the metal filling of the interlayer connection hole G21 can be performed sufficiently satisfactorily, and the circuit G26 and the interlayer connection hole G21 can be sufficiently satisfactorily connected.
  • the width of the groove for the wiring G26a in the circuit pattern G24, the size of the hole for the electrode pad G26b, etc. instead of 0 ⁇ d2 ⁇ d1 ⁇ 30%, It may be 0 ⁇ d2 ⁇ d1 ⁇ 20%, 0 ⁇ d2 ⁇ d1 ⁇ 40%, or the like.
  • the top portion of the metal column G22 does not protrude from the bottom surface of the circuit pattern G24 in the circuit pattern forming step by filling the plating metal up to a position that does not reach the position that becomes the bottom surface of the circuit pattern G24.
  • the top of the metal pillar G22 is exposed at a position retracted from the bottom surface of the circuit pattern G24. Therefore, the metal pillar is formed at the stage of the metal pillar formation process before the circuit pattern formation process and the film removal process. It can be easily achieved that the top of G22 does not protrude from the bottom surface of the circuit pattern G24.
  • the top of the metal pillar G22 is the same height as the upper surface of the insulating layer G20 to the height exceeding the bottom surface of the circuit pattern G24.
  • the fourth and second embodiments are the case where the top of the metal column G22 is the same height as the bottom surface of the circuit pattern G24 (circuit pattern In the case where the top of the metal column G22 does not protrude from the bottom surface of the G24), the fourth to fourth embodiments are such that the top of the metal column G22 is lower than the bottom surface of the circuit pattern G24 (the metal from the bottom surface of the circuit pattern G24) This is a mode in which the top of the column G22 does not protrude.
  • the metal column G22 may have a truncated cone shape or a truncated pyramid shape.
  • FIG. 27C shows a case where an interlayer connection hole G21 having a shape in which the diameter on the upper surface side of the insulating layer G20 is larger than the diameter on the first circuit G11 side is formed in the (C) hole formation step of the 4-1 embodiment. Is shown. Therefore, as shown in FIG. 27E, when the resin film G23 is formed on the upper surface of the insulating layer G20 and the top of the metal column G22 in the (E) film forming process of the embodiment 4-1, the interlayer connection hole G21 is formed.
  • the metal column G22 filled in has a shape in which the diameter on the upper surface side of the insulating layer G20 is larger than the diameter on the first circuit G11 side. That is, the upper part of the metal column G22 has a larger diameter than the lower part.
  • the plating catalyst G25 is not deposited on the side surface of the metal column G22, and the electroless plating film is not deposited on the side surface of the metal column G22. That is, the side surface of the metal column G22 does not contact the second electric circuit G26, and the metal column G22 and the second electric circuit G26 may cause a connection failure.
  • FIG. 20I there is no problem if the electroless plating film deposited on the top surface of the metal column G22 and the electroless plating film deposited in the circuit pattern G24 are connected.
  • the metal column G22 protrudes from the bottom surface of the circuit pattern G24, it is preferable to avoid the metal column G22 having an upper portion larger than the lower portion.
  • the metal column G22 is grown to the height of the upper surface of the insulating layer G20, it is preferable to avoid the metal column G22 having an upper portion larger than the lower portion.
  • the metal pillar G22 is formed even if the upper part has a larger diameter than the lower part. There is no problem of poor connection between the second electric circuit G26 and the second electric circuit G26.
  • the present invention further relates to a circuit board formed by embedding a circuit layer made of a conductor.
  • a circuit board in which a circuit layer made of a conductor is embedded is formed by a CMP method (Chemical Mechanical Polish method) (for example, JP 2000-49162 A).
  • CMP method Chemical Mechanical Polish method
  • FIG. 33 shows an example of the CMP method.
  • the CMP method first, as shown in FIG. 33A, a circuit groove K3 (trench portion) is formed on the surface of the insulating base K1 by laser processing.
  • an electroless plating film K6 is formed on the entire surface of the insulating substrate K1 including the circuit groove K3.
  • voltage is applied to this electroless electroplating film K6, and the electroplating film K21 is formed in the whole surface of the insulating base material K1.
  • the polishing plate K22 is used to polish and remove portions of the electrolytic plating film K21 and the electroless plating film K6 that are present on the surface of the insulating base material K1, thereby removing the insulating base material K1. Expose the surface.
  • the circuit board K10 formed by embedding the circuit layer K13 can be obtained by the process as described above.
  • the distance between the circuit layers K13 can be set to be narrow, for example, about 25 ⁇ m to 30 ⁇ m, and a highly accurate circuit board K10 can be obtained. is there.
  • the surface of the insulating substrate K1 including the circuit groove K3 is plated, and the excess plating film is polished. Therefore, the surface of the circuit board K10 is roughened by polishing.
  • FIG. 34C since the polishing force exerted on the insulating base K1 and the plating film by the polisher K22 is different, the surface of the circuit layer K13 formed by removing the plating film and the insulating group There is a possibility that a step is formed on the surface of the material K1, the surface of the circuit board K10 is not smoothed, and the electrical characteristics are deteriorated.
  • the filler K11 when the insulating substrate K1 contains the filler K11, the filler K11 is exposed on the surface of the insulating substrate K1, and the exposed filler K11 is destroyed by polishing. Therefore, the filler K11 on the surface cannot maintain the original shape.
  • the exposed filler K11 has a high powder fall frequency and may cause contamination by the filler K11 in the subsequent process.
  • the surface of the insulating base K1 is polished, there is a risk that microcracks may occur starting from the filler K11 exposed on the surface.
  • the filler K11 exposed on the surface is destroyed, there is a possibility that the base material properties such as thermal expansion and strength are deteriorated.
  • a transfer method is known.
  • a release material having a circuit layer formed on the surface is bonded to the surface of the insulating base material with the circuit layer surface facing, the release material is peeled off from the insulating base material, and the circuit layer is transferred to the insulating base.
  • a circuit board is formed by embedding in a material.
  • the circuit layer is pressed and embedded from the surface of the insulating base material according to the transfer method, the circuit layer is formed in contact with the resin film on the outer surface of the insulating base material.
  • CZ treatment is known as a method for improving the adhesion, but the CZ treatment treats the surface of the metal foil (bottom surface of the circuit layer) provided on the release material, and the adhesion at the bottom surface of the circuit layer is Although it is enhanced, the adhesion on the side surface cannot be improved, so that a sufficient adhesion cannot be obtained when a narrow circuit layer is formed.
  • the depth of the circuit layer is generally uniform, and circuit layers having different depths cannot be easily formed.
  • in forming a circuit layer by a transfer method there is a limit to shortening the distance between circuit layers, and it is impossible to obtain a high-precision circuit wiring with a short distance between circuit layers.
  • the circuit formation can be performed by a conventional general circuit formation method such as a subtractive method or additive method. Since it is formed by a method or the like, it is difficult to form a fine wiring width of 30 ⁇ m or less. Even if fine wiring can be formed, if the adhesion between the release material and the circuit layer is too strong, the transfer cannot be transferred to the insulating base material, and a circuit transfer residue occurs. Moreover, when the adhesion between the release material and the circuit layer is too weak, the circuit layer is peeled off during the circuit formation process or handling.
  • the circuit is not formed on the insulating base material, but is formed by transferring the circuit formed beforehand on the release material onto both surfaces of the insulating substrate. It is difficult to align circuit patterns between layers, and it is difficult to align with high accuracy.
  • the present invention has been made in view of the above circumstances, and a highly accurate circuit board having high adhesiveness of a circuit layer without the filler being destroyed and exposed to the surface to deteriorate the base material characteristics. It is intended to provide.
  • the fifth embodiment of the present invention includes the following.
  • the circuit board is characterized in that the contact surface of the circuit layer with the insulating base material is formed in a concavo-convex shape following the protruding shape of the filler to the contact surface.
  • Item 5-2 Item 5. The circuit board according to Item 5-1, wherein the contact surface of the circuit layer with the insulating base material is in contact with at least a part of the filler protruding from the contact surface.
  • Item 5-3 The circuit board according to Item 5-1, wherein the exposed surface of the insulating base material has no exposed filler.
  • Item 5-4 The circuit according to any one of Items 5-1 to 5-3, wherein the contact surface of the insulating base material with the circuit layer is formed into a concavo-convex shape with a filler protruding by laser processing. substrate.
  • Item 5-5 The circuit board according to any one of Items 5-1 to 5-4, wherein the circuit layer is formed by plating a conductor.
  • Item 5-6 The circuit board according to any one of Items 5-1 to 5-5, wherein the exposed surface of the circuit layer is formed flat and has no step at the boundary with the insulating base material. .
  • the filler is filled in the insulating base material while maintaining the shape up to the surface. It is possible to prevent the base material properties such as thermal expansibility and strength from being deteriorated due to destruction.
  • the contact surface of the circuit layer with the insulating base material is formed in a concavo-convex shape following the protruding shape of the filler, the circuit layer is in contact with the concavo-convex shape so that the circuit layer It is possible to improve the adhesion between the insulating substrate and the insulating substrate.
  • the circuit layer since the circuit layer is in contact with the filler at the contact surface with the insulating base, the circuit layer is in direct contact with the inside of the insulating base without going through the resin layer.
  • the adhesion of the circuit layer can be further increased.
  • the circuit layer since the circuit layer is formed so as to be in contact with the filler on the bottom surface and the side surface, which are the embedded surfaces, it forms circuit wiring with high adhesion that does not drop off even when formed narrow. Therefore, a highly accurate circuit board can be obtained.
  • the filler since the exposed surface of the insulating base material does not expose the filler, the filler is not exposed. Can be prevented from occurring.
  • the contact surface with the circuit layer of the insulating base is formed by laser processing, the contact surface can be formed by projecting the filler, and the contact surface is formed in an uneven shape.
  • the adhesion can be improved.
  • the depth of the circuit layer can be easily set for each circuit layer by laser processing, and a circuit board having circuit layers having different depths can be easily obtained.
  • the circuit layer is formed by plating the conductor, whereby the circuit layer can be obtained by easily forming the uneven shape according to the shape of the insulating base material from which the filler protrudes. It is possible to easily obtain a highly accurate circuit board with high adhesion.
  • FIG. 28 is a cross-sectional view showing an example of an embodiment of the circuit board K10 of the present invention.
  • the circuit board K10 is formed by embedding a circuit layer K13 made of a conductor on the surface of an insulating base K1 formed of a resin containing a filler K11.
  • a filler K11 a filler having an appropriate shape can be used.
  • a spherical filler K11 is used.
  • the surface (exposed surface) of the circuit layer K13 is a flat surface. That is, the height T (depth) of the circuit layer K13 is substantially equal over the width W direction of the circuit layer. When the height T of the circuit layer K13 is substantially equal, the electrical characteristics can be enhanced. In the illustrated embodiment, there is no step between the surface of the circuit layer K13 and the surface of the insulating base K1. Thereby, the entire surface of the circuit board K10 is flat, and a thin and smooth circuit board K10 can be obtained.
  • the filler K11 is formed without being destroyed. That is, when formed by the CMP method, the filler K11 is broken and exposed as shown in FIG. 34 to form the insulating base K1, but in the illustrated circuit board K10, the insulating base K1 is exposed. The filler K11 existing in the vicinity of the surface exists without breaking and maintaining its shape. The exposed surface of the insulating base K1 does not expose the filler K11. Specifically, a surface resin layer K12 that does not contain the filler K11 is formed on the exposed surface of the insulating base K1.
  • the surface resin layer K12 does not contain the filler K11, is made of only a resin component, and is formed as a thin film so as to cover the entire surface of the insulating base K1.
  • the resin component is a component other than the filler K11 that forms the insulating substrate K1, and includes components such as a curing agent and a dispersant in addition to the resin, as will be described later.
  • the surface resin layer is a layer on the surface side (outer side) with respect to Y '.
  • the surface (contact surface with the insulating base material K1) embedded in the insulating base material K1 of the circuit layer K13 is formed in a concavo-convex shape following the protruding shape of the filler K11 to the contact surface. That is, the contact surface of the insulating substrate K1 with the circuit layer K13 is formed in an uneven shape in which the filler K11 is projected, and the uneven shape of the circuit layer K13 is formed following the uneven shape of the insulating substrate K1.
  • the contact surface of the insulating substrate K1 with the circuit layer K13 is formed in an uneven shape in which the filler K11 is projected, and the uneven shape of the circuit layer K13 is formed following the uneven shape of the insulating substrate K1.
  • the contact surface of the circuit layer K13 with the insulating base K1 may be in contact with the resin layer of the insulating base K1 that does not include the filler K11.
  • the circuit layer K13 is the circuit layer K13. Is in contact with the filler K11 protruding toward the contact surface. That is, the surface of the insulating base K1 that contacts the circuit layer K13 (exposed surface of the circuit groove K3 described later) is not provided with the surface resin layer K12, and the filler K11 is exposed.
  • a circuit layer K13 is formed in contact with K11.
  • the adhesion of the circuit layer K13 can be further increased.
  • the filler K11 that is in contact with the circuit layer K13 is preferably in contact with the filler K11 without breaking the filler K11.
  • the filler K11 is spherical, it is in contact with the circuit layer K13 with a hemispherical spherical surface protruding without being destroyed.
  • Adhesion can be further increased.
  • the circuit layer K13 is formed so as to be in contact with the filler K11 at the bottom surface and the side surface, which are the embedded surfaces. That is, in addition to the adhesion at the bottom, the adhesion at the side is increased. Accordingly, even when the circuit layer K13 is formed with a narrow width, the circuit layer K13 is in close contact with the side surface, so that it is possible to form the circuit layer K13 with high adhesion that does not fall off, and the width of the circuit layer K13. A highly accurate circuit board K10 having a narrow W can be obtained. In addition, the width between the circuit layers K13 can be reduced.
  • the circuit layer K13 can be formed narrowly.
  • the width (W) and height ( The ratio (W / T) to T) is preferably 0.1 to 30. That is, it is preferable that the circuit board K10 has the circuit layer K13 in which W / T falls within this range. Thereby, the width of the circuit layer K13 can be reduced, and a highly accurate circuit board K10 can be obtained. If W / T is smaller than this range, it may become impractical. On the other hand, if W / T is larger than this range, there is a risk that high precision (higher circuit density) cannot be achieved.
  • the circuit layer K13 can be formed as a solid electrode or the like, and in that case, the upper limit of (W / T) need not be set.
  • the circuit board K10 of the present invention high adhesion can be obtained regardless of the height T of the circuit layer K13. Therefore, the height T (depth) of the circuit layer K13 is easily set for each circuit layer K13. be able to. Therefore, it is possible to easily obtain the circuit board K10 having the circuit layer K13 having different depths.
  • the circuit board K10 can be a three-dimensional circuit board K60 as described later. That is, the present invention is not limited to the circuit board K10 in which the circuit layer K13 is formed on the planar insulating base K1. Specifically, if a three-dimensional insulating base K1 having a stepped three-dimensional surface is used as the insulating base K1, a circuit board provided with a circuit layer K13 with accurate wiring as shown in FIG. K10 (steric circuit board K60) can be obtained.
  • circuit board manufacturing method A method for manufacturing the circuit board K10 of the present invention will be described.
  • the circuit board K10 of the present invention has a coating forming step of forming a resin coating K2 on the surface of the insulating base K1, and a recess having a depth deeper than the thickness of the resin coating K2 with reference to the outer surface of the resin coating K2.
  • the manufacturing method is not limited to this method, but it is preferable to use this method to form the circuit board K10 as described above.
  • the electroless plating film K6 can be easily formed only on the portion where the plating catalyst or its precursor K5 is to remain, where the plating film is to be formed. can do.
  • the highly accurate circuit layer K13 can be easily formed on the surface of the insulating base K1. That is, the outline of the formed circuit can be maintained with high accuracy. As a result, for example, even when a plurality of circuits are formed at regular intervals, it is possible to suppress the remaining pieces of the electroless plating film between the circuits, and thus suppress the occurrence of short circuits and migration. . In addition, a circuit having a desired depth can be formed.
  • FIG. 29 is a schematic cross-sectional view for explaining each step in the method of manufacturing a circuit board as described above.
  • a resin coating K2 is formed on the surface of the insulating base K1. This process corresponds to a film forming process.
  • a recess having a depth deeper than the thickness of the resin coating K2 is formed on the basis of the outer surface of the resin coating K2, and the filler K11 is exposed on the surface to form a circuit.
  • a pattern portion is formed.
  • the filler K11 is exposed when the recess is deeper than the thickness of the resin coating K2.
  • the circuit pattern portion may be a circuit groove K3 in which the insulating base material K1 is dug, and if necessary, the insulating base material K1 may have a through hole as a part of the circuit groove K3. Drilling may be performed to form K4.
  • the circuit groove K3 defines a portion where an electroless plating film is formed by electroless plating, that is, a portion where the circuit layer K13 is formed. This step corresponds to a circuit pattern forming step. Hereinafter, the circuit pattern portion will be described focusing on the circuit groove K3.
  • a plating catalyst or its precursor K5 is deposited on the surface of the circuit groove K3 and the surface of the resin coating K2 where the circuit groove K3 is not formed. This step corresponds to a catalyst deposition step.
  • the resin coating K2 is removed from the insulating base K1.
  • the plating catalyst or its precursor K5 can remain only on the surface of the insulating substrate K1 where the circuit groove K3 is formed.
  • the plating catalyst or its precursor K5 deposited on the surface of the resin coating K2 is removed together with the resin coating K2 while being supported on the resin coating K2. This process corresponds to a film removal process.
  • electroless plating is applied to the insulating substrate K1 from which the resin coating K2 has been removed.
  • the electroless plating film K6 is formed only in the portion where the plating catalyst or its precursor K5 remains. That is, as shown in FIG. 29E, an electroless plating film K6 to be the circuit layer K13 is formed in the portion where the circuit groove K3 is formed.
  • the circuit layer K13 may be made of the electroless plating film K6, or the electroless plating film K6 is further subjected to electroless plating (fill-up plating) to make it thicker. It may be. Specifically, for example, as shown in FIG.
  • a circuit layer K13 made of an electroless plating film K6 is formed so as to fill the entire circuit groove K3 and the through hole K4, and the insulating base material K1 is formed. And the step of the circuit layer K13 may be eliminated. This process corresponds to a plating process.
  • the circuit board K10 as shown in FIG. 29E is formed by the above steps.
  • the circuit board K10 thus formed is obtained by forming the circuit layer K13 with high accuracy on the insulating base K1.
  • the film forming process is a process of forming the resin film K2 on the surface of the insulating base K1.
  • the insulating substrate K1 is not particularly limited as long as it is formed of a resin containing the filler K11 (resin substrate).
  • the resin can be used without particular limitation as long as it is a resin constituting various organic substrates that can be used in the manufacture of circuit boards.
  • epoxy resin acrylic resin, polycarbonate resin, polyimide resin, polyphenylene sulfide resin, polyphenylene ether resin, cyanate resin, benzoxazine resin, bismaleimide resin, and the like can be given.
  • the epoxy resin is not particularly limited as long as it is an epoxy resin constituting various organic substrates that can be used for manufacturing a circuit board.
  • bisphenol A type epoxy resin bisphenol F type epoxy resin, bisphenol S type epoxy resin, aralkyl epoxy resin, phenol novolac type epoxy resin, alkylphenol novolac type epoxy resin, biphenol type epoxy resin, naphthalene type epoxy resin , Dicyclopentadiene type epoxy resins, epoxidized products of condensates of phenols and aromatic aldehydes having a phenolic hydroxyl group, triglycidyl isocyanurate, alicyclic epoxy resins, and the like.
  • epoxy resin nitrogen-containing resin, and silicone-containing resin that are brominated or phosphorus-modified to impart flame retardancy are also included.
  • said epoxy resin and resin said each epoxy resin and resin may be used independently, and may be used in combination of 2 or more type.
  • a curing agent is generally contained in order to cure.
  • the curing agent is not particularly limited as long as it can be used as a curing agent. Specific examples include dicyandiamide, phenolic curing agents, acid anhydride curing agents, aminotriazine novolac curing agents, and cyanate resins.
  • curing agent a novolak type, an aralkyl type, a terpene type etc. are mentioned, for example.
  • curing agent said each hardening
  • phenolic curing agent examples include novolak type, aralkyl type, and terpene type. Further examples include phosphorus-modified phenolic resins or phosphorus-modified cyanate resins for imparting flame retardancy.
  • curing agent may be used independently, and may be used in combination of 2 or more type.
  • a resin or the like having good laser light absorption in the wavelength region of 100 nm to 400 nm because a circuit pattern is formed by laser processing is preferable to use.
  • a polyimide resin or the like can be given.
  • the said insulating base material K1 contains the filler K11.
  • the filler K11 may be inorganic fine particles or organic fine particles, and is not particularly limited. By containing the filler K11, it is possible to expose the filler K11 to the laser-processed portion without being broken, and to form an uneven surface by the protrusion of the filler K11, thereby improving the adhesion between the plating and the resin.
  • the material constituting the inorganic fine particles include aluminum oxide (Al 2 O 3 ), magnesium oxide (MgO), boron nitride (BN), aluminum nitride (AlN), silica (SiO 2 ), High dielectric constant fillers such as barium titanate (BaTiO 3 ) and titanium oxide (TiO 2 ); magnetic fillers such as hard ferrite; magnesium hydroxide (Mg (OH) 2 ), aluminum hydroxide (Al (OH) 2 ), Antimony trioxide (Sb 2 O 3 ), antimony pentoxide (Sb 2 O 5 ), guanidine salts, zinc borate, molybdate compounds, zinc stannate, and other inorganic flame retardants; talc (Mg 3 (Si 4 O 10) (OH) 2), barium sulfate (BaSO 4), calcium carbonate (CaCO 3), mica, and the like.
  • Al 2 O 3 magnesium oxide
  • MgO magnesium oxide
  • BN boro
  • the said inorganic fine particle may be used independently, and may be used in combination of 2 or more type. Since these inorganic fine particles have high thermal conductivity, relative dielectric constant, flame retardancy, particle size distribution, color tone freedom, etc., when selectively exerting a desired function, appropriate blending and particle size design should be performed. And high filling can be easily performed.
  • the inorganic fine particles may be surface-treated with a silane coupling agent in order to enhance dispersibility in the insulating base material.
  • the insulating base material may contain a silane coupling agent in order to increase the dispersibility of the inorganic fine particles in the insulating base material.
  • Specific examples of the silane coupling agent include epoxy silane, mercapto silane, amino silane, vinyl silane, styryl silane, methacryloxy silane, acryloxy silane, titanate silane couplings, and the like. Agents and the like.
  • the said silane coupling agent may be used independently, and may be used in combination of 2 or more type.
  • the insulating substrate K1 may contain a dispersant in order to improve the dispersibility of the inorganic fine particles in the insulating substrate.
  • a dispersant include alkyl ether-based, sorbitan ester-based, alkyl polyether amine-based, polymer-based dispersants, and the like.
  • the said dispersing agent may be used independently, and may be used in combination of 2 or more type.
  • organic fine particles include rubber fine particles.
  • the particle diameter of the filler K11 is preferably an average particle diameter equal to or less than the thickness of the insulating substrate K1, specifically, the average particle diameter is preferably 0.01 to 10 ⁇ m, and the average particle diameter is 0. More preferably, the thickness is from 05 to 5 ⁇ m.
  • the particle diameter of the filler K11 falls within this range, the surface resin layer K12 that does not contain the filler K11 can be easily formed on the surface of the insulating base K1, and the circuit groove in which the filler K11 is exposed. The adhesion of the circuit layer K13 at K3 is enhanced. If the average particle size of the filler K11 is smaller than the above range, the adhesion effect due to the protruding and recessed shape of the filler K11 may be reduced.
  • the average particle size of the filler K11 is larger than the above range, the filler K11 is fine. There is a possibility that the circuit groove K3 cannot be formed.
  • the average particle diameter can be measured by a light scattering method using a laser diffraction particle size distribution meter, and is obtained as a sphere equivalent diameter (number average diameter).
  • the shape of the filler K11 is not particularly limited, but a spherical one can be used. In addition, a filler K11 having a crushed shape or the like may be used. Among these, it is preferable to use a spherical filler.
  • the content of the filler K11 is preferably 10 to 95% by mass, more preferably 30 to 90% by mass, and 50 to 85% by mass with respect to the total amount of the resin base material K1 after curing. Is more preferable.
  • the thermal expansion of the resin base material K1 can be brought close to the thermal expansion of the formed conductor circuit. Board reliability can be improved.
  • the content of the filler K11 is lower than this range, the adhesion between the circuit layer K13 and the insulating base material K1 is deteriorated, the thermal expansion is increased, and the substrate reliability during heat may be reduced.
  • the content of the filler K11 is higher than this range, the filler K11 is exposed from the surface of the insulating base K1 or the fluidity is poor when the insulating base K1 is laminated with another base and molded. There is a risk of blurring.
  • the insulating substrate K1 is formed by appropriately molding a resin composition containing the above components.
  • a solvent may be added to the resin composition.
  • the surface resin layer K12 which does not contain the filler K11 can be formed on the surface of the insulating base material K1 by adjusting the shape after the insulating base material K1 is fluid and then curing. That is, since the resin composition has fluidity, the filler K11 is not directly exposed on the surface before being cured, and is embedded in the resin composition (layer other than the filler K11). Is formed on the surface of the uncured insulating base K1. And since the insulating base material K1 is formed by curing while maintaining this state, the surface resin layer K12 can be formed, and the filler K11 can be prevented from being exposed on the surface of the insulating base material K1. It is.
  • the formation of the surface resin layer K12 is confirmed by observing the surface of the insulating substrate K1 and not exposing the filler K11.
  • the surface resin layer K12 is removed by polishing, and the filler K11 close to the surface layer is also polished, so the filler K11 is polished.
  • the exposed state is observed by surface observation.
  • the form of the insulating base K1 is not particularly limited. Specifically, a sheet
  • the thickness of the insulating substrate K1 is not particularly limited. Specifically, in the case of sheets, films and prepregs, for example, the thickness is preferably 10 to 200 ⁇ m, more preferably about 20 to 100 ⁇ m.
  • the insulating base K1 may contain inorganic fine particles such as silica particles.
  • the resin coating K2 is not particularly limited as long as it can be removed by the coating removal step. Specifically, for example, a soluble resin that can be easily dissolved in an organic solvent or an alkaline solution, a swellable resin film made of a resin that can be swollen with a predetermined liquid (swelling liquid) described later, and the like. Among these, a swellable resin film is particularly preferable because accurate removal is easy. Moreover, as said swelling resin film, it is preferable that the swelling degree with respect to the said liquid (swelling liquid) is 50% or more, for example. By using a resin film having such a swelling degree, the resin film can be easily peeled from the insulating substrate. Therefore, the highly accurate circuit layer K13 can be easily formed on the surface of the insulating base K1.
  • the resin coating K2 has a high degree of swelling with respect to the liquid and includes those that dissolve in the liquid.
  • the swellable resin film is not limited to a resin film that does not substantially dissolve in the liquid (swelling liquid) and easily peels from the surface of the insulating base K1 due to swelling.
  • dissolution is also contained.
  • the method for forming the resin coating K2 is not particularly limited. Specifically, for example, it is formed by applying a liquid material capable of forming a resin film on the surface of the insulating base K1 and then drying, or by applying the liquid material to a support substrate and then drying it. And a method of transferring the resin film to be transferred onto the surface of the insulating base K1.
  • the method for applying the liquid material is not particularly limited. Specifically, for example, conventionally known spin coating method, bar coater method and the like can be mentioned.
  • the thickness of the resin coating K2 is preferably 10 ⁇ m or less and more preferably 5 ⁇ m or less from the viewpoint that a fine circuit can be formed with high accuracy.
  • the thickness of the resin coating K2 is preferably 0.1 ⁇ m or more, and more preferably 1 ⁇ m or more.
  • a resin film having a swelling degree of 50% or more with respect to the swelling liquid can be preferably used. Furthermore, a resin film having a swelling degree with respect to the swelling liquid of 100% or more is more preferable. In addition, when the said swelling degree is too low, there exists a tendency for a swelling resin film to become difficult to peel in the said film removal process.
  • the method for forming the swellable resin film is not particularly limited as long as it is the same as the method for forming the resin film K2 described above. Specifically, for example, a liquid material capable of forming a swellable resin film is applied to the surface of the insulating base K1 and then dried, or the liquid material is applied to a support substrate and then dried. And a method of transferring the swellable resin film formed by the method to the surface of the insulating substrate K1.
  • liquid material that can form the swellable resin film examples include an elastomer suspension or emulsion.
  • the elastomer include a diene elastomer such as a styrene-butadiene copolymer, an acrylic elastomer such as an acrylate ester copolymer, and a polyester elastomer. According to such an elastomer, the swellable resin film K2 having a desired degree of swelling can be easily formed by adjusting the degree of crosslinking or gelation of the elastomer resin particles dispersed as a suspension or emulsion.
  • the resin coating K2 is preferably a resin coating K2 formed by applying an elastomer suspension or emulsion to the surface of the insulating base K1 and then drying. If such a resin film K2 is used, a resin film can be easily formed on the surface of the insulating base K1. Therefore, the highly accurate circuit layer K13 can be easily formed on the surface of the insulating base K1.
  • the resin coating K2 is preferably a resin coating K2 formed by transferring the resin coating K2 formed on the support substrate to the surface of the insulating base K1.
  • the resin film used for the transfer is more preferably a resin film K2 formed by applying an elastomer suspension or emulsion to the surface of the support substrate and then drying.
  • Use of such a resin coating K2 is preferable from the viewpoint of excellent mass productivity because a large number of resin coatings K2 can be prepared in advance.
  • the elastomer is preferably selected from the group consisting of a diene elastomer, an acrylic elastomer, and a polyester elastomer having a carboxyl group.
  • the diene elastomer is more preferably a styrene-butadiene copolymer. According to such an elastomer, it is possible to easily form a resin film having a desired degree of swelling by adjusting the degree of crosslinking or the degree of gelation. In addition, the degree of swelling of the liquid used in the film removal step can be increased, and a resin film that dissolves in the liquid can be easily formed.
  • a film mainly composed of a resin composed of an acrylic resin having a carboxyl group with an acid equivalent of 100 to 800 is also preferably used.
  • the swellable resin film is particularly preferably a film whose degree of swelling changes depending on the pH of the swelling liquid.
  • the liquid condition in the catalyst deposition step is different from the liquid condition in the coating removal step, so that the swellable resin can be obtained at the pH in the catalyst deposition step.
  • the coating maintains high adhesion to the insulating substrate, and the swellable resin coating can be easily peeled off at the pH in the coating removal step.
  • the catalyst deposition step includes a step of treating in an acidic plating catalyst colloid solution (acid catalyst metal colloid solution) having a pH in the range of 1 to 3, for example, and the coating removal step has a pH of 12 to 12.
  • an acidic plating catalyst colloid solution acid catalyst metal colloid solution
  • the coating removal step has a pH of 12 to 12.
  • the step of swelling the swellable resin film in an alkaline solution in the range of 14 is provided, the swelling degree of the swellable resin film with respect to the acidic plating catalyst colloid solution is 60% or less, and further 40% or less.
  • the resin film preferably has a degree of swelling with respect to the alkaline solution of 50% or more, more preferably 100% or more, and even more preferably 500% or more.
  • Examples of such a swellable resin film include photocuring used for a sheet formed from an elastomer having a predetermined amount of carboxyl groups, a dry film resist (hereinafter also referred to as DFR) for patterning printed wiring boards, and the like. And a sheet obtained by curing the entire surface of a curable alkali-developing resist, and thermosetting or alkali-developing sheet.
  • the elastomer having a carboxyl group examples include diene elastomers such as a styrene-butadiene copolymer having a carboxyl group in the molecule by containing a monomer unit having a carboxyl group as a copolymerization component; acrylic acid Examples include acrylic elastomers such as ester copolymers; and polyester elastomers. According to such an elastomer, a swellable resin film having a desired alkali swelling degree can be formed by adjusting the acid equivalent, the degree of crosslinking or the degree of gelation of the elastomer dispersed as a suspension or emulsion. .
  • the carboxyl group in the elastomer swells the swellable resin film with respect to the alkaline aqueous solution and acts to peel the swellable resin film from the surface of the insulating substrate.
  • the acid equivalent is the polymer weight per equivalent of carboxyl groups.
  • the monomer unit having a carboxyl group examples include (meth) acrylic acid, fumaric acid, cinnamic acid, crotonic acid, itaconic acid, maleic anhydride, and the like.
  • the content ratio of the carboxyl group in the elastomer having such a carboxyl group is preferably 100 to 2000, more preferably 100 to 800 in terms of acid equivalent.
  • the acid equivalent is too small, the compatibility with the solvent or other composition tends to decrease, whereby the resistance to the plating pretreatment liquid tends to decrease.
  • an acid equivalent is too large, there exists a tendency for the peelability with respect to aqueous alkali solution to fall.
  • the molecular weight of the elastomer is preferably 10,000 to 1,000,000, more preferably 20,000 to 60,000.
  • the molecular weight of the elastomer is too large, the releasability tends to decrease, and when it is too small, the viscosity decreases, so that it is difficult to maintain a uniform thickness of the swellable resin film, and plating pretreatment The resistance to the liquid also tends to deteriorate.
  • the resin coating includes (a) at least one monomer of carboxylic acid or acid anhydride having at least one polymerizable unsaturated group in the molecule and (b) the monomer (a). And a polymer resin obtained by polymerizing at least one monomer that can be polymerized with or a resin composition containing the polymer resin. If such a resin film is used, a resin film can be easily formed on the surface of the insulating substrate K1. Therefore, a highly accurate circuit can be easily formed on the surface of the insulating base material K1. In addition, many of these resin films can be dissolved by the liquid used in the film removal step, and not only peeling and removal but also dissolution and removal can be used effectively.
  • the polymer resin may be an essential component as a main resin, and at least one of oligomers, monomers, fillers and other additives may be added.
  • a sheet of a resin composition can be used.
  • a dry film of a photopolymerizable resin composition as disclosed in JP 2000-231190 A, JP 2001-201851 A, and JP 11-212262 A is used. Sheets obtained by curing, and commercially available as an alkali development type DFR, for example, UFG series manufactured by Asahi Kasei Corporation can be mentioned.
  • a resin containing a carboxyl group and containing rosin as a main component for example, “NAZDAR229” manufactured by Yoshikawa Chemical Co., Ltd.
  • a resin containing phenol as a main component for example, LEKTRACHEM “104F”
  • the swellable resin film was formed on the surface of the insulating substrate by applying a resin suspension or emulsion using a conventionally known application method such as a spin coat method or a bar coater method, followed by drying or a support substrate. After the DFR is bonded to the surface of the insulating substrate using a vacuum laminator or the like, it can be easily formed by curing the entire surface.
  • examples of the resin film include the following.
  • the following are mentioned as a resist material which comprises the said resin film.
  • Properties required for the resist material constituting the resin coating include, for example, (1) resistance to a liquid (plating nucleation chemical) in which an insulating substrate on which the resin coating is formed is immersed in a catalyst deposition step described later. (2) The film coating process described later, for example, the resin film (resist) can be easily removed by the step of immersing the insulating base material on which the resin film is formed in alkali, and (3) High film formability. (4) easy dry film (DFR) formation, (5) high storage stability, and the like.
  • the plating nucleation chemical solution As the plating nucleation chemical solution, as will be described later, for example, in the case of an acidic Pd—Sn colloid catalyst system, all are acidic (pH 1-2) aqueous solutions.
  • the catalyst imparting activator is a weak alkali (pH 8 to 12), and the others are acidic. From the above, it is necessary to withstand pH 1 to 11, preferably pH 1 to 12, as the resistance to the plating nucleating solution. Note that being able to withstand is that when a sample on which a resist is formed is immersed in a chemical solution, swelling and dissolution of the resist are sufficiently suppressed, and the resist serves as a resist.
  • the immersion temperature is from room temperature to 60 ° C.
  • the immersion time is from 1 to 10 minutes
  • the resist film thickness is from about 1 to 10 ⁇ m, but is not limited thereto.
  • an aqueous NaOH solution or an aqueous sodium carbonate solution is common. Its pH is 11 to 14, and it is desirable that the resist film can be easily removed preferably at pH 12 to 14.
  • the concentration of the aqueous NaOH solution is about 1 to 10%
  • the processing temperature is room temperature to 50 ° C.
  • the processing time is 1 to 10 minutes
  • the immersion or spray treatment is generally performed, but is not limited thereto.
  • a resist is formed on an insulating material, film formability is also important. A uniform film formation without repelling or the like is necessary. Moreover, although it is made into a dry film for the simplification of a manufacturing process, reduction of material loss, etc., the flexibility of a film is required in order to ensure handling property. Also, a dry film resist is pasted on the insulating material with a laminator (roll, vacuum). The pasting temperature is room temperature to 160 ° C., and the pressure and time are arbitrary. Thus, adhesiveness is required at the time of pasting. For this reason, the resist formed into a dry film is generally used as a three-layer structure sandwiched by a carrier film and a cover film to prevent dust from adhering, but is not limited thereto.
  • Storability is best when it can be stored at room temperature, but it must be refrigerated or frozen. As described above, it is necessary to prevent the composition of the dry film from being separated at low temperatures or to be cracked due to a decrease in flexibility.
  • the resin composition of the resist material may include a main resin (binder resin) as an essential component, and at least one of oligomers, monomers, fillers, and other additives may be added.
  • a main resin binder resin
  • the main resin should be a linear polymer with thermoplastic properties. In order to control fluidity and crystallinity, it may be branched by grafting.
  • the molecular weight is about 1,000 to 500,000 in terms of number average molecular weight, preferably 5000 to 50,000. If the molecular weight is too small, the flexibility of the film and the resistance to the plating nucleation solution (acid resistance) tend to decrease. Moreover, when molecular weight is too large, there exists a tendency for the sticking property at the time of using alkali peelability or a dry film to worsen.
  • a crosslinking point may be introduced to improve resistance to plating nucleus chemicals, suppress thermal deformation during laser processing, and control flow.
  • composition of the main resin (a) a carboxylic acid or acid anhydride monomer having at least one polymerizable unsaturated group in the molecule and (b) (a) a monomer that can be polymerized with the monomer It is obtained by polymerizing.
  • known techniques include those described in JP-A-7-281437, JP-A-2000-231190, and JP-A-2001-201851.
  • Examples of (a) include, for example, (meth) acrylic acid, fumaric acid, cinnamic acid, crotonic acid, itaconic acid, maleic anhydride, maleic acid half ester, butyl acrylate, etc., alone or 2 More than one type may be combined.
  • Examples of (b) are generally non-acidic and have (one) polymerizable unsaturated group in the molecule, but are not limited thereto. It is selected so as to maintain various properties such as resistance in the plating process and flexibility of the cured film. Specifically, for example, methyl (meth) acrylate, ethyl (meth) acrylate, iso-propyl (meth) acrylate, n-butyl (meth) acrylate, sec-butyl (meth) acrylate, tert. -Butyl (meth) acrylate, 2-hydroxylethyl (meth) acrylate, 2-hydroxylpropyl (meth) acrylates and the like.
  • esters of vinyl alcohol such as vinyl acetate, (meth) acrylonitrile, styrene, or a polymerizable styrene derivative may be used. It can also be obtained by polymerization of only a carboxylic acid or acid anhydride having one polymerizable unsaturated group in the molecule.
  • a monomer having a plurality of unsaturated groups is selected as a monomer used in the polymer so that it can be three-dimensionally cross-linked, such as an epoxy group, a hydroxyl group, an amino group, an amide group, a vinyl group in the molecular skeleton. Reactive functional groups can be introduced.
  • the amount of the carboxyl group contained in the resin is preferably 100 to 2000, preferably 100 to 800, in terms of acid equivalent.
  • the acid equivalent means the weight of the polymer having 1 equivalent of a carboxyl group therein.
  • compatibility with a solvent or other composition is lowered or plating pretreatment solution resistance is lowered.
  • an acid equivalent is too high, there exists a tendency for peelability to fall.
  • the composition ratio of the monomer (a) is 5 to 70% by weight.
  • Any monomer or oligomer may be used as long as it is resistant to plating nucleation chemicals and can be easily removed with alkali.
  • DFR dry film
  • a plasticizer as a tackifier.
  • a crosslinking agent is added to increase various resistances. Specifically, for example, methyl (meth) acrylate, ethyl (meth) acrylate, iso-propyl (meth) acrylate, n-butyl (meth) acrylate, sec-butyl (meth) acrylate, tert.
  • esters of vinyl alcohol such as vinyl acetate, (meth) acrylonitrile, styrene, or a polymerizable styrene derivative are also included. It can also be obtained by polymerization of only a carboxylic acid or acid anhydride having one polymerizable unsaturated group in the molecule. Furthermore, a polyfunctional unsaturated compound may be included. Any of the above monomers or oligomers obtained by reacting the monomers may be used.
  • this monomer examples include, for example, 1,6-hexanediol di (meth) acrylate, 1,4-cyclohexanediol di (meth) acrylate, polypropylene glycol di (meth) acrylate, polyethylene glycol di (meth) acrylate, Polyoxyalkylene glycol di (meth) acrylate such as polyoxyethylene polyoxypropylene glycol di (meth) acrylate, 2-di (p-hydroxyphenyl) propane di (meth) acrylate, glycerol tri (meth) acrylate, dipentaerythritol penta (Meth) acrylate, trimethylolpropane triglycidyl ether tri (meth) acrylate, bisphenol A diglycidyl ether tri (meth) acrylate, 2,2-bis (4-methyl) Methacryloxy penta
  • a filler may be contained.
  • the filler is not particularly limited. Specifically, for example, silica, aluminum hydroxide, magnesium hydroxide, calcium carbonate, clay, kaolin, titanium oxide, barium sulfate, alumina, zinc oxide, talc, mica, glass, titanic acid. Examples include potassium, wollastonite, magnesium sulfate, aluminum borate, and an organic filler.
  • the resist thickness is generally as thin as 1 to 10 ⁇ m, it is preferable to have a small filler size. Although it is preferable to use a material having a small average particle size and cut coarse particles, the coarse particles can be crushed during dispersion or removed by filtration.
  • additives include, for example, photopolymerizable resins (photopolymerization initiators), polymerization inhibitors, colorants (dyes, pigments, coloring pigments), thermal polymerization initiators, and crosslinking agents such as epoxies and urethanes. Can be mentioned.
  • laser processing may be used, but in the case of laser processing, it is necessary to impart a laser ablation property to the resist material.
  • the laser processing machine for example, a carbon dioxide laser, an excimer laser, a UV-YAG laser, or the like is selected. These laser processing machines have various intrinsic wavelengths, and productivity can be improved by using a material having a high absorption rate for these wavelengths.
  • the UV-YAG laser is suitable for fine processing, and the laser wavelength is the third harmonic 355 nm and the fourth harmonic 266 nm. Therefore, it is desirable that the absorptance is high with respect to these wavelengths.
  • a material having a somewhat low absorption rate may be preferable.
  • the UV light transmits through the resist, so that energy can be concentrated on the underlying insulating layer processing. That is, since the advantages differ depending on the absorption rate of the laser beam, it is preferable to use a resist in which the absorption rate of the laser beam of the resist is adjusted according to the situation.
  • the circuit pattern forming step is a step of forming a circuit pattern portion such as a circuit groove K3 on the insulating base material K1.
  • the circuit pattern portion may be not only the circuit groove K3 but also the through hole K4.
  • the method for forming the circuit pattern portion is not particularly limited. Specifically, for example, the insulating base material K1 on which the resin coating K2 is formed, from the outer surface side of the resin coating K2, laser processing, machining processing such as dicing processing, and mechanical processing such as embossing processing, etc.
  • channel K3 of desired shape and depth by giving is mentioned.
  • laser processing the cutting depth or the like can be freely adjusted by changing the output of the laser or the like. That is, when the circuit pattern forming step is a step of forming a circuit pattern portion by laser processing, it is preferable because a finer circuit can be formed with high accuracy.
  • the cutting depth and the like can be easily adjusted by changing the laser output and the like, and thus the depth of the formed circuit groove K3 and the like can be easily adjusted. Further, by using laser processing, a through hole used for interlayer connection can be formed, or a capacitor can be embedded in the insulating base material K1.
  • the embossing for example, embossing with a fine resin mold used in the field of nanoimprinting can be preferably used.
  • the circuit pattern forming step is a step of forming a circuit pattern portion using a mold pressing method, it is preferable because the circuit pattern portion can be easily formed by stamping a mold.
  • a through hole K4 for forming a via hole or the like may be formed as a part of the circuit groove K3.
  • a through-hole that can be used for a via hole or an inner via hole can be formed when the circuit pattern portion is formed.
  • a via hole or an inner via hole is formed by electroless plating the formed through hole.
  • This step defines the shape of the circuit pattern portion such as the shape and depth of the circuit groove K3 and the diameter and position of the through hole K4. Further, the circuit pattern forming step may dig deeper than the thickness of the resin coating K2, may dig beyond the thickness of the resin coating K2, or may penetrate the insulating base K1. .
  • the filler K11 can be exposed on the exposed surface of the circuit groove K3 by this process.
  • the circuit groove K3 is formed by a method such as laser processing, the groove can be formed by projecting a part from the exposed surface of the circuit groove K3 while maintaining the shape of the filler K11 without destroying the filler K11.
  • the exposed surface of the circuit groove K3 is a surface formed by laser processing the inner layer of the insulating base K1, and the inner layer in which the filler K11 is dispersed is exposed to the outside.
  • the inside of the insulating base material K1 is applied to perform electroless plating.
  • the circuit layer K13 are in direct contact with each other, and adhesion can be improved.
  • the exposure of the filler K11 can be observed by surface observation.
  • the width of the circuit pattern portion such as the circuit groove K3 formed in the circuit pattern forming step is not particularly limited. When laser processing is used, a fine circuit having a line width of 20 ⁇ m or less can be easily formed. Therefore, it is preferable that the width of the circuit pattern portion has a portion of 20 ⁇ m or less because an antenna circuit or the like requiring fine processing can be formed. Further, the depth of the circuit groove K3 is the depth of the circuit layer K13 when a step is eliminated between the circuit layer K13 and the insulating base K1 by fill-up plating.
  • the catalyst deposition step is a step of depositing a plating catalyst or a precursor thereof on the surface of the circuit pattern portion such as the circuit groove K3 and the surface of the resin coating K2. At this time, when the through hole K4 is formed, the plating catalyst or its precursor is also applied to the inner wall surface of the through hole K4.
  • the plating catalyst or its precursor K5 is a catalyst applied to form an electroless plating film only in a portion where it is desired to form an electroless plating film by electroless plating in the plating treatment step.
  • Any plating catalyst can be used without particular limitation as long as it is known as a catalyst for electroless plating.
  • a plating catalyst precursor may be deposited in advance, and the plating catalyst may be generated after removing the resin film.
  • Specific examples of the plating catalyst include, for example, metal palladium (Pd), platinum (Pt), silver (Ag), etc., or a precursor that generates these.
  • Examples of the method of depositing the plating catalyst or its precursor K5 include a method of treating with an acidic Pd—Sn colloidal solution treated under acidic conditions of pH 1 to 3 and then treating with an acidic solution. It is done. Specific examples include the following methods.
  • the oil adhering to the surface of the insulating base material K1 in which the circuit groove K3 and the through hole K4 are formed is washed with hot water in a surfactant solution (cleaner / conditioner) for a predetermined time.
  • a surfactant solution cleaning / conditioner
  • a soft etching treatment is performed with a sodium persulfate-sulfuric acid based soft etching agent.
  • an acidic solution such as a sulfuric acid aqueous solution or a hydrochloric acid aqueous solution having a pH of 1 to 2.
  • a pre-dip treatment is performed in which a chloride ion is adsorbed on the surface of the insulating substrate K1 by immersing in a pre-dip solution mainly composed of a stannous chloride aqueous solution having a concentration of about 0.1%.
  • Pd and Sn are aggregated and adsorbed by further dipping in an acidic plating catalyst colloidal solution such as acidic Pd—Sn colloid having a pH of 1 to 3 containing stannous chloride and palladium chloride.
  • an oxidation-reduction reaction SnCl 2 + PdCl 2 ⁇ SnCl 4 + Pd ⁇
  • the metal palladium which is a plating catalyst precipitates.
  • the acidic plating catalyst colloid solution a known acidic Pd—Sn colloid catalyst solution or the like can be used, and a commercially available plating process using an acidic plating catalyst colloid solution may be used. Such a process is systematized and sold by Rohm & Haas Electronic Materials Co., Ltd., for example.
  • the catalyst deposition step includes a step of treating in an acidic catalyst metal colloid solution, the predetermined liquid in the coating removal step is an alkaline solution, and the resin coating swells with respect to the acidic catalyst metal colloid solution.
  • the degree is preferably 60% or less, and the degree of swelling with respect to the alkaline solution is preferably 50% or more.
  • the resin film is hardly peeled off in the catalyst deposition process treated under acidic conditions, and is easily peeled off in the film removal process treated with an alkaline solution after the catalyst deposition process. Therefore, the resin coating is selectively peeled off in the coating removal step. Accordingly, the portion where the electroless plating film is not formed can be accurately protected in the catalyst deposition step, and the resin coating can be easily peeled off in the coating removal step after deposition of the plating catalyst or its precursor. For this reason, more accurate circuit formation becomes possible.
  • the plating catalyst or its precursor K5 can be deposited on the surface of the circuit groove K3, the inner wall surface of the through hole K4, and the surface of the resin coating K2.
  • the coating removal step is a step of removing the resin coating K2 from the insulating base material K1 subjected to the catalyst deposition step.
  • the method for removing the resin coating K2 is not particularly limited. Specifically, for example, after the resin film K2 is swollen with a predetermined solution (swelling liquid), the resin film K2 is peeled off from the insulating substrate K1, or the resin with a predetermined solution (swelling liquid). A method in which the resin film K2 is exfoliated from the insulating substrate K1 after the film K2 is swollen and further partially dissolved, and a method in which the resin film K2 is dissolved and removed with a predetermined solution (swelling liquid) Etc.
  • the swelling liquid is not particularly limited as long as it can swell the resin coating K2.
  • the swelling or dissolution is performed by immersing the insulating base material K1 coated with the resin coating K2 in the swelling liquid for a predetermined time. And removal efficiency may be improved by irradiating with ultrasonic waves during the immersion. In addition, when it swells and peels, you may peel off with a light force.
  • the resin film K2 is peeled off from the insulating substrate K1. It is preferable that it is a process to perform. According to such a manufacturing method, the resin film can be easily peeled from the insulating base material. Therefore, a highly accurate circuit can be more easily formed on the insulating base material.
  • the coating removal step is a step of dissolving and removing the resin coating with a predetermined liquid. According to such a manufacturing method, the resin film can be easily removed from the insulating base material. Therefore, a highly accurate circuit can be more easily formed on the insulating base material.
  • the swellable resin film K2 can be used without substantially decomposing or dissolving the insulating base material K1 and the plating catalyst or its precursor K5. Any liquid that can be swollen or dissolved can be used without particular limitation. Moreover, the liquid which can swell so that the said swellable resin film K2 can be peeled easily is preferable. Such a swelling liquid can be appropriately selected depending on the type and thickness of the swellable resin coating K2.
  • the swelling resin film is an elastomer such as a diene elastomer, an acrylic elastomer, and a polyester elastomer, or (a) a carboxylic acid or an acid having at least one polymerizable unsaturated group in the molecule.
  • a polymer resin obtained by polymerizing at least one monomer of an anhydride and (b) at least one monomer that can be polymerized with the monomer (a) or the polymer resin In the case where the resin composition is formed from a carboxyl group-containing acrylic resin, an alkaline aqueous solution such as a sodium hydroxide aqueous solution having a concentration of about 1 to 10% can be preferably used.
  • the swelling resin film K2 has a swelling degree of 60% or less, preferably 40% or less under acidic conditions.
  • the degree of swelling is 50% or more under alkaline conditions
  • elastomers such as diene elastomers, acrylic elastomers, and polyester elastomers, (a) at least one polymerizable unsaturated group in the molecule
  • Polymer resin obtained by polymerizing at least one monomer of carboxylic acid or acid anhydride having at least one monomer and (b) at least one monomer that can be polymerized with monomer
  • it is preferably formed from a resin composition containing the polymer resin and a carboxyl group-containing acrylic resin.
  • Such a swellable resin film easily swells and peels off with an alkaline aqueous solution having a pH of 12 to 14, for example, a sodium hydroxide aqueous solution having a concentration of about 1 to 10%.
  • an alkaline aqueous solution having a pH of 12 to 14 for example, a sodium hydroxide aqueous solution having a concentration of about 1 to 10%.
  • Examples of the method for swelling the swellable resin film K2 include a method of immersing the insulating base material K1 coated with the swellable resin film K2 in a swelling solution for a predetermined time. Moreover, in order to improve peelability, it is particularly preferable to irradiate with ultrasonic waves during immersion. In addition, when not peeling only by swelling, you may peel off with a light force as needed.
  • the plating process is a process of performing an electroless plating process on the insulating base K1 after the resin coating K2 is removed.
  • an insulating substrate K1 partially coated with a plating catalyst or its precursor K5 is immersed in an electroless plating solution, and the plating catalyst or its precursor K5 is applied.
  • a method of depositing an electroless plating film (plating layer) only on the portion may be used.
  • Examples of the metal used for electroless plating include copper (Cu), nickel (Ni), cobalt (Co), and aluminum (Al).
  • the plating which has Cu as a main component is preferable from the point which is excellent in electroconductivity.
  • Ni is included, it is preferable from the point which is excellent in corrosion resistance and adhesiveness with a solder.
  • the film thickness of the electroless plating film K6 is not particularly limited. Specifically, for example, it is preferably about 0.1 to 10 ⁇ m, more preferably about 1 to 5 ⁇ m. In particular, by increasing the depth of the circuit groove K3, it is possible to easily form a metal wiring having a large thickness and a large cross-sectional area. In this case, it is preferable because the strength of the metal wiring can be improved.
  • the electroless plating film K6 is deposited only on the portion where the plating catalyst or its precursor K5 remains on the surface of the insulating base K1. Therefore, it is possible to accurately form the conductive layer only in the portion where the circuit pattern portion is desired to be formed. On the other hand, the deposition of the electroless plating film on the portion where the circuit pattern portion is not formed can be suppressed. Therefore, even when a plurality of fine circuits having a narrow line width with a narrow pitch interval are formed, an unnecessary plating film does not remain between adjacent circuits. Therefore, the occurrence of a short circuit and the occurrence of migration can be suppressed.
  • the circuit layer K13 is a conductor layer composed of the plating catalyst or its precursor K5 and the electroless plating film K6. Since the circuit layer K13 is formed by the process as described above, the bottom surface and the side surface in which the circuit layer K13 is embedded are in contact with the filler K11 without passing through other layers to form the circuit layer K13. Sex is obtained. In the illustrated embodiment, there is no step on the surface of the circuit layer K13 and the insulating base K1, but the circuit layer K13 is formed so as to protrude from the insulating base K1, and a part of the circuit layer K13 is insulated. It may be embedded in the material K1.
  • the resin coating K2 contains a fluorescent substance, and after the coating removal process, an inspection process for inspecting defective film removal using light emitted from the fluorescent substance. May be further provided. That is, by including a fluorescent substance in the resin film K2, the film removal failure is caused by using light emitted from the fluorescent substance by irradiating the surface to be inspected with ultraviolet light or near ultraviolet light after the film removal step. It is possible to inspect the presence or absence of the film and the location where the film removal is defective.
  • the circuit layer K13 having an extremely narrow line width and line interval can be formed.
  • the resin film that should originally be removed is completely between the adjacent circuit pattern portions. There is also a concern that it cannot be removed and remains slightly. There is also a concern that the resin film fragments removed during the formation of the circuit pattern portion may enter and remain in the formed circuit pattern portion.
  • the electroless plating film K6 is formed in the portion, which may cause migration or short circuit.
  • a piece of the resin film K2 remains in the formed circuit pattern portion, it may cause a heat resistance failure and a propagation loss of the circuit layer K13.
  • the resin film is made to contain a fluorescent substance as described above, and after the film removal step, only a portion where the resin film remains by irradiating a predetermined light source on the surface from which the film has been removed. By emitting light with the fluorescent substance, it is possible to inspect the presence or absence of the film removal failure or the location of the film removal failure.
  • the circuit layer K13 having an extremely narrow line width and line interval is formed, between adjacent circuit wirings K8 formed on the surface of the insulating base K1.
  • the resin coating remains without being completely removed.
  • the electroless plating film K6 is formed in that portion, which may cause migration or a short circuit. Even in such a case, if the inspection step is provided, it is possible to inspect the presence / absence of a film removal failure and the location of the film removal failure.
  • FIG. 30 is an explanatory diagram for explaining an inspection process for inspecting defective film removal using light emission from the fluorescent substance by adding a fluorescent substance to the resin film.
  • the fluorescent substance that can be contained in the resin coating K2 used in the inspection step is not particularly limited as long as it exhibits light emission characteristics when irradiated with light from a predetermined light source. Specific examples thereof include Fluoresceine, Eosine, Pyroline G, and the like.
  • the part where light emission from the fluorescent substance is detected by this inspection process is the part where the residue K2a of the resin coating K2 remains. Therefore, by removing the portion where luminescence is detected, it is possible to suppress the formation of an electroless plating film on that portion. Thereby, generation
  • ⁇ Desmear treatment process> in the manufacturing method of the circuit board K10, after performing the said plating process process, specifically, before performing a fill-up plating, or after performing, you may further provide the desmear process process which performs a desmear process.
  • desmear treatment unnecessary resin adhered to the electroless plating film can be removed.
  • the surface of the insulating base material where the electroless plating film is not formed is roughened, and the adhesion with the upper layer of the circuit board is improved. Can be improved.
  • a desmear process may be performed on the via bottom. By doing so, unnecessary resin adhered to the via bottom can be removed.
  • a well-known desmear process can be used. Specifically, the process etc. which are immersed in a permanganic acid solution etc. are mentioned, for example.
  • circuit board K10 as shown in FIG. 29 (E) is formed.
  • a circuit layer K13 made of an electroless plating film K6 is formed in a deep portion of the insulating base K1 as shown in FIG. Can be formed.
  • a circuit can be formed at positions (electroless plating films K6a to 6d in the drawing) having different depths between a plurality of conductive layers.
  • the plating process is stopped in the middle of the circuit groove K3, and the electroless plating film K6 has the same thickness.
  • the electroless plating film K6 is formed on the bottom and side surfaces of the circuit groove K3.
  • a circuit layer K13 is formed so as to embed the circuit groove K3 by electroless plating. (Electroless plating films K6e to 6h in the figure).
  • electroless plating films K6e to 6h in the figure Electroless plating films K6e to 6h in the figure.
  • the depth of the circuit groove K3 can be set for each circuit layer K13, the circuit layer K13 having a different depth (height T) can be easily obtained.
  • FIG. 32 is a schematic cross-sectional view for explaining each step of manufacturing the three-dimensional circuit board K60.
  • the insulating base material K1 has a stepped surface formed in a step shape, and the surface of the insulating base material K1 is the stepped surface. That is, the insulating base material K1 has a step surface formed in a step shape, and the coating film forming step, the circuit pattern forming step, the catalyst deposition step, the coating film removing step, and the plating treatment are formed on the step surface. It is also preferable to manufacture the three-dimensional circuit board K60 by performing the process. According to such a manufacturing method, the circuit layer K13 that can overcome the step can be easily formed.
  • a resin coating K2 is formed on the surface of a three-dimensional insulating substrate K51 having a stepped portion. This process corresponds to a film forming process.
  • the three-dimensional insulating substrate K51 various resin molded bodies that can be used for manufacturing a three-dimensional circuit board known in the past can be used without any particular limitation. It is preferable from the viewpoint of production efficiency that such a molded body is obtained by injection molding.
  • the resin material for obtaining the resin molding include, for example, polycarbonate resin, polyamide resin, various polyester resins, polyimide resin, polyphenylene sulfide resin, polyphenylene ether resin, cyanate resin, benzoxazine resin, bismaleimide resin, and the like. Can be mentioned.
  • the filler K11 is contained in the resin molding. In FIG. 32, the filler K11 is omitted.
  • the method for forming the resin coating K2 is not particularly limited. Specifically, for example, the same formation method as in the case of the planar circuit board K10 may be used.
  • a circuit pattern portion such as a circuit groove K3 having a depth deeper than the thickness of the resin coating K2 is formed on the basis of the outer surface of the resin coating K2.
  • the method for forming the circuit pattern portion is not particularly limited. Specifically, for example, the same formation method as that for the circuit board K10 may be used.
  • the circuit pattern portion such as the circuit groove K3 defines a portion where the electroless plating film is formed by electroless plating, that is, a portion where the circuit layer K13 is formed. This step corresponds to a circuit pattern forming step.
  • a plating catalyst or its precursor K5 is coated on the surface of the circuit pattern portion such as the circuit groove K3 and the surface of the resin coating K2 where the circuit pattern portion is not formed.
  • the method for depositing the plating catalyst or its precursor K5 is not particularly limited. Specifically, for example, the same method as in the case of the circuit board K10 may be used.
  • This step corresponds to a catalyst deposition step. With such a catalyst deposition process, as shown in FIG. 32C, the plating catalyst or its precursor K5 can be deposited on the surface of the circuit pattern portion such as the circuit groove K3 and the surface of the resin coating K2. it can.
  • the resin coating K2 is removed from the three-dimensional insulating substrate K51.
  • the plating catalyst or its precursor K5 can remain only on the surface of the portion where the circuit pattern portion such as the circuit groove K3 of the three-dimensional insulating substrate K51 is formed.
  • the plating catalyst or its precursor K5 deposited on the surface of the resin coating K2 is removed together with the resin coating K2 while being supported on the resin coating K2.
  • the method for removing the resin coating K2 is not particularly limited. Specifically, for example, the same method as in the case of the circuit board K10 may be used. This process corresponds to a film removal process.
  • electroless plating is applied to the three-dimensional insulating substrate K51 from which the resin coating K2 has been removed.
  • the electroless plating film K6 is formed only in the portion where the plating catalyst or its precursor K5 remains. That is, the electroless plating film K6 that becomes the circuit layer K13 is formed in the portion where the circuit groove K3 and the through hole K4 are formed.
  • the method for forming the electroless plating film K6 is not particularly limited. Specifically, for example, the same formation method as that for the circuit board K10 may be used. This process corresponds to a plating process.
  • a three-dimensional circuit board K60 in which a circuit layer K13 is formed on a three-dimensional solid insulating base K51 as shown in FIG. 32E is formed as a circuit board K10.
  • the three-dimensional circuit board K60 formed in this way can form circuit wiring with high accuracy even if the line width and line interval of the circuit layer K13 formed on the insulating base K1 are narrow.
  • the molded circuit board K60 formed in this way is also accurately and easily formed on the surface of the board having the stepped portion.
  • the present invention relates to a circuit board comprising further insulating layers, electrical circuits and vias.
  • a circuit groove in the insulating layer 1 is recently used by utilizing a CMP (Chemical Mechanical Polish) method (see Japanese Patent Application Laid-Open No. 2000-49162), which has been used in the manufacture of semiconductor devices in recent years.
  • CMP Chemical Mechanical Polish
  • the formation of an electric circuit 2 in 4 is being studied.
  • the smear L11 is removed as shown in FIG.
  • the surface side of the insulating layer L1 is roughened to improve plating adhesion.
  • an electroless plating film L10 is formed by performing electroless plating on the surface side of the insulating layer L1.
  • an electroplating process is performed on the upper surface of the electroless plating film L10 to deposit a plating layer.
  • the via L3 is formed by the plating layer deposited in the through hole L5
  • the second electric circuit L2 is formed by the plating layer deposited in the circuit groove L4.
  • the plating layer is further deposited so as to cover the entire surface of the insulating layer L1.
  • the plating layer on the surface side of the insulating layer L1 is polished and removed by CMP. As a result, the surface of the insulating layer L1 and the surface of the second electric circuit L2 are exposed to the outside.
  • the present invention has been made in view of the above points, and provides a circuit board capable of reducing transmission loss of an electric circuit provided in a circuit groove of an insulating layer and connected to a via. Objective.
  • the circuit board according to the present invention includes an insulating layer L1, an electric circuit L2 and a via L3 provided in the insulating layer L1, and the insulating layer L1 has a circuit groove L4 and a communication hole communicating with the circuit groove L4. Hole L5 is formed, the electric circuit L2 is provided in the circuit groove L4, the via L3 is provided in the through hole L5, and the surface roughness of the inner surface of the circuit groove L4 is It is characterized by being smaller than the surface roughness of the inner surface of the through hole L5.
  • the ratio of the surface roughness of the inner surface of the through hole to the surface roughness of the inner surface of the circuit groove is 1.05 to 200. It is preferable that it is the range of these.
  • the inner surface of the circuit groove L4 preferably has a surface roughness (arithmetic average roughness) Ra defined by JIS B0601: 2001 in the range of 0.01 to 0.5 ⁇ m.
  • the surface roughness (arithmetic mean roughness) Ra defined by JIS B0601: 2001 on the inner surface of the through hole L5 is preferably in the range of 0.5 to 2 ⁇ m.
  • the sixth embodiment of the present invention includes the following.
  • Item 6-1 An insulating layer; and an electric circuit and a via provided in the insulating layer.
  • the insulating layer includes a circuit groove and a through hole communicating with the circuit groove, and the electric circuit is formed in the circuit groove.
  • Item 6-2 The ratio of the surface roughness of the inner surface of the through hole to the surface roughness of the inner surface of the circuit groove (the surface roughness of the inner surface of the through hole / the surface roughness of the inner surface of the circuit groove) is in the range of 1.05 to 200.
  • Item 6. The circuit board according to Item 6-1.
  • Item 6-3 The circuit board according to Item 6-1 or 6-2, wherein the inner surface of the circuit groove has a surface roughness Ra defined by JIS B0601: 2001 in a range of 0.01 to 0.5 ⁇ m.
  • Item 6-4 Item 6-1 to Item 6-3, wherein the inner surface of the through hole has a surface roughness Ra defined by JIS B0601: 2001 in a range of 0.5 to 2 ⁇ m. Circuit board.
  • the interface between the circuit groove and the electric circuit inside the circuit groove is smoothed, so that transmission loss in the electric circuit is reduced. Can be reduced.
  • FIG. 35 shows an example of the configuration of the circuit board according to the present invention.
  • This circuit board has a configuration in which a first insulating layer L6, a first electric circuit L7, an insulating layer L1 (second insulating layer L1), and an electric circuit L2 (second electric circuit L2) are sequentially stacked.
  • the upper surface of the first insulating layer L6 is formed flat, and the second electric circuit L2 is laminated on the upper surface of the first insulating layer L6.
  • the second insulating layer L1 is laminated on the upper surface of the first insulating layer L6 so as to be in contact with the first insulating layer L6. For this reason, the first electric circuit L7 is embedded in the second insulating layer L1.
  • a circuit groove L4 is formed on the upper surface of the second insulating layer L1, and a second electric circuit L2 is provided in the circuit groove L4.
  • the second insulating layer L1 is formed with a through hole L5 that communicates the first electric circuit L7 and the second electric circuit L2, and the first electric circuit L7 and the second electric circuit L2 are formed in the through hole L5.
  • a conductive via L3 is provided.
  • the surface roughness of the inner surface of the circuit groove L4 is smaller than the surface roughness of the inner surface of the through hole L5. For this reason, the smoothness of the interface between the inner surface of the circuit groove L4 and the second electric circuit L2 provided in the circuit groove L4 is increased, thereby reducing the transmission loss in the second electric circuit L2. Become.
  • the surface roughness of the inner surface of the circuit groove L4 is preferably in the range of 0.01 to 0.5 ⁇ m, preferably 0.05 to 0.4 ⁇ m. If it is the range, it is still more preferable. Thus, since the surface roughness of the inner surface of the circuit groove L4 is 0.5 ⁇ m or less, particularly 0.4 ⁇ m or less, the interface between the inner surface of the circuit groove L4 and the second electric circuit L2 is sufficiently smooth. The transmission loss is significantly reduced.
  • the surface roughness of the inner surface of the through hole L5 is preferably in the range of 0.5 to 2 ⁇ m, more preferably in the range of 0.5 to 1.5 ⁇ m. In this case, the adhesion between the conductor (plating layer) constituting the via L3 and the second insulating layer L1 on the inner surface of the through hole L5 is improved, leading to an improvement in the reliability of the circuit board.
  • the ratio of the surface roughness of the inner surface of the through hole L5 to the inner surface of the circuit groove L4 is 1.05 to The range is preferably 200, more preferably 1.2 to 50.
  • Such a circuit board can be appropriately manufactured by a method.
  • an example of a method of manufacturing this circuit board will be shown.
  • First production method 36 and 37 show a first method for manufacturing a circuit board. A first manufacturing method of this circuit board will be described.
  • the first insulating layer L6 is not particularly limited as long as it can be used for manufacturing a circuit board. Specifically, for example, it is formed of a resin base material containing a resin.
  • organic substrates that can be used for manufacturing a circuit board, for example, a multilayer circuit board, can be used without any particular limitation.
  • organic substrates include those conventionally used in the production of multilayer circuit boards, such as epoxy resins, acrylic resins, polycarbonate resins, polyimide resins, polyphenylene sulfide resins, polyphenylene ether resins, cyanate resins, benzoxazine resins, bis Examples include a substrate made of maleimide resin or the like.
  • the epoxy resin is not particularly limited as long as it is an epoxy resin constituting various organic substrates that can be used for manufacturing a circuit board.
  • bisphenol A type epoxy resin bisphenol F type epoxy resin, bisphenol S type epoxy resin, aralkyl epoxy resin, phenol novolac type epoxy resin, alkylphenol novolac type epoxy resin, biphenol type epoxy resin, naphthalene type epoxy resin , Dicyclopentadiene type epoxy resins, epoxidized products of condensates of phenols and aromatic aldehydes having a phenolic hydroxyl group, triglycidyl isocyanurate, alicyclic epoxy resins, and the like.
  • epoxy resin nitrogen-containing resin, and silicone-containing resin that are brominated or phosphorus-modified to impart flame retardancy are also included.
  • said epoxy resin and resin said each epoxy resin and resin may be used independently, and may be used in combination of 2 or more type.
  • a curing agent is contained for curing.
  • the curing agent is not particularly limited as long as it can be used as a curing agent. Specific examples include dicyandiamide, phenolic curing agents, acid anhydride curing agents, aminotriazine novolac curing agents, and cyanate resins.
  • curing agent a novolak type, an aralkyl type, a terpene type etc. are mentioned, for example. Further examples include phosphorus-modified phenolic resins or phosphorus-modified cyanate resins for imparting flame retardancy.
  • curing agent may be used independently, and may be used in combination of 2 or more type.
  • a resin or the like having good laser light absorption in the wavelength range of 100 to 400 nm because a circuit pattern is formed by laser processing.
  • a polyimide resin or the like can be given.
  • the first insulating layer L6 may contain a filler.
  • the filler may be inorganic fine particles or organic fine particles, and is not particularly limited. By containing the filler, the filler is exposed to the laser processed portion, and it is possible to increase the adhesion between the plating due to the unevenness of the filler and the resin.
  • the material constituting the inorganic fine particles include aluminum oxide (Al 2 O 3 ), magnesium oxide (MgO), boron nitride (BN), aluminum nitride (AlN), silica (SiO 2 ), High dielectric constant fillers such as barium titanate (BaTiO 3 ) and titanium oxide (TiO 2 ); magnetic fillers such as hard ferrite; magnesium hydroxide (Mg (OH) 2 ), aluminum hydroxide (Al (OH) 2 ), Antimony trioxide (Sb 2 O 3 ), antimony pentoxide (Sb 2 O 5 ), guanidine salts, zinc borate, molybdate compounds, zinc stannate, and other inorganic flame retardants; talc (Mg 3 (Si 4 O 10) (OH) 2), barium sulfate (BaSO 4), calcium carbonate (CaCO 3), mica, and the like.
  • Al 2 O 3 magnesium oxide
  • MgO magnesium oxide
  • BN boro
  • the said inorganic fine particle may be used independently, and may be used in combination of 2 or more type. Since these inorganic fine particles have high thermal conductivity, relative dielectric constant, flame retardancy, particle size distribution, color tone freedom, etc., when selectively exerting a desired function, appropriate blending and particle size design should be performed. And high filling can be easily performed. Although not particularly limited, it is preferable to use a filler having an average particle diameter equal to or smaller than the thickness of the first insulating layer L6, more preferably 0.01 to 10 ⁇ m, and still more preferably 0.05 ⁇ m to 5 ⁇ m. Should be used.
  • the inorganic fine particles may be surface-treated with a silane coupling agent in order to improve dispersibility in the first insulating layer L6.
  • the first insulating layer L6 may contain a silane coupling agent in order to improve the dispersibility of the inorganic fine particles in the first insulating layer L6.
  • the silane coupling agent is not particularly limited. Specific examples include silane coupling agents such as epoxy silane, mercapto silane, amino silane, vinyl silane, styryl silane, methacryloxy silane, acryloxy silane, and titanate.
  • the said silane coupling agent may be used independently, and may be used in combination of 2 or more type.
  • the first insulating layer L6 may contain a dispersant in order to improve the dispersibility of the inorganic fine particles in the first insulating layer L6.
  • the dispersant is not particularly limited. Specific examples include dispersants such as alkyl ether, sorbitan ester, alkyl polyether amine, and polymer.
  • the said dispersing agent may be used independently, and may be used in combination of 2 or more type.
  • organic fine particles include rubber fine particles.
  • the form of the first insulating layer L6 is not particularly limited. Specifically, a sheet
  • the thickness of the first insulating layer L6 is not particularly limited. Specifically, in the case of sheets, films and prepregs, for example, the thickness is preferably 10 to 500 ⁇ m, more preferably about 20 to 200 ⁇ m. Further, the first insulating layer L6 may contain inorganic fine particles such as silica particles.
  • the first electric circuit L7 is formed on the surface of the first insulating layer L6.
  • the first electric circuit L7 can be formed by a conventionally known electric circuit forming method such as a subtractive method or an additive method.
  • the second insulating layer L1 is laminated on the surface of the first insulating layer L6. Thereby, the first electric circuit L7 is embedded in the second insulating layer L1.
  • the second insulating layer L1 is formed of various organic substrates similar to the first insulating layer L6, for example.
  • the second insulating layer L1 may be formed by applying a resin solution on the surface of the first insulating layer L6 and then curing the resin solution.
  • a resin solution such as an epoxy resin, a polyphenylene ether resin, an acrylic resin, or a polyimide resin, which has been conventionally used for manufacturing a multilayer circuit board, can be used without any particular limitation. .
  • the second insulating layer L1 may be formed by overlaying an insulating base material on the surface of the first insulating layer L6 and performing heat pressing.
  • a prepreg as an insulating base material, it is preferable to cure by this heating press.
  • a resin film L8 is formed on the surface of the second insulating layer L1 (film formation process).
  • the resin film L8 is not particularly limited as long as it can be removed in the film removal step. Specifically, for example, a soluble resin that can be easily dissolved by an organic solvent or an alkaline solution, a swellable resin film L8 made of a resin that can be swollen by a predetermined liquid (swelling liquid) described later, and the like. Among these, the swellable resin film L8 is particularly preferable because accurate removal is easy. Moreover, as said swelling resin film L8, it is preferable that the swelling degree with respect to the said liquid (swelling liquid) is 50% or more, for example.
  • the swellable resin film L8 is not limited to the resin film L8 which does not substantially dissolve in the liquid (swelling liquid) and easily peels off from the surface of the second insulating layer L1 due to swelling. Resin coating L8 that swells with respect to the liquid (swelling liquid) and at least partly dissolves and easily peels off from the surface of the second insulating layer L1 due to the swelling or dissolution, or the liquid (swelling liquid) Also included is a resin film L8 that dissolves with respect to and easily peels from the surface of the second insulating layer L1.
  • the method for forming the resin film L8 is not particularly limited. Specifically, for example, a liquid material capable of forming the resin film L8 is applied to the surface of the second insulating layer L1, and then dried, or the liquid material is applied to a support substrate and then dried. And a method of transferring the resin coating L8 formed by the method to the surface of the second insulating layer L1.
  • the method for applying the liquid material is not particularly limited. Specifically, for example, conventionally known spin coating method, bar coater method and the like can be mentioned.
  • the thickness of the resin coating L8 is preferably 10 ⁇ m or less, and more preferably 5 ⁇ m or less. On the other hand, the thickness of the resin coating L8 is preferably 0.1 ⁇ m or more, and more preferably 1 ⁇ m or more. When the thickness of the resin coating L8 is too thick, the accuracy of circuit pattern portions such as the circuit grooves L4 and the through holes L5 formed by laser processing or machining in the circuit pattern forming process tends to be lowered. Moreover, when the thickness of the resin film L8 is too thin, it tends to be difficult to form the resin film L8 having a uniform film thickness.
  • the swellable resin film L8 suitable as the resin film L8 will be described as an example.
  • a resin film L8 having a swelling degree of 50% or more with respect to the swelling liquid can be preferably used. Furthermore, the resin film L8 whose swelling degree with respect to a swelling liquid is 100% or more is more preferable. In addition, when the said swelling degree is too low, there exists a tendency for the swelling resin film L8 to become difficult to peel in the said film removal process.
  • the method for forming the swellable resin film L8 is not particularly limited as long as it is the same as the method for forming the resin film L8 described above. Specifically, for example, a liquid material that can form the swellable resin film L8 is applied to the surface of the second insulating layer L1, and then dried, or the liquid material is applied to a support substrate and then dried. And a method of transferring the swellable resin film L8 formed on the surface of the second insulating layer L1.
  • liquid material that can form the swellable resin film L8 examples include an elastomer suspension or emulsion.
  • the elastomer include a diene elastomer such as a styrene-butadiene copolymer, an acrylic elastomer such as an acrylate ester copolymer, and a polyester elastomer. According to such an elastomer, the swellable resin film L8 having a desired swelling degree can be easily formed by adjusting the degree of crosslinking or gelation of the elastomer resin particles dispersed as a suspension or emulsion.
  • the swellable resin film L8 is particularly preferably a film whose degree of swelling changes depending on the pH of the swelling liquid.
  • the liquid condition in the catalyst deposition step is different from the liquid condition in the coating removal step, so that the swellable resin can be obtained at the pH in the catalyst deposition step.
  • the coating L8 maintains a high adhesion to the insulating substrate, and the swellable resin coating L8 can be easily peeled off at the pH in the coating removal step.
  • the catalyst deposition step includes a step of treating in an acidic plating catalyst colloid solution (acid catalyst metal colloid solution) having a pH in the range of 1 to 3, for example, and the coating removal step has a pH of 12 to 12.
  • an acidic plating catalyst colloid solution acid catalyst metal colloid solution
  • the coating removal step has a pH of 12 to 12.
  • the swelling degree of the swellable resin film L8 with respect to the acidic plating catalyst colloid solution is 60% or less, and further 40% or less. It is preferable that the resin film L8 has a swelling degree with respect to the alkaline solution of 50% or more, further 100% or more, and more preferably 500% or more.
  • Examples of such swellable resin coating L8 include light used for a sheet formed from an elastomer having a predetermined amount of carboxyl groups, a dry film resist for patterning a printed circuit board (hereinafter also referred to as DFR), and the like. Examples thereof include a sheet obtained by curing the entire surface of a curable alkali-developable resist, and thermosetting or alkali-developable sheet.
  • the elastomer having a carboxyl group examples include diene elastomers such as a styrene-butadiene copolymer having a carboxyl group in the molecule by containing a monomer unit having a carboxyl group as a copolymerization component; acrylic acid Examples include acrylic elastomers such as ester copolymers; and polyester elastomers.
  • the swellable resin film L8 having a desired alkali swelling degree can be formed by adjusting the acid equivalent, the degree of crosslinking, the degree of gelation, etc. of the elastomer dispersed as a suspension or emulsion. it can.
  • the carboxyl group in the elastomer swells the swellable resin film L8 with respect to the alkaline aqueous solution, and acts to peel the swellable resin film L8 from the surface of the insulating substrate.
  • the acid equivalent is the polymer weight per equivalent of carboxyl groups.
  • the monomer unit having a carboxyl group examples include (meth) acrylic acid, fumaric acid, cinnamic acid, crotonic acid, itaconic acid, maleic anhydride, and the like.
  • the content ratio of the carboxyl group in the elastomer having such a carboxyl group is preferably 100 to 2000, more preferably 100 to 800 in terms of acid equivalent.
  • the acid equivalent is too small, the compatibility with the solvent or other composition tends to decrease, whereby the resistance to the plating pretreatment liquid tends to decrease.
  • an acid equivalent is too large, there exists a tendency for the peelability with respect to aqueous alkali solution to fall.
  • the molecular weight of the elastomer is preferably 10,000 to 1,000,000, more preferably 20,000 to 60,000.
  • the molecular weight of the elastomer is too large, the releasability tends to decrease, and when it is too small, the viscosity decreases, so that it is difficult to maintain a uniform thickness of the swellable resin film L8 and before plating. There is also a tendency for the resistance to the treatment liquid to deteriorate.
  • a sheet of a resin composition can be used.
  • a dry film of a photopolymerizable resin composition as disclosed in JP 2000-231190 A, JP 2001-201851 A, and JP 11-212262 A is used. Sheets obtained by curing, and commercially available as an alkali development type DFR, for example, UFG series manufactured by Asahi Kasei Corporation can be mentioned.
  • examples of other swellable resin coating L8 include a resin containing a carboxyl group and containing rosin as a main component (for example, “NAZDAR229” manufactured by Yoshikawa Chemical Co., Ltd.) , “104F” manufactured by LEKTRACHEM, etc.).
  • the swellable resin film L8 is formed on a surface of an insulating substrate by applying a resin suspension or emulsion using a conventionally known application method such as a spin coat method or a bar coater method, followed by drying or a support substrate. After the DFR is bonded to the surface of the insulating substrate using a vacuum laminator or the like, it can be easily formed by curing the entire surface.
  • examples of the resin coating L8 include the following.
  • examples of the resist material constituting the resin film L8 include the following.
  • the characteristics required for the resist material constituting the resin film L8 include, for example, (1) against a liquid (plating nucleation chemical) in which an insulating base material on which the resin film L8 is formed is immersed in a catalyst deposition step described later.
  • the resin film L8 (resist) can be easily removed by (2) a film removal step described later, for example, a step of immersing the insulating base material on which the resin film L8 is formed in an alkali. Examples thereof include high film properties, (4) easy dry film (DFR) formation, and (5) high storage stability.
  • the plating nucleation chemical solution As the plating nucleation chemical solution, as will be described later, for example, in the case of an acidic Pd—Sn colloid catalyst system, all are acidic (pH 1-2) aqueous solutions.
  • the catalyst imparting activator is a weak alkali (pH 8 to 12), and the others are acidic. From the above, it is necessary to withstand pH 1 to 11, preferably pH 1 to 12, as the resistance to the plating nucleating solution. Note that being able to withstand is that when a sample on which a resist is formed is immersed in a chemical solution, swelling and dissolution of the resist are sufficiently suppressed, and the resist serves as a resist.
  • the immersion temperature is from room temperature to 60 ° C.
  • the immersion time is from 1 to 10 minutes
  • the resist film thickness is from about 1 to 10 ⁇ m, but is not limited thereto.
  • an aqueous NaOH solution or an aqueous sodium carbonate solution is common. Its pH is 11 to 14, and it is desirable that the resist film can be easily removed preferably at pH 12 to 14.
  • the aqueous NaOH solution concentration is about 1 to 10%
  • the processing temperature is room temperature to 50 ° C.
  • the processing time is 1 to 10 minutes, but the immersion or spraying is not limited thereto.
  • a resist is formed on an insulating material, film formability is also important. A uniform film formation without repelling or the like is necessary. Moreover, although it is made into a dry film for simplification of a manufacturing method, reduction of material loss, etc., the flexibility of a film is required in order to ensure handling property. Also, a dry film resist is pasted on the insulating material with a laminator (roll, vacuum). The pasting temperature is room temperature to 160 ° C., and the pressure and time are arbitrary. Thus, adhesiveness is required at the time of pasting. For this reason, the resist formed into a dry film is generally used as a three-layer structure sandwiched by a carrier film and a cover film to prevent dust from adhering, but is not limited thereto.
  • Storability is best when it can be stored at room temperature, but it must be refrigerated or frozen. As described above, it is necessary to prevent the composition of the dry film from being separated at low temperatures or to be cracked due to a decrease in flexibility.
  • the resin coating L8 (a) at least one monomer of carboxylic acid or acid anhydride having at least one polymerizable unsaturated group in the molecule, and (b) the (a) monomer Examples thereof include a polymer resin obtained by polymerizing at least one monomer that can be polymerized with a polymer, or a resin composition containing the polymer resin.
  • the polymer resin may be an essential component as a main resin, and at least one of oligomers, monomers, fillers and other additives may be added.
  • the main resin is preferably a linear polymer with thermoplastic properties. In order to control fluidity and crystallinity, it may be branched by grafting.
  • the molecular weight is about 1,000 to 500,000 in terms of number average molecular weight, preferably 5000 to 50,000. If the molecular weight is too small, the flexibility of the film and the resistance to the plating nucleation solution (acid resistance) tend to decrease. Moreover, when molecular weight is too large, there exists a tendency for the sticking property at the time of using alkali peelability or a dry film to worsen.
  • a cross-linking point may be introduced for improving the resistance to plating nucleus chemicals, suppressing thermal deformation during laser processing, and controlling flow.
  • composition of the main resin (a) a carboxylic acid or acid anhydride monomer having at least one polymerizable unsaturated group in the molecule and (b) (a) a monomer that can be polymerized with the monomer It is obtained by polymerizing.
  • known techniques include those described in JP-A-7-281437, JP-A-2000-231190, and JP-A-2001-201851.
  • Examples of (a) include, for example, (meth) acrylic acid, fumaric acid, cinnamic acid, crotonic acid, itaconic acid, maleic anhydride, maleic acid half ester, butyl acrylate, etc., alone or 2 More than one type may be combined.
  • Examples of (b) are generally non-acidic and have one polymerizable unsaturated group in the molecule, but are not limited thereto. It is selected so as to maintain various properties such as resistance in the plating process and flexibility of the cured film.
  • esters of vinyl alcohol such as vinyl acetate, (meth) acrylonitrile, styrene, or a polymerizable styrene derivative may be used.
  • a monomer having a plurality of unsaturated groups is selected as a monomer used in the polymer so that it can be three-dimensionally cross-linked, such as an epoxy group, a hydroxyl group, an amino group, an amide group, a vinyl group in the molecular skeleton.
  • Reactive functional groups can be introduced.
  • the amount of the carboxyl group contained in the resin is preferably 100 to 2000, preferably 100 to 800, in terms of acid equivalent.
  • the acid equivalent means the weight of the polymer having 1 equivalent of a carboxyl group therein.
  • the composition ratio of the monomer (a) is 5 to 70% by weight.
  • Any monomer or oligomer may be used as long as it is resistant to plating nucleation chemicals and can be easily removed with alkali. Further, in order to improve the sticking property of the dry film (DFR), it can be considered that it is used as a tackifier as a plasticizer. Further, a crosslinking agent is added to increase various resistances. Specifically, for example, methyl (meth) acrylate, ethyl (meth) acrylate, iso-propyl (meth) acrylate, n-butyl (meth) acrylate, sec-butyl (meth) acrylate, tert.
  • esters of vinyl alcohol such as vinyl acetate, (meth) acrylonitrile, styrene, or a polymerizable styrene derivative are also included. It can also be obtained by polymerization of only a carboxylic acid or acid anhydride having one polymerizable unsaturated group in the molecule. Furthermore, a polyfunctional unsaturated compound may be included. Any of the above monomers or oligomers obtained by reacting the monomers may be used.
  • this monomer examples include, for example, 1,6-hexanediol di (meth) acrylate, 1,4-cyclohexanediol di (meth) acrylate, polypropylene glycol di (meth) acrylate, polyethylene glycol di (meth) acrylate, Polyoxyalkylene glycol di (meth) acrylate such as polyoxyethylene polyoxypropylene glycol di (meth) acrylate, 2-di (p-hydroxyphenyl) propane di (meth) acrylate, glycerol tri (meth) acrylate, dipentaerythritol penta (Meth) acrylate, trimethylolpropane triglycidyl ether tri (meth) acrylate, bisphenol A diglycidyl ether tri (meth) acrylate, 2,2-bis (4-methyl) Methacryloxy penta
  • a filler may be contained.
  • the filler is not particularly limited. Specifically, for example, silica, aluminum hydroxide, magnesium hydroxide, calcium carbonate, clay, kaolin, titanium oxide, barium sulfate, alumina, zinc oxide, talc, mica, glass, titanic acid. Examples include potassium, wollastonite, magnesium sulfate, aluminum borate, and an organic filler.
  • the resist thickness is generally as thin as 1 to 10 ⁇ m, it is preferable to have a small filler size. Although it is preferable to use a material having a small average particle size and cut coarse particles, the coarse particles can be crushed during dispersion or removed by filtration.
  • additives include, for example, photopolymerizable resins (photopolymerization initiators), polymerization inhibitors, colorants (dyes, pigments, coloring pigments), thermal polymerization initiators, and crosslinking agents such as epoxies and urethanes. Can be mentioned.
  • laser processing may be used, but in the case of laser processing, it is necessary to impart ablation by a laser to the resist material.
  • the laser processing machine for example, a carbon dioxide laser, an excimer laser, a UV-YAG laser, or the like is selected. These laser processing machines have various intrinsic wavelengths, and productivity can be improved by using a material having a high absorption rate for these wavelengths.
  • the UV-YAG laser is suitable for fine processing, and the laser wavelength is 3rd harmonic 355 nm and 4th harmonic 266 nm. Therefore, the resist material has an absorption rate of 50% with respect to these wavelengths. It is desirable to be above.
  • the resin coating L8 is partially removed and the resin is further removed from the surface of the second insulating layer L1 at the removed portion, thereby forming the second insulating layer L1.
  • a circuit groove L4 is formed (circuit groove forming step).
  • the method for forming the circuit groove L4 is not particularly limited. Specifically, for example, the second insulating layer L1 on which the resin coating L8 is formed, from the outer surface side of the resin coating L8, machining processing such as laser processing and dicing processing, and stamping processing.
  • channel L4 of a desired shape and depth by giving etc. are mentioned.
  • laser processing the cutting depth or the like can be freely adjusted by changing the output of the laser or the like.
  • the stamping process for example, a stamping process using a fine resin mold used in the field of nanoimprinting can be preferably used.
  • This step defines the shape of the circuit groove L4 and the shape of the circuit pattern such as the depth and position.
  • the width of the circuit groove L4 formed in this circuit groove forming step is not particularly limited. When laser processing is used, a fine electric circuit L2 having a line width of 20 ⁇ m or less can be easily formed. Further, the depth of the circuit groove L4 is the depth of the electric circuit L2 formed in the present embodiment when a step is eliminated between the electric circuit L2 and the second insulating layer L1.
  • the processing conditions are set so that the surface roughness Ra of the inner surface of the circuit groove L4 is preferably in the range of 0.01 to 0.5 ⁇ m.
  • a plating catalyst or its precursor L9 is deposited on the outer surfaces of the circuit groove L4 and the resin coating L8 (catalyst deposition step).
  • the plating catalyst or its precursor L9 can be deposited on the inner surface of the circuit groove L4 and the entire surface of the resin coating L8 that has not been laser processed.
  • the plating catalyst or its precursor L9 is a catalyst applied to form the electroless plating film L10 only on the portion where the electroless plating film L10 is to be formed by electroless plating in the plating process.
  • Any plating catalyst can be used without particular limitation as long as it is known as a catalyst for electroless plating.
  • a plating catalyst precursor may be deposited in advance, and the plating catalyst may be generated after removal of the resin film L8.
  • Specific examples of the plating catalyst include, for example, metal palladium (Pd), platinum (Pt), silver (Ag), etc., or a precursor that generates these.
  • Examples of the method of depositing the plating catalyst or its precursor L9 include a method of treating with an acidic Pd—Sn colloidal solution treated under acidic conditions of pH 1 to 3 and then treating with an acid solution. It is done. Specific examples include the following methods.
  • the oil adhering to the surface of the second insulating layer L1 in which the circuit groove L4 and the through-hole L5 are formed is washed with hot water in a surfactant solution (cleaner / conditioner) for a predetermined time.
  • a soft etching treatment is performed with a sodium persulfate-sulfuric acid based soft etching agent.
  • an acidic solution such as a sulfuric acid aqueous solution or a hydrochloric acid aqueous solution having a pH of 1 to 2.
  • a pre-dip treatment is performed in which chloride ions are adsorbed on the surface of the second insulating layer L1 by immersing in a pre-dip solution mainly containing a stannous chloride aqueous solution having a concentration of about 0.1%.
  • Pd and Sn are aggregated and adsorbed by further dipping in an acidic plating catalyst colloidal solution such as acidic Pd—Sn colloid having a pH of 1 to 3 containing stannous chloride and palladium chloride.
  • an oxidation-reduction reaction SnCl 2 + PdCl 2 ⁇ SnCl 4 + Pd ⁇
  • the metal palladium which is a plating catalyst precipitates.
  • the acidic plating catalyst colloid solution a known acidic Pd—Sn colloid catalyst solution or the like can be used, and a commercially available plating process using an acidic plating catalyst colloid solution may be used. Such a process is systematized and sold by Rohm & Haas Electronic Materials Co., Ltd., for example.
  • the plating catalyst or its precursor L9 can be deposited on the inner surface of the circuit groove L4, the inner wall surface of the through hole L5, and the surface of the resin coating L8.
  • the resin film L8 is removed by swelling or dissolving with a predetermined liquid (film removal step).
  • the plating catalyst or its precursor L9 is left on the inner surface of the circuit groove L4 formed by laser processing, and the plating catalyst or its precursor L9 attached to the other surface of the resin film L8 is removed. can do.
  • the method for removing the resin coating L8 is not particularly limited. As a specific method, for example, after the resin film L8 is swollen with a predetermined solution (swelling liquid), the resin film L8 is peeled off from the second insulating layer L1, or a predetermined solution (swelling liquid). After the resin film L8 is swollen and further partially dissolved, the resin film L8 is removed from the second insulating layer L1, and the resin film L8 is dissolved with a predetermined solution (swelling liquid). And the like.
  • the swelling liquid is not particularly limited as long as it can swell the resin film L8.
  • the swelling or dissolution is performed by immersing the second insulating layer L1 coated with the resin film L8 in the swelling liquid for a predetermined time. And removal efficiency may be improved by irradiating with ultrasonic waves during the immersion. In addition, when it swells and peels, you may peel off with a light force.
  • the swellable resin film L8 can be obtained without substantially decomposing or dissolving the second insulating layer L1 and the plating catalyst or its precursor L9. Any liquid that can swell or dissolve can be used without particular limitation. Moreover, the liquid which can swell so that the said swellable resin film L8 can be peeled easily is preferable. Such a swelling liquid can be appropriately selected depending on the type and thickness of the swellable resin film L8.
  • the swellable resin film L8 is an elastomer such as a diene elastomer, an acrylic elastomer, and a polyester elastomer, or (a) a carboxylic acid having at least one polymerizable unsaturated group in the molecule or A polymer resin obtained by polymerizing at least one monomer of acid anhydride and (b) at least one monomer that can be polymerized with the monomer (a) or the polymer resin
  • an alkaline aqueous solution such as an aqueous sodium hydroxide solution having a concentration of about 1 to 10% is preferably used.
  • the swelling resin film L8 has a swelling degree of 60% or less under acidic conditions, and under alkaline conditions.
  • an elastomer such as a diene elastomer, an acrylic elastomer, and a polyester elastomer having a degree of swelling of 50% or more, (a) a carboxylic acid or an acid having at least one polymerizable unsaturated group in the molecule
  • a polymer resin obtained by polymerizing at least one monomer of an anhydride and (b) at least one monomer that can be polymerized with the monomer (a) or the polymer resin It is preferable that it is formed from the resin composition containing and a carboxyl group-containing acrylic resin.
  • Such a swellable resin film L8 is easily swollen and peeled off by an alkaline aqueous solution having a pH of 12 to 14, such as a sodium hydroxide aqueous solution having a concentration of about 1 to 10%.
  • an alkaline aqueous solution having a pH of 12 to 14 such as a sodium hydroxide aqueous solution having a concentration of about 1 to 10%.
  • Examples of the method of swelling the swellable resin film L8 include a method of immersing the second insulating layer L1 coated with the swellable resin film L8 in a swelling liquid for a predetermined time. Moreover, in order to improve peelability, it is particularly preferable to irradiate with ultrasonic waves during immersion. In addition, when not peeling only by swelling, you may peel off with a light force as needed.
  • an electroless plating process is performed on the inner surface of the circuit groove L4 where the plating catalyst or its precursor L9 remains to form an electroless plating film L10 (plating process). Process).
  • the electroless plating film L10 is deposited on the inner surface of the circuit groove L4.
  • the plating catalyst or its precursor L9 is deposited by immersing the second insulating layer L1 partially coated with the plating catalyst or its precursor L9 in an electroless plating solution.
  • a method of depositing the electroless plating film L10 (plating layer) only on the applied portion can be used.
  • Examples of the metal used for electroless plating include copper (Cu), nickel (Ni), cobalt (Co), and aluminum (Al).
  • the plating which has Cu as a main component is preferable from the point which is excellent in electroconductivity.
  • this metal contains Ni, it is preferable from the point which is excellent in corrosion resistance and adhesiveness with a solder.
  • the film thickness of the electroless plating film L10 is not particularly limited. Specifically, for example, it is preferably about 0.1 to 10 ⁇ m, more preferably about 1 to 5 ⁇ m.
  • the electroless plating film L10 is deposited only on the portion of the surface of the second insulating layer L1 where the plating catalyst or its precursor L9 remains. Therefore, the electroless plating film L10 can be accurately formed only in the portion where the electric circuit L2 is to be formed.
  • the deposition of the electroless plating film L10 on the portion where the electric circuit L2 is not formed can be suppressed. Therefore, even when a plurality of fine electric circuits L2 having a narrow line width and a narrow line width are formed, an unnecessary plating film does not remain between the adjacent electric circuits L2. Therefore, the occurrence of a short circuit and the occurrence of migration can be suppressed.
  • a through hole L5 from the bottom surface of the circuit groove L4 to the surface of the first electric circuit L7 is formed in the second insulating layer L1 by laser processing or the like.
  • the smear L11 remains on the surface of the first electric circuit L7 exposed at the bottom of the through hole L5.
  • the smear L11 is removed as shown in FIG. 37C by applying a desmear process to the inner surface of the through hole L5.
  • the desmear process is not particularly limited, and can be performed using a known desmear process. Specifically, the process etc. which are immersed in a permanganic acid solution etc. are mentioned, for example.
  • the resin on the inner surface of the through hole L5 is roughened, and the surface roughness of the inner surface of the through hole L5 is increased, but the inner surface of the circuit groove L4 is covered with the electroless plating film L10.
  • the inner surface of the circuit groove L4 is not damaged by the desmear treatment liquid. For this reason, the surface roughness of the inner surface of the circuit groove L4 is smaller than the surface roughness of the inner surface of the through hole L5.
  • the inner surface of the circuit groove L4 and the inner surface of the through hole L5 are subjected to electroless plating.
  • the electroless plating film L10 existing on the inner surface of the circuit groove L4 and the first electric circuit L7 exposed at the bottom of the through hole L5 act as plating nuclei, and the inside of the circuit groove L4 and the inner side of the through hole L5.
  • the plating layer grows.
  • the second electric circuit L2 is formed inside the circuit groove L4, and the via L3 that conducts the second electric circuit L2 and the first electric circuit L7 is formed inside the through hole L5.
  • a plating layer is deposited from the surface of the first electric circuit L7 exposed at the bottom of the through-hole L5, and this plating layer is filled in the through-hole L5 and the circuit groove L4. L3 is formed.
  • the circuit board L10 shown in FIG. 35 is manufactured.
  • the second electric circuit L2 having a narrow width of the electric circuit L2 and an interval between the electric circuits L2 is stacked by the build-up method, the second electric circuit L2 in which occurrence of a short circuit or migration is suppressed is formed.
  • [Second production method] 38 and 39 show a second method for manufacturing a circuit board. A second manufacturing method of the circuit board will be described. Note that details of matters common to the first manufacturing method are omitted.
  • a first electric circuit L7 is provided in the first insulating layer L6, and a second insulating layer L1 is further provided.
  • the second insulating layer L1 is subjected to laser processing or the like to form a through hole L5 from the surface of the second insulating layer L1 to the surface of the first electric circuit L7. .
  • the smear L11 remains on the surface of the first electric circuit L7 exposed at the bottom of the through hole L5.
  • the smear L11 is removed by applying a desmear process to the inner surface of the through hole L5.
  • a desmear process By this desmear treatment, the resin on the inner surface of the through hole L5 is roughened, and the surface roughness of the inner surface of the through hole L5 is increased.
  • the inner surface of the through hole L5 is subjected to an electroless plating treatment.
  • the first electric circuit L7 exposed at the bottom of the through hole L5 acts as a plating nucleus, and a plating layer grows inside the through hole L5.
  • a via L3 is formed inside the through hole L5.
  • a plating layer is deposited from the surface of the first electric circuit L7 exposed at the bottom of the through hole L5, and this plating layer is filled into the through hole L5, thereby forming a via L3.
  • a resin film L8 is formed on the surface of the second insulating layer L1 (film forming process).
  • the resin coating L8 is partially removed and the resin is further removed from the surface of the second insulating layer L1 at the removed portion, thereby forming the second insulating layer L1.
  • a circuit groove L4 is formed (circuit groove forming step). Since the circuit groove L4 is formed after the desmear process is performed in the through hole L5 as described above, the surface roughness of the inner surface of the circuit groove L4 is smaller than the surface roughness of the inner surface of the through hole L5. At this time, a part of the circuit groove L4 overlaps with the through hole L5, and the upper part of the through hole L5 is integrated with the circuit groove L4.
  • the processing conditions are set so that the surface roughness Ra of the inner surface of the circuit groove L4 is preferably in the range of 0.01 to 0.5 ⁇ m.
  • a plating catalyst or its precursor L9 is deposited on the outer surfaces of the circuit groove L4 and the resin coating L8 (catalyst deposition step).
  • the resin film L8 is removed by swelling or dissolving with a predetermined liquid (film removal step).
  • the plating catalyst or its precursor L9 is left on the inner surface of the circuit groove L4 formed by laser processing, and the plating catalyst or its precursor L9 attached to the other surface of the resin film L8 is removed. can do.
  • a plating layer is grown inside the circuit groove L4 by applying an electroless plating process to the inner surface of the circuit groove L4 in which the plating catalyst or its precursor L9 remains. To form the second electric circuit L2.
  • the second electric circuit L2 is provided in the circuit groove L4, and the second electric circuit L2 and the first electric circuit L7 are electrically connected by the via L3, so that the circuit board L10 shown in FIG. 35 is manufactured.
  • [Third production method] 40 and 41 show a third method for manufacturing a circuit board. A third manufacturing method of the circuit board will be described. Note that details of matters common to the first manufacturing method are omitted.
  • a first electric circuit L7 is provided in the first insulating layer L6, and a second insulating layer L1 is further provided.
  • the resin is removed from the surface of the second insulating layer L1 without providing the resin coating L8 on the second insulating layer L1, so that the circuit groove L4 is formed in the second insulating layer L1. (Circuit groove forming step).
  • the processing conditions are set so that the surface roughness of the inner surface of the circuit groove L4 is preferably in the range of 0.01 to 0.5 ⁇ m.
  • a plating catalyst or its precursor L9 is deposited on the outer surface of the second insulating layer L1 including the inner surface of the circuit groove L4 (catalyst deposition step).
  • the plating catalyst or its precursor L9 can be deposited on the inner surface of the circuit groove L4 and the entire surface of the second insulating layer L1 that has not been laser processed.
  • Electroless plating film L10 is formed (plating process).
  • the electroless plating film L10 is deposited on the outer surface of the second insulating layer L1 including the inner surface of the circuit groove L4.
  • a through hole L5 from the bottom surface of the circuit groove L4 to the surface of the first electric circuit L7 is formed in the second insulating layer L1 by laser processing or the like.
  • the smear L11 remains on the surface of the first electric circuit L7 exposed at the bottom of the through hole L5.
  • the smear L11 is removed by applying a desmear process to the inner surface of the through hole L5.
  • a desmear process By this desmear treatment, the resin on the inner surface of the through hole L5 is roughened, and the surface roughness of the inner surface of the through hole L5 increases, but the inner surface of the circuit groove L4 is covered with the electroless plating film L10.
  • the inner surface of the circuit groove L4 is not damaged by the desmear treatment liquid. For this reason, the surface roughness of the inner surface of the circuit groove L4 is smaller than the surface roughness of the inner surface of the through hole L5.
  • an electroless plating process is performed on the outer surface side of the second insulating layer L1.
  • the electroless plating film L10 and the first electric circuit L7 exposed at the bottom of the through hole L5 act as plating nuclei, and the inside of the circuit groove L4, the inside of the through hole L5, and the second insulating layer L1.
  • a plating layer grows on the surface.
  • the second electric circuit L2 is formed inside the circuit groove L4, and the via L3 that conducts the second electric circuit L2 and the first electric circuit L7 is formed inside the through hole L5.
  • a plating layer grows on the surface of the insulating layer L1.
  • the plating layer may be grown by performing an electrolytic plating process while applying a voltage to the first electric circuit L7 and the electroless plating film L10.
  • the plating layer on the surface side of the second insulating layer L1 is polished and removed by a CMP (Chemical Mechanical Polish) method. Thereby, the surface of the second insulating layer L1 and the surface of the second electric circuit L2 are exposed to the outside. Through such steps, a circuit board L10 as shown in FIG. 35 is manufactured.
  • CMP Chemical Mechanical Polish
  • the present invention further relates to a circuit board used in various electronic / electrical devices.
  • a circuit board in which circuits are finely and densely wired is desired.
  • a groove is formed on the surface of the insulating base material in a pattern shape, and a metal conductor is filled in the groove to form a circuit.
  • the circuit by forming the circuit by filling the groove of the insulating base material with the metal conductor, it is possible to prevent disconnection of the circuit even at a fine and high density, and to provide insulation between adjacent circuits.
  • the circuit can be secured and a highly reliable circuit can be formed.
  • FIG. 48 shows an example of a circuit board formed by filling the groove M2 of the insulating base material M1 with the metal conductor M3 and providing the circuit M4. That is, first, as shown in FIG. 48A, a circuit-forming groove M2 is formed in a pattern shape on the surface of the insulating base M1, and the entire surface of the insulating base M1 including the inside of the groove M2 is formed. A plating catalyst M5 for electrolytic plating is applied as shown in FIG. Next, the electroless plating film M6 can be formed on the surface to which the plating catalyst M5 is adhered by immersing in an electroless plating bath and performing electroless plating.
  • the electroless plating film M6 is formed on the entire surface of the insulating base M1 including the inside of the groove M2 as shown in FIG.
  • the electroless plating film M6 is formed with a thin film thickness. After forming the electroless plating film M6 in this manner, the electroless plating film M6 is immersed in an electroplating bath while a direct current is applied to the electroless plating film M6. By performing electroplating, an electroplating layer M7 is deposited on the surface of the electroless plating film M6 as shown in FIG.
  • the inside of the groove M2 can be filled with the metal conductor M3 composed of the electroless plating film M6 and the electrolytic plating layer M7.
  • the insulating base material M1 is formed after the electrolytic plating layer M7 is formed as described above.
  • the metal filled in each groove M2 is removed by removing the electroless plating film M6 and the electrolytic plating layer M7 exposed on the surface of the insulating base M1.
  • the conductor M3 is made independent, and the circuit M4 can be formed by the metal conductor M3 in the groove M2.

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Abstract

L'invention concerne une carte imprimée dans laquelle un circuit électronique de haute précision est formé dans un substrat isolant. Le substrat de circuit comprend : un substrat isolant (D1) obtenu par formation d'une couche de résine (D2) sur sa surface, par formation de rainures de circuit (D3) d'une forme et d'une profondeur voulues en créant des dépressions d'une profondeur supérieure à l'épaisseur dudit film de résine (D2), la profondeur étant mesurée à partir de la surface extérieure dudit film de résine (D2), par dépôt d'un catalyseur de placage ou d'un précurseur de celui-ci (D5) sur les surfaces desdites rainures de circuit et dudit film de résine (D2) et par élimination dudit film de résine (D2), et un film obtenu par plaquage non galvanique (D6) formé dans lesdites rainures de circuit par application d'un plaquage non galvanique audit substrat isolant (D1). L'épaisseur du film plaqué (D6) est d'au plus 0,5 fois la profondeur desdites rainures de circuits (D3).
PCT/JP2010/006367 2009-10-30 2010-10-28 Carte imprimée et procédé de fabrication de celle-ci WO2011052207A1 (fr)

Applications Claiming Priority (12)

Application Number Priority Date Filing Date Title
JP2009-251379 2009-10-30
JP2009251399A JP5350184B2 (ja) 2009-10-30 2009-10-30 多層回路基板の製造方法及び該製造方法により製造された多層回路基板
JP2009-251399 2009-10-30
JP2009251340 2009-10-30
JP2009251379A JP5465512B2 (ja) 2009-10-30 2009-10-30 回路基板の製造方法
JP2009-251340 2009-10-30
JP2009-253504 2009-11-04
JP2009-253503 2009-11-04
JP2009253504A JP2011100798A (ja) 2009-11-04 2009-11-04 回路基板
JP2009253505A JP2011100799A (ja) 2009-11-04 2009-11-04 回路基板
JP2009-253505 2009-11-04
JP2009253503A JP5432672B2 (ja) 2009-11-04 2009-11-04 回路基板

Publications (1)

Publication Number Publication Date
WO2011052207A1 true WO2011052207A1 (fr) 2011-05-05

Family

ID=43921640

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2010/006367 WO2011052207A1 (fr) 2009-10-30 2010-10-28 Carte imprimée et procédé de fabrication de celle-ci

Country Status (2)

Country Link
TW (1) TWI451820B (fr)
WO (1) WO2011052207A1 (fr)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI499502B (fr) * 2012-11-27 2015-09-11
JP2020066644A (ja) * 2018-10-22 2020-04-30 白石工業株式会社 めっき用樹脂組成物、めっき用樹脂成形体及びめっき膜付き樹脂成形体
CN111712049A (zh) * 2020-06-30 2020-09-25 生益电子股份有限公司 一种pcb的制作方法
TWI805129B (zh) * 2021-04-14 2023-06-11 達航科技股份有限公司 印刷基板中利用雷射加工形成切取部或切除部的方法

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5497808B2 (ja) * 2012-01-18 2014-05-21 Jx日鉱日石金属株式会社 表面処理銅箔及びそれを用いた銅張積層板
CN103813656A (zh) * 2012-11-15 2014-05-21 深南电路有限公司 一种能够承载大电流的电路板及其加工方法
TWI538581B (zh) 2015-11-20 2016-06-11 財團法人工業技術研究院 金屬導體結構及線路結構
JP7172211B2 (ja) * 2017-07-28 2022-11-16 Tdk株式会社 導電性基板、電子装置及び表示装置

Citations (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63183445A (ja) * 1987-01-27 1988-07-28 Okuno Seiyaku Kogyo Kk 水溶性レジストフイルム用剥離剤
JPH07509322A (ja) * 1992-07-14 1995-10-12 コーツ ブラザーズ ピーエルシー 基板の処理
JPH1078654A (ja) * 1996-09-02 1998-03-24 Konica Corp 感光性組成物、感光性平版印刷版及び現像方法
JP2002252445A (ja) * 2001-02-26 2002-09-06 Nec Toyama Ltd 印刷配線板の製造方法
JP2003264359A (ja) * 2002-03-07 2003-09-19 Citizen Electronics Co Ltd 立体回路基体の製造方法
JP2003309346A (ja) * 2002-04-15 2003-10-31 National Institute Of Advanced Industrial & Technology プリント基板高速作成方法
JP2004048030A (ja) * 2002-07-15 2004-02-12 Toshiba Corp 電子回路の製造方法および電子回路の製造装置
JP2004281427A (ja) * 2003-03-12 2004-10-07 Mitsubishi Electric Corp 立体回路基板の製造方法及び立体回路基板
JP2007088288A (ja) * 2005-09-22 2007-04-05 Sumitomo Electric Ind Ltd 回路基板、その製造方法及び多層回路基板
JP2008022002A (ja) * 2006-07-10 2008-01-31 Samsung Electro Mech Co Ltd 印刷回路基板の製造方法
JP2008058710A (ja) * 2006-08-31 2008-03-13 Jsr Corp ポジ型感放射線性樹脂組成物、転写フィルムおよびメッキ造形物の製造方法

Patent Citations (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63183445A (ja) * 1987-01-27 1988-07-28 Okuno Seiyaku Kogyo Kk 水溶性レジストフイルム用剥離剤
JPH07509322A (ja) * 1992-07-14 1995-10-12 コーツ ブラザーズ ピーエルシー 基板の処理
JPH1078654A (ja) * 1996-09-02 1998-03-24 Konica Corp 感光性組成物、感光性平版印刷版及び現像方法
JP2002252445A (ja) * 2001-02-26 2002-09-06 Nec Toyama Ltd 印刷配線板の製造方法
JP2003264359A (ja) * 2002-03-07 2003-09-19 Citizen Electronics Co Ltd 立体回路基体の製造方法
JP2003309346A (ja) * 2002-04-15 2003-10-31 National Institute Of Advanced Industrial & Technology プリント基板高速作成方法
JP2004048030A (ja) * 2002-07-15 2004-02-12 Toshiba Corp 電子回路の製造方法および電子回路の製造装置
JP2004281427A (ja) * 2003-03-12 2004-10-07 Mitsubishi Electric Corp 立体回路基板の製造方法及び立体回路基板
JP2007088288A (ja) * 2005-09-22 2007-04-05 Sumitomo Electric Ind Ltd 回路基板、その製造方法及び多層回路基板
JP2008022002A (ja) * 2006-07-10 2008-01-31 Samsung Electro Mech Co Ltd 印刷回路基板の製造方法
JP2008058710A (ja) * 2006-08-31 2008-03-13 Jsr Corp ポジ型感放射線性樹脂組成物、転写フィルムおよびメッキ造形物の製造方法

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI499502B (fr) * 2012-11-27 2015-09-11
JP2020066644A (ja) * 2018-10-22 2020-04-30 白石工業株式会社 めっき用樹脂組成物、めっき用樹脂成形体及びめっき膜付き樹脂成形体
JP7101988B2 (ja) 2018-10-22 2022-07-19 白石工業株式会社 めっき用樹脂組成物、めっき用樹脂成形体及びめっき膜付き樹脂成形体
CN111712049A (zh) * 2020-06-30 2020-09-25 生益电子股份有限公司 一种pcb的制作方法
TWI805129B (zh) * 2021-04-14 2023-06-11 達航科技股份有限公司 印刷基板中利用雷射加工形成切取部或切除部的方法

Also Published As

Publication number Publication date
TWI451820B (zh) 2014-09-01
TW201146113A (en) 2011-12-16

Similar Documents

Publication Publication Date Title
US9351402B2 (en) Circuit board, and semiconductor device having component mounted on circuit board
WO2011052207A1 (fr) Carte imprimée et procédé de fabrication de celle-ci
US9332642B2 (en) Circuit board
TWI400018B (zh) A circuit board manufacturing method, and a circuit board manufactured by the manufacturing method
CN1279114C (zh) 绝缘树脂组合物及其制备方法、多层布线板及其生产方法
WO2010087336A1 (fr) Procédé de montage de puces semi-conductrices, dispositif à semi-conducteurs obtenus par ce procédé, procédé de connexion de puces semi-conductrices, et structure tridimensionnelle, à la surface de laquelle est prévu un câblage et son procédé de fabrication
US8698003B2 (en) Method of producing circuit board, and circuit board obtained using the manufacturing method
TW201034848A (en) Resin composition for wiring board, resin sheet for wiring board, complex, method of producing complex and semiconductor device
TWI441879B (zh) 樹脂組成物及電路基板之製造方法
US20140183751A1 (en) Three-dimensional structure in which wiring is provided on its surface
US20140182887A1 (en) Three-dimensional structure for wiring formation
JP5432672B2 (ja) 回路基板
KR101238966B1 (ko) 회로 기판의 제조 방법, 및 상기 제조 방법에 의해 얻어진 회로 기판
JP5465512B2 (ja) 回路基板の製造方法
JP5350184B2 (ja) 多層回路基板の製造方法及び該製造方法により製造された多層回路基板
JP5330156B2 (ja) 回路基板の製造方法、及び前記製造方法により得られた回路基板
WO2012060091A1 (fr) Procédé de formation de conducteurs à la surface d'une structure tridimensionnelle, structure intermédiaire pour obtenir une structure tridimensionnelle portant des conducteurs à sa surface, ainsi que structure tridimensionnelle portant des conducteurs à sa surface
JP5374321B2 (ja) 回路基板
JP5411829B2 (ja) 多層回路基板の製造方法及び該製造方法により製造された多層回路基板
JP2011100778A (ja) 回路基板及び回路基板に部品が実装された半導体装置
JP2011100798A (ja) 回路基板
JP5295931B2 (ja) 回路基板の製造方法、及び前記製造方法により得られた回路基板
JP2011100796A (ja) 回路基板
JP6302164B2 (ja) 積層構造体の製造方法
WO2010064602A1 (fr) Procédé de fabrication de carte de circuit imprimé et carte de circuit imprimé obtenue au moyen dudit procédé

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 10826343

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 10826343

Country of ref document: EP

Kind code of ref document: A1