WO2010087278A1 - 固体撮像装置 - Google Patents
固体撮像装置 Download PDFInfo
- Publication number
- WO2010087278A1 WO2010087278A1 PCT/JP2010/050777 JP2010050777W WO2010087278A1 WO 2010087278 A1 WO2010087278 A1 WO 2010087278A1 JP 2010050777 W JP2010050777 W JP 2010050777W WO 2010087278 A1 WO2010087278 A1 WO 2010087278A1
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- WIPO (PCT)
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- register
- units
- solid
- imaging device
- state imaging
- Prior art date
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- 238000003384 imaging method Methods 0.000 title claims abstract description 69
- 238000009825 accumulation Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000004888 barrier function Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000020169 heat generation Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/762—Charge transfer devices
- H01L29/765—Charge-coupled devices
- H01L29/768—Charge-coupled devices with field effect produced by an insulated gate
- H01L29/76816—Output structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/148—Charge coupled imagers
- H01L27/14806—Structural or functional details thereof
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/60—Noise processing, e.g. detecting, correcting, reducing or removing noise
- H04N25/67—Noise processing, e.g. detecting, correcting, reducing or removing noise applied to fixed-pattern noise, e.g. non-uniformity of response
- H04N25/671—Noise processing, e.g. detecting, correcting, reducing or removing noise applied to fixed-pattern noise, e.g. non-uniformity of response for non-uniformity detection or correction
- H04N25/672—Noise processing, e.g. detecting, correcting, reducing or removing noise applied to fixed-pattern noise, e.g. non-uniformity of response for non-uniformity detection or correction between adjacent sensors or output registers for reading a single image
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/70—SSIS architectures; Circuits associated therewith
- H04N25/71—Charge-coupled device [CCD] sensors; Charge-transfer registers specially adapted for CCD sensors
- H04N25/713—Transfer or readout registers; Split readout registers or multiple readout registers
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/70—SSIS architectures; Circuits associated therewith
- H04N25/71—Charge-coupled device [CCD] sensors; Charge-transfer registers specially adapted for CCD sensors
- H04N25/75—Circuitry for providing, modifying or processing image signals from the pixel array
Definitions
- the present invention relates to a multi-port type and charge multiplication type solid-state imaging device.
- Such a solid-state imaging device includes an imaging region and a plurality of units.
- the imaging region includes a plurality of pixel columns.
- Each of the plurality of units includes an output register that transfers charges from one or more corresponding pixel columns of the plurality of pixel columns, and a multiplier that generates the multiplied charges in response to the charges transferred by the output registers.
- JP 2007-124675 A Japanese Patent No. 3862850
- the gain of the charge multiplication type solid-state imaging device varies depending on the temperature. Further, it is desired to reduce the gain difference in all units in the multi-port type and charge multiplication type solid-state imaging device. Since the solid-state imaging device disclosed in Patent Document 2 can control the multiplication factor of the multiplication register, it is possible to control the gain of each port so as to reduce the gain difference in all ports. However, the circuit configuration for controlling the gain is complicated.
- the present invention is a multi-port and charge multiplying solid-state imaging device that outputs a signal based on charges from an imaging region from a plurality of units, and can reduce a gain difference between units with a simple configuration.
- An object of the present invention is to provide a possible solid-state imaging device.
- the solid-state imaging device of the present invention is a multi-port type solid-state imaging device and includes an imaging region and a plurality of units.
- the imaging region includes a plurality of pixel columns.
- the plurality of units generate signals based on the charges from the imaging region, and are arranged in the direction in which the plurality of pixel columns are arranged.
- Each of the plurality of units has an output register, a multiplication register, and an amplifier.
- the output register transfers charges from one or more corresponding pixel columns among the plurality of pixel columns.
- the multiplication register receives the charge from the output register and generates a multiplied charge.
- the amplifier generates a signal based on the multiplied charge from the multiplication register.
- the solid-state imaging device includes a region where a plurality of units are provided, and a first dummy region and a second dummy region located on both sides of the region in the above direction.
- a multiplication register and an amplifier are provided in each of the first dummy area and the second dummy area.
- a conventional multi-port and charge multiplication type solid-state imaging device there are separate units on both sides of a unit other than the units located at both ends of the plurality of units. There is only one unit on one side.
- the gain in each unit greatly varies depending on the temperature of the unit.
- Each unit includes heat generating elements such as an amplifier and a multiplication register. Therefore, in the conventional multi-port and charge multiplication type solid-state imaging device, a difference occurs between the temperatures of the units at both ends and the temperatures of the other units. Therefore, in the conventional multi-port type and charge multiplication type solid-state imaging device, it is difficult to make the gains between the units uniform.
- the multiplication register and the amplifier are provided in the vicinity of two units located at both ends of the plurality of units. Therefore, the difference between the temperatures of the two units located at both ends and the temperatures of the other units is reduced. As a result, the gain difference between the units is reduced.
- a multi-port type charge multiplying solid-state imaging device that outputs signals based on charges from an imaging region from a plurality of units.
- a solid-state imaging device capable of reducing the gain difference is provided.
- FIG. 1 is a diagram illustrating a solid-state imaging device according to an embodiment.
- a solid-state imaging device 10 shown in FIG. 1 includes an imaging region 12 and a plurality of units 14a to 14d.
- the plurality of units 14a to 14d may be referred to as a unit 14.
- the imaging region 12 is a region that generates charges in response to incident light.
- the imaging region 12 includes a plurality of pixels arranged two-dimensionally, and each pixel includes a photodiode.
- the solid-state imaging device 10 includes a charge accumulation region 16 in addition to the imaging region 12.
- the charge accumulation area 16 is a part for temporarily accumulating charges generated by the imaging area 12 before transferring them to an output register described later.
- the solid-state imaging device 10 having such a charge storage region 16 is called a frame transfer CCD image sensor.
- the solid-state imaging device of the present invention may be an interline CCD image sensor or a full frame transfer CCD image sensor.
- the imaging area 12 has a plurality of areas 12a to 12d.
- the plurality of areas 12a to 12d are arranged in the horizontal direction, and each area includes a plurality of pixel columns.
- the charges generated by the plurality of areas 12 a to 12 d are output to the corresponding unit 14.
- the imaging region 12 of the solid-state imaging device 10 includes four areas, that is, a four-port solid-state imaging device, but the number of ports of the solid-state imaging device of the present invention is not limited to four. Absent.
- Each of the plurality of units 14a to 14d includes an output register 18, a multiplication register 20, and an amplifier 22.
- each of the plurality of units 14 further includes a corner register 24.
- the output register 18 is a transfer register that receives the charge generated by the corresponding area of the imaging region 12 and transferred in the vertical direction, and transfers the charge in the horizontal direction.
- the corner register 24 is a transfer register that transfers charges similarly to the output register 18. The corner register 24 is provided between the output register 18 and the multiplication register 20. The corner register 24 transfers the charge transferred by the output register 18 to the multiplication register 20.
- the multiplication register 20 is a register that multiplies charges by the impact ionization effect and transfers the multiplied charges.
- the multiplication register 20 receives the charge transferred from the output register 18 via the corner register 24 and outputs the multiplied charge to the amplifier 22.
- the amplifier 22 receives the charge multiplied by the multiplication register 20, performs charge-voltage conversion, and generates a signal corresponding to the amount of the charge.
- a floating diffusion (FD) amplifier can be used as the amplifier 22 .
- the solid-state imaging device 10 includes a region R, a first dummy region R1, and a second dummy region R2.
- the region R is a region where a plurality of units 14a to 14d are provided.
- the first dummy region R1 and the second dummy region R2 exist on both sides of the region R in the same direction (horizontal direction) as the charge transfer direction of the output register 18.
- the solid-state imaging device 10 includes a dummy multiplication register 20d and a dummy amplifier 22d in each of the first dummy region R1 and the second dummy region R2.
- the dummy multiplication register 20d and the dummy amplifier 22d are the same elements as the multiplication register 20 and the amplifier 22, respectively.
- a dummy output register 18d and a dummy corner register 24d are provided in each of the first dummy region R1 and the second dummy region R2.
- the output register 18d and the corner register 24d are the same elements as the output register 18 and the corner register 24.
- FIG. 2 is a diagram showing the solid-state imaging device 10 shown in FIG. 1 with wiring.
- the solid-state imaging device 10 is a three-phase drive type solid-state imaging device, and includes terminals P1 to P3, PM1 to PM3, and a PDC.
- Terminals P1 to P3 are terminals for inputting a three-phase clock signal to the output register 18 and the corner register 24 of all the units 14a to 14d.
- the wiring extending from the terminals P1 to P3 is common to the output register 18 and the corner register 24 of all the units 14a to 14d, and is connected to the output register 18 and the corner register 24 of all the units 14a to 14d.
- the output register 18 and the corner register 24 transfer charges by receiving a three-phase clock signal from the terminals P1 to P3.
- the wiring extending from these terminals P1 to P3 is also common to the dummy output register 18d and the dummy corner register 24d, and is also connected to the output register 18d and the corner register 24d.
- Terminals PM1 to PM3 are terminals for inputting a three-phase clock signal to the multiplication registers 20 of all the units 14a to 14d.
- the terminal PDC is a terminal to which a DC voltage for forming a barrier in the multiplication register 20 is input.
- Wirings extending from the terminals PM1 to PM3 and the PDC are common to the multiplication registers 20 of all the units 14a to 14d, and are connected to the multiplication registers 20 of all the units 14a to 14d.
- the wirings extending from these terminals PM1 to PM3 and PDC are also common to the dummy multiplication register 20d and are also connected to the multiplication register 20d.
- the amplifiers 22 and 22d have a reset gate terminal RG, a reset drain terminal RD, an output drain terminal OD, and an output source terminal OS.
- An output gate terminal OG is provided between the FD regions of the amplifiers 22 and 22d and the final stage of the multiplication register 20.
- the terminal RG is a terminal for giving a reset pulse to the gates of the reset transistors of the amplifiers 22 and 22d.
- a reset pulse By applying a reset pulse to the terminal RG, the charge accumulated in the FD region is discharged from the terminal RD connected to the drain of the reset transistor.
- a predetermined power supply voltage is applied to the terminals RD and OD.
- An ON signal is given to the terminal OG when transferring the charge from the multiplication register. As a result, the charge from the multiplication register is sent to the FD region.
- An amplified signal is output from the terminal OS.
- the same signal is given to the same terminals of the amplifiers 22 and 22d, but wiring is not shared in order to prevent crosstalk between adjacent amplifiers.
- a multiplication register 20d and an amplifier are provided in each of the first dummy region R1 and the second dummy region R2 in the vicinity of the units 14a and 14d at both ends of the plurality of units 14a to 14d. 22d is provided. Then, signals are given to the multiplication register 20d and the amplifier 22d as well as the multiplication register 20 and the amplifier 22 of the units 14a to 14d. Thereby, the multiplication register 20d and the amplifier 22d generate heat similarly to the multiplication register 20 and the amplifier 22. Therefore, the difference between the temperatures of the units 14a and 14d at both ends and the temperatures of the other units 14b and 14c is reduced. Therefore, in the solid-state imaging device 10, the gain difference between the units 14a to 14d is reduced.
- the present invention is not limited to the above-described embodiment, and various modifications can be made.
- the solid-state imaging device of the present invention may not have a dummy output register and a dummy corner register. This is because the heat generation of the output register and the corner register is smaller than that of the multiplication register and the amplifier.
- the solid-state imaging device of the present invention is not limited to the three-phase drive type, and various drive methods such as four-phase drive can be employed.
- DESCRIPTION OF SYMBOLS 10 Solid-state imaging device, 12 ... Imaging area, 14a-14d ... Unit, 16 ... Charge storage area, 18 ... Output register, 18d ... Output register (dummy), 20 ... Multiplication register, 20d ... Multiplication register (dummy) 22 ... Amplifier, 22d ... Amplifier (dummy), 24 ... Corner register, 24d ... Corner register (dummy), OD ... Output drain terminal, OG ... Output gate terminal, OS ... Output source terminal, RD ... Reset drain terminal, RG ... reset gate terminal, P1 to P3 ... terminal, PDC ... terminal, PM1 to PM3 ... terminal, R ... area, R1 ... first dummy area, R2 ... second dummy area.
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- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Electromagnetism (AREA)
- Solid State Image Pick-Up Elements (AREA)
- Transforming Light Signals Into Electric Signals (AREA)
Abstract
Description
Claims (1)
- マルチポート型の固体撮像装置であって、
複数の画素列を含む撮像領域と、
前記撮像領域からの電荷に基づく信号を生成する複数のユニットであって、前記複数の画素列が配列された方向に配列された該複数のユニットと、
を備え、
前記複数のユニットの各々は、
前記複数の画素列のうち一以上の対応の画素列からの電荷を転送する出力レジスタと、
前記出力レジスタからの電荷を受けて増倍された電荷を生成する増倍レジスタと、
前記増倍レジスタからの増倍された電荷に基づく信号を生成するアンプと、
を有しており、
該固体撮像装置は、
前記複数のユニットが設けられた領域と、該領域の前記方向における両側に位置する第1のダミー領域と第2のダミー領域と、を含み、
前記第1のダミー領域と前記第2のダミー領域のそれぞれに、増倍レジスタ及びアンプを備えている、
固体撮像装置。
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP10735747A EP2247099B1 (en) | 2009-01-30 | 2010-01-22 | Solid-state imaging device |
KR1020107015311A KR101178670B1 (ko) | 2009-01-30 | 2010-01-22 | 고체 촬상 장치 |
US12/920,142 US8367999B2 (en) | 2009-01-30 | 2010-01-22 | Solid state imaging device comprising dummy regions each containing a multiplication register and an amplifier |
AT10735747T ATE550874T1 (de) | 2009-01-30 | 2010-01-22 | Festkörperabbildungsvorrichtung |
CN2010800011468A CN101960837B (zh) | 2009-01-30 | 2010-01-22 | 固体摄像装置 |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2009020457A JP5237843B2 (ja) | 2009-01-30 | 2009-01-30 | 固体撮像装置 |
JP2009-020457 | 2009-01-30 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2010087278A1 true WO2010087278A1 (ja) | 2010-08-05 |
Family
ID=42395540
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP2010/050777 WO2010087278A1 (ja) | 2009-01-30 | 2010-01-22 | 固体撮像装置 |
Country Status (8)
Country | Link |
---|---|
US (1) | US8367999B2 (ja) |
EP (1) | EP2247099B1 (ja) |
JP (1) | JP5237843B2 (ja) |
KR (1) | KR101178670B1 (ja) |
CN (1) | CN101960837B (ja) |
AT (1) | ATE550874T1 (ja) |
TW (1) | TWI481257B (ja) |
WO (1) | WO2010087278A1 (ja) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5330001B2 (ja) * | 2009-01-30 | 2013-10-30 | 浜松ホトニクス株式会社 | 固体撮像装置 |
US8773563B2 (en) | 2011-05-25 | 2014-07-08 | Truesense Imaging, Inc. | Multi-purpose architecture for CCD image sensors |
US8411189B2 (en) * | 2011-05-25 | 2013-04-02 | Truesense Imaging, Inc. | Multi-purpose architecture for CCD image sensors |
US8800130B2 (en) | 2011-05-25 | 2014-08-12 | Truesense Imaging, Inc. | Methods for producing image sensors having multi-purpose architecture |
CN104767945B (zh) * | 2015-04-14 | 2018-02-06 | 中国电子科技集团公司第四十四研究所 | 能提高emccd转移效率的驱动电路 |
CN106601767B (zh) * | 2016-12-02 | 2019-06-04 | 中国电子科技集团公司第四十四研究所 | 能缩减电极信号延迟的正照帧转移ccd |
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JPH09186937A (ja) * | 1995-12-27 | 1997-07-15 | Nec Corp | 固体撮像装置 |
JPH10304256A (ja) * | 1997-03-22 | 1998-11-13 | Eev Ltd | Ccdイメージャ |
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JP2006201044A (ja) * | 2005-01-21 | 2006-08-03 | Hitachi High-Technologies Corp | 欠陥検査方法及びその装置 |
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2009
- 2009-01-30 JP JP2009020457A patent/JP5237843B2/ja active Active
-
2010
- 2010-01-22 US US12/920,142 patent/US8367999B2/en not_active Expired - Fee Related
- 2010-01-22 CN CN2010800011468A patent/CN101960837B/zh not_active Expired - Fee Related
- 2010-01-22 EP EP10735747A patent/EP2247099B1/en not_active Not-in-force
- 2010-01-22 WO PCT/JP2010/050777 patent/WO2010087278A1/ja active Application Filing
- 2010-01-22 KR KR1020107015311A patent/KR101178670B1/ko active IP Right Grant
- 2010-01-22 AT AT10735747T patent/ATE550874T1/de active
- 2010-01-27 TW TW099102275A patent/TWI481257B/zh not_active IP Right Cessation
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JPH09186937A (ja) * | 1995-12-27 | 1997-07-15 | Nec Corp | 固体撮像装置 |
JPH10304256A (ja) * | 1997-03-22 | 1998-11-13 | Eev Ltd | Ccdイメージャ |
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Also Published As
Publication number | Publication date |
---|---|
JP2010178194A (ja) | 2010-08-12 |
TWI481257B (zh) | 2015-04-11 |
KR20100109550A (ko) | 2010-10-08 |
EP2247099A4 (en) | 2011-03-23 |
EP2247099A1 (en) | 2010-11-03 |
US8367999B2 (en) | 2013-02-05 |
CN101960837B (zh) | 2012-11-28 |
US20110031377A1 (en) | 2011-02-10 |
ATE550874T1 (de) | 2012-04-15 |
JP5237843B2 (ja) | 2013-07-17 |
EP2247099B1 (en) | 2012-03-21 |
TW201127031A (en) | 2011-08-01 |
KR101178670B1 (ko) | 2012-08-30 |
CN101960837A (zh) | 2011-01-26 |
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